From patchwork Thu Nov 29 16:45:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 152408 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2602160ljp; Thu, 29 Nov 2018 08:45:37 -0800 (PST) X-Google-Smtp-Source: AFSGD/X1xBi3Q3vnmQQRwlaADkRLTq4LiqNsy2Ix7hC+G0w+rvVOTikFRCQ5z0E/5e9C9HB8f8Y4 X-Received: by 2002:a17:902:2bc5:: with SMTP id l63-v6mr2159293plb.241.1543509937589; Thu, 29 Nov 2018 08:45:37 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543509937; cv=none; d=google.com; s=arc-20160816; b=j/48EKNNy/w41fxwE+ynIuCEx0qdw+lMNHB0GUi28jQNsBCWB20zJ2DsGLzdDHgbAz JYIo0WdsiYcsuNg1tbzhXezLPH95gWwNuJq3LamaO0pHRiX7awydGKbiqqrSOJCa4c6J 7WZa69JbJcNNq0qYkoTpumyHo7cXkAWGUUD+xCrz50S1bCoZwVrjCllTvvG6BwXX7qlR KGFfvlSSLbm6C+NBceNZRXO0WwdHeaz9vXx2+pCr9NVWB7QFjR2wHekQ3AFqz2Knxkq4 SPVYOXZ9IVLvoEPtC2Z0rrIGqFYLiTGvyMV7MDhOubzriQEXZxAPxLnRloBmZ59fY+/2 +7Kw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=iLou7dz6KpGeOcdPws8u1aBOfWLU1UkVe4gPfxDCfrk=; b=S8CoR1CxR+uuPzGvGLBpn4on/HRsiyV75UIQhne/dU7JAOUbezIe1UOHzDlk7g/iVP v5B2rAR2g3NW5wuOD/0UhAp29frLJ7Oxu1MftrL3g326MnaUUGvW53/bJ8+ASzoeTTAL SUEGtBXcGb8m2cR8WjDhAYGmmWDHF5aciTZpRoyeE1cYub3aKaAYhRgic/zN60SE7Jrd Pihwc3AbQN2azgepfFDjpwqqxBFELgxEqIX5KsjXHIeaHFxJa+GYBBVWh5T+uFIjm8xI 0gfyki8bIoPb4do1zeMeXHigmoT+ObED+XPaw3lQ+x8waFX2mVUZKeSL14Lo8OBZLSE6 Tw5Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=P1WlIP5K; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[82.243.161.21]) by smtp.googlemail.com with ESMTPSA id d4sm2721909wrp.89.2018.11.29.08.45.31 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 29 Nov 2018 08:45:32 -0800 (PST) From: Jerome Brunet To: Neil Armstrong , Carlo Caione , Kevin Hilman Cc: Jerome Brunet , linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/3] dt-bindings: clk: meson: add ao controller clock inputs Date: Thu, 29 Nov 2018 17:45:22 +0100 Message-Id: <20181129164524.18670-2-jbrunet@baylibre.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181129164524.18670-1-jbrunet@baylibre.com> References: <20181129164524.18670-1-jbrunet@baylibre.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the clock inputs of amlogic AO clock controller Signed-off-by: Jerome Brunet --- .../devicetree/bindings/clock/amlogic,gxbb-aoclkc.txt | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) -- 2.19.1 Reviewed-by: Stephen Boyd diff --git a/Documentation/devicetree/bindings/clock/amlogic,gxbb-aoclkc.txt b/Documentation/devicetree/bindings/clock/amlogic,gxbb-aoclkc.txt index 3a880528030e..c480db8f4793 100644 --- a/Documentation/devicetree/bindings/clock/amlogic,gxbb-aoclkc.txt +++ b/Documentation/devicetree/bindings/clock/amlogic,gxbb-aoclkc.txt @@ -11,6 +11,11 @@ Required Properties: - GXM (S912) : "amlogic,meson-gxm-aoclkc" - AXG (A113D, A113X) : "amlogic,meson-axg-aoclkc" followed by the common "amlogic,meson-gx-aoclkc" +- clocks: list of clock phandle, one for each entry clock-names. +- clock-names: should contain the following: + * "xtal" : the platform xtal + * "mpeg-clk" : the main clock controller mother clock (aka clk81) + * "ext-32k" : external 32kHz reference if any (optional) - #clock-cells: should be 1. @@ -40,8 +45,9 @@ ao_sysctrl: sys-ctrl@0 { compatible = "amlogic,meson-gxbb-aoclkc", "amlogic,meson-gx-aoclkc"; #clock-cells = <1>; #reset-cells = <1>; + clocks = <&xtal>, <&clkc CLKID_CLK81>; + clock-names = "xtal", "mpeg-clk"; }; -}; Example: UART controller node that consumes the clock and reset generated by the clock controller: From patchwork Thu Nov 29 16:45:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 152409 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2602167ljp; Thu, 29 Nov 2018 08:45:38 -0800 (PST) X-Google-Smtp-Source: AFSGD/V7w39zIVfwZN0D7IIiSUBFeY5W/BDC2G8gQx8jdsR9hfa2Ek62uPvYF9J5r+LbSf0zOGLv X-Received: by 2002:a17:902:9897:: with SMTP id s23mr2065508plp.69.1543509937902; Thu, 29 Nov 2018 08:45:37 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543509937; cv=none; d=google.com; s=arc-20160816; b=WZLmIj4jYN7NWVUZYeUyzDTXT+yal81NiNvKuUpefUsjrnUJAsypPhT76vOv4GacC6 izf5nx+rZR3LSCeEAhkHcGSnBmHVhg1mQGc4VaGKGTbpSeh0yii10PlS9uIomFoebj/q 8HLnsJVJ+/9KMJ+j+Lal1Q7T1jJ5w8vwrRk4WU9jA4E2+JLsK3wK6ZRi3ck9fvJXdZrq SldWh9C95QlWXao6MSELZ8S2Vh4wuxdcsD4IZJf38PG8ZPuWsg0co/41dYWk4LN/fU4K T1leMTRXaIzut+Ye7ESRJNjUMLU23sT1Kr8Q78r9nsJvNyFJlejaXcp6OwyqUwpeB5OM Fhdg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=/+HUPI7NCPEqxzAVa9O0IyRuOHGA1MJL83xJ5Lr9NJk=; b=pZ1OoRQrdprmRLLwEoyfddUreF1yauNTFCSORnCAuPp+YajewAc9P/9ZQXBqGtUBTB K5URlW8vYkEu7/GJfZ7mTNt0XTXqOU5WrfcwN1vgQ1zEtg3pRWD8/SbGRDShAgQ/nGbv 2sLlVbKY+UffCWOov8APeos2x6NeoXiTmpT7sReHd5i9mn6Ic47Za9YBAXXPWeX/u07L s1b5bTV8Z9m+qho8gmlOGmJ41Pt0+XSvfYbjZUeMFQv0VBkbvpRqcI+E/OZcB9CRnI6S qLfiUHkpm/WpLhu5+FEwR77dfvZ/yF/v+GyPYNSwmrklKmEDQSIOzJ3kUdftzRiFPNj1 cHFw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b="DexfL2/9"; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[82.243.161.21]) by smtp.googlemail.com with ESMTPSA id d4sm2721909wrp.89.2018.11.29.08.45.32 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 29 Nov 2018 08:45:33 -0800 (PST) From: Jerome Brunet To: Neil Armstrong , Carlo Caione , Kevin Hilman Cc: Jerome Brunet , linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/3] dt-bindings: clk: meson: add main controller clock input Date: Thu, 29 Nov 2018 17:45:23 +0100 Message-Id: <20181129164524.18670-3-jbrunet@baylibre.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181129164524.18670-1-jbrunet@baylibre.com> References: <20181129164524.18670-1-jbrunet@baylibre.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the clock input of the main clock controller Signed-off-by: Jerome Brunet --- Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt | 3 +++ 1 file changed, 3 insertions(+) -- 2.19.1 diff --git a/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt b/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt index e950599566a9..79454869f96d 100644 --- a/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt +++ b/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt @@ -9,6 +9,8 @@ Required Properties: "amlogic,gxbb-clkc" for GXBB SoC, "amlogic,gxl-clkc" for GXL and GXM SoC, "amlogic,axg-clkc" for AXG SoC. +- clocks: phandle to the input clock of the controller, presumably the + platform xtal. - #clock-cells: should be 1. @@ -31,6 +33,7 @@ sysctrl: system-controller@0 { clkc: clock-controller { #clock-cells = <1>; compatible = "amlogic,gxbb-clkc"; + clocks = <&xtal> }; };