From patchwork Thu Nov 29 16:54:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 152411 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2611408ljp; Thu, 29 Nov 2018 08:55:04 -0800 (PST) X-Google-Smtp-Source: AFSGD/V4dp4tyqUs0IRRQiYJ5eZF2g5JTMhFWFZUjDwcJPhCkDPmIEUXZc1tsoOYORI4IYohd6WM X-Received: by 2002:a63:bf0b:: with SMTP id v11mr1898104pgf.302.1543510504338; Thu, 29 Nov 2018 08:55:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543510504; cv=none; d=google.com; s=arc-20160816; b=UIt7um6AEBqMtqFN+VIP/MFIdsCOf1eriI3sHAkYp63g0QOcoLlFtUsB0jc6obEbGx w4tWVBlQGMuDYn0KfpKqomEnHhYlvz+ADnfEqrDiqOuIaq9gFrO8qxy4YgJN27vDthm9 +pOrCQejvWM+ZeUyB/I6ceLU9k+6MtDYtDljSqtRW3CkMFQxHjAUIB73uwHc8oK7vbYG QOZkX5CYfyUCAN1hdLQKt08fFqPf75aHptfGDeCqU5FtgkgupxUcaLwvsFopcKuP7K8f ZcYE2eiUu8Fbh0MYmcH6GhEpi7PCCYlmGn+TniXZ02N4N+6+K3LkrlwkNDT74/VSfUjD vjAw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=HRZsXfVX9KBSlXVwQ78mHqYkQJoNSqDjXJ+icKBQYMg=; b=PezQJhBi6kD1AsU7/2ADYdrxNYjvgsUv0uBIn3u0nz1SAVNbU50/wo7Fi7Gv7nu6NF 1eNr2hA3UpeoxGcM9GZPZe+oCNefLGHe05m06zduPz9TT7aZxAe5tA7X8wYfOH6VPho/ maEFAH7ZCK8Z/jmmYNRAQJSxg7RZEPj6cMpDVE+nyIjFJNRXIJiNO2yOddek1th5ICdR hFEx1e+xuhWqU1d809t9Gaw4IOzhybM8w67mtPjh5f118TmHUL9FcFrXwyiwQf+rpyEA imJz8mwJMTFwL3DFIezl7NC4rAxeaasGa6irZC720dud7d0nmT8qBgis3g83bhQVU4qa fwJQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b="lFLzIG/U"; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k189si2296578pgd.589.2018.11.29.08.55.04; Thu, 29 Nov 2018 08:55:04 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b="lFLzIG/U"; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730015AbeK3EBD (ORCPT + 6 others); Thu, 29 Nov 2018 23:01:03 -0500 Received: from mail-wr1-f65.google.com ([209.85.221.65]:46300 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729989AbeK3EBD (ORCPT ); Thu, 29 Nov 2018 23:01:03 -0500 Received: by mail-wr1-f65.google.com with SMTP id l9so2599491wrt.13 for ; Thu, 29 Nov 2018 08:55:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=HRZsXfVX9KBSlXVwQ78mHqYkQJoNSqDjXJ+icKBQYMg=; b=lFLzIG/UAwDukMZJ6lcx1pApLjGL45NvKXfJEL+qr6AnUMaVKNqJj73S0drx2VZgYM BAEhp6KAVU18elkPWc3ulBOCmYDLh1/W7GZVtj8DNrFPpJxDqNZGY9s75cBz5kleIUWE CiSg06sscFiGuPzVNlIH1Y56DotnSzPxEcMrksR4Pm927KenY+PWAAugHDCETaGsfTE3 /L3ebf7w4Y4T9/elFazC15ZkuPzgclKoVIssfThBaQxjURsb9C6uFuJq6MqUaAz89Ffa UC9vJJO9OcEDDYTILsXx8yaF/9lqgmgaKKQ6MzOjwT2fcg1bnUyES+xTt8VeSqC582Xb 132Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=HRZsXfVX9KBSlXVwQ78mHqYkQJoNSqDjXJ+icKBQYMg=; b=LOFVW3sEWtoPSi0gYY4LApfk6rkJeCeeK9qxwVciXIbF4uFjDKOlZaRFRppXWKVwau db3PMHMq2Z1JD8kYrZESPfadkgOkLKeWnzt9SYsgv+ZC/x9GSFXjI+r13go983e/UpKs wTMyKm+4UZsgI8WWIg6b1b7IiuoxKCkY40bFdywLmrq/Q/bcOsm6lH5Z4L6+ptSDxSow nYPXh6ny93uNIGiCForlePQ+drmEf74iH9Yvo4lW350JRlj244OpNt3s/qimg3pm7Ykb 71pOV7psDRDXkHnPWuTDAXw3+v7TkzyLKDlKnklfBbOvNvPP4dIuPuSxB4eGEi737a7A mQsg== X-Gm-Message-State: AA+aEWakx7fUBF2I5z0SKpth5rN47WJoDoPg3L6Lm4W9VkuBtsMWxhxQ 1ta+CPSYY6BI98KbzAM4YlAOcw== X-Received: by 2002:adf:fd87:: with SMTP id d7mr2022047wrr.74.1543510501467; Thu, 29 Nov 2018 08:55:01 -0800 (PST) Received: from boomer.lan (cag06-3-82-243-161-21.fbx.proxad.net. [82.243.161.21]) by smtp.googlemail.com with ESMTPSA id h131sm4203676wmd.17.2018.11.29.08.55.00 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 29 Nov 2018 08:55:00 -0800 (PST) From: Jerome Brunet To: Kevin Hilman , Carlo Caione Cc: Jerome Brunet , devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] arm64: dts: meson-axg: remove alternate xtal Date: Thu, 29 Nov 2018 17:54:51 +0100 Message-Id: <20181129165451.21446-1-jbrunet@baylibre.com> X-Mailer: git-send-email 2.19.1 MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org There is actually no alternate xtal on any of the axg board I have seen so far. The 32k is actually generated internally, deriving from the 24MHz main xtal. Amlogic SoC also have the option to provide the 32k reference externally, through one of the AO pads, but no platform is using this ATM. Fixes: 5e395e146667 ("ARM64: dts: meson-axg: add an 32K alt aoclk") Signed-off-by: Jerome Brunet --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 7 ------- 1 file changed, 7 deletions(-) -- 2.19.1 diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index f2e9fbfff4ea..63adf54b00c5 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -53,13 +53,6 @@ status = "disabled"; }; - ao_alt_xtal: ao_alt_xtal-clk { - compatible = "fixed-clock"; - clock-frequency = <32000000>; - clock-output-names = "ao_alt_xtal"; - #clock-cells = <0>; - }; - arm-pmu { compatible = "arm,cortex-a53-pmu"; interrupts = ,