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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id bg20-20020a05600c3c9400b0037fa5c422c8sm10240093wmb.48.2022.03.03.03.37.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Mar 2022 03:37:44 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 1/2] target/arm/translate-neon: UNDEF if VLD1/VST1 stride bits are non-zero Date: Thu, 3 Mar 2022 11:37:40 +0000 Message-Id: <20220303113741.2156877-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220303113741.2156877-1-peter.maydell@linaro.org> References: <20220303113741.2156877-1-peter.maydell@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::429 (failed) Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" For VLD1/VST1 (single element to one lane) we are only accessing one register, and so the 'stride' is meaningless. The bits that would specify stride (insn bit [4] for size=1, bit [6] for size=2) are specified to be zero in the encoding (which would correspond to a stride of 1 for VLD2/VLD3/VLD4 etc), and we must UNDEF if they are not. We failed to make this check, which meant that we would incorrectly handle some instruction patterns as loads or stores instead of UNDEFing them. Enforce that stride == 1 for the nregs == 1 case. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/890 Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Tested-by: Richard Henderson --- target/arm/translate-neon.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/arm/translate-neon.c b/target/arm/translate-neon.c index 3854dd35163..072fdc1e6ee 100644 --- a/target/arm/translate-neon.c +++ b/target/arm/translate-neon.c @@ -657,6 +657,9 @@ static bool trans_VLDST_single(DisasContext *s, arg_VLDST_single *a) /* Catch the UNDEF cases. This is unavoidably a bit messy. */ switch (nregs) { case 1: + if (a->stride != 1) { + return false; + } if (((a->align & (1 << a->size)) != 0) || (a->size == 2 && (a->align == 1 || a->align == 2))) { return false; From patchwork Thu Mar 3 11:37:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 547790 Delivered-To: patch@linaro.org Received: by 2002:ac0:f585:0:0:0:0:0 with SMTP id s5csp535725imq; Thu, 3 Mar 2022 03:38:41 -0800 (PST) X-Google-Smtp-Source: ABdhPJzqMpEAZfOHa1zTasBRLaQwfZZpNtyrnR2+Gg5o4xfK6pAPhsP0zvIbYt76yg43qMZ1yswf X-Received: by 2002:a5b:c44:0:b0:628:a6d0:b784 with SMTP id d4-20020a5b0c44000000b00628a6d0b784mr5906691ybr.374.1646307521341; Thu, 03 Mar 2022 03:38:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1646307521; cv=none; d=google.com; s=arc-20160816; b=KHJI7ZWHyEzOBHrc8jpCEnILBqwR+7JX4oZMbZ8azyGktuZbJpXnmjqkNCTvFJThU8 0WjwtMPwRmUC8qT/rinPeaINTAqXneuVKnKdroM76eJtDC1yFTcAoK20c+sTuBsjXNdy SM7Y19r9s2c8S/PezuGGhiZHiDkZCNmVjHCr6ts8Py8q3ZgHwyAuyGu+pmkE3BNrgByW eVx9ahXmiyNnWACPWMWTkZGzIMiYKrodNuAWaAk7n6C3yidWwkAlsjzSHBGYjyF/FA76 vivcLPvX6nZD+/DoMQVJTfTgIdP005Wn0SY1E/u7I0RZz9AKF4Yfm6QrlsIKcN6SY1WP 3UEw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=nsvhK/ifUeSvWeX1rdfKJDrF5hLi+OAvYK2zDd+7vVs=; b=Cxx9Uye9UZzfNcTiV30mnlTtpsU9qGzVSMxo/5tjBCnd83+WtsKLFrIqeSDVbUxHp4 S0LsT27lvFL2KzFnEDv20bWYC9CqtZCZQkFuhAkyfFRwmDhYzn6jNArToTgYw9uF8alY qmcMVledJNlp4RK+bxFgVWkpqHfVKZD8SptTRMwkDYrRskbAXrLjMyxrEdYNEE0Pdpa/ WVN5AQDm+/9iUo5ZhZhXIKoBchB/bEjsI8j8yZhVjQp6UdH9Dhtgg3QXymy8iila34fA duMmbdlmNcVzpSfSgjBeZampaA7a64qHLnCrcF4PfIRObmfb9VtK4oJ+JIkl0H+g/O4O veMw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=H7lcVf0F; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id bg20-20020a05600c3c9400b0037fa5c422c8sm10240093wmb.48.2022.03.03.03.37.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Mar 2022 03:37:45 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 2/2] target/arm/translate-neon: Simplify align field check for VLD3 Date: Thu, 3 Mar 2022 11:37:41 +0000 Message-Id: <20220303113741.2156877-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220303113741.2156877-1-peter.maydell@linaro.org> References: <20220303113741.2156877-1-peter.maydell@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::430 (failed) Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" For VLD3 (single 3-element structure to one lane), there is no alignment specification and the alignment bits in the instruction must be zero. This is bit [4] for the size=0 and size=1 cases, and bits [5:4] for the size=2 case. We do this check correctly in VLDST_single(), but we write it a bit oddly: in the 'case 3' code we check for bit 0 of a->align (bit [4] of the insn), and then we fall through to the 'case 2' code which checks bit 1 of a->align (bit [5] of the insn) in the size 2 case. Replace this with just checking "is a->align non-zero" for VLD3, which lets us drop the fall-through and put the cases in this switch in numerical order. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Tested-by: Richard Henderson --- target/arm/translate-neon.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/target/arm/translate-neon.c b/target/arm/translate-neon.c index 072fdc1e6ee..384604c0095 100644 --- a/target/arm/translate-neon.c +++ b/target/arm/translate-neon.c @@ -665,16 +665,16 @@ static bool trans_VLDST_single(DisasContext *s, arg_VLDST_single *a) return false; } break; - case 3: - if ((a->align & 1) != 0) { - return false; - } - /* fall through */ case 2: if (a->size == 2 && (a->align & 2) != 0) { return false; } break; + case 3: + if (a->align != 0) { + return false; + } + break; case 4: if (a->size == 2 && a->align == 3) { return false;