From patchwork Sun Mar 13 19:04:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 550960 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7443DC4167D for ; Sun, 13 Mar 2022 19:05:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235327AbiCMTGT (ORCPT ); Sun, 13 Mar 2022 15:06:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35462 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235319AbiCMTGR (ORCPT ); Sun, 13 Mar 2022 15:06:17 -0400 Received: from mail-ej1-x62f.google.com (mail-ej1-x62f.google.com [IPv6:2a00:1450:4864:20::62f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E2B754BBAB; Sun, 13 Mar 2022 12:05:04 -0700 (PDT) Received: by mail-ej1-x62f.google.com with SMTP id yy13so29628843ejb.2; Sun, 13 Mar 2022 12:05:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=8P3wAYvgFlPve71dG0z5aPiI1G8WoaU4vYr3l4vmoOE=; b=mNHZ2HwvOU0rfN62Ty/YCb8SbLQ6QuDavrDPDiTkmFYkV4/JnHmHB7Or51GDN5+pT0 sGf3y7gY8ZM0aQCWBiZjUmoEglvaRmnGKmHqjlO+h44R/UGT7/15ftGEqNJMlpDMGedv MrbI+avm5+dToHe7WADil4FPPKqKcnLmG5QZSaPRTi9Y8vW97M1rrSFhPqT54ShkQffM qXfEJBanjpqpP4w8XOMNkEIkGzh3CYkacd7GQ6Y0it53u1YvA8Bf6QjO/jAn6kOW0WrP 3n5Aj7hgh8BNSMnmJEcF30r7R2nEY6BjVsnztuP+Nts75MGQkuJvYWpyCf3RGUmaXcCD dvlw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=8P3wAYvgFlPve71dG0z5aPiI1G8WoaU4vYr3l4vmoOE=; b=UYEoYMuwotcEAVRUIElTkEnhSblYpolD4UPUBezOTOhEXcVHuWDYvoZhsAwa/V/3RR yoEaEWeAcCYctJqUnD+WAzZkT1N7QCMdeKEpOduJxJc8ge8QRnnUTSIL9TgupXVs6KAh SnG6bRj3QCV8hJmIAuqdzF8jBnkNZoxEFe0AJabrKAYaF7v+6ZrCE7k5nHbH/1M25DSl UUh1ZbxjCRh/HfA69QS2nBf1rM9/kZt9KZrSQNG3xC1HzpXLEiKW7xN1DVWbKsuqL/1M s4Bx/GXvlscj8yjSC38yLvX6XBEkHaBibQTc9E6ZmGEPhYOOT6wSMxCDNJFcX6ZoZR46 H3SQ== X-Gm-Message-State: AOAM531lyU+Yd5qEmrqXf6wOuwQtgdUFKX8xVnrnPygpL/CAy67zkBB0 qGgpdZstPK0hAfpT+9PMhLtQAGDrF9U= X-Google-Smtp-Source: ABdhPJz5jVjxW9w997O8Vre9I2Mw79xpEHQfkAKrTiTOdLWduAIIPD3FmQ/hxHT56jQl/yzN44QvgQ== X-Received: by 2002:a17:906:5d0f:b0:6da:bb7a:4da with SMTP id g15-20020a1709065d0f00b006dabb7a04damr13484301ejt.183.1647198303261; Sun, 13 Mar 2022 12:05:03 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id n13-20020a170906724d00b006cedd6d7e24sm5856697ejk.119.2022.03.13.12.05.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 13 Mar 2022 12:05:02 -0700 (PDT) From: Ansuel Smith To: Rob Herring , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Peter De Schrijver , Prashant Gaikwad , Thierry Reding , Jonathan Hunter , Ansuel Smith , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 02/16] clk: qcom: gcc-ipq806x: skip pxo/cxo fixed clk if already present Date: Sun, 13 Mar 2022 20:04:05 +0100 Message-Id: <20220313190419.2207-3-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220313190419.2207-1-ansuelsmth@gmail.com> References: <20220313190419.2207-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Skip pxo/cxo clock registration if they are already defined in DTS as fixed clock. Signed-off-by: Ansuel Smith --- drivers/clk/qcom/gcc-ipq806x.c | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c index d6b7adb4be38..27f6d7626abb 100644 --- a/drivers/clk/qcom/gcc-ipq806x.c +++ b/drivers/clk/qcom/gcc-ipq806x.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -3061,15 +3062,22 @@ static int gcc_ipq806x_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct regmap *regmap; + struct clk *clk; int ret; - ret = qcom_cc_register_board_clk(dev, "cxo_board", "cxo", 25000000); - if (ret) - return ret; + clk = clk_get(dev, "cxo"); + if (IS_ERR(clk)) { + ret = qcom_cc_register_board_clk(dev, "cxo_board", "cxo", 25000000); + if (ret) + return ret; + } - ret = qcom_cc_register_board_clk(dev, "pxo_board", "pxo", 25000000); - if (ret) - return ret; + clk = clk_get(dev, "pxo"); + if (IS_ERR(clk)) { + ret = qcom_cc_register_board_clk(dev, "pxo_board", "pxo", 25000000); + if (ret) + return ret; + } ret = qcom_cc_probe(pdev, &gcc_ipq806x_desc); if (ret) From patchwork Sun Mar 13 19:04:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 550959 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 94929C433F5 for ; Sun, 13 Mar 2022 19:05:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235347AbiCMTGW (ORCPT ); Sun, 13 Mar 2022 15:06:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35678 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235331AbiCMTGT (ORCPT ); Sun, 13 Mar 2022 15:06:19 -0400 Received: from mail-ed1-x52e.google.com (mail-ed1-x52e.google.com [IPv6:2a00:1450:4864:20::52e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4B7D24C7B5; Sun, 13 Mar 2022 12:05:07 -0700 (PDT) Received: by mail-ed1-x52e.google.com with SMTP id t1so16836989edc.3; Sun, 13 Mar 2022 12:05:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=8h0dp/sRCWnE/SzxqBhwWtp3OCJwunZ7486W2HMfBko=; b=fTZnAXUYeZUwUee4NNITJDgsbxWYwAQoG/PGVk3BVITqzJRM2B26EaS6H9Yn+xeLOW i+NVYI2pBj2MkklsM3/9DyssGo9vfdbueNZd+Sg8+Bf696+rKJBmP5TWauHlQrN0lTGH IagMD2jwPspZz6XvTLiRhmWngCZhWpIqSihNi+XycGs8Tp79jlAqQhKduD1YZKm+c/pR c6OnVAhsrOvFsAEigFXHBaw5pILlpvGBOfoM6Z7sP8DZ7m49+Fj3jFTk7MwdsMevruKB SPYhWZIThu9OaMKG8FldOj84uXfkp5OKl3A7ItCQm0Rok675LBjVDIkStbHfCviFc2CD J+zg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=8h0dp/sRCWnE/SzxqBhwWtp3OCJwunZ7486W2HMfBko=; b=BgtPPxeMmeALm2VYvC+a1p3IMjexEAwCRceDAtbOXjDaH5JvZMM+5CsN4sq53kV0g9 MwwEWmT6yMxV/1Rq4UiN4zhi1+HGaMh/+dCy4JR8MLljNuFjyV5IPpoGmtsGaaWr5ht6 GOrVLS8tm8Tz1Y6/3ee08rvRsFOoerzl6z8hTkWZHhyN7hjNP4CuvyTwAI55o24y2bTW jwTws2iE3rDM+iI3QrMMqdhcxB6Z/mmgAzHOS5k5s5Y9IU94wXecBbCMdKIo+GjVAcPc n2ZsRxoHxnhVwNQjZr/TcRzhKyL7dw4KcdAo1Dip8sOTf40DN7JH5W7lAC/GYbbjMejR bo6Q== X-Gm-Message-State: AOAM533lPqXrzCSsikOw5p2/19VI7SNRCqxgPhxxx7ZQdjeogbUb9aI2 xWYWyqFrxfYa56Ed/tVK5Kw= X-Google-Smtp-Source: ABdhPJwYxPIShgzFqu9DIExRZEI3B0Qg1ODsH5xSucqCFcL2oZov01PvEvnKI71D+RrrLT7jHyrb6A== X-Received: by 2002:a50:ab53:0:b0:415:d2cc:de46 with SMTP id t19-20020a50ab53000000b00415d2ccde46mr17268064edc.193.1647198305679; Sun, 13 Mar 2022 12:05:05 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id n13-20020a170906724d00b006cedd6d7e24sm5856697ejk.119.2022.03.13.12.05.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 13 Mar 2022 12:05:05 -0700 (PDT) From: Ansuel Smith To: Rob Herring , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Peter De Schrijver , Prashant Gaikwad , Thierry Reding , Jonathan Hunter , Ansuel Smith , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 04/16] clk: qcom: clk-hfpll: use poll_timeout macro Date: Sun, 13 Mar 2022 20:04:07 +0100 Message-Id: <20220313190419.2207-5-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220313190419.2207-1-ansuelsmth@gmail.com> References: <20220313190419.2207-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Use regmap_read_poll_timeout macro instead of do-while structure. Signed-off-by: Ansuel Smith --- drivers/clk/qcom/clk-hfpll.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/clk/qcom/clk-hfpll.c b/drivers/clk/qcom/clk-hfpll.c index e847d586a73a..a4e347eb4d4d 100644 --- a/drivers/clk/qcom/clk-hfpll.c +++ b/drivers/clk/qcom/clk-hfpll.c @@ -12,6 +12,8 @@ #include "clk-regmap.h" #include "clk-hfpll.h" +#define HFPLL_BUSY_WAIT_TIMEOUT 100 + #define PLL_OUTCTRL BIT(0) #define PLL_BYPASSNL BIT(1) #define PLL_RESET_N BIT(2) @@ -72,13 +74,12 @@ static void __clk_hfpll_enable(struct clk_hw *hw) regmap_update_bits(regmap, hd->mode_reg, PLL_RESET_N, PLL_RESET_N); /* Wait for PLL to lock. */ - if (hd->status_reg) { - do { - regmap_read(regmap, hd->status_reg, &val); - } while (!(val & BIT(hd->lock_bit))); - } else { + if (hd->status_reg) + regmap_read_poll_timeout(regmap, hd->status_reg, val, + !(val & BIT(hd->lock_bit)), USEC_PER_MSEC * 2, + HFPLL_BUSY_WAIT_TIMEOUT * USEC_PER_MSEC); + else udelay(60); - } /* Enable PLL output. */ regmap_update_bits(regmap, hd->mode_reg, PLL_OUTCTRL, PLL_OUTCTRL); From patchwork Sun Mar 13 19:04:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 550958 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E3129C4167D for ; Sun, 13 Mar 2022 19:05:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229509AbiCMTGY (ORCPT ); Sun, 13 Mar 2022 15:06:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35986 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235352AbiCMTGX (ORCPT ); Sun, 13 Mar 2022 15:06:23 -0400 Received: from mail-ej1-x62c.google.com (mail-ej1-x62c.google.com [IPv6:2a00:1450:4864:20::62c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CA5604DF60; Sun, 13 Mar 2022 12:05:10 -0700 (PDT) Received: by mail-ej1-x62c.google.com with SMTP id dr20so29343598ejc.6; Sun, 13 Mar 2022 12:05:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=sGj8B8j9Pw2IR/o72q6EjCl5T3t+1bmUyf2kYodPsRM=; b=atWc/wRl6k9wbdttykqBYuayRGkmafCvguTkpFh/NTsuYcyCynxRq2J5/yiB0HoesP RiBSVNUJUFLNVMoppLV57K+5OuY0dlBVIbF1dx33ya95GNhsAkCCU9DJ34IcVzxZ3KQk PvjlaMQ0785VqScIP10aR8OPk/fgnVDVvA3+6Z8951/6Nw50KP4C5skLDjE9vHDj3a9O faMf5NhhBmsDWxqlW4mSRDZQueLBGhla1/TSBVQ1CD018KV4UrxV7ioW4Naue4rm67i6 D5aqlVCnXrnFFbdx16zxlqXYaDp3GWKUGXXfgeQMeP/nohBD+Q0jfKg0T8f0w8WwY3g+ 2Q2g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=sGj8B8j9Pw2IR/o72q6EjCl5T3t+1bmUyf2kYodPsRM=; b=AdJo1zqHAS/nOGg55v0KOyEwvPpRN/kB+DJ435LYRzrSsEmysa4mIBdO0NXqk+Jbb2 B9nC57nc89v7sX/VTtwqne/h9SfJ/5L9jmJ5MHsgGLrvvN963LiHv0/d9QORHShmw3FW H+eRG4ZBMvskuYBh6hp2IVTBYEk/5tRMJKuWDDgHH2kEx0Ek679vBd7i1fT0tH9Jr9Uf n81wWZvvY4q7IyGIaK1JgCxTSpxn57Ox9i0LpA/MgO7iwLLk5SBz02d+sBrY9T7CpWi6 a0krnSVcnpf2Y8wbvY/rK9K1bclSf7NqfcqukFHcjuTGRJRYMJjd7dFewXhg6ApaBHgY dXyw== X-Gm-Message-State: AOAM533pjdgsWOdDSFyk1inlBsIzZ9leLoqcRIs/G5mbClRl44QlD7FC VmIb6xY+3qb9ZNPHJzGT5iA= X-Google-Smtp-Source: ABdhPJwpivhqHoJiBwRPTccXKrxYpEY1DhxDRe7t541Uwi34g8eEKRcRYpX2e15BDHR/DumidDT6mA== X-Received: by 2002:a17:907:9483:b0:6da:a26b:2d44 with SMTP id dm3-20020a170907948300b006daa26b2d44mr16756955ejc.337.1647198309215; Sun, 13 Mar 2022 12:05:09 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id n13-20020a170906724d00b006cedd6d7e24sm5856697ejk.119.2022.03.13.12.05.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 13 Mar 2022 12:05:08 -0700 (PDT) From: Ansuel Smith To: Rob Herring , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Peter De Schrijver , Prashant Gaikwad , Thierry Reding , Jonathan Hunter , Ansuel Smith , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 07/16] clk: qcom: clk-krait: add hw_parent check for div2_round_rate Date: Sun, 13 Mar 2022 20:04:10 +0100 Message-Id: <20220313190419.2207-8-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220313190419.2207-1-ansuelsmth@gmail.com> References: <20220313190419.2207-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Check if hw_parent is present before calculating the round_rate to prevent kernel panic. Signed-off-by: Ansuel Smith --- drivers/clk/qcom/clk-krait.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/clk/qcom/clk-krait.c b/drivers/clk/qcom/clk-krait.c index e447fcc3806d..d8af281eba0e 100644 --- a/drivers/clk/qcom/clk-krait.c +++ b/drivers/clk/qcom/clk-krait.c @@ -80,7 +80,12 @@ EXPORT_SYMBOL_GPL(krait_mux_clk_ops); static long krait_div2_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) { - *parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), rate * 2); + struct clk_hw *hw_parent = clk_hw_get_parent(hw); + + if (!hw_parent) + return -1; + + *parent_rate = clk_hw_round_rate(hw_parent, rate * 2); return DIV_ROUND_UP(*parent_rate, 2); } From patchwork Sun Mar 13 19:04:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 550957 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 14FA0C433FE for ; Sun, 13 Mar 2022 19:05:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235371AbiCMTG0 (ORCPT ); Sun, 13 Mar 2022 15:06:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36130 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231400AbiCMTGZ (ORCPT ); Sun, 13 Mar 2022 15:06:25 -0400 Received: from mail-ed1-x534.google.com (mail-ed1-x534.google.com [IPv6:2a00:1450:4864:20::534]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 05FFE4ECCD; Sun, 13 Mar 2022 12:05:11 -0700 (PDT) Received: by mail-ed1-x534.google.com with SMTP id m12so17003573edc.12; Sun, 13 Mar 2022 12:05:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=1tacB+H58ZcVKBVcWE3u+TMM2y65iIDEoWk8hI94hWs=; b=oIxoijt3zP8XJcuwIbWWk0ZqG42rCNQQeUcVB1jEt8bBxPjtkGfQg9/M8oViRsNm+B UUBJywclv0FdRv2179GvV6XB7J7+IR53sDj8HPcvJEt8Gq8XZ+4S9qNlyqBO0uyj9wiS e5M35cfY3VspdpoYskady1uf1jCHAFgg9aW3yallGKLoGM5DcWgx5yMPL6LiHUaNjLP7 U7uoBELO3usRmQYxSogIrhtjwX7uzJjXNOkA/T5AmCiifAaNHX/ahQoHf5w6p6uUiue8 T7FK5dn55UMJL29KadZHW+/L8v2CmSyMs04wv3u4hofuemnRUekpMUyPnFM6v0rJ6ORL rHTQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1tacB+H58ZcVKBVcWE3u+TMM2y65iIDEoWk8hI94hWs=; b=DnfepViLzqV+0sAQi88b6YSGD2wsPPO9K1qI4HuOCgncVcQmhzLLBHaiFjeitNOaB/ oXVzehBfd7cA09h+4ZlwUy+hw1FqT42snQPafDQhnBXj709yIE3Hk8jJSU4PZ4cVlCRy MD8re3Qh21A4RlBt+SDAsWw2nstRbAFJz8CqzxYLjUzuFjpRPFai1QKnoTNP9F40YmmI E0X3UcBJNTFmwG6MGv5odKALtEbKmb5VADTN95fYSJG5EbMz9f/hU31/z/wDAGNIiv3w fkN/r3ePoupskgbRJvLFDhLahwiISLWptARlVhTLMe4eQkUV+TC3Swkg1+L+OLBsCYin FhZw== X-Gm-Message-State: AOAM530W62p+NCJOVQOxZZuisVfzdzsZF0x7pr9FoAO25vgM2UtSA7Do Q4ckH6+fIb8jPN4NHiijewc= X-Google-Smtp-Source: ABdhPJyoFrdFHVwLiFxDlmnXTecCfhREO4r3X1G0IFC4wJ/LIVm0nWuMjUxBaDl01F4L+FHncaraZQ== X-Received: by 2002:a05:6402:40c4:b0:416:3e66:1825 with SMTP id z4-20020a05640240c400b004163e661825mr17473985edb.284.1647198310324; Sun, 13 Mar 2022 12:05:10 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id n13-20020a170906724d00b006cedd6d7e24sm5856697ejk.119.2022.03.13.12.05.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 13 Mar 2022 12:05:09 -0700 (PDT) From: Ansuel Smith To: Rob Herring , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Peter De Schrijver , Prashant Gaikwad , Thierry Reding , Jonathan Hunter , Ansuel Smith , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 08/16] clk: qcom: krait-cc: convert to parent_data API Date: Sun, 13 Mar 2022 20:04:11 +0100 Message-Id: <20220313190419.2207-9-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220313190419.2207-1-ansuelsmth@gmail.com> References: <20220313190419.2207-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Modernize the krait-cc driver to parent-data API and refactor to drop any use of clk_names. From Documentation all the required clocks should be declared in DTS so fw_name can be correctly used to get the parents for all the muxes. Name is also declared to save compatibility with old implementation. Also fix the parent order of the sec_mux that was wrong and incorrectly report the wrong safe parent if it's not hardcoded. Signed-off-by: Ansuel Smith --- drivers/clk/qcom/krait-cc.c | 126 +++++++++++++++++++----------------- 1 file changed, 66 insertions(+), 60 deletions(-) diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c index 4d4b657d33c3..645ad9e8dd73 100644 --- a/drivers/clk/qcom/krait-cc.c +++ b/drivers/clk/qcom/krait-cc.c @@ -69,21 +69,22 @@ static int krait_notifier_register(struct device *dev, struct clk *clk, return ret; } -static int +static struct clk * krait_add_div(struct device *dev, int id, const char *s, unsigned int offset) { struct krait_div2_clk *div; + static struct clk_parent_data p_data[1]; struct clk_init_data init = { - .num_parents = 1, + .num_parents = ARRAY_SIZE(p_data), .ops = &krait_div2_clk_ops, .flags = CLK_SET_RATE_PARENT, }; - const char *p_names[1]; struct clk *clk; + char *parent_name; div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL); if (!div) - return -ENOMEM; + return ERR_PTR(-ENOMEM); div->width = 2; div->shift = 6; @@ -93,43 +94,49 @@ krait_add_div(struct device *dev, int id, const char *s, unsigned int offset) init.name = kasprintf(GFP_KERNEL, "hfpll%s_div", s); if (!init.name) - return -ENOMEM; + return ERR_PTR(-ENOMEM); - init.parent_names = p_names; - p_names[0] = kasprintf(GFP_KERNEL, "hfpll%s", s); - if (!p_names[0]) { - kfree(init.name); - return -ENOMEM; + init.parent_data = p_data; + parent_name = kasprintf(GFP_KERNEL, "hfpll%s", s); + if (!parent_name) { + clk = ERR_PTR(-ENOMEM); + goto err_parent_name; } + p_data[0].fw_name = parent_name; + p_data[0].name = parent_name; + clk = devm_clk_register(dev, &div->hw); - kfree(p_names[0]); + + kfree(parent_name); +err_parent_name: kfree(init.name); - return PTR_ERR_OR_ZERO(clk); + return clk; } -static int +static struct clk * krait_add_sec_mux(struct device *dev, int id, const char *s, unsigned int offset, bool unique_aux) { int ret; struct krait_mux_clk *mux; - static const char *sec_mux_list[] = { - "acpu_aux", - "qsb", + static struct clk_parent_data sec_mux_list[2] = { + { .name = "qsb", .fw_name = "qsb" }, + {}, }; struct clk_init_data init = { - .parent_names = sec_mux_list, + .parent_data = sec_mux_list, .num_parents = ARRAY_SIZE(sec_mux_list), .ops = &krait_mux_clk_ops, .flags = CLK_SET_RATE_PARENT, }; struct clk *clk; + char *parent_name; mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL); if (!mux) - return -ENOMEM; + return ERR_PTR(-ENOMEM); mux->offset = offset; mux->lpl = id >= 0; @@ -141,44 +148,51 @@ krait_add_sec_mux(struct device *dev, int id, const char *s, init.name = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s); if (!init.name) - return -ENOMEM; + return ERR_PTR(-ENOMEM); if (unique_aux) { - sec_mux_list[0] = kasprintf(GFP_KERNEL, "acpu%s_aux", s); - if (!sec_mux_list[0]) { + parent_name = kasprintf(GFP_KERNEL, "acpu%s_aux", s); + if (!parent_name) { clk = ERR_PTR(-ENOMEM); goto err_aux; } + sec_mux_list[1].fw_name = parent_name; + sec_mux_list[1].name = parent_name; + } else { + sec_mux_list[1].name = "apu_aux"; } clk = devm_clk_register(dev, &mux->hw); + if (IS_ERR(clk)) + goto err_clk; ret = krait_notifier_register(dev, clk, mux); if (ret) - goto unique_aux; + clk = ERR_PTR(ret); -unique_aux: +err_clk: if (unique_aux) - kfree(sec_mux_list[0]); + kfree(parent_name); err_aux: kfree(init.name); - return PTR_ERR_OR_ZERO(clk); + return clk; } static struct clk * -krait_add_pri_mux(struct device *dev, int id, const char *s, - unsigned int offset) +krait_add_pri_mux(struct device *dev, struct clk *hfpll_div, struct clk *sec_mux, + int id, const char *s, unsigned int offset) { int ret; struct krait_mux_clk *mux; - const char *p_names[3]; + static struct clk_parent_data p_data[3]; struct clk_init_data init = { - .parent_names = p_names, - .num_parents = ARRAY_SIZE(p_names), + .parent_data = p_data, + .num_parents = ARRAY_SIZE(p_data), .ops = &krait_mux_clk_ops, .flags = CLK_SET_RATE_PARENT, }; struct clk *clk; + char *hfpll_name; mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL); if (!mux) @@ -196,36 +210,29 @@ krait_add_pri_mux(struct device *dev, int id, const char *s, if (!init.name) return ERR_PTR(-ENOMEM); - p_names[0] = kasprintf(GFP_KERNEL, "hfpll%s", s); - if (!p_names[0]) { + hfpll_name = kasprintf(GFP_KERNEL, "hfpll%s", s); + if (!hfpll_name) { clk = ERR_PTR(-ENOMEM); - goto err_p0; + goto err_hfpll; } - p_names[1] = kasprintf(GFP_KERNEL, "hfpll%s_div", s); - if (!p_names[1]) { - clk = ERR_PTR(-ENOMEM); - goto err_p1; - } + p_data[0].fw_name = hfpll_name; + p_data[0].name = hfpll_name; - p_names[2] = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s); - if (!p_names[2]) { - clk = ERR_PTR(-ENOMEM); - goto err_p2; - } + p_data[1].hw = __clk_get_hw(hfpll_div); + p_data[2].hw = __clk_get_hw(sec_mux); clk = devm_clk_register(dev, &mux->hw); + if (IS_ERR(clk)) + goto err_clk; ret = krait_notifier_register(dev, clk, mux); if (ret) - goto err_p3; -err_p3: - kfree(p_names[2]); -err_p2: - kfree(p_names[1]); -err_p1: - kfree(p_names[0]); -err_p0: + clk = ERR_PTR(ret); + +err_clk: + kfree(hfpll_name); +err_hfpll: kfree(init.name); return clk; } @@ -233,11 +240,10 @@ krait_add_pri_mux(struct device *dev, int id, const char *s, /* id < 0 for L2, otherwise id == physical CPU number */ static struct clk *krait_add_clks(struct device *dev, int id, bool unique_aux) { - int ret; unsigned int offset; void *p = NULL; const char *s; - struct clk *clk; + struct clk *hfpll_div, *sec_mux, *clk; if (id >= 0) { offset = 0x4501 + (0x1000 * id); @@ -249,19 +255,19 @@ static struct clk *krait_add_clks(struct device *dev, int id, bool unique_aux) s = "_l2"; } - ret = krait_add_div(dev, id, s, offset); - if (ret) { - clk = ERR_PTR(ret); + hfpll_div = krait_add_div(dev, id, s, offset); + if (IS_ERR(hfpll_div)) { + clk = hfpll_div; goto err; } - ret = krait_add_sec_mux(dev, id, s, offset, unique_aux); - if (ret) { - clk = ERR_PTR(ret); + sec_mux = krait_add_sec_mux(dev, id, s, offset, unique_aux); + if (IS_ERR(sec_mux)) { + clk = sec_mux; goto err; } - clk = krait_add_pri_mux(dev, id, s, offset); + clk = krait_add_pri_mux(dev, hfpll_div, sec_mux, id, s, offset); err: kfree(p); return clk; From patchwork Sun Mar 13 19:04:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 550956 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2D5A2C4167B for ; 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[93.42.71.246]) by smtp.googlemail.com with ESMTPSA id n13-20020a170906724d00b006cedd6d7e24sm5856697ejk.119.2022.03.13.12.05.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 13 Mar 2022 12:05:12 -0700 (PDT) From: Ansuel Smith To: Rob Herring , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Peter De Schrijver , Prashant Gaikwad , Thierry Reding , Jonathan Hunter , Ansuel Smith , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 10/16] clk: qcom: krait-cc: drop hardcoded safe_sel Date: Sun, 13 Mar 2022 20:04:13 +0100 Message-Id: <20220313190419.2207-11-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220313190419.2207-1-ansuelsmth@gmail.com> References: <20220313190419.2207-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Drop hardcoded safe_sel definition and use helper to correctly calculate it. We assume qsb clk is always present as it should be declared in DTS per Documentation and in the absence of that, it's declared as a fixed clk. Signed-off-by: Ansuel Smith --- drivers/clk/qcom/krait-cc.c | 36 +++++++++++++++++++++++------------- 1 file changed, 23 insertions(+), 13 deletions(-) diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c index 50352ff0ac67..6530f10a546f 100644 --- a/drivers/clk/qcom/krait-cc.c +++ b/drivers/clk/qcom/krait-cc.c @@ -26,6 +26,13 @@ static unsigned int pri_mux_map[] = { 0, }; +static u8 krait_get_mux_sel(struct krait_mux_clk *mux, struct clk *safe_clk) +{ + struct clk_hw *safe_hw = __clk_get_hw(safe_clk); + + return clk_hw_get_parent_index(&mux->hw, safe_hw); +} + /* * Notifier function for switching the muxes to safe parent * while the hfpll is getting reprogrammed. @@ -117,8 +124,8 @@ krait_add_div(struct device *dev, int id, const char *s, unsigned int offset) } static struct clk * -krait_add_sec_mux(struct device *dev, int id, const char *s, - unsigned int offset, bool unique_aux) +krait_add_sec_mux(struct device *dev, struct clk *qsb, int id, + const char *s, unsigned int offset, bool unique_aux) { static struct clk_parent_data sec_mux_list[2] = { { .name = "qsb", .fw_name = "qsb" }, @@ -145,7 +152,6 @@ krait_add_sec_mux(struct device *dev, int id, const char *s, mux->shift = 2; mux->parent_map = sec_mux_map; mux->hw.init = &init; - mux->safe_sel = 0; init.name = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s); if (!init.name) @@ -167,6 +173,7 @@ krait_add_sec_mux(struct device *dev, int id, const char *s, if (IS_ERR(clk)) goto err_clk; + mux->safe_sel = krait_get_mux_sel(mux, qsb); ret = krait_notifier_register(dev, clk, mux); if (ret) clk = ERR_PTR(ret); @@ -205,7 +212,6 @@ krait_add_pri_mux(struct device *dev, struct clk *hfpll_div, struct clk *sec_mux mux->lpl = id >= 0; mux->parent_map = pri_mux_map; mux->hw.init = &init; - mux->safe_sel = 2; init.name = kasprintf(GFP_KERNEL, "krait%s_pri_mux", s); if (!init.name) @@ -227,6 +233,7 @@ krait_add_pri_mux(struct device *dev, struct clk *hfpll_div, struct clk *sec_mux if (IS_ERR(clk)) goto err_clk; + mux->safe_sel = krait_get_mux_sel(mux, sec_mux); ret = krait_notifier_register(dev, clk, mux); if (ret) clk = ERR_PTR(ret); @@ -239,7 +246,9 @@ krait_add_pri_mux(struct device *dev, struct clk *hfpll_div, struct clk *sec_mux } /* id < 0 for L2, otherwise id == physical CPU number */ -static struct clk *krait_add_clks(struct device *dev, int id, bool unique_aux) +static struct clk * +krait_add_clks(struct device *dev, struct clk *qsb, int id, + bool unique_aux) { struct clk *hfpll_div, *sec_mux, *clk; unsigned int offset; @@ -262,7 +271,7 @@ static struct clk *krait_add_clks(struct device *dev, int id, bool unique_aux) goto err; } - sec_mux = krait_add_sec_mux(dev, id, s, offset, unique_aux); + sec_mux = krait_add_sec_mux(dev, qsb, id, s, offset, unique_aux); if (IS_ERR(sec_mux)) { clk = sec_mux; goto err; @@ -296,8 +305,8 @@ MODULE_DEVICE_TABLE(of, krait_cc_match_table); static int krait_cc_probe(struct platform_device *pdev) { + struct clk *l2_pri_mux_clk, *qsb, *clk; unsigned long cur_rate, aux_rate; - struct clk *l2_pri_mux_clk, *clk; struct device *dev = &pdev->dev; const struct of_device_id *id; struct clk **clks; @@ -308,11 +317,12 @@ static int krait_cc_probe(struct platform_device *pdev) return -ENODEV; /* Rate is 1 because 0 causes problems for __clk_mux_determine_rate */ - if (IS_ERR(clk_get(dev, "qsb"))) - clk = clk_register_fixed_rate(dev, "qsb", NULL, 0, 1); + qsb = clk_get(dev, "qsb"); + if (IS_ERR(qsb)) + qsb = clk_register_fixed_rate(dev, "qsb", NULL, 0, 1); - if (IS_ERR(clk)) - return PTR_ERR(clk); + if (IS_ERR(qsb)) + return PTR_ERR(qsb); if (!id->data) { clk = clk_register_fixed_factor(dev, "acpu_aux", @@ -327,13 +337,13 @@ static int krait_cc_probe(struct platform_device *pdev) return -ENOMEM; for_each_possible_cpu(cpu) { - clk = krait_add_clks(dev, cpu, id->data); + clk = krait_add_clks(dev, qsb, cpu, id->data); if (IS_ERR(clk)) return PTR_ERR(clk); clks[cpu] = clk; } - l2_pri_mux_clk = krait_add_clks(dev, -1, id->data); + l2_pri_mux_clk = krait_add_clks(dev, qsb, -1, id->data); if (IS_ERR(l2_pri_mux_clk)) return PTR_ERR(l2_pri_mux_clk); clks[4] = l2_pri_mux_clk; From patchwork Sun Mar 13 19:04:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 550955 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 21750C433EF for ; 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[93.42.71.246]) by smtp.googlemail.com with ESMTPSA id n13-20020a170906724d00b006cedd6d7e24sm5856697ejk.119.2022.03.13.12.05.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 13 Mar 2022 12:05:15 -0700 (PDT) From: Ansuel Smith To: Rob Herring , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Peter De Schrijver , Prashant Gaikwad , Thierry Reding , Jonathan Hunter , Ansuel Smith , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 13/16] clk: qcom: clk-krait: add enable disable ops Date: Sun, 13 Mar 2022 20:04:16 +0100 Message-Id: <20220313190419.2207-14-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220313190419.2207-1-ansuelsmth@gmail.com> References: <20220313190419.2207-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add enable/disable ops for krait mux. On disable the mux is set to the safe selection. Signed-off-by: Ansuel Smith --- drivers/clk/qcom/clk-krait.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/clk/qcom/clk-krait.c b/drivers/clk/qcom/clk-krait.c index 82fe7031e1f4..fc277fe3841c 100644 --- a/drivers/clk/qcom/clk-krait.c +++ b/drivers/clk/qcom/clk-krait.c @@ -85,7 +85,25 @@ static u8 krait_mux_get_parent(struct clk_hw *hw) return clk_mux_val_to_index(hw, mux->parent_map, 0, sel); } +static int krait_mux_enable(struct clk_hw *hw) +{ + struct krait_mux_clk *mux = to_krait_mux_clk(hw); + + __krait_mux_set_sel(mux, mux->en_mask); + + return 0; +} + +static void krait_mux_disable(struct clk_hw *hw) +{ + struct krait_mux_clk *mux = to_krait_mux_clk(hw); + + __krait_mux_set_sel(mux, mux->safe_sel); +} + const struct clk_ops krait_mux_clk_ops = { + .enable = krait_mux_enable, + .disable = krait_mux_disable, .set_parent = krait_mux_set_parent, .get_parent = krait_mux_get_parent, .determine_rate = __clk_mux_determine_rate_closest, From patchwork Sun Mar 13 19:04:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 550954 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E67E7C43217 for ; Sun, 13 Mar 2022 19:06:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235458AbiCMTHJ (ORCPT ); Sun, 13 Mar 2022 15:07:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37844 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235430AbiCMTGs (ORCPT ); Sun, 13 Mar 2022 15:06:48 -0400 Received: from mail-ej1-x632.google.com (mail-ej1-x632.google.com [IPv6:2a00:1450:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1401751336; Sun, 13 Mar 2022 12:05:19 -0700 (PDT) Received: by mail-ej1-x632.google.com with SMTP id d10so29556480eje.10; Sun, 13 Mar 2022 12:05:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=fMAOn8pwa3go68WYxvsLY0rJlkkqdpP8FjSo1TfU57o=; b=iaD4nEn8TP5faC6pEMwcRqU4nV8uFaV9PEQjF0q819n6g75l3gqLEmvDn6SR6sYuV+ DCgflnLnhDNhSzN5eiK+Q7VHwoGya248hwgVjixVOL9qKnZ75yervrC1g1kdnPqne20P AM3Ew2vYgv5Hzo1tDItHRm2Y6gSqHM1tnabgWPs9jcwGPk7WDh9aK9I8MbKNurHbmxgI sVM3CW3AyTXWXrcXWAxk/YP7AaSibMyJhBWIqDN47jDKVtoSSqH5G63Fy+KEBund/KBB GhQZ/kl0gKvA508xxGZAn8yydbF2gDyMLr60+0TdzARkz06lnHaEfEQgI0ozOU3V4lkW OhHQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fMAOn8pwa3go68WYxvsLY0rJlkkqdpP8FjSo1TfU57o=; b=TH2BxIWsWTZGzc2ScvfhWobX0cG8OU8eXHPbsZLN7+U3UoakaBHWWyLTiKCtCA+Mj9 UEFeyLiCbcIuNd+C1EWcHY7/tgHy4gFB/z+vRsBozvWiNUzr2hRftgK/cJPVc2FL9LfS QjEGRjx/fCq3orLlQYPI/td+Hi0jRdXSrq/rzaBjNLj0cxeI6P7Jm4KbiMXX0zT2h1cJ EpS4subBKt2HE4GTxgS+r2UPgtJTdlvwvjduKoiY3MfRY17k+Kk2hvCRMgr9wmjKhmAd S5FwqKpCChrXSkmyg44Vgh2FKS6o/ujExsOwCq9znjYTciI/wtQR39qBa12RwLnxFgzh ivug== X-Gm-Message-State: AOAM532Wz6VpCRrt5oM0s4AaEwcQaMJf66gMqKWuRCi4c3GDA/k9U5fG jNJeXukRe6vhYxAX0QNR3SU= X-Google-Smtp-Source: ABdhPJzf4xDkkfnpb+RM9j0/iSL/WQMVi2u50zBYUZftCYGQ6lnYQdMtI5BTO8qZKzaTYy27FrYP6A== X-Received: by 2002:a17:907:8a0d:b0:6d6:dae9:7263 with SMTP id sc13-20020a1709078a0d00b006d6dae97263mr16380785ejc.671.1647198317421; Sun, 13 Mar 2022 12:05:17 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id n13-20020a170906724d00b006cedd6d7e24sm5856697ejk.119.2022.03.13.12.05.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 13 Mar 2022 12:05:17 -0700 (PDT) From: Ansuel Smith To: Rob Herring , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Peter De Schrijver , Prashant Gaikwad , Thierry Reding , Jonathan Hunter , Ansuel Smith , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 14/16] dt-bindings: clock: Convert qcom,krait-cc to yaml Date: Sun, 13 Mar 2022 20:04:17 +0100 Message-Id: <20220313190419.2207-15-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220313190419.2207-1-ansuelsmth@gmail.com> References: <20220313190419.2207-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Convert qcom,krait-cc to yaml and add missing l2 clocks and names definiton. Signed-off-by: Ansuel Smith --- .../bindings/clock/qcom,krait-cc.txt | 34 ---------- .../bindings/clock/qcom,krait-cc.yaml | 63 +++++++++++++++++++ 2 files changed, 63 insertions(+), 34 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/qcom,krait-cc.txt create mode 100644 Documentation/devicetree/bindings/clock/qcom,krait-cc.yaml diff --git a/Documentation/devicetree/bindings/clock/qcom,krait-cc.txt b/Documentation/devicetree/bindings/clock/qcom,krait-cc.txt deleted file mode 100644 index 030ba60dab08..000000000000 --- a/Documentation/devicetree/bindings/clock/qcom,krait-cc.txt +++ /dev/null @@ -1,34 +0,0 @@ -Krait Clock Controller - -PROPERTIES - -- compatible: - Usage: required - Value type: - Definition: must be one of: - "qcom,krait-cc-v1" - "qcom,krait-cc-v2" - -- #clock-cells: - Usage: required - Value type: - Definition: must be 1 - -- clocks: - Usage: required - Value type: - Definition: reference to the clock parents of hfpll, secondary muxes. - -- clock-names: - Usage: required - Value type: - Definition: must be "hfpll0", "hfpll1", "acpu0_aux", "acpu1_aux", "qsb". - -Example: - - kraitcc: clock-controller { - compatible = "qcom,krait-cc-v1"; - clocks = <&hfpll0>, <&hfpll1>, <&acpu0_aux>, <&acpu1_aux>, ; - clock-names = "hfpll0", "hfpll1", "acpu0_aux", "acpu1_aux", "qsb"; - #clock-cells = <1>; - }; diff --git a/Documentation/devicetree/bindings/clock/qcom,krait-cc.yaml b/Documentation/devicetree/bindings/clock/qcom,krait-cc.yaml new file mode 100644 index 000000000000..f89b70ab01ae --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,krait-cc.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,krait-cc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Krait Clock Controller + +maintainers: + - Ansuel Smith + +description: | + Qualcomm Krait Clock Controller used to correctly scale the CPU and the L2 + rates. + +properties: + compatible: + enum: + - qcom,krait-cc-v1 + - qcom,krait-cc-v2 + + clocks: + items: + - description: phandle to hfpll for CPU0 mux + - description: phandle to hfpll for CPU1 mux + - description: phandle to hfpll for L2 mux + - description: phandle to CPU0 aux clock + - description: phandle to CPU1 aux clock + - description: phandle to L2 aux clock + - description: phandle to QSB fixed clk + + clock-names: + items: + - const: hfpll0 + - const: hfpll1 + - const: hfpll_l2 + - const: acpu0_aux + - const: acpu1_aux + - const: acpu_l2_aux + - const: qsb + + '#clock-cells': + const: 1 + +required: + - compatible + - clocks + - clock-names + - '#clock-cells' + +additionalProperties: false + +examples: + - | + clock-controller { + compatible = "qcom,krait-cc-v1"; + clocks = <&hfpll0>, <&hfpll1>, <&hfpll_l2>, + <&acpu0_aux>, <&acpu1_aux>, <&acpu_l2_aux>, <&qsb>; + clock-names = "hfpll0", "hfpll1", "hfpll_l2", + "acpu0_aux", "acpu1_aux", "acpu_l2_aux", "qsb"; + #clock-cells = <1>; + }; +... From patchwork Sun Mar 13 19:04:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 550953 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 793ECC433FE for ; Sun, 13 Mar 2022 19:06:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235438AbiCMTHO (ORCPT ); Sun, 13 Mar 2022 15:07:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38748 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235439AbiCMTHH (ORCPT ); Sun, 13 Mar 2022 15:07:07 -0400 Received: from mail-ed1-x52f.google.com (mail-ed1-x52f.google.com [IPv6:2a00:1450:4864:20::52f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 69450522F8; Sun, 13 Mar 2022 12:05:21 -0700 (PDT) Received: by mail-ed1-x52f.google.com with SMTP id c25so14890967edj.13; Sun, 13 Mar 2022 12:05:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=JKvRH6qETF7tlJx+dsXAKSPYL+SWlaM9ukoK0I4vd0Y=; b=HOg380wgKBY11dC56PSqlnJRAWm0g0eKLM6MS9EErmqMYvsPALeL5n0fAfcn0hnj+A RsD0ImwNt5CMOjrHnMtJdOmVfuoyE9DYBX63nOGFN4YWYDsVSFwAp7+f2rDbqe6/qfiw HsahrzeDrO+FUpOOTavGLlDQIHLCUGVERUuQrT6RA0jVN+ka2qbBnu5WLQqZzGkyj6em wmxGE8eYN2pEmK8bBjS0fZA8JzuNyBykYjZd61Sve0T+RKzk1/ExGbBUyoqpLTgco+YA roPReKgBfRrdEGtjRFyD3aW9OmcrqBukNk3gt8bUXxupmAhQRr1TAY756l4OWAJBpVuZ Px5g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=JKvRH6qETF7tlJx+dsXAKSPYL+SWlaM9ukoK0I4vd0Y=; b=Luk13BsAMwt4HnXKXRH3FyFM/JAjiWVuko93nugNsDpP2TDvNACY17JgdY+NkviACO lJgPyK04QLESy6h/pWJS6h4qaqeqlhFX21BhjxKXiOkzZAa76lKwGEiSBm1FqabmYnwK hXD2fksnycVjIl5wQL+JzGBcfGpVlCCxSVU/BD5zCBCU7ePE8h1js8dTHMzRFHlL9t94 63PRHn6LPCoWhR60XtJFrux0f3G3aBSn/kqtG2iTzfgnpSzUh92m5qCcALEbzBJ7STYo T3/T79vOn/1Acu9uSwPyfgbfGbKTqOFTeFaZ1j6Fn6L7v/+l4I8rzGkpKpkISr7YNzMD aa0Q== X-Gm-Message-State: AOAM531AuHC41auvSyuxeqkDCEHnBKWdLlxJjfEW/w5iEfLs3UdflD2z KKZ6ghuKpl4LCaUpV5im6g0= X-Google-Smtp-Source: ABdhPJxs+nfgAzGM4p+i4X9YMiFAOiMeFYrAnRJILHkWAeKTBnmcY2vUaKyN8+URhUYmZUnU5vntWw== X-Received: by 2002:a05:6402:5173:b0:415:f1e2:8d53 with SMTP id d19-20020a056402517300b00415f1e28d53mr17417672ede.95.1647198319607; Sun, 13 Mar 2022 12:05:19 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id n13-20020a170906724d00b006cedd6d7e24sm5856697ejk.119.2022.03.13.12.05.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 13 Mar 2022 12:05:19 -0700 (PDT) From: Ansuel Smith To: Rob Herring , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Peter De Schrijver , Prashant Gaikwad , Thierry Reding , Jonathan Hunter , Ansuel Smith , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 16/16] dt-bindings: arm: msm: Convert kpss driver Documentation to yaml Date: Sun, 13 Mar 2022 20:04:19 +0100 Message-Id: <20220313190419.2207-17-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220313190419.2207-1-ansuelsmth@gmail.com> References: <20220313190419.2207-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Convert kpss-acc and kpss-gcc Documentation to yaml. Fix multiple Documentation error and provide additional example for kpss-gcc-v2. Signed-off-by: Ansuel Smith --- .../bindings/arm/msm/qcom,kpss-acc.txt | 49 ---------- .../bindings/arm/msm/qcom,kpss-acc.yaml | 97 +++++++++++++++++++ .../bindings/arm/msm/qcom,kpss-gcc.txt | 44 --------- .../bindings/arm/msm/qcom,kpss-gcc.yaml | 62 ++++++++++++ 4 files changed, 159 insertions(+), 93 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt create mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.yaml delete mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt create mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.yaml diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt deleted file mode 100644 index 7f696362a4a1..000000000000 --- a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt +++ /dev/null @@ -1,49 +0,0 @@ -Krait Processor Sub-system (KPSS) Application Clock Controller (ACC) - -The KPSS ACC provides clock, power domain, and reset control to a Krait CPU. -There is one ACC register region per CPU within the KPSS remapped region as -well as an alias register region that remaps accesses to the ACC associated -with the CPU accessing the region. - -PROPERTIES - -- compatible: - Usage: required - Value type: - Definition: should be one of: - "qcom,kpss-acc-v1" - "qcom,kpss-acc-v2" - -- reg: - Usage: required - Value type: - Definition: the first element specifies the base address and size of - the register region. An optional second element specifies - the base address and size of the alias register region. - -- clocks: - Usage: required - Value type: - Definition: reference to the pll parents. - -- clock-names: - Usage: required - Value type: - Definition: must be "pll8_vote", "pxo". - -- clock-output-names: - Usage: optional - Value type: - Definition: Name of the output clock. Typically acpuX_aux where X is a - CPU number starting at 0. - -Example: - - clock-controller@2088000 { - compatible = "qcom,kpss-acc-v2"; - reg = <0x02088000 0x1000>, - <0x02008000 0x1000>; - clocks = <&gcc PLL8_VOTE>, <&gcc PXO_SRC>; - clock-names = "pll8_vote", "pxo"; - clock-output-names = "acpu0_aux"; - }; diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.yaml b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.yaml new file mode 100644 index 000000000000..6e8ef4f85eab --- /dev/null +++ b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.yaml @@ -0,0 +1,97 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/msm/qcom,kpss-acc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Krait Processor Sub-system (KPSS) Application Clock Controller (ACC) + +maintainers: + - Ansuel Smith + +description: | + The KPSS ACC provides clock, power domain, and reset control to a Krait CPU. + There is one ACC register region per CPU within the KPSS remapped region as + well as an alias register region that remaps accesses to the ACC associated + with the CPU accessing the region. + +properties: + compatible: + enum: + - qcom,kpss-acc-v1 + - qcom,kpss-acc-v2 + + reg: + items: + - description: Base address and size of the register region + - description: Optional base address and size of the alias register region + + clocks: + items: + - description: phandle to pll8_vote + - description: phandle to pxo_board + + clock-names: + items: + - const: pll8_vote + - const: pxo + + clock-output-names: + description: Name of the aux clock. Krait can have at most 4 cpu. + enum: + - acpu0_aux + - acpu1_aux + - acpu2_aux + - acpu3_aux + + '#clock-cells': + const: 0 + +required: + - compatible + - reg + +allOf: + - if: + properties: + compatible: + contains: + const: qcom,kpss-acc-v1 + then: + required: + - clocks + - clock-names + - clock-output-names + - '#clock-cells' + +additionalProperties: false + +examples: + - | + #include + + clock-controller@2088000 { + compatible = "qcom,kpss-acc-v1"; + reg = <0x02088000 0x1000>, <0x02008000 0x1000>; + clocks = <&gcc PLL8_VOTE>, <&pxo_board>; + clock-names = "pll8_vote", "pxo"; + clock-output-names = "acpu0_aux"; + #clock-cells = <0>; + }; + + clock-controller@2098000 { + compatible = "qcom,kpss-acc-v1"; + reg = <0x02098000 0x1000>, <0x02008000 0x1000>; + clock-output-names = "acpu1_aux"; + clocks = <&gcc PLL8_VOTE>, <&pxo_board>; + clock-names = "pll8_vote", "pxo"; + #clock-cells = <0>; + }; + + - | + clock-controller@f9088000 { + compatible = "qcom,kpss-acc-v2"; + reg = <0xf9088000 0x1000>, + <0xf9008000 0x1000>; + }; +... diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt deleted file mode 100644 index e628758950e1..000000000000 --- a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt +++ /dev/null @@ -1,44 +0,0 @@ -Krait Processor Sub-system (KPSS) Global Clock Controller (GCC) - -PROPERTIES - -- compatible: - Usage: required - Value type: - Definition: should be one of the following. The generic compatible - "qcom,kpss-gcc" should also be included. - "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc" - "qcom,kpss-gcc-apq8064", "qcom,kpss-gcc" - "qcom,kpss-gcc-msm8974", "qcom,kpss-gcc" - "qcom,kpss-gcc-msm8960", "qcom,kpss-gcc" - -- reg: - Usage: required - Value type: - Definition: base address and size of the register region - -- clocks: - Usage: required - Value type: - Definition: reference to the pll parents. - -- clock-names: - Usage: required - Value type: - Definition: must be "pll8_vote", "pxo". - -- clock-output-names: - Usage: required - Value type: - Definition: Name of the output clock. Typically acpu_l2_aux indicating - an L2 cache auxiliary clock. - -Example: - - l2cc: clock-controller@2011000 { - compatible = "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc"; - reg = <0x2011000 0x1000>; - clocks = <&gcc PLL8_VOTE>, <&gcc PXO_SRC>; - clock-names = "pll8_vote", "pxo"; - clock-output-names = "acpu_l2_aux"; - }; diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.yaml b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.yaml new file mode 100644 index 000000000000..3a2b54cc6a7c --- /dev/null +++ b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/msm/qcom,kpss-gcc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Krait Processor Sub-system (KPSS) Global Clock Controller (GCC) + +maintainers: + - Ansuel Smith + +description: | + Krait Processor Sub-system (KPSS) Global Clock Controller (GCC). Used + to control L2 mux (in the current implementation). + +properties: + compatible: + const: qcom,kpss-gcc + + reg: + items: + - description: Base address and size of the register region + + clocks: + items: + - description: phandle to pll8_vote + - description: phandle to pxo_board + + clock-names: + items: + - const: pll8_vote + - const: pxo + + clock-output-names: + const: acpu_l2_aux + + '#clock-cells': + const: 0 + +required: + - compatible + - reg + - clocks + - clock-names + - clock-output-names + - '#clock-cells' + +additionalProperties: false + +examples: + - | + #include + + clock-controller@2011000 { + compatible = "qcom,kpss-gcc"; + reg = <0x2011000 0x1000>; + clocks = <&gcc PLL8_VOTE>, <&pxo_board>; + clock-names = "pll8_vote", "pxo"; + clock-output-names = "acpu_l2_aux"; + #clock-cells = <0>; + }; +... \ No newline at end of file