From patchwork Thu Dec 6 23:44:03 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 153074 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp357ljp; Thu, 6 Dec 2018 15:44:33 -0800 (PST) X-Google-Smtp-Source: AFSGD/UAXmsxQydu4AMPxIubzISpHMIILc1eFoeDyVW7v+dgx/6tHZg3c1XVqK2c9bTM9VpApbCQ X-Received: by 2002:a62:d74d:: with SMTP id v13mr30005745pfl.34.1544139873642; Thu, 06 Dec 2018 15:44:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544139873; cv=none; d=google.com; s=arc-20160816; b=RCWxvDH1jH71AKYlGIin+KxSN05rfFKDDoukoohoctw29C8+sHDCV6svx3AsRWTVL9 hQNlbOjZiQx6kLSg5RqHQEkZxN0n8DaHwK76BbM/BNjuh//fjdV2C71PPY4JMcnrN7pY GnPowdhM18g3fZfQGGQzmqiboi2ijOL65L3c43pO025YWsfxKRQM7uePjend+71fmQvi dunjkXF7uwId91r0QBvU+PTbeJ/88Io+Am6W/ZdMl1buOmEhjaAh2Tsoc0lXE6qPq8ee tG9Hp91Kjxdf1sYJ+KBkx1XCGZoSGjnK8lmFJBOhP7oE+s32e/SaEcNr6e6KBL9kxBPl HcKg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=0IsUAzw/pqIn4AKvfyTPqPE5HZ1KR3cRnI5HX5M+Yig=; b=APSBeByBdhS/stT44fYgrcbPkkL8LwpjM9QtjaxUN5rMJ8hOUhaFFVNje11Fcpf8ku FTFtRhI5dC0TFQgSYd/FihZF/DhkCIk1yMQ01XOfFCSW5bUjKV0ueI5i2OXYar9rUydT pXzD85HMFfabV7W4Is2kIGbDgzxb+2RL7oR7jhXeizBXjT4BE531MFnNy6oT5NEU8ygS Zqzyo4fJ5D8RMBeNC63mMaLSac/y7RwgA7O8MLJ7diwxJZ90+A9PJgGIilNCEHETBM0Y xiCJf3FeFcVwszRf28cWDATa5d4xbo9veDMfaN/KltvBExBrSr78Acx5PZ6qttAEYu+i DECw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g19si1351588pgj.358.2018.12.06.15.44.33; Thu, 06 Dec 2018 15:44:33 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726396AbeLFXob (ORCPT + 31 others); Thu, 6 Dec 2018 18:44:31 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:35896 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726249AbeLFXoa (ORCPT ); Thu, 6 Dec 2018 18:44:30 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B5B8615AB; Thu, 6 Dec 2018 15:44:29 -0800 (PST) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 34B3B3F5AF; Thu, 6 Dec 2018 15:44:29 -0800 (PST) From: Jeremy Linton To: linux-arm-kernel@lists.infradead.org Cc: catalin.marinas@arm.com, will.deacon@arm.com, marc.zyngier@arm.com, suzuki.poulose@arm.com, dave.martin@arm.com, shankerd@codeaurora.org, mark.rutland@arm.com, linux-kernel@vger.kernel.org, ykaukab@suse.de, Jeremy Linton Subject: [PATCH 1/6] arm64: kpti: move check for non-vulnerable CPUs to a function Date: Thu, 6 Dec 2018 17:44:03 -0600 Message-Id: <20181206234408.1287689-2-jeremy.linton@arm.com> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181206234408.1287689-1-jeremy.linton@arm.com> References: <20181206234408.1287689-1-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Mian Yousaf Kaukab Add is_meltdown_safe() which is a whitelist of known safe cores. Signed-off-by: Mian Yousaf Kaukab [Moved location of function] Signed-off-by: Jeremy Linton --- arch/arm64/kernel/cpufeature.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) -- 2.17.2 Reviewed-by: Julien Thierry diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index aec5ecb85737..242898395f68 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -908,8 +908,7 @@ has_useable_cnp(const struct arm64_cpu_capabilities *entry, int scope) #ifdef CONFIG_UNMAP_KERNEL_AT_EL0 static int __kpti_forced; /* 0: not forced, >0: forced on, <0: forced off */ -static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry, - int scope) +static bool is_cpu_meltdown_safe(void) { /* List of CPUs that are not vulnerable and don't need KPTI */ static const struct midr_range kpti_safe_list[] = { @@ -917,6 +916,16 @@ static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry, MIDR_ALL_VERSIONS(MIDR_BRCM_VULCAN), { /* sentinel */ } }; + /* Don't force KPTI for CPUs that are not vulnerable */ + if (is_midr_in_range_list(read_cpuid_id(), kpti_safe_list)) + return true; + + return false; +} + +static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry, + int scope) +{ char const *str = "command line option"; /* @@ -940,8 +949,7 @@ static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry, if (IS_ENABLED(CONFIG_RANDOMIZE_BASE)) return true; - /* Don't force KPTI for CPUs that are not vulnerable */ - if (is_midr_in_range_list(read_cpuid_id(), kpti_safe_list)) + if (is_cpu_meltdown_safe()) return false; /* Defer to CPU feature registers */ From patchwork Thu Dec 6 23:44:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 153075 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp397ljp; Thu, 6 Dec 2018 15:44:36 -0800 (PST) X-Google-Smtp-Source: AFSGD/Uv5cLcQ9EgVxY6GHRPbTMo7Zl1D9TZZnp4jhEQi88e5XpgJj/D92Ob7fGUN3UR6Kh5WAgC X-Received: by 2002:a62:5486:: with SMTP id i128mr29901504pfb.215.1544139876201; Thu, 06 Dec 2018 15:44:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544139876; cv=none; d=google.com; s=arc-20160816; b=qD+V6fnCFIvxGr5bwROLIkqqo8kQpt6C9jW5TU5JfSFta9+n6A0tczEg/MN5nbB/sm g1QntO3VjtP55NlHNJvODgOJypL0cjuKxOOpsR4KVF03wPPHPkFK5U/t7LpOIgzKIztq gjGCYvXm85mWvP4bUwEWh3Aa+Za31fyineHgMLLdtLQ67iyIsl7oJfjvwZclQ8gebvUP KTqUBWSNWQl7CKVoMbzYcNsniDanNPKNegs0FBkjYYKYH77w9fZ9MjXyANZTOn6cruVL osHn4VqMMtXZIP7P3M3zrVm8F61WtHi7jeiPfNHkz/QiaTK1m2nXoi1mVxLLZnscCAoS rbmQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=5pvIpj6iXi7TUztHsUmFaXHZSo5o2lghKNIRdL00uAs=; b=M+v0FbPN0yDZe4O0OLut8xC+cfJPlqjD23G0jV9iaC9HhnvPS22FZPR/Jg+f/zNK6B S8xK+ByxZtraI0IIbzWTo1EpWo4FNZGNYfSJfrHvmDmCa3B1o4vVQ7rYrZ7Q412C1NCe hRLNv2UjBqi6ScNjopNZeWrEgu88+nP7r8dX6lIwsgy5XSFSLNeS7G5TePmYHJFfbuv8 ZJOzz4QR3v0aCGg6HWQqekfryRFuYO33FUi6ro2xcFH8T0eavp/NQEdQXxJnjxlbl+DE VX8nZyOfQvov2V317gDBfR0oLmIp4TmcUIg9U/7Qv/wS4qVPotYuKxYG95kujFCp5ZF4 kG1w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o9si1522975pfe.63.2018.12.06.15.44.35; Thu, 06 Dec 2018 15:44:36 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726412AbeLFXoc (ORCPT + 31 others); Thu, 6 Dec 2018 18:44:32 -0500 Received: from foss.arm.com ([217.140.101.70]:35906 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726249AbeLFXob (ORCPT ); Thu, 6 Dec 2018 18:44:31 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1255915AD; Thu, 6 Dec 2018 15:44:31 -0800 (PST) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 851EA3F5AF; Thu, 6 Dec 2018 15:44:30 -0800 (PST) From: Jeremy Linton To: linux-arm-kernel@lists.infradead.org Cc: catalin.marinas@arm.com, will.deacon@arm.com, marc.zyngier@arm.com, suzuki.poulose@arm.com, dave.martin@arm.com, shankerd@codeaurora.org, mark.rutland@arm.com, linux-kernel@vger.kernel.org, ykaukab@suse.de, Jeremy Linton Subject: [PATCH 2/6] arm64: add sysfs vulnerability show for meltdown Date: Thu, 6 Dec 2018 17:44:04 -0600 Message-Id: <20181206234408.1287689-3-jeremy.linton@arm.com> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181206234408.1287689-1-jeremy.linton@arm.com> References: <20181206234408.1287689-1-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a simple state machine which will track whether all the online cores in a machine are vulnerable. Once that is done we have a fairly authoritative view of the machine vulnerability, which allows us to make a judgment about machine safety if it hasn't been mitigated. Signed-off-by: Jeremy Linton --- arch/arm64/kernel/cpufeature.c | 31 ++++++++++++++++++++++++++----- 1 file changed, 26 insertions(+), 5 deletions(-) -- 2.17.2 diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 242898395f68..bea9adfef7fa 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -905,6 +905,8 @@ has_useable_cnp(const struct arm64_cpu_capabilities *entry, int scope) return has_cpuid_feature(entry, scope); } +static enum { A64_MELT_UNSET, A64_MELT_SAFE, A64_MELT_UNKN } __meltdown_safe = A64_MELT_UNSET; + #ifdef CONFIG_UNMAP_KERNEL_AT_EL0 static int __kpti_forced; /* 0: not forced, >0: forced on, <0: forced off */ @@ -928,6 +930,15 @@ static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry, { char const *str = "command line option"; + bool meltdown_safe = is_cpu_meltdown_safe() || + has_cpuid_feature(entry, scope); + + /* Only safe if all booted cores are known safe */ + if (meltdown_safe && __meltdown_safe == A64_MELT_UNSET) + __meltdown_safe = A64_MELT_SAFE; + else if (!meltdown_safe) + __meltdown_safe = A64_MELT_UNKN; + /* * For reasons that aren't entirely clear, enabling KPTI on Cavium * ThunderX leads to apparent I-cache corruption of kernel text, which @@ -949,11 +960,7 @@ static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry, if (IS_ENABLED(CONFIG_RANDOMIZE_BASE)) return true; - if (is_cpu_meltdown_safe()) - return false; - - /* Defer to CPU feature registers */ - return !has_cpuid_feature(entry, scope); + return !meltdown_safe; } static void @@ -1920,3 +1927,17 @@ static int __init enable_mrs_emulation(void) } core_initcall(enable_mrs_emulation); + +#ifdef CONFIG_GENERIC_CPU_VULNERABILITIES +ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, + char *buf) +{ + if (arm64_kernel_unmapped_at_el0()) + return sprintf(buf, "Mitigation: KPTI\n"); + + if (__meltdown_safe == A64_MELT_SAFE) + return sprintf(buf, "Not affected\n"); + + return sprintf(buf, "Unknown\n"); +} +#endif From patchwork Thu Dec 6 23:44:05 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 153078 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp527ljp; Thu, 6 Dec 2018 15:44:47 -0800 (PST) X-Google-Smtp-Source: AFSGD/VorN8PZSyb5TLCawIxUasg8+8KB2l9E5grUNaTHiy94B7pb9M9kZFGCph/ZZx4bBDW2Xaf X-Received: by 2002:a17:902:680f:: with SMTP id h15mr29610849plk.40.1544139887726; Thu, 06 Dec 2018 15:44:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544139887; cv=none; d=google.com; s=arc-20160816; b=CMRLzcdSmtwWca17Yb1nUhlYdJbFTFU6iR/l/nEsCp7IkBjx/sbCUynB91hcxMKIlR jc1t1DClnjGag42jbznCppvXB9D1ljSla6arNJ6fMRDJq1iTreX0+o7KX4L31brsTFXE 5BfCh0gJ1Ok3fx1pGmU87pt2SredzWqGK8inSvT0oifnIRsVmLepzxoP4XEnN2LiNrF0 0uC88uqV/wOXslFV2676L4IKDH8ECDZRUGv+4FL7cw8xZLiBhWDNsUoKmNbnKmJvNGtM nhr5tRmykEbpMKltKiK+HqXSTU3h2iN76cpB40KdNkbpQlrJtX0fMI76eHNbv0hXwYVD Asrw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=jOkFh2hnVm2Oep4QkfIgo3PdScpFFBqFauEaHEmTjaI=; b=Md+2QA8vyzeSxUfQY/llLZzCBI5oghRjLUCrUQ4SLvYu0UKhj+DdA2k623Ob8SJv+A TK9AjiM8agbfJJ0jnm8AUm3ZfO9wBeJJW0DVehmdp7b7c68DorC5SX9aFJzi+5w+6D/o XXMsDyernT5nli6kJYx+tLCaqyuVjfTJrboMEfHrM6ZT+mEGsTkYCvypm3lT9JiKLshj CgBgLEgelQRkoIy0LROeeyfRJB474ctGEqbKnx0XSvsrrLqa+ISUA1Igf49aqXXwMW/I QcQyk1IMGJuihpCndCrG2EGQM0wLrcJ3b1iTXq1JeCHNV5s7n1axTte3uViIuAvJhsEH 9dBQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p3si1373925plk.424.2018.12.06.15.44.47; Thu, 06 Dec 2018 15:44:47 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726432AbeLFXog (ORCPT + 31 others); Thu, 6 Dec 2018 18:44:36 -0500 Received: from foss.arm.com ([217.140.101.70]:35918 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726413AbeLFXod (ORCPT ); Thu, 6 Dec 2018 18:44:33 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 49CD71650; Thu, 6 Dec 2018 15:44:32 -0800 (PST) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id B453C3F5AF; Thu, 6 Dec 2018 15:44:31 -0800 (PST) From: Jeremy Linton To: linux-arm-kernel@lists.infradead.org Cc: catalin.marinas@arm.com, will.deacon@arm.com, marc.zyngier@arm.com, suzuki.poulose@arm.com, dave.martin@arm.com, shankerd@codeaurora.org, mark.rutland@arm.com, linux-kernel@vger.kernel.org, ykaukab@suse.de, Jeremy Linton Subject: [PATCH 3/6] arm64: add sysfs vulnerability show for spectre v1 Date: Thu, 6 Dec 2018 17:44:05 -0600 Message-Id: <20181206234408.1287689-4-jeremy.linton@arm.com> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181206234408.1287689-1-jeremy.linton@arm.com> References: <20181206234408.1287689-1-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Mian Yousaf Kaukab spectre v1, has been mitigated, and the mitigation is always active. Signed-off-by: Mian Yousaf Kaukab Signed-off-by: Jeremy Linton --- arch/arm64/kernel/cpu_errata.c | 10 ++++++++++ 1 file changed, 10 insertions(+) -- 2.17.2 diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index 6ad715d67df8..559ecdee6fd2 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -757,3 +757,13 @@ const struct arm64_cpu_capabilities arm64_errata[] = { { } }; + +#ifdef CONFIG_GENERIC_CPU_VULNERABILITIES + +ssize_t cpu_show_spectre_v1(struct device *dev, struct device_attribute *attr, + char *buf) +{ + return sprintf(buf, "Mitigation: __user pointer sanitization\n"); +} + +#endif From patchwork Thu Dec 6 23:44:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 153076 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp434ljp; Thu, 6 Dec 2018 15:44:39 -0800 (PST) X-Google-Smtp-Source: AFSGD/XSxDctJ+1Wn7Kwb9rUiz7JFEbCrO+KCFTVBlpMg7akSpSqQhIKdeaQlzzF/nQZUonx6r2r X-Received: by 2002:a17:902:20e9:: with SMTP id v38mr28881952plg.250.1544139879599; Thu, 06 Dec 2018 15:44:39 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544139879; cv=none; d=google.com; s=arc-20160816; b=HdC4Hw64yYh//zAuS2CcI1x1pwek4O7y6kctET9LdsjcilVcCa2og0sabf7XZV67o3 nVwyCumwXPndGF8DhoY+Z1fvwN1Ok3mFy/diTQ81GdOK9EDyrRDEin5Jd/r/j7LExzUD 8wPlDLXO1oVQ1WK1a3+/QMg/BQNQePsAdf9NS2l+I6cV/niun1YuSdcMn6A7FSw3pQHk NK4/uQGx5tsmgIcFtmtf2RhYVeFkn9vLa7xJH9n0GaXWHSo1tBzuAjKrRF3PPxz/hhIB 3t9/uXREs9284ePjaKfjZj4fMKZELJMqc8sxedtrdhXwQ+gUZ6P0lYSl8WrKNboUk+yS Bsrw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=gYzgQzKotsY6U7aM0ZTBEnTRduMiN+4R5oMIlZbIXzY=; b=D0D4aqRw8vhwRAmziqoZWbxAMZtH73fQDHmktzY9koaHpzL7LvHhpeUZ3vj/bwgvvj yLaCkE4AmozesJNlQmYSdk9q//HGE5sB0zhGtcEI4zXiOZPwu859Z34+fBzAW2Qy2Z+m Rmn9ZXScmtWa7iJozkGt3tV5VfitwBjvmdlqvyHlXREIvO0cXi/kGcfik4u7Pdlby0PE /ImxHPIbXnX4Nv5iggCPrtzAlYaZcyMPEvDq87YfWGbMpVG09ZMiN/682ivOvfCmYfbW fvtiAj5O6ftjJqStJ+334rUg+T58Ffz0twZi5Rqb/jnfE4JXaRJTdv4t7aA1VkrzCdko OA4w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n187si1536366pfn.83.2018.12.06.15.44.39; Thu, 06 Dec 2018 15:44:39 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726446AbeLFXoh (ORCPT + 31 others); Thu, 6 Dec 2018 18:44:37 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:35928 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726249AbeLFXoe (ORCPT ); Thu, 6 Dec 2018 18:44:34 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4D8481682; Thu, 6 Dec 2018 15:44:34 -0800 (PST) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id C09853F5AF; Thu, 6 Dec 2018 15:44:33 -0800 (PST) From: Jeremy Linton To: linux-arm-kernel@lists.infradead.org Cc: catalin.marinas@arm.com, will.deacon@arm.com, marc.zyngier@arm.com, suzuki.poulose@arm.com, dave.martin@arm.com, shankerd@codeaurora.org, mark.rutland@arm.com, linux-kernel@vger.kernel.org, ykaukab@suse.de, Jeremy Linton Subject: [PATCH 4/6] arm64: add sysfs vulnerability show for spectre v2 Date: Thu, 6 Dec 2018 17:44:06 -0600 Message-Id: <20181206234408.1287689-5-jeremy.linton@arm.com> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181206234408.1287689-1-jeremy.linton@arm.com> References: <20181206234408.1287689-1-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add code to track whether all the cores in the machine are vulnerable, and whether all the vulnerable cores have been mitigated. Once we have that information we can add the sysfs stub and provide an accurate view of what is known about the machine. Signed-off-by: Jeremy Linton --- arch/arm64/kernel/cpu_errata.c | 72 +++++++++++++++++++++++++++++++--- 1 file changed, 67 insertions(+), 5 deletions(-) -- 2.17.2 diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index 559ecdee6fd2..6505c93d507e 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -109,6 +109,11 @@ cpu_enable_trap_ctr_access(const struct arm64_cpu_capabilities *__unused) atomic_t arm64_el2_vector_last_slot = ATOMIC_INIT(-1); +#if defined(CONFIG_HARDEN_BRANCH_PREDICTOR) || defined(CONFIG_GENERIC_CPU_VULNERABILITIES) +/* Track overall mitigation state. We are only mitigated if all cores are ok */ +static enum { A64_HBP_UNSET, A64_HBP_MIT, A64_HBP_NOTMIT } __hardenbp_enab = A64_HBP_UNSET; +#endif + #ifdef CONFIG_HARDEN_BRANCH_PREDICTOR #include #include @@ -231,15 +236,19 @@ enable_smccc_arch_workaround_1(const struct arm64_cpu_capabilities *entry) if (!entry->matches(entry, SCOPE_LOCAL_CPU)) return; - if (psci_ops.smccc_version == SMCCC_VERSION_1_0) + if (psci_ops.smccc_version == SMCCC_VERSION_1_0) { + __hardenbp_enab = A64_HBP_NOTMIT; return; + } switch (psci_ops.conduit) { case PSCI_CONDUIT_HVC: arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID, ARM_SMCCC_ARCH_WORKAROUND_1, &res); - if ((int)res.a0 < 0) + if ((int)res.a0 < 0) { + __hardenbp_enab = A64_HBP_NOTMIT; return; + } cb = call_hvc_arch_workaround_1; /* This is a guest, no need to patch KVM vectors */ smccc_start = NULL; @@ -249,14 +258,17 @@ enable_smccc_arch_workaround_1(const struct arm64_cpu_capabilities *entry) case PSCI_CONDUIT_SMC: arm_smccc_1_1_smc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID, ARM_SMCCC_ARCH_WORKAROUND_1, &res); - if ((int)res.a0 < 0) + if ((int)res.a0 < 0) { + __hardenbp_enab = A64_HBP_NOTMIT; return; + } cb = call_smc_arch_workaround_1; smccc_start = __smccc_workaround_1_smc_start; smccc_end = __smccc_workaround_1_smc_end; break; default: + __hardenbp_enab = A64_HBP_NOTMIT; return; } @@ -266,6 +278,9 @@ enable_smccc_arch_workaround_1(const struct arm64_cpu_capabilities *entry) install_bp_hardening_cb(entry, cb, smccc_start, smccc_end); + if (__hardenbp_enab == A64_HBP_UNSET) + __hardenbp_enab = A64_HBP_MIT; + return; } #endif /* CONFIG_HARDEN_BRANCH_PREDICTOR */ @@ -539,7 +554,36 @@ multi_entry_cap_cpu_enable(const struct arm64_cpu_capabilities *entry) caps->cpu_enable(caps); } -#ifdef CONFIG_HARDEN_BRANCH_PREDICTOR +#if defined(CONFIG_HARDEN_BRANCH_PREDICTOR) || \ + defined(CONFIG_GENERIC_CPU_VULNERABILITIES) + +static enum { A64_SV2_UNSET, A64_SV2_SAFE, A64_SV2_UNSAFE } __spectrev2_safe = A64_SV2_UNSET; + +/* + * Track overall bp hardening for all heterogeneous cores in the machine. + * We are only considered "safe" if all booted cores are known safe. + */ +static bool __maybe_unused +check_branch_predictor(const struct arm64_cpu_capabilities *entry, int scope) +{ + bool is_vul; + bool has_csv2; + u64 pfr0; + + WARN_ON(scope != SCOPE_LOCAL_CPU || preemptible()); + + is_vul = is_midr_in_range_list(read_cpuid_id(), entry->midr_range_list); + + pfr0 = read_cpuid(ID_AA64PFR0_EL1); + has_csv2 = cpuid_feature_extract_unsigned_field(pfr0, ID_AA64PFR0_CSV2_SHIFT); + + if (is_vul) + __spectrev2_safe = A64_SV2_UNSAFE; + else if (__spectrev2_safe == A64_SV2_UNSET && has_csv2) + __spectrev2_safe = A64_SV2_SAFE; + + return is_vul; +} /* * List of CPUs where we need to issue a psci call to @@ -728,7 +772,9 @@ const struct arm64_cpu_capabilities arm64_errata[] = { { .capability = ARM64_HARDEN_BRANCH_PREDICTOR, .cpu_enable = enable_smccc_arch_workaround_1, - ERRATA_MIDR_RANGE_LIST(arm64_bp_harden_smccc_cpus), + .type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM, + .matches = check_branch_predictor, + .midr_range_list = arm64_bp_harden_smccc_cpus, }, #endif #ifdef CONFIG_HARDEN_EL2_VECTORS @@ -766,4 +812,20 @@ ssize_t cpu_show_spectre_v1(struct device *dev, struct device_attribute *attr, return sprintf(buf, "Mitigation: __user pointer sanitization\n"); } +ssize_t cpu_show_spectre_v2(struct device *dev, struct device_attribute *attr, + char *buf) +{ + switch (__spectrev2_safe) { + case A64_SV2_SAFE: + return sprintf(buf, "Not affected\n"); + case A64_SV2_UNSAFE: + if (__hardenbp_enab == A64_HBP_MIT) + return sprintf(buf, + "Mitigation: Branch predictor hardening\n"); + return sprintf(buf, "Vulnerable\n"); + default: + return sprintf(buf, "Unknown\n"); + } +} + #endif From patchwork Thu Dec 6 23:44:07 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 153079 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp605ljp; Thu, 6 Dec 2018 15:44:55 -0800 (PST) X-Google-Smtp-Source: AFSGD/VGigyrWJ5onshzbjeGVnk0TbdThLrYa+8P6K2JsKoEIvkmIlvh6O2BsUDOExRbDV86JkmV X-Received: by 2002:a17:902:a9c4:: with SMTP id b4mr30243331plr.298.1544139894927; Thu, 06 Dec 2018 15:44:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544139894; 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[209.132.180.67]) by mx.google.com with ESMTP id w7si1480254pfw.200.2018.12.06.15.44.54; Thu, 06 Dec 2018 15:44:54 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726478AbeLFXow (ORCPT + 31 others); Thu, 6 Dec 2018 18:44:52 -0500 Received: from foss.arm.com ([217.140.101.70]:35938 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726236AbeLFXog (ORCPT ); Thu, 6 Dec 2018 18:44:36 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AAB03168F; Thu, 6 Dec 2018 15:44:35 -0800 (PST) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 2970A3F5AF; Thu, 6 Dec 2018 15:44:35 -0800 (PST) From: Jeremy Linton To: linux-arm-kernel@lists.infradead.org Cc: catalin.marinas@arm.com, will.deacon@arm.com, marc.zyngier@arm.com, suzuki.poulose@arm.com, dave.martin@arm.com, shankerd@codeaurora.org, mark.rutland@arm.com, linux-kernel@vger.kernel.org, ykaukab@suse.de, Jeremy Linton Subject: [PATCH 5/6] arm64: add sysfs vulnerability show for speculative store bypass Date: Thu, 6 Dec 2018 17:44:07 -0600 Message-Id: <20181206234408.1287689-6-jeremy.linton@arm.com> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181206234408.1287689-1-jeremy.linton@arm.com> References: <20181206234408.1287689-1-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Mian Yousaf Kaukab Return status based no ssbd_state and the arm64 SSBS feature. Return string "Unknown" in case CONFIG_ARM64_SSBD is disabled or arch workaround2 is not available in the firmware. Signed-off-by: Mian Yousaf Kaukab [Added SSBS logic] Signed-off-by: Jeremy Linton --- arch/arm64/kernel/cpu_errata.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) -- 2.17.2 diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index 6505c93d507e..8aeb5ca38db8 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -423,6 +423,7 @@ static bool has_ssbd_mitigation(const struct arm64_cpu_capabilities *entry, ssbd_state = ARM64_SSBD_UNKNOWN; return false; + /* machines with mixed mitigation requirements must not return this */ case SMCCC_RET_NOT_REQUIRED: pr_info_once("%s mitigation not required\n", entry->desc); ssbd_state = ARM64_SSBD_MITIGATED; @@ -828,4 +829,31 @@ ssize_t cpu_show_spectre_v2(struct device *dev, struct device_attribute *attr, } } +ssize_t cpu_show_spec_store_bypass(struct device *dev, + struct device_attribute *attr, char *buf) +{ + /* + * Two assumptions: First, get_ssbd_state() reflects the worse case + * for hetrogenous machines, and that if SSBS is supported its + * supported by all cores. + */ + switch (arm64_get_ssbd_state()) { + case ARM64_SSBD_MITIGATED: + return sprintf(buf, "Not affected\n"); + + case ARM64_SSBD_KERNEL: + case ARM64_SSBD_FORCE_ENABLE: + if (cpus_have_cap(ARM64_SSBS)) + return sprintf(buf, "Not affected\n"); + return sprintf(buf, + "Mitigation: Speculative Store Bypass disabled\n"); + + case ARM64_SSBD_FORCE_DISABLE: + return sprintf(buf, "Vulnerable\n"); + + default: /* ARM64_SSBD_UNKNOWN*/ + return sprintf(buf, "Unknown\n"); + } +} + #endif From patchwork Thu Dec 6 23:44:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 153077 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp459ljp; Thu, 6 Dec 2018 15:44:42 -0800 (PST) X-Google-Smtp-Source: AFSGD/Wx2+OUD2f5al6vGA608EGTf1AZljrInHedlUFWKigrLlWyd3EC9RSp4TGsSghb3bHxCMBa X-Received: by 2002:a62:a1a:: with SMTP id s26mr30721936pfi.31.1544139881916; Thu, 06 Dec 2018 15:44:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544139881; cv=none; d=google.com; s=arc-20160816; b=ZhpbWVlj5LGr/M9Zwl4OFL5SIAX3WR339+Ypyo+90iI5FMaz/et9fnAfQC/q8ZTNi6 4st0uuKjOsLVnqC2bfoobtB9FLMXIA5L0UVhaLLYKTQjM1ZyBzKj6iXfNzdWfR7/W0Xf P9YIpO2rhF39aiyJeoO1XP1YGU5RFTot93EO9sAxqd0EETVvGPc0Hj4yWln8UcMJ358S cT//9axiAwhYn1rAZLQgEuIw6I4Hex/G8KVCmRPCfBzINC8WnwuC/nmcSbTGtjaapMcT 38v8EaGLtJQqiGAPA9vhhXHlKXxd3rxpt2f2TEvbZoS/02YHQj0AVmKjGcOCQJ9fb/ps mHCw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=ly0whG13gAAEQFFS8d/6I0WPwIxEBCott6YObJxpyrE=; b=w/o8eNz6SyXFnsHjgIf45U/yERNVu05goavmogeOd5ZuRbHGMCzKBDnW0Y2WOYHlhO 0nCOtxgo/G7F5xJRpGXO/IRBL7fNzqtJ0mluMv7MqkTG1Nj3zDBgWUjqrAP6qDTOOxKO F0Jc9V42tkjPydBy/2i/gZUTUqHDzHyRLHgYmLdw84Va7DHfLAE5Ygc7uC+cBC4dnIZL wnvqiLW+/sk7QZzLIYftnow2pliCDoGatHtmXwSAdhl4fnrJ7YTZcdbcmzXKSGiLkSoP xKKNpHg2THtDxiHxZm0Npi/WOFpJxYCZH7Kx2MPXhANJysrQ3AhJJtTBzYeAKRHkBNif QVzQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p3si1373925plk.424.2018.12.06.15.44.41; Thu, 06 Dec 2018 15:44:41 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726173AbeLFXoj (ORCPT + 31 others); Thu, 6 Dec 2018 18:44:39 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:35952 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726439AbeLFXoh (ORCPT ); Thu, 6 Dec 2018 18:44:37 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DF1AE1596; Thu, 6 Dec 2018 15:44:36 -0800 (PST) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 549073F5AF; Thu, 6 Dec 2018 15:44:36 -0800 (PST) From: Jeremy Linton To: linux-arm-kernel@lists.infradead.org Cc: catalin.marinas@arm.com, will.deacon@arm.com, marc.zyngier@arm.com, suzuki.poulose@arm.com, dave.martin@arm.com, shankerd@codeaurora.org, mark.rutland@arm.com, linux-kernel@vger.kernel.org, ykaukab@suse.de, Jeremy Linton Subject: [PATCH 6/6] arm64: enable generic CPU vulnerabilites support Date: Thu, 6 Dec 2018 17:44:08 -0600 Message-Id: <20181206234408.1287689-7-jeremy.linton@arm.com> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181206234408.1287689-1-jeremy.linton@arm.com> References: <20181206234408.1287689-1-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Mian Yousaf Kaukab Enable CPU vulnerabilty show functions for spectre_v1, spectre_v2, meltdown and store-bypass. Signed-off-by: Mian Yousaf Kaukab Signed-off-by: Jeremy Linton --- arch/arm64/Kconfig | 1 + 1 file changed, 1 insertion(+) -- 2.17.2 diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index ea2ab0330e3a..4b20d46c959b 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -89,6 +89,7 @@ config ARM64 select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS_BROADCAST select GENERIC_CPU_AUTOPROBE + select GENERIC_CPU_VULNERABILITIES select GENERIC_EARLY_IOREMAP select GENERIC_IDLE_POLL_SETUP select GENERIC_IRQ_MULTI_HANDLER