From patchwork Mon Dec 10 13:56:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 153267 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3588551ljp; Mon, 10 Dec 2018 05:56:48 -0800 (PST) X-Google-Smtp-Source: AFSGD/V3yS89T5pkemnQ31BKAXdK5kGPqpC/lP3dSZofYUtYA3a/Cgncu6AtFbn/vMO1yb8A+zcw X-Received: by 2002:a17:902:142:: with SMTP id 60mr12590252plb.330.1544450207977; Mon, 10 Dec 2018 05:56:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544450207; cv=none; d=google.com; s=arc-20160816; b=MKFpHKDzaMjbhENzH5DFQCGzSH2zK7oBt1MLkd0qG5S2wrGRuwP/27fAY93QjxftIP YNk8hndkv3Dh/v1G81Jxk0I9zNlls1HsAk5c2ECFSBTGo9DZ9R8xtd/jshyz7qicJ/yc GIj6lfn8iJuzlARRSHxDINv9Rsagv3bqxW1mQgi/K/guchwBhC27f/pKAobxAv8pwMSA GQL0sTksG8P+G6kquEdL+QBFu6xBhUVnvT4JUsTXOOzB3d19kzj8JgESNavuNdD4+vEt HD1bELm51BtpSZueK2/Kuvtl5L5i3JKBqBUeqNsyBFnBBaa9FXAeU54XpJke1IKvrkXw 1U9A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=aP1EI+I5RgUtlWmE62M6UqtQRQysaLb2DRE3LkFnZds=; b=OM0M1yyCpjGKlv+QhCvAN7pNemyv1W1q3TRQHDInUgQX9Zzhk0mf6ce8JeoiYjWioS G3KCEM7OAyAZfHGvZixnMhU81xhzNO9YyMjb1rEcoreAXar8r1LiG8ldtIVZAH7IQsrT A1a6zsegGRc1LurUTjBhR7quBTI99yBZhYFw26kMbxli36WHVw+7EhEnJIpFecqpgkKw yzr0D47CUmzqWyiUWxgLehbPOC/Ko2dxof0kKhYcuhPz9q7od/738ZK9E07LcgwsXtIv qumeBjHEQs39kMtolnZwcxby28ixABehbzOZtzxY/CFdn7ePFGAyJNcJ7SGMBVi8zQD0 H5jQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=B09g4Xy8; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[86.30.250.44]) by smtp.gmail.com with ESMTPSA id c14sm8612506wme.13.2018.12.10.05.56.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 10 Dec 2018 05:56:38 -0800 (PST) From: Srinivas Kandagatla To: marc.zyngier@arm.com Cc: sudeep.holla@arm.com, tglx@linutronix.de, jason@lakedaemon.net, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, rnayak@codeaurora.org, sboyd@kernel.org, bjorn.andersson@linaro.org, nicolas.dechesne@linaro.org, ctatlor97@gmail.com, vkoul@kernel.org, robh+dt@kernel.org, devicetree@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH v5 2/4] irqchip/gic: common: add support to device tree based quirks Date: Mon, 10 Dec 2018 13:56:31 +0000 Message-Id: <20181210135633.30283-3-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181210135633.30283-1-srinivas.kandagatla@linaro.org> References: <20181210135633.30283-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds support to device tree based quirks based on device tree compatible string. Signed-off-by: Srinivas Kandagatla --- drivers/irqchip/irq-gic-common.c | 12 ++++++++++++ drivers/irqchip/irq-gic-common.h | 3 +++ drivers/irqchip/irq-gic-v3.c | 7 +++++++ 3 files changed, 22 insertions(+) -- 2.19.2 diff --git a/drivers/irqchip/irq-gic-common.c b/drivers/irqchip/irq-gic-common.c index 01e673c680cd..3c93c6f4d1f1 100644 --- a/drivers/irqchip/irq-gic-common.c +++ b/drivers/irqchip/irq-gic-common.c @@ -36,6 +36,18 @@ void gic_set_kvm_info(const struct gic_kvm_info *info) gic_kvm_info = info; } +void gic_enable_of_quirks(const struct device_node *np, + const struct gic_quirk *quirks, void *data) +{ + for (; quirks->desc; quirks++) { + if (!of_device_is_compatible(np, quirks->compatible)) + continue; + if (quirks->init(data)) + pr_info("GIC: enabling workaround for %s\n", + quirks->desc); + } +} + void gic_enable_quirks(u32 iidr, const struct gic_quirk *quirks, void *data) { diff --git a/drivers/irqchip/irq-gic-common.h b/drivers/irqchip/irq-gic-common.h index 3919cd7c5285..97e58fb6c232 100644 --- a/drivers/irqchip/irq-gic-common.h +++ b/drivers/irqchip/irq-gic-common.h @@ -23,6 +23,7 @@ struct gic_quirk { const char *desc; + const char *compatible; bool (*init)(void *data); u32 iidr; u32 mask; @@ -35,6 +36,8 @@ void gic_dist_config(void __iomem *base, int gic_irqs, void gic_cpu_config(void __iomem *base, void (*sync_access)(void)); void gic_enable_quirks(u32 iidr, const struct gic_quirk *quirks, void *data); +void gic_enable_of_quirks(const struct device_node *np, + const struct gic_quirk *quirks, void *data); void gic_set_kvm_info(const struct gic_kvm_info *info); diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index 29e9d47be97d..df1ff3b5836a 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -1271,6 +1271,11 @@ static void __init gic_of_setup_kvm_info(struct device_node *node) gic_set_kvm_info(&gic_v3_kvm_info); } +static const struct gic_quirk gic_quirks[] = { + { + } +}; + static int __init gic_of_init(struct device_node *node, struct device_node *parent) { void __iomem *dist_base; @@ -1318,6 +1323,8 @@ static int __init gic_of_init(struct device_node *node, struct device_node *pare if (of_property_read_u64(node, "redistributor-stride", &redist_stride)) redist_stride = 0; + gic_enable_of_quirks(node, gic_quirks, &gic_data); + err = gic_init_bases(dist_base, rdist_regs, nr_redist_regions, redist_stride, &node->fwnode); if (err) From patchwork Mon Dec 10 13:56:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 153265 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3588519ljp; Mon, 10 Dec 2018 05:56:46 -0800 (PST) X-Google-Smtp-Source: AFSGD/XnIxs149rwbZDzFzCzIFzIl9YatkeRJ/1zYlTeIGyI3tx+LiI2h67iUnD2yLHIhbYVzxvJ X-Received: by 2002:a65:530c:: with SMTP id m12mr10600046pgq.224.1544450206565; Mon, 10 Dec 2018 05:56:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544450206; cv=none; d=google.com; s=arc-20160816; b=UyHochfAesIb118kclSTxutCmEzO0FBvZ6HxYK52lI4FQmEeeyJTWGskAgr/3ZP8Th YUuJOn3FHuk2VNFuGeefBzmAOZYpw67rGI6zhDBpp4HQSZ/uXZVS1FE0BgZetB3QZ9Vg tpATL3ZbWgr4VYmpOBAhQ7ebj5xZCxMZ+fFtKCXgt4xngU5bTAkzK8YG2kDagQUta9ox tp3E7xQpFR38B/V21+O3pESZ3nry5OJ0GymQyoo/6F7kzbpfI4cwBTOg0fTG/bKeS9iv jqOC+GlQ/besgi6W9r7vQVm+b4jixmCvSITxYF3VTi5SfTkOG6YZb8Yiuae/zRF9titu p1AQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=G2KRU/g/GisxnlaqWW4HcsfIO+AdwGpDB+M+SNsZ+gc=; b=y0gpI1jgYlEHYyCaW/aXZaORxKaMFXBfY5twR9IYw+t4c0L9YAV2XmrjYRwTGFZQdS BOvSFjFhJn1BhIVgLQ3v9tbOVacmlPnkKFirzD0iiJclmivSW4gfZRO3ciTs7xADIDfQ iSZA21sDtoAAL/E74tFZ2RsuCwsV0ikgylDIOpi6iCFioFnpjjkxlHtE9XhxwbpKrdDd 9Q6Exm48LdbyvtHXpoEEXSfwfABJZc+EPZPIctCPQqTOQwMVX10uS+cJ5yd3AxDF1WQp /UPO3081TViSNWMjwdrr/jw85MRzxyDV0LqVqyqineDjox+eDCaaQsIpP+kvxe2kWuRn qEFw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DgCCOpV1; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[86.30.250.44]) by smtp.gmail.com with ESMTPSA id c14sm8612506wme.13.2018.12.10.05.56.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 10 Dec 2018 05:56:41 -0800 (PST) From: Srinivas Kandagatla To: marc.zyngier@arm.com Cc: sudeep.holla@arm.com, tglx@linutronix.de, jason@lakedaemon.net, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, rnayak@codeaurora.org, sboyd@kernel.org, bjorn.andersson@linaro.org, nicolas.dechesne@linaro.org, ctatlor97@gmail.com, vkoul@kernel.org, robh+dt@kernel.org, devicetree@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH v5 4/4] arm64: dts: add msm8996 compatible to gicv3 Date: Mon, 10 Dec 2018 13:56:33 +0000 Message-Id: <20181210135633.30283-5-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181210135633.30283-1-srinivas.kandagatla@linaro.org> References: <20181210135633.30283-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add compatible to gicv3 node to enable quirk required to restrict writing to GICR_WAKER register which is restricted on msm8996 SoC in Hypervisor. With this quirk MSM8996 can at least boot out of mainline, which can help community to work with boards based on MSM8996. Without this patch Qualcomm DB820c board reboots on mainline. Signed-off-by: Srinivas Kandagatla --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.19.2 diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 8585c61e32ef..cd9650cea05d 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -404,7 +404,7 @@ }; intc: interrupt-controller@9bc0000 { - compatible = "arm,gic-v3"; + compatible = "qcom,msm8996-gic-v3", "arm,gic-v3"; #interrupt-cells = <3>; interrupt-controller; #redistributor-regions = <1>;