From patchwork Mon Dec 10 16:56:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 153308 Delivered-To: patches@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3775985ljp; Mon, 10 Dec 2018 08:56:39 -0800 (PST) X-Google-Smtp-Source: AFSGD/UuyWeYrtR+ZcH3SHgaSY9GFClRfwgi45qXM+6yHmliQ7PCsd7A0st9WxQNXukE0PQYtj3l X-Received: by 2002:a19:c413:: with SMTP id u19mr7220501lff.100.1544460999506; Mon, 10 Dec 2018 08:56:39 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544460999; cv=none; d=google.com; s=arc-20160816; b=UuyL2jPvM0br0xaSClDkfbRfjot/zcSsca0S0aj9iaCeJBb1n9xIVaOVDu4QvtUxCL AkVSWixaFvQmyssGSVm8QhvQJXdJe/rNLLdFhGENG1wuGc/f3cftQNAoPQAck4BR7OQg IF1YhXzhhw3DATCODThx2TdzmS4Y//ry8V6Qv/yi2iGzm0rjfCTxlWTAItH3BakH+K1U 6RskC60Ov19y5bDnplWsRb+RlC6btI+fh6dMhEY/1kvwcHx4VCap7YsQoc2mXJku5tKs eGB9Tw0TVHKt8kfiP5k37CIYL+6yu1KYQmWN5x1lwqQTRMTphLNOlMep6AkBaFowhFWZ 8n4Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=n+7hwrxAniTUGxX9CM4rzmR81vtu+tSCnMgOk4/mCXY=; b=I2909BX2yc/fb9DMqKH9LE6jDLaprccAMkRNXAqCYWEN8v8V8C8vXJG0hZHXAp3Q4F YoNzTWgpWR8lNiGIyeKUf0Ec0z5e93ZjGfthZlKui57270+8fCLSvJE8x/G9MaXBD4Ud cCdTIs2HaudfamZzE8wVoDJdpc0YOZzMZrku3zgYZMtwA8IXXwtRDpGYgtfgkzrPty3A CyE/N9OwhonWCnhBk1rRtDvggCdj730fukNIMFAAInW7wpjR4KU/xVYhz8Ewe+xhtqoN Ukk+2ibpBGOJQsoPGB2SVRkHXX2I0IAnHinZ1vFpVxG470twH2roytkWQyl8SQqo524x rmVQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id f21-v6si9690899ljg.217.2018.12.10.08.56.39 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 Dec 2018 08:56:39 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1gWOrF-0000MR-TT; Mon, 10 Dec 2018 16:56:37 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Laurent Vivier , Mark Cave-Ayland Subject: [RFC 1/3] target/m68k: In dump_address_map() check for memory access failures Date: Mon, 10 Dec 2018 16:56:34 +0000 Message-Id: <20181210165636.28366-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181210165636.28366-1-peter.maydell@linaro.org> References: <20181210165636.28366-1-peter.maydell@linaro.org> MIME-Version: 1.0 In dump_address_map(), use address_space_ldl() instead of ldl_phys(). This allows us to check whether the memory access failed. Signed-off-by: Peter Maydell --- target/m68k/helper.c | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) -- 2.19.2 Reviewed-by: Laurent Vivier diff --git a/target/m68k/helper.c b/target/m68k/helper.c index 917d46efcc3..374e4861886 100644 --- a/target/m68k/helper.c +++ b/target/m68k/helper.c @@ -411,6 +411,7 @@ static void dump_address_map(FILE *f, fprintf_function cpu_fprintf, int last_attr = -1, attr = -1; M68kCPU *cpu = m68k_env_get_cpu(env); CPUState *cs = CPU(cpu); + MemTxResult txres; if (env->mmu.tcr & M68K_TCR_PAGE_8K) { /* 8k page */ @@ -424,22 +425,29 @@ static void dump_address_map(FILE *f, fprintf_function cpu_fprintf, tib_mask = M68K_4K_PAGE_MASK; } for (i = 0; i < M68K_ROOT_POINTER_ENTRIES; i++) { - tia = ldl_phys(cs->as, M68K_POINTER_BASE(root_pointer) + i * 4); - if (!M68K_UDT_VALID(tia)) { + tia = address_space_ldl(cs->as, M68K_POINTER_BASE(root_pointer) + i * 4, + MEMTXATTRS_UNSPECIFIED, &txres); + if (txres != MEMTX_OK || !M68K_UDT_VALID(tia)) { continue; } for (j = 0; j < M68K_ROOT_POINTER_ENTRIES; j++) { - tib = ldl_phys(cs->as, M68K_POINTER_BASE(tia) + j * 4); - if (!M68K_UDT_VALID(tib)) { + tib = address_space_ldl(cs->as, M68K_POINTER_BASE(tia) + j * 4, + MEMTXATTRS_UNSPECIFIED, &txres); + if (txres != MEMTX_OK || !M68K_UDT_VALID(tib)) { continue; } for (k = 0; k < tic_size; k++) { - tic = ldl_phys(cs->as, (tib & tib_mask) + k * 4); - if (!M68K_PDT_VALID(tic)) { + tic = address_space_ldl(cs->as, (tib & tib_mask) + k * 4, + MEMTXATTRS_UNSPECIFIED, &txres); + if (txres != MEMTX_OK || !M68K_PDT_VALID(tic)) { continue; } if (M68K_PDT_INDIRECT(tic)) { - tic = ldl_phys(cs->as, M68K_INDIRECT_POINTER(tic)); + tic = address_space_ldl(cs->as, M68K_INDIRECT_POINTER(tic), + MEMTXATTRS_UNSPECIFIED, &txres); + if (txres != MEMTX_OK) { + continue; + } } last_logical = logical; From patchwork Mon Dec 10 16:56:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 153310 Delivered-To: patches@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3776060ljp; Mon, 10 Dec 2018 08:56:43 -0800 (PST) X-Google-Smtp-Source: AFSGD/WpnnmBsEBOX1kSyWY1HMtWXdluwqDjFBPpQ5+tKJi+BfBuCt8ujEt3XdJ2qmxIvxuQ8oky X-Received: by 2002:a17:902:be0c:: with SMTP id r12mr12377078pls.299.1544461003373; Mon, 10 Dec 2018 08:56:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544461003; cv=none; d=google.com; s=arc-20160816; b=Hazfnt5j6WkQYtncvhlTKLhHuJ0GrW7lgwXUPGO95sviruZqeumhO0rDIbTHjunLqQ o3ZGy67WOw+0QuegpTwDy/6Dnccj6X37/XUvqjIn2s2pbcy6vKY7qeO7zPZW1qmT/Yq7 XiD4icsx5RK38sinnNSFIbs5gYIc0mhkYarv18pKDarl/ljOVXpv4r+zQbgpZfqdA8QX L8VE0iM0tIpw0VQ118U3tzX5/PpiSzSJKiTzPOf0V+sswUGyenZu2+zA2l5zBKmf13ZV rNGmAIx3W7EyGQZvpzGUwWCQdr1S51yDJWw3JuV2e8bXw0S4qWsAhaUrmx8D5oovPqIM 7BAQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=aktzWqg0tFzVkFbEUUmtxiazw4sAOTTHiLxfxcjPhdc=; b=jXkS0OHm+gmcHfD4bYaDKI8X1stbPgxFEijICzUbpzr1Gj1VUNndl6sdsJiW5GZhzb h+tuIFXH2KSrlf3yeFP1/VOvrn0By0xesrdlaE5uEb6y24PXKkgAvkNRiLNiUOQ3QZSs lnqmnzLdVBDq6JHLv3s3jfyvLgojJaKrwhK/e+29qR3Eg5SRDPdqIedFPnWVau7ZncwT u5bIH/3/+e2ISbWYh2AaQQqQuhSwW5CwgC2wWY4JgniyNn3fRzcj4u23gax2T2EgbWVW +4ANjhg+Q/JjKAYyRqBKwcjC/s+unilcpvOYMcov03HekNdLMaVxJeqdvObfXz+m10hi +6Sg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id h16si10117331pgh.283.2018.12.10.08.56.42 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 Dec 2018 08:56:42 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1gWOrG-0000Me-EI; Mon, 10 Dec 2018 16:56:38 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Laurent Vivier , Mark Cave-Ayland Subject: [RFC 2/3] target/m68k: In get_physical_address() check for memory access failures Date: Mon, 10 Dec 2018 16:56:35 +0000 Message-Id: <20181210165636.28366-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181210165636.28366-1-peter.maydell@linaro.org> References: <20181210165636.28366-1-peter.maydell@linaro.org> MIME-Version: 1.0 In get_physical_address(), use address_space_ldl() and address_space_stl() instead of ldl_phys() and stl_phys(). This allows us to check whether the memory access failed. For the moment, we simply return -1 in this case; add a TODO comment that we should ideally generate the appropriate kind of fault. Signed-off-by: Peter Maydell --- target/m68k/helper.c | 62 +++++++++++++++++++++++++++++++++++++------- 1 file changed, 52 insertions(+), 10 deletions(-) -- 2.19.2 Reviewed-by: Laurent Vivier diff --git a/target/m68k/helper.c b/target/m68k/helper.c index 374e4861886..b5fa2f8056d 100644 --- a/target/m68k/helper.c +++ b/target/m68k/helper.c @@ -660,6 +660,7 @@ static int get_physical_address(CPUM68KState *env, hwaddr *physical, bool debug = access_type & ACCESS_DEBUG; int page_bits; int i; + MemTxResult txres; /* Transparent Translation (physical = logical) */ for (i = 0; i < M68K_MAX_TTR; i++) { @@ -689,12 +690,19 @@ static int get_physical_address(CPUM68KState *env, hwaddr *physical, /* Root Index */ entry = M68K_POINTER_BASE(next) | M68K_ROOT_INDEX(address); - next = ldl_phys(cs->as, entry); + next = address_space_ldl(cs->as, entry, MEMTXATTRS_UNSPECIFIED, &txres); + if (txres != MEMTX_OK) { + goto txfail; + } if (!M68K_UDT_VALID(next)) { return -1; } if (!(next & M68K_DESC_USED) && !debug) { - stl_phys(cs->as, entry, next | M68K_DESC_USED); + address_space_stl(cs->as, entry, next | M68K_DESC_USED, + MEMTXATTRS_UNSPECIFIED, &txres); + if (txres != MEMTX_OK) { + goto txfail; + } } if (next & M68K_DESC_WRITEPROT) { if (access_type & ACCESS_PTEST) { @@ -709,12 +717,19 @@ static int get_physical_address(CPUM68KState *env, hwaddr *physical, /* Pointer Index */ entry = M68K_POINTER_BASE(next) | M68K_POINTER_INDEX(address); - next = ldl_phys(cs->as, entry); + next = address_space_ldl(cs->as, entry, MEMTXATTRS_UNSPECIFIED, &txres); + if (txres != MEMTX_OK) { + goto txfail; + } if (!M68K_UDT_VALID(next)) { return -1; } if (!(next & M68K_DESC_USED) && !debug) { - stl_phys(cs->as, entry, next | M68K_DESC_USED); + address_space_stl(cs->as, entry, next | M68K_DESC_USED, + MEMTXATTRS_UNSPECIFIED, &txres); + if (txres != MEMTX_OK) { + goto txfail; + } } if (next & M68K_DESC_WRITEPROT) { if (access_type & ACCESS_PTEST) { @@ -733,27 +748,46 @@ static int get_physical_address(CPUM68KState *env, hwaddr *physical, entry = M68K_4K_PAGE_BASE(next) | M68K_4K_PAGE_INDEX(address); } - next = ldl_phys(cs->as, entry); + next = address_space_ldl(cs->as, entry, MEMTXATTRS_UNSPECIFIED, &txres); + if (txres != MEMTX_OK) { + goto txfail; + } if (!M68K_PDT_VALID(next)) { return -1; } if (M68K_PDT_INDIRECT(next)) { - next = ldl_phys(cs->as, M68K_INDIRECT_POINTER(next)); + next = address_space_ldl(cs->as, M68K_INDIRECT_POINTER(next), + MEMTXATTRS_UNSPECIFIED, &txres); + if (txres != MEMTX_OK) { + goto txfail; + } } if (access_type & ACCESS_STORE) { if (next & M68K_DESC_WRITEPROT) { if (!(next & M68K_DESC_USED) && !debug) { - stl_phys(cs->as, entry, next | M68K_DESC_USED); + address_space_stl(cs->as, entry, next | M68K_DESC_USED, + MEMTXATTRS_UNSPECIFIED, &txres); + if (txres != MEMTX_OK) { + goto txfail; + } } } else if ((next & (M68K_DESC_MODIFIED | M68K_DESC_USED)) != (M68K_DESC_MODIFIED | M68K_DESC_USED) && !debug) { - stl_phys(cs->as, entry, - next | (M68K_DESC_MODIFIED | M68K_DESC_USED)); + address_space_stl(cs->as, entry, + next | (M68K_DESC_MODIFIED | M68K_DESC_USED), + MEMTXATTRS_UNSPECIFIED, &txres); + if (txres != MEMTX_OK) { + goto txfail; + } } } else { if (!(next & M68K_DESC_USED) && !debug) { - stl_phys(cs->as, entry, next | M68K_DESC_USED); + address_space_stl(cs->as, entry, next | M68K_DESC_USED, + MEMTXATTRS_UNSPECIFIED, &txres); + if (txres != MEMTX_OK) { + goto txfail; + } } } @@ -785,6 +819,14 @@ static int get_physical_address(CPUM68KState *env, hwaddr *physical, } return 0; + +txfail: + /* + * A page table load/store failed. TODO: we should really raise a + * suitable guest fault here if this is not a debug access. + * For now just return that the translation failed. + */ + return -1; } hwaddr m68k_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) From patchwork Mon Dec 10 16:56:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 153309 Delivered-To: patches@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3775989ljp; Mon, 10 Dec 2018 08:56:39 -0800 (PST) X-Google-Smtp-Source: AFSGD/VGQj/aoeevkvXscnjVXrM8Ee+M1fQqzP5OHRmDkebrPa/+ZOMndwO3RgQzMNgTppGLZ+bm X-Received: by 2002:adf:f449:: with SMTP id f9mr10797209wrp.40.1544460999614; Mon, 10 Dec 2018 08:56:39 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544460999; cv=none; d=google.com; s=arc-20160816; b=Gl4oUGltDSDXv6y1Osm+0xFRbxmeedAN/rkLK2kAO7yykSWwXkOJSOwGes7b59YRG/ RUvw//Xf4rbFgQECjKeSMWX4xyu3SBx/ZW09B4QckvrRc7MOaegSVUzjg51lP+WwU+zO BQlUQItmFPnlNt5vod/zHAOhkQY+8shx0HUMS/tVJZAvEkQfJI89lTlFQ622ngn4sFXf BvssjlZNArMhcVsuZyA0PtUO7BA0c1Js9slcz06aUou3gDEMFLsdIbymhLgl28togDK5 0IxyKiC5q31M8gXYmgCGsFLSd9Y6FaB/UKyLbYGGHTUlxh4gDefEjnmL7S/d/VqBLuLx 32OA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=wLj/o0NUcQTORj+AHTzqhqotcmvb4BsNhXYBCSYBs9s=; b=zL89xrcKcVsm7ylmKTX+LYdufgOUGCqubYE0rhAxuU28IgNty9OSpDFibONxxxnrTf jxdLKfCDm2T0L5XwdjWEy7TT4okK7zZj0+SbyMYhWidgJCVtVfkk8Yc/Ib+wBDCSlzLH N4oUUkkdcL4fyp6AF7wfhL8ePUGOxd12a071vRuRvI79mpJcIvBD57xD8swNyjKx6L50 7mdKZKc1OEK+CBsExM6KpMGs5iJ5RqYG4CwKBFKkZTdp+kAF/IcxQoOLVEYAmcJ9DI/1 I+RQEc/J3zWoboOHdrnF3LDAvDGecrVssAWd5O2sJCAvQPZVcOhVSj1vd4BdJbbW9ZV0 neVg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id o8si7458746wrv.48.2018.12.10.08.56.39 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 Dec 2018 08:56:39 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1gWOrH-0000Mz-0D; Mon, 10 Dec 2018 16:56:39 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Laurent Vivier , Mark Cave-Ayland Subject: [RFC 3/3] target/m68k: Switch to transaction_failed hook Date: Mon, 10 Dec 2018 16:56:36 +0000 Message-Id: <20181210165636.28366-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181210165636.28366-1-peter.maydell@linaro.org> References: <20181210165636.28366-1-peter.maydell@linaro.org> MIME-Version: 1.0 Switch the m68k target from the old unassigned_access hook to the transaction_failed hook. The notable difference is that rather than it being called for all physical memory accesses which fail (including those made by DMA devices or by the gdbstub), it is only called for those made by the CPU via its MMU. (In previous commits we put in explicit checks for the direct physical loads made by the target/m68k code which will no longer be handled by calling the unassigned_access hook.) Signed-off-by: Peter Maydell --- target/m68k/cpu.h | 7 ++++--- target/m68k/cpu.c | 2 +- target/m68k/op_helper.c | 20 ++++++++------------ 3 files changed, 13 insertions(+), 16 deletions(-) -- 2.19.2 Reviewed-by: Laurent Vivier diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index b288a3864e0..08828b0581b 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -545,9 +545,10 @@ static inline int cpu_mmu_index (CPUM68KState *env, bool ifetch) int m68k_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, int rw, int mmu_idx); -void m68k_cpu_unassigned_access(CPUState *cs, hwaddr addr, - bool is_write, bool is_exec, int is_asi, - unsigned size); +void m68k_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr, + unsigned size, MMUAccessType access_type, + int mmu_idx, MemTxAttrs attrs, + MemTxResult response, uintptr_t retaddr); #include "exec/cpu-all.h" diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 582e3a73b37..6d09c630b0e 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -271,7 +271,7 @@ static void m68k_cpu_class_init(ObjectClass *c, void *data) cc->gdb_write_register = m68k_cpu_gdb_write_register; cc->handle_mmu_fault = m68k_cpu_handle_mmu_fault; #if defined(CONFIG_SOFTMMU) - cc->do_unassigned_access = m68k_cpu_unassigned_access; + cc->do_transaction_failed = m68k_cpu_transaction_failed; cc->get_phys_page_debug = m68k_cpu_get_phys_page_debug; #endif cc->disas_set_info = m68k_cpu_disas_set_info; diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index 8d09ed91c49..6739ab8e436 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -454,19 +454,15 @@ static inline void do_interrupt_m68k_hardirq(CPUM68KState *env) do_interrupt_all(env, 1); } -void m68k_cpu_unassigned_access(CPUState *cs, hwaddr addr, bool is_write, - bool is_exec, int is_asi, unsigned size) +void m68k_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr, + unsigned size, MMUAccessType access_type, + int mmu_idx, MemTxAttrs attrs, + MemTxResult response, uintptr_t retaddr) { M68kCPU *cpu = M68K_CPU(cs); CPUM68KState *env = &cpu->env; -#ifdef DEBUG_UNASSIGNED - qemu_log_mask(CPU_LOG_INT, "Unassigned " TARGET_FMT_plx " wr=%d exe=%d\n", - addr, is_write, is_exec); -#endif - if (env == NULL) { - /* when called from gdb, env is NULL */ - return; - } + + cpu_restore_state(cs, retaddr, true); if (m68k_feature(env, M68K_FEATURE_M68040)) { env->mmu.mmusr = 0; @@ -476,7 +472,7 @@ void m68k_cpu_unassigned_access(CPUState *cs, hwaddr addr, bool is_write, if (env->sr & SR_S) { /* SUPERVISOR */ env->mmu.ssw |= M68K_TM_040_SUPER; } - if (is_exec) { /* instruction or data */ + if (access_type == MMU_INST_FETCH) { /* instruction or data */ env->mmu.ssw |= M68K_TM_040_CODE; } else { env->mmu.ssw |= M68K_TM_040_DATA; @@ -494,7 +490,7 @@ void m68k_cpu_unassigned_access(CPUState *cs, hwaddr addr, bool is_write, break; } - if (!is_write) { + if (access_type != MMU_DATA_STORE) { env->mmu.ssw |= M68K_RW_040; }