From patchwork Sat Mar 26 06:08:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 554467 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A66BCC433F5 for ; Sat, 26 Mar 2022 06:08:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231432AbiCZGKI (ORCPT ); Sat, 26 Mar 2022 02:10:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47538 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231421AbiCZGKH (ORCPT ); Sat, 26 Mar 2022 02:10:07 -0400 Received: from mail-pl1-x633.google.com (mail-pl1-x633.google.com [IPv6:2607:f8b0:4864:20::633]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 98D3E3EF20 for ; Fri, 25 Mar 2022 23:08:29 -0700 (PDT) Received: by mail-pl1-x633.google.com with SMTP id i11so10336261plr.1 for ; Fri, 25 Mar 2022 23:08:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=29ohcmk+WpMbeDVWQK/EG8Sg/hmSlIvrDXmbJsgg1AI=; b=B+UqxkOxdFdPEBgdSSeGzgmvxO5mOP0JYIY1EfcNmFxdiTbrcCrRmKngasA+1VSoyE Kgx+LAgfiouyQ3Fsfy7e0jg8WZZxut0cPwHw9wrTk00oMo4BDl+DuTIyjls4yHtyPO+L eWSq18/GShcaMHycr+HmzObBCcgs65+/GoqZC4/G6XYjO4uiPHZCZ5TndFjE85Eo+Tc8 UkWM5q9psyXrmBpTJah+G2+bdPgoO5k7ICiMXz3Lj735+JNkm/ZHyPZVLZdXh1cqME3q 3/Oo5eqrZjsOd9KWo4g+ym9D36iYzpSURkNunrLcosRu3Iybu7oIqH6OjRXxtvf1n7fd M/9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=29ohcmk+WpMbeDVWQK/EG8Sg/hmSlIvrDXmbJsgg1AI=; b=WDE2quoXTYKU4zvmA/VUVrxwU4pAxQiv2XuxDrHluJY6dkewDGehqQ11Gd81Ow0VjE 3V9IM8urfkjtD41F6t+Nokiqz0RNMgPjuR0YnS2FU3gGbRyuKVTo5YrY6a8gLYLzYfob NxOinv8k3WNorlHEL8WyEBBR9bqGuo21SzY/163O18P944S1j/3iQ/V8JFECleeEnYQ3 sFgfEz/PIegX6+9aDHgoz7JDbrZuP8PAna8Z9MLbV81F4o+UMUXxWwdw9MmqBlUv6y7/ G5yuEXKPp8PDuZVPlYspWA4UWC+ZE2RgoBm4XX1qI9nqkpyOifj5qQ0vaKxvHauBzH3U hH/w== X-Gm-Message-State: AOAM530y2VHL1w4PplQD+4+OdCfxNAxTXoFEKB/9Kfv0pvd7ArUI43wU 559pfl67P8XPqG50sppuO6CzYw== X-Google-Smtp-Source: ABdhPJxkIIUxA6/qud0HKlVxagcAACOtgkeJL53JKLutEFJD+2R88ZNw46KOjL1emWIlfEGBIjvowg== X-Received: by 2002:a17:902:ce05:b0:14f:8cfa:1ace with SMTP id k5-20020a170902ce0500b0014f8cfa1acemr14974539plg.149.1648274908805; Fri, 25 Mar 2022 23:08:28 -0700 (PDT) Received: from localhost.localdomain ([223.233.78.42]) by smtp.gmail.com with ESMTPSA id p26-20020a63951a000000b003826aff3e41sm6944959pgd.33.2022.03.25.23.08.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Mar 2022 23:08:28 -0700 (PDT) From: Bhupesh Sharma To: linux-pci@vger.kernel.org Cc: bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, lorenzo.pieralisi@arm.com, agross@kernel.org, bjorn.andersson@linaro.org, svarbanov@mm-sol.com, bhelgaas@google.com, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, Rob Herring Subject: [PATCH v4 1/2] dt-bindings: pci: qcom: Document PCIe bindings for SM8150 SoC Date: Sat, 26 Mar 2022 11:38:09 +0530 Message-Id: <20220326060810.1797516-2-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220326060810.1797516-1-bhupesh.sharma@linaro.org> References: <20220326060810.1797516-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Document the PCIe DT bindings for SM8150 SoC. The PCIe IP is similar to the one used on SM8250. Cc: Lorenzo Pieralisi Cc: Bjorn Andersson Acked-by: Rob Herring Signed-off-by: Bhupesh Sharma --- Documentation/devicetree/bindings/pci/qcom,pcie.txt | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt b/Documentation/devicetree/bindings/pci/qcom,pcie.txt index 0adb56d5645e..fd8b6d1912e7 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt @@ -14,6 +14,7 @@ - "qcom,pcie-qcs404" for qcs404 - "qcom,pcie-sc8180x" for sc8180x - "qcom,pcie-sdm845" for sdm845 + - "qcom,pcie-sm8150" for sm8150 - "qcom,pcie-sm8250" for sm8250 - "qcom,pcie-sm8450-pcie0" for PCIe0 on sm8450 - "qcom,pcie-sm8450-pcie1" for PCIe1 on sm8450 @@ -159,7 +160,7 @@ - "pipe" PIPE clock - clock-names: - Usage: required for sc8180x and sm8250 + Usage: required for sc8180x, sm8150 and sm8250 Value type: Definition: Should contain the following entries - "aux" Auxiliary clock @@ -266,7 +267,7 @@ - "ahb" AHB reset - reset-names: - Usage: required for sc8180x, sdm845, sm8250 and sm8450 + Usage: required for sc8180x, sdm845, sm8150, sm8250 and sm8450 Value type: Definition: Should contain the following entries - "pci" PCIe core reset From patchwork Sat Mar 26 05:57:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 554468 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4C1D0C4332F for ; Sat, 26 Mar 2022 05:58:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231363AbiCZF7t (ORCPT ); Sat, 26 Mar 2022 01:59:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42498 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231348AbiCZF7q (ORCPT ); Sat, 26 Mar 2022 01:59:46 -0400 Received: from mail-pf1-x435.google.com (mail-pf1-x435.google.com [IPv6:2607:f8b0:4864:20::435]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CA2AB22522 for ; Fri, 25 Mar 2022 22:58:10 -0700 (PDT) Received: by mail-pf1-x435.google.com with SMTP id p8so8251531pfh.8 for ; Fri, 25 Mar 2022 22:58:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=vsQ1ZJDbzm8xjG34TYgWolguHSp0d0tTX8/9HERcrNs=; b=kgzEx5U+usqwGcjy+zG6MpsKazUBCOMJOf2PLiHhrDWVNJM+iNJC8CcWFSzYizXcsi QUZoBL3re5R5zeI/lxOMb26SMNBs+nV+SDBGoYSzY6sA/LBeewodQuwfC2PM7O0FsA70 V5pStK942xQ/MvlV0rE92NiCEzgdH/P82kGKqSiXK/Rvfrg+7Wfjg9m7bQ39UChtsGwa LEw0z+BoBPOBfzEuyIB2fC3CxHZLEx8u5W3sr3lTn3o2RLOO/4gnM5nU9C87BWZ3yRaX gchVUyHz1J3++5amMcHeRgMUPMIffhdkl1QiNWs2U7UTYMNKCr9sdKHHnnsv27d+jLjY 46Nw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=vsQ1ZJDbzm8xjG34TYgWolguHSp0d0tTX8/9HERcrNs=; b=YidtqxX7onAu8NhEvQOh2+lgVZTrkj4TPPt1Gf3c/wCe7i8MRFhVtTr1oL4WbjgEa7 FwlmT01tjC5nuPp7zvcfPuQD5yhw4Txo50MLO1UkNhEZYefQjhF3ixp+QPeShcz1gFRX F9avvzAlnWKm29gUMn1TXUjYdg7TemWDyqdmfugGtdFhOWBuetKNu4tgOV6VOq7ccwnS vlQuizFwnbtWZwje/k7tYCBhes9Ufgf8F8dA+avAjCiNeu4q/DwleEscNuISQ8MDBdDQ 0BJ0H53lNPHuW7Cjzz0NCBXj2pTNe0kFZr3U0jCDvx0RrTFseZpeBH8uyI3j3ysopLuU egLw== X-Gm-Message-State: AOAM532m7RAmrs4lhn8JPcK0uvNjITAH0IPPLd+LJHDMnT7hc6d1E5Al Tkp95+6ifRUk0IHMK/rRx7pQZQ== X-Google-Smtp-Source: ABdhPJxq7vt7oi+D/i4f+hhO8Q9TjjM+NhAy6KY+3G6J6E9XjTOtp/mFZY9Tb46J0USK4Aj4I59jJA== X-Received: by 2002:a63:481d:0:b0:380:ea8d:4301 with SMTP id v29-20020a63481d000000b00380ea8d4301mr2312697pga.285.1648274290336; Fri, 25 Mar 2022 22:58:10 -0700 (PDT) Received: from localhost.localdomain ([223.233.78.42]) by smtp.gmail.com with ESMTPSA id b2-20020a056a000a8200b004e1414f0bb1sm9505067pfl.135.2022.03.25.22.58.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Mar 2022 22:58:10 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, agross@kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, bjorn.andersson@linaro.org, Vinod Koul Subject: [PATCH v4 2/2] arm64: dts: qcom: sa8155: Enable PCIe nodes Date: Sat, 26 Mar 2022 11:27:54 +0530 Message-Id: <20220326055754.1796146-3-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220326055754.1796146-1-bhupesh.sharma@linaro.org> References: <20220326055754.1796146-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org SA8155p ADP board supports the PCIe0 controller in the RC mode (only). So add the support for the same. Cc: Bjorn Andersson Cc: Vinod Koul Cc: Rob Herring Signed-off-by: Bhupesh Sharma --- arch/arm64/boot/dts/qcom/sa8155p-adp.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8155p-adp.dts b/arch/arm64/boot/dts/qcom/sa8155p-adp.dts index 8756c2b25c7e..676e4fe3f848 100644 --- a/arch/arm64/boot/dts/qcom/sa8155p-adp.dts +++ b/arch/arm64/boot/dts/qcom/sa8155p-adp.dts @@ -387,6 +387,21 @@ &usb_2_qmpphy { vdda-pll-supply = <&vdda_usb_ss_dp_core_1>; }; +&pcie0 { + status = "okay"; +}; + +&pcie0_phy { + status = "okay"; + vdda-phy-supply = <&vreg_l18c_0p88>; + vdda-pll-supply = <&vreg_l8c_1p2>; +}; + +&pcie1_phy { + vdda-phy-supply = <&vreg_l18c_0p88>; + vdda-pll-supply = <&vreg_l8c_1p2>; +}; + &tlmm { gpio-reserved-ranges = <0 4>;