From patchwork Wed Mar 30 20:47:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 555135 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E3128C4332F for ; Wed, 30 Mar 2022 20:47:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351113AbiC3Utj (ORCPT ); Wed, 30 Mar 2022 16:49:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54068 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351109AbiC3Uti (ORCPT ); Wed, 30 Mar 2022 16:49:38 -0400 Received: from mail-pj1-x102b.google.com (mail-pj1-x102b.google.com [IPv6:2607:f8b0:4864:20::102b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B77DD2BB2A; Wed, 30 Mar 2022 13:47:52 -0700 (PDT) Received: by mail-pj1-x102b.google.com with SMTP id gb19so21918948pjb.1; Wed, 30 Mar 2022 13:47:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ldA9Mhj+0mZCxGshcEo9t/60BKvUL5CRDf8xGkXfdGo=; b=lPIT/WDBI7h0jSYCTMxfH2uW+XNKl+dSPF9A6KLgXLvPui73Swrq3Q1Q3AZg/DX0q3 +ILslReszOaZipmEUbTHMLnsqVfTJ9yEiM8hbPd/AXsL6lLCbhjBxI5szwGsTeuz4PXN JGTd7r9ax2P4rnbV+gzD6ftAIBm8grCaA0+C+YWplgI/cEU+729K+Dw2xjeRsRAbs1Mj jEUx5VvmE6Y75RXC5s8Yl+rJMHsTz5FZLydGXMPv0N/0XWKtiEHKeM3tOd+nxuDuUrng 6Guam7SiAaXysw5rNN8ugEYxVvLXAd/7Y4pidtUZj8kdg/fJ6Djy34tH5qFwpyI1LWBK y/eg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ldA9Mhj+0mZCxGshcEo9t/60BKvUL5CRDf8xGkXfdGo=; b=JNzdlisfStJCbU3R+7upJ4seBx5dfP3y9PsvWYtsd0TSmHchvV7EFfjXk/SQDDqAc9 9zvNm2w/PaKY6+UhEQ5hkBZ1+S6EX0hX2VkwqX1hjypSxr9+d6jIN1l3Wb05mp6zDjmI yGEbYuW3xSpZrSP9wXzlnTCNSa86YboSxru/83nub4HEz6ZzVPBPCf9y4N9KEWVkIWoD OQwJrmQy/kglFKQHX4U+cSMX38F3MoW2oCzjOCaVQcjnI0IPl2AM/ArxRH/X0x+EfowO kA5aYUVWIhsYxOMHRUeY2fC0CZwko4Ai/5WHQ8eZbNdoc9oJ3M+qel6ql3whcXOHprjD ZfCA== X-Gm-Message-State: AOAM530Pke8Aa5YAJqr6fTFh9W9gClhogxQ4mGvpHDDmoPz/zN/7R5xk LWn+bLo46Jff3fFSKKHvIbk= X-Google-Smtp-Source: ABdhPJysfQC0ENwfzI6jQB6u/35Gy9KhZqGh43AyIEW8pA1f1g9B+MQW/gPexaDjtmrxvOJnE1wXDA== X-Received: by 2002:a17:902:ab59:b0:156:17a5:5de7 with SMTP id ij25-20020a170902ab5900b0015617a55de7mr1592725plb.6.1648673272187; Wed, 30 Mar 2022 13:47:52 -0700 (PDT) Received: from localhost ([2a00:79e1:abd:4a00:2703:3c72:eb1a:cffd]) by smtp.gmail.com with ESMTPSA id l2-20020a17090a150200b001c9f1a7aafesm3448919pja.29.2022.03.30.13.47.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Mar 2022 13:47:51 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Dmitry Baryshkov , Dmitry Osipenko , Rob Clark , Rob Clark , Sean Paul , Abhinav Kumar , David Airlie , Daniel Vetter , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 01/10] drm/msm/gem: Move prototypes Date: Wed, 30 Mar 2022 13:47:46 -0700 Message-Id: <20220330204804.660819-2-robdclark@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330204804.660819-1-robdclark@gmail.com> References: <20220330204804.660819-1-robdclark@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Rob Clark These belong more cleanly in the gem header. Signed-off-by: Rob Clark Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/msm_drv.h | 23 ----------------------- drivers/gpu/drm/msm/msm_gem.h | 22 ++++++++++++++++++++++ 2 files changed, 22 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index 9f68aa685ed7..daf60d219463 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -250,29 +250,6 @@ void msm_atomic_state_free(struct drm_atomic_state *state); int msm_crtc_enable_vblank(struct drm_crtc *crtc); void msm_crtc_disable_vblank(struct drm_crtc *crtc); -int msm_gem_init_vma(struct msm_gem_address_space *aspace, - struct msm_gem_vma *vma, int npages, - u64 range_start, u64 range_end); -void msm_gem_purge_vma(struct msm_gem_address_space *aspace, - struct msm_gem_vma *vma); -void msm_gem_unmap_vma(struct msm_gem_address_space *aspace, - struct msm_gem_vma *vma); -int msm_gem_map_vma(struct msm_gem_address_space *aspace, - struct msm_gem_vma *vma, int prot, - struct sg_table *sgt, int npages); -void msm_gem_close_vma(struct msm_gem_address_space *aspace, - struct msm_gem_vma *vma); - - -struct msm_gem_address_space * -msm_gem_address_space_get(struct msm_gem_address_space *aspace); - -void msm_gem_address_space_put(struct msm_gem_address_space *aspace); - -struct msm_gem_address_space * -msm_gem_address_space_create(struct msm_mmu *mmu, const char *name, - u64 va_start, u64 size); - int msm_register_mmu(struct drm_device *dev, struct msm_mmu *mmu); void msm_unregister_mmu(struct drm_device *dev, struct msm_mmu *mmu); diff --git a/drivers/gpu/drm/msm/msm_gem.h b/drivers/gpu/drm/msm/msm_gem.h index 58e11c282928..947ff7d9b471 100644 --- a/drivers/gpu/drm/msm/msm_gem.h +++ b/drivers/gpu/drm/msm/msm_gem.h @@ -40,6 +40,15 @@ struct msm_gem_address_space { int faults; }; +struct msm_gem_address_space * +msm_gem_address_space_get(struct msm_gem_address_space *aspace); + +void msm_gem_address_space_put(struct msm_gem_address_space *aspace); + +struct msm_gem_address_space * +msm_gem_address_space_create(struct msm_mmu *mmu, const char *name, + u64 va_start, u64 size); + struct msm_gem_vma { struct drm_mm_node node; uint64_t iova; @@ -49,6 +58,19 @@ struct msm_gem_vma { int inuse; }; +int msm_gem_init_vma(struct msm_gem_address_space *aspace, + struct msm_gem_vma *vma, int npages, + u64 range_start, u64 range_end); +void msm_gem_purge_vma(struct msm_gem_address_space *aspace, + struct msm_gem_vma *vma); +void msm_gem_unmap_vma(struct msm_gem_address_space *aspace, + struct msm_gem_vma *vma); +int msm_gem_map_vma(struct msm_gem_address_space *aspace, + struct msm_gem_vma *vma, int prot, + struct sg_table *sgt, int npages); +void msm_gem_close_vma(struct msm_gem_address_space *aspace, + struct msm_gem_vma *vma); + struct msm_gem_object { struct drm_gem_object base; From patchwork Wed Mar 30 20:47:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 555134 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 32C28C433EF for ; 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Wed, 30 Mar 2022 13:47:56 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Dmitry Baryshkov , Dmitry Osipenko , Rob Clark , Rob Clark , Sean Paul , Abhinav Kumar , David Airlie , Daniel Vetter , Jordan Crouse , Akhil P Oommen , Vladimir Lypak , Yangtao Li , Jonathan Marek , Emma Anholt , Dan Carpenter , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 02/10] drm/msm/gpu: Drop duplicate fence counter Date: Wed, 30 Mar 2022 13:47:47 -0700 Message-Id: <20220330204804.660819-3-robdclark@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330204804.660819-1-robdclark@gmail.com> References: <20220330204804.660819-1-robdclark@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Rob Clark The ring seqno counter duplicates the fence-context last_fence counter. They end up getting incremented in lock-step, on the same scheduler thread, but the split just makes things less obvious. Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 2 +- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 4 ++-- drivers/gpu/drm/msm/msm_gpu.c | 8 ++++---- drivers/gpu/drm/msm/msm_gpu.h | 2 +- drivers/gpu/drm/msm/msm_ringbuffer.h | 1 - 6 files changed, 9 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c index 407f50a15faa..d31aa87c6c8d 100644 --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c @@ -1235,7 +1235,7 @@ static void a5xx_fault_detect_irq(struct msm_gpu *gpu) return; DRM_DEV_ERROR(dev->dev, "gpu fault ring %d fence %x status %8.8X rb %4.4x/%4.4x ib1 %16.16llX/%4.4x ib2 %16.16llX/%4.4x\n", - ring ? ring->id : -1, ring ? ring->seqno : 0, + ring ? ring->id : -1, ring ? ring->fctx->last_fence : 0, gpu_read(gpu, REG_A5XX_RBBM_STATUS), gpu_read(gpu, REG_A5XX_CP_RB_RPTR), gpu_read(gpu, REG_A5XX_CP_RB_WPTR), diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index 83c31b2ad865..17de46fc4bf2 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -1390,7 +1390,7 @@ static void a6xx_fault_detect_irq(struct msm_gpu *gpu) DRM_DEV_ERROR(&gpu->pdev->dev, "gpu fault ring %d fence %x status %8.8X rb %4.4x/%4.4x ib1 %16.16llX/%4.4x ib2 %16.16llX/%4.4x\n", - ring ? ring->id : -1, ring ? ring->seqno : 0, + ring ? ring->id : -1, ring ? ring->fctx->last_fence : 0, gpu_read(gpu, REG_A6XX_RBBM_STATUS), gpu_read(gpu, REG_A6XX_CP_RB_RPTR), gpu_read(gpu, REG_A6XX_CP_RB_WPTR), diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c index 45f2c6084aa7..6385ab06632f 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -578,7 +578,7 @@ int adreno_gpu_state_get(struct msm_gpu *gpu, struct msm_gpu_state *state) state->ring[i].fence = gpu->rb[i]->memptrs->fence; state->ring[i].iova = gpu->rb[i]->iova; - state->ring[i].seqno = gpu->rb[i]->seqno; + state->ring[i].seqno = gpu->rb[i]->fctx->last_fence; state->ring[i].rptr = get_rptr(adreno_gpu, gpu->rb[i]); state->ring[i].wptr = get_wptr(gpu->rb[i]); @@ -828,7 +828,7 @@ void adreno_dump_info(struct msm_gpu *gpu) printk("rb %d: fence: %d/%d\n", i, ring->memptrs->fence, - ring->seqno); + ring->fctx->last_fence); printk("rptr: %d\n", get_rptr(adreno_gpu, ring)); printk("rb wptr: %d\n", get_wptr(ring)); diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c index 747b89aa9d13..9480bdf875db 100644 --- a/drivers/gpu/drm/msm/msm_gpu.c +++ b/drivers/gpu/drm/msm/msm_gpu.c @@ -534,7 +534,7 @@ static void hangcheck_handler(struct timer_list *t) if (fence != ring->hangcheck_fence) { /* some progress has been made.. ya! */ ring->hangcheck_fence = fence; - } else if (fence_before(fence, ring->seqno)) { + } else if (fence_before(fence, ring->fctx->last_fence)) { /* no progress and not done.. hung! */ ring->hangcheck_fence = fence; DRM_DEV_ERROR(dev->dev, "%s: hangcheck detected gpu lockup rb %d!\n", @@ -542,13 +542,13 @@ static void hangcheck_handler(struct timer_list *t) DRM_DEV_ERROR(dev->dev, "%s: completed fence: %u\n", gpu->name, fence); DRM_DEV_ERROR(dev->dev, "%s: submitted fence: %u\n", - gpu->name, ring->seqno); + gpu->name, ring->fctx->last_fence); kthread_queue_work(gpu->worker, &gpu->recover_work); } /* if still more pending work, reset the hangcheck timer: */ - if (fence_after(ring->seqno, ring->hangcheck_fence)) + if (fence_after(ring->fctx->last_fence, ring->hangcheck_fence)) hangcheck_timer_reset(gpu); /* workaround for missing irq: */ @@ -770,7 +770,7 @@ void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) msm_gpu_hw_init(gpu); - submit->seqno = ++ring->seqno; + submit->seqno = submit->hw_fence->seqno; msm_rd_dump_submit(priv->rd, submit, NULL); diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index 2c0203fd6ce3..e47a42b1244a 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -291,7 +291,7 @@ static inline bool msm_gpu_active(struct msm_gpu *gpu) for (i = 0; i < gpu->nr_rings; i++) { struct msm_ringbuffer *ring = gpu->rb[i]; - if (fence_after(ring->seqno, ring->memptrs->fence)) + if (fence_after(ring->fctx->last_fence, ring->memptrs->fence)) return true; } diff --git a/drivers/gpu/drm/msm/msm_ringbuffer.h b/drivers/gpu/drm/msm/msm_ringbuffer.h index d8c63df4e9ca..2a5045abe46e 100644 --- a/drivers/gpu/drm/msm/msm_ringbuffer.h +++ b/drivers/gpu/drm/msm/msm_ringbuffer.h @@ -59,7 +59,6 @@ struct msm_ringbuffer { spinlock_t submit_lock; uint64_t iova; - uint32_t seqno; uint32_t hangcheck_fence; struct msm_rbmemptrs *memptrs; uint64_t memptrs_iova; From patchwork Wed Mar 30 20:47:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 555133 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B5216C43217 for ; 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Wed, 30 Mar 2022 13:48:01 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Dmitry Baryshkov , Dmitry Osipenko , Rob Clark , Rob Clark , Sean Paul , Abhinav Kumar , David Airlie , Daniel Vetter , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 04/10] drm/msm/gem: Split out inuse helper Date: Wed, 30 Mar 2022 13:47:49 -0700 Message-Id: <20220330204804.660819-5-robdclark@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330204804.660819-1-robdclark@gmail.com> References: <20220330204804.660819-1-robdclark@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Rob Clark Prep for a following patch, where it gets a bit more complicated. Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/msm_gem.c | 2 +- drivers/gpu/drm/msm/msm_gem.h | 1 + drivers/gpu/drm/msm/msm_gem_vma.c | 9 +++++++-- 3 files changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c index a4f61972667b..f96d1dc72021 100644 --- a/drivers/gpu/drm/msm/msm_gem.c +++ b/drivers/gpu/drm/msm/msm_gem.c @@ -938,7 +938,7 @@ void msm_gem_describe(struct drm_gem_object *obj, struct seq_file *m, name, comm ? ":" : "", comm ? comm : "", vma->aspace, vma->iova, vma->mapped ? "mapped" : "unmapped", - vma->inuse); + msm_gem_vma_inuse(vma)); kfree(comm); } diff --git a/drivers/gpu/drm/msm/msm_gem.h b/drivers/gpu/drm/msm/msm_gem.h index 947ff7d9b471..1b7f0f0b88bf 100644 --- a/drivers/gpu/drm/msm/msm_gem.h +++ b/drivers/gpu/drm/msm/msm_gem.h @@ -61,6 +61,7 @@ struct msm_gem_vma { int msm_gem_init_vma(struct msm_gem_address_space *aspace, struct msm_gem_vma *vma, int npages, u64 range_start, u64 range_end); +bool msm_gem_vma_inuse(struct msm_gem_vma *vma); void msm_gem_purge_vma(struct msm_gem_address_space *aspace, struct msm_gem_vma *vma); void msm_gem_unmap_vma(struct msm_gem_address_space *aspace, diff --git a/drivers/gpu/drm/msm/msm_gem_vma.c b/drivers/gpu/drm/msm/msm_gem_vma.c index 64906594fc65..dc2ae097805e 100644 --- a/drivers/gpu/drm/msm/msm_gem_vma.c +++ b/drivers/gpu/drm/msm/msm_gem_vma.c @@ -37,6 +37,11 @@ msm_gem_address_space_get(struct msm_gem_address_space *aspace) return aspace; } +bool msm_gem_vma_inuse(struct msm_gem_vma *vma) +{ + return !!vma->inuse; +} + /* Actually unmap memory for the vma */ void msm_gem_purge_vma(struct msm_gem_address_space *aspace, struct msm_gem_vma *vma) @@ -44,7 +49,7 @@ void msm_gem_purge_vma(struct msm_gem_address_space *aspace, unsigned size = vma->node.size << PAGE_SHIFT; /* Print a message if we try to purge a vma in use */ - if (GEM_WARN_ON(vma->inuse > 0)) + if (GEM_WARN_ON(msm_gem_vma_inuse(vma))) return; /* Don't do anything if the memory isn't mapped */ @@ -100,7 +105,7 @@ msm_gem_map_vma(struct msm_gem_address_space *aspace, void msm_gem_close_vma(struct msm_gem_address_space *aspace, struct msm_gem_vma *vma) { - if (GEM_WARN_ON(vma->inuse > 0 || vma->mapped)) + if (GEM_WARN_ON(msm_gem_vma_inuse(vma) || vma->mapped)) return; spin_lock(&aspace->lock); From patchwork Wed Mar 30 20:47:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 555132 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46465C433F5 for ; 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Wed, 30 Mar 2022 13:48:07 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Dmitry Baryshkov , Dmitry Osipenko , Rob Clark , Rob Clark , Sean Paul , Abhinav Kumar , David Airlie , Daniel Vetter , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 06/10] drm/msm: Drop msm_gem_iova() Date: Wed, 30 Mar 2022 13:47:51 -0700 Message-Id: <20220330204804.660819-7-robdclark@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330204804.660819-1-robdclark@gmail.com> References: <20220330204804.660819-1-robdclark@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Rob Clark There was only a single user, which could just as easily stash the iova when pinning. Signed-off-by: Rob Clark Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/msm_fb.c | 16 ++++++++++------ drivers/gpu/drm/msm/msm_gem.c | 16 ---------------- drivers/gpu/drm/msm/msm_gem.h | 2 -- 3 files changed, 10 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_fb.c b/drivers/gpu/drm/msm/msm_fb.c index 7137492fe78e..d4eef66e29dc 100644 --- a/drivers/gpu/drm/msm/msm_fb.c +++ b/drivers/gpu/drm/msm/msm_fb.c @@ -21,6 +21,9 @@ struct msm_framebuffer { /* Count of # of attached planes which need dirtyfb: */ refcount_t dirtyfb; + + /* Framebuffer per-plane address, if pinned, else zero: */ + uint64_t iova[DRM_FORMAT_MAX_PLANES]; }; #define to_msm_framebuffer(x) container_of(x, struct msm_framebuffer, base) @@ -76,14 +79,14 @@ int msm_framebuffer_prepare(struct drm_framebuffer *fb, { struct msm_framebuffer *msm_fb = to_msm_framebuffer(fb); int ret, i, n = fb->format->num_planes; - uint64_t iova; if (needs_dirtyfb) refcount_inc(&msm_fb->dirtyfb); for (i = 0; i < n; i++) { - ret = msm_gem_get_and_pin_iova(fb->obj[i], aspace, &iova); - drm_dbg_state(fb->dev, "FB[%u]: iova[%d]: %08llx (%d)", fb->base.id, i, iova, ret); + ret = msm_gem_get_and_pin_iova(fb->obj[i], aspace, &msm_fb->iova[i]); + drm_dbg_state(fb->dev, "FB[%u]: iova[%d]: %08llx (%d)", + fb->base.id, i, msm_fb->iova[i], ret); if (ret) return ret; } @@ -103,14 +106,15 @@ void msm_framebuffer_cleanup(struct drm_framebuffer *fb, for (i = 0; i < n; i++) msm_gem_unpin_iova(fb->obj[i], aspace); + + memset(msm_fb->iova, 0, sizeof(msm_fb->iova)); } uint32_t msm_framebuffer_iova(struct drm_framebuffer *fb, struct msm_gem_address_space *aspace, int plane) { - if (!fb->obj[plane]) - return 0; - return msm_gem_iova(fb->obj[plane], aspace) + fb->offsets[plane]; + struct msm_framebuffer *msm_fb = to_msm_framebuffer(fb); + return msm_fb->iova[plane]; } struct drm_gem_object *msm_framebuffer_bo(struct drm_framebuffer *fb, int plane) diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c index f4b68bb28a4d..deafae6feaa8 100644 --- a/drivers/gpu/drm/msm/msm_gem.c +++ b/drivers/gpu/drm/msm/msm_gem.c @@ -509,22 +509,6 @@ int msm_gem_get_iova(struct drm_gem_object *obj, return ret; } -/* get iova without taking a reference, used in places where you have - * already done a 'msm_gem_get_and_pin_iova' or 'msm_gem_get_iova' - */ -uint64_t msm_gem_iova(struct drm_gem_object *obj, - struct msm_gem_address_space *aspace) -{ - struct msm_gem_vma *vma; - - msm_gem_lock(obj); - vma = lookup_vma(obj, aspace); - msm_gem_unlock(obj); - GEM_WARN_ON(!vma); - - return vma ? vma->iova : 0; -} - /* * Locked variant of msm_gem_unpin_iova() */ diff --git a/drivers/gpu/drm/msm/msm_gem.h b/drivers/gpu/drm/msm/msm_gem.h index 090c3b1a6d9a..772de010a669 100644 --- a/drivers/gpu/drm/msm/msm_gem.h +++ b/drivers/gpu/drm/msm/msm_gem.h @@ -142,8 +142,6 @@ int msm_gem_get_and_pin_iova_locked(struct drm_gem_object *obj, struct msm_gem_address_space *aspace, uint64_t *iova); int msm_gem_get_and_pin_iova(struct drm_gem_object *obj, struct msm_gem_address_space *aspace, uint64_t *iova); -uint64_t msm_gem_iova(struct drm_gem_object *obj, - struct msm_gem_address_space *aspace); void msm_gem_unpin_iova_locked(struct drm_gem_object *obj, struct msm_gem_address_space *aspace); void msm_gem_unpin_iova(struct drm_gem_object *obj, From patchwork Wed Mar 30 20:47:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 555131 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 62147C433FE for ; Wed, 30 Mar 2022 20:48:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351229AbiC3Uu3 (ORCPT ); Wed, 30 Mar 2022 16:50:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54716 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351161AbiC3UuF (ORCPT ); Wed, 30 Mar 2022 16:50:05 -0400 Received: from mail-pj1-x1035.google.com (mail-pj1-x1035.google.com [IPv6:2607:f8b0:4864:20::1035]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B3C4849933; Wed, 30 Mar 2022 13:48:11 -0700 (PDT) Received: by mail-pj1-x1035.google.com with SMTP id mr5-20020a17090b238500b001c67366ae93so807258pjb.4; Wed, 30 Mar 2022 13:48:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=tOn9Tor8polPNHF4xDcLky0lDAw9l38xozLRMXI1//U=; b=UPK7hL40Q2YvCF9wKbtwYgJsCkDD4S3VjnoBgdNSt+WHM9zo7jOHSYtbtzE/pU7cc0 vWJUocRHernfEg73QBM9SK2P7rVRf+2qdpt+ZCnjAmUNaIeYI02wik/UvelXsmEXugFg mTdOEsnNaUwfQ3W9rElImmVHtS95BnTfIj0w4SFFy33B7vRuFqiyB0rLTQpND+vxfjtH rCYoA7o2YWALAs1UeWMk1if0oh2cESd++RhA4sJ9c4ITBqScF7/6YyldnC+nq+FLVFGB 8O8zqvBh1YQAdW1FoWS9e2nQjbVz42hJ+8eewUQecBhbeb47p8JtIXXDUNSDVXTrK/WH dwSg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tOn9Tor8polPNHF4xDcLky0lDAw9l38xozLRMXI1//U=; b=bKqw9IZ+8KdPmcrAeJyrWLaUBihGEfpgEhlUnC6QQZtpjvrr8C70Q9F399p+LTiLL9 CI6Lqamwq8YesqYOR7p3aGzU9rK8/4mbMpOMtBtDnsPGOoNUkfGprZidO04gZ2g4JzVP 6wj+DvfoNGStOKDCCCzs9ra610L4arNzG+Fm20sXqs7zrT4TOMnTIZJWFPkVtR/Szy15 Y08ZREPaXFRJYP+DOgRkUoz87wnY+FXLxyd9h8k9FNscW3f+s7Lm/zCIkggbzQb7d5s0 6gxOaY4fA1zfo5m8JWQfiqJCfdYYL8g9LeAdbCiq34SBU2QeHKRk5xVvTfww/r4L5Rgd Ntdg== X-Gm-Message-State: AOAM532PDNMe2ce4VnhQFbY9rBkCxVdpAmKCQw6jxWsdbSrbTVE0L2Q1 jGxgNyQK6BsdpCZ12rw5vRE= X-Google-Smtp-Source: ABdhPJwJYRnX56RJoMLOVKWPDbw1s9PqMDGKWuJcsQPWKmnOylUzAMHvewFPAxCbjEv4C8yhrsXlMQ== X-Received: by 2002:a17:902:c745:b0:151:e8fa:629b with SMTP id q5-20020a170902c74500b00151e8fa629bmr38131930plq.90.1648673291159; Wed, 30 Mar 2022 13:48:11 -0700 (PDT) Received: from localhost ([2a00:79e1:abd:4a00:2703:3c72:eb1a:cffd]) by smtp.gmail.com with ESMTPSA id d21-20020a056a0024d500b004fb0e7c7c3bsm21656825pfv.161.2022.03.30.13.48.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Mar 2022 13:48:10 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Dmitry Baryshkov , Dmitry Osipenko , Rob Clark , Rob Clark , Sean Paul , Abhinav Kumar , David Airlie , Daniel Vetter , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 07/10] drm/msm/gem: Rework vma lookup and pin Date: Wed, 30 Mar 2022 13:47:52 -0700 Message-Id: <20220330204804.660819-8-robdclark@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330204804.660819-1-robdclark@gmail.com> References: <20220330204804.660819-1-robdclark@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Rob Clark Combines duplicate vma lookup in the get_and_pin path. Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/msm_gem.c | 50 ++++++++++++++++++----------------- 1 file changed, 26 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c index deafae6feaa8..218744a490a4 100644 --- a/drivers/gpu/drm/msm/msm_gem.c +++ b/drivers/gpu/drm/msm/msm_gem.c @@ -376,39 +376,40 @@ put_iova_vmas(struct drm_gem_object *obj) } } -static int get_iova_locked(struct drm_gem_object *obj, - struct msm_gem_address_space *aspace, uint64_t *iova, +static struct msm_gem_vma *get_vma_locked(struct drm_gem_object *obj, + struct msm_gem_address_space *aspace, u64 range_start, u64 range_end) { struct msm_gem_vma *vma; - int ret = 0; GEM_WARN_ON(!msm_gem_is_locked(obj)); vma = lookup_vma(obj, aspace); if (!vma) { + int ret; + vma = add_vma(obj, aspace); if (IS_ERR(vma)) - return PTR_ERR(vma); + return vma; ret = msm_gem_init_vma(aspace, vma, obj->size, range_start, range_end); if (ret) { del_vma(vma); - return ret; + return ERR_PTR(ret); } + } else { + GEM_WARN_ON(vma->iova < range_start); + GEM_WARN_ON((vma->iova + obj->size) > range_end); } - *iova = vma->iova; - return 0; + return vma; } -static int msm_gem_pin_iova(struct drm_gem_object *obj, - struct msm_gem_address_space *aspace) +static int msm_gem_pin_iova(struct drm_gem_object *obj, struct msm_gem_vma *vma) { struct msm_gem_object *msm_obj = to_msm_bo(obj); - struct msm_gem_vma *vma; struct page **pages; int ret, prot = IOMMU_READ; @@ -426,15 +427,11 @@ static int msm_gem_pin_iova(struct drm_gem_object *obj, if (GEM_WARN_ON(msm_obj->madv != MSM_MADV_WILLNEED)) return -EBUSY; - vma = lookup_vma(obj, aspace); - if (GEM_WARN_ON(!vma)) - return -EINVAL; - pages = get_pages(obj); if (IS_ERR(pages)) return PTR_ERR(pages); - ret = msm_gem_map_vma(aspace, vma, prot, msm_obj->sgt, obj->size); + ret = msm_gem_map_vma(vma->aspace, vma, prot, msm_obj->sgt, obj->size); if (!ret) msm_obj->pin_count++; @@ -446,19 +443,18 @@ static int get_and_pin_iova_range_locked(struct drm_gem_object *obj, struct msm_gem_address_space *aspace, uint64_t *iova, u64 range_start, u64 range_end) { - u64 local; + struct msm_gem_vma *vma; int ret; GEM_WARN_ON(!msm_gem_is_locked(obj)); - ret = get_iova_locked(obj, aspace, &local, - range_start, range_end); - - if (!ret) - ret = msm_gem_pin_iova(obj, aspace); + vma = get_vma_locked(obj, aspace, range_start, range_end); + if (IS_ERR(vma)) + return PTR_ERR(vma); + ret = msm_gem_pin_iova(obj, vma); if (!ret) - *iova = local; + *iova = vma->iova; return ret; } @@ -500,10 +496,16 @@ int msm_gem_get_and_pin_iova(struct drm_gem_object *obj, int msm_gem_get_iova(struct drm_gem_object *obj, struct msm_gem_address_space *aspace, uint64_t *iova) { - int ret; + struct msm_gem_vma *vma; + int ret = 0; msm_gem_lock(obj); - ret = get_iova_locked(obj, aspace, iova, 0, U64_MAX); + vma = get_vma_locked(obj, aspace, 0, U64_MAX); + if (IS_ERR(vma)) { + ret = PTR_ERR(vma); + } else { + *iova = vma->iova; + } msm_gem_unlock(obj); return ret; From patchwork Wed Mar 30 20:47:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 555130 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 09BC8C433FE for ; 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Wed, 30 Mar 2022 13:48:19 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Dmitry Baryshkov , Dmitry Osipenko , Rob Clark , Rob Clark , Sean Paul , Abhinav Kumar , David Airlie , Daniel Vetter , Akhil P Oommen , Jonathan Marek , Jordan Crouse , Emma Anholt , Dan Carpenter , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 10/10] drm/msm: Add a way for userspace to allocate GPU iova Date: Wed, 30 Mar 2022 13:47:55 -0700 Message-Id: <20220330204804.660819-11-robdclark@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330204804.660819-1-robdclark@gmail.com> References: <20220330204804.660819-1-robdclark@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Rob Clark The motivation at this point is mainly native userspace mesa driver in a VM guest. The one remaining synchronous "hotpath" is buffer allocation, because guest needs to wait to know the bo's iova before it can start emitting cmdstream/state that references the new bo. By allocating the iova in the guest userspace, we no longer need to wait for a response from the host, but can just rely on the allocation request being processed before the cmdstream submission. Allocation failures (OoM, etc) would just be treated as context-lost (ie. GL_GUILTY_CONTEXT_RESET) or subsequent allocations (or readpix, etc) can raise GL_OUT_OF_MEMORY. Signed-off-by: Rob Clark Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 10 ++++++ drivers/gpu/drm/msm/msm_drv.c | 21 +++++++++++ drivers/gpu/drm/msm/msm_gem.c | 48 +++++++++++++++++++++++++ drivers/gpu/drm/msm/msm_gem.h | 8 +++++ drivers/gpu/drm/msm/msm_gem_vma.c | 2 ++ include/uapi/drm/msm_drm.h | 3 ++ 6 files changed, 92 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c index 6385ab06632f..4caae0229518 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -281,6 +281,16 @@ int adreno_get_param(struct msm_gpu *gpu, struct msm_file_private *ctx, case MSM_PARAM_SUSPENDS: *value = gpu->suspend_count; return 0; + case MSM_PARAM_VA_START: + if (ctx->aspace == gpu->aspace) + return -EINVAL; + *value = ctx->aspace->va_start; + return 0; + case MSM_PARAM_VA_SIZE: + if (ctx->aspace == gpu->aspace) + return -EINVAL; + *value = ctx->aspace->va_size; + return 0; default: DBG("%s: invalid param: %u", gpu->name, param); return -EINVAL; diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c index a5eed5738ac8..45523b4123eb 100644 --- a/drivers/gpu/drm/msm/msm_drv.c +++ b/drivers/gpu/drm/msm/msm_drv.c @@ -719,6 +719,23 @@ static int msm_ioctl_gem_info_iova(struct drm_device *dev, return msm_gem_get_iova(obj, ctx->aspace, iova); } +static int msm_ioctl_gem_info_set_iova(struct drm_device *dev, + struct drm_file *file, struct drm_gem_object *obj, + uint64_t iova) +{ + struct msm_drm_private *priv = dev->dev_private; + struct msm_file_private *ctx = file->driver_priv; + + if (!priv->gpu) + return -EINVAL; + + /* Only supported if per-process address space is supported: */ + if (priv->gpu->aspace == ctx->aspace) + return -EOPNOTSUPP; + + return msm_gem_set_iova(obj, ctx->aspace, iova); +} + static int msm_ioctl_gem_info(struct drm_device *dev, void *data, struct drm_file *file) { @@ -733,6 +750,7 @@ static int msm_ioctl_gem_info(struct drm_device *dev, void *data, switch (args->info) { case MSM_INFO_GET_OFFSET: case MSM_INFO_GET_IOVA: + case MSM_INFO_SET_IOVA: /* value returned as immediate, not pointer, so len==0: */ if (args->len) return -EINVAL; @@ -757,6 +775,9 @@ static int msm_ioctl_gem_info(struct drm_device *dev, void *data, case MSM_INFO_GET_IOVA: ret = msm_ioctl_gem_info_iova(dev, file, obj, &args->value); break; + case MSM_INFO_SET_IOVA: + ret = msm_ioctl_gem_info_set_iova(dev, file, obj, args->value); + break; case MSM_INFO_SET_NAME: /* length check should leave room for terminating null: */ if (args->len >= sizeof(msm_obj->name)) { diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c index bf4af17e2f1e..83ded2b7154e 100644 --- a/drivers/gpu/drm/msm/msm_gem.c +++ b/drivers/gpu/drm/msm/msm_gem.c @@ -525,6 +525,54 @@ int msm_gem_get_iova(struct drm_gem_object *obj, return ret; } +static int clear_iova(struct drm_gem_object *obj, + struct msm_gem_address_space *aspace) +{ + struct msm_gem_vma *vma = lookup_vma(obj, aspace); + + if (!vma) + return 0; + + if (msm_gem_vma_inuse(vma)) + return -EBUSY; + + msm_gem_purge_vma(vma->aspace, vma); + msm_gem_close_vma(vma->aspace, vma); + del_vma(vma); + + return 0; +} + +/* + * Get the requested iova but don't pin it. Fails if the requested iova is + * not available. Doesn't need a put because iovas are currently valid for + * the life of the object. + * + * Setting an iova of zero will clear the vma. + */ +int msm_gem_set_iova(struct drm_gem_object *obj, + struct msm_gem_address_space *aspace, uint64_t iova) +{ + int ret = 0; + + msm_gem_lock(obj); + if (!iova) { + ret = clear_iova(obj, aspace); + } else { + struct msm_gem_vma *vma; + vma = get_vma_locked(obj, aspace, iova, iova + obj->size); + if (IS_ERR(vma)) { + ret = PTR_ERR(vma); + } else if (GEM_WARN_ON(vma->iova != iova)) { + clear_iova(obj, aspace); + ret = -ENOSPC; + } + } + msm_gem_unlock(obj); + + return ret; +} + /* * Unpin a iova by updating the reference counts. The memory isn't actually * purged until something else (shrinker, mm_notifier, destroy, etc) decides diff --git a/drivers/gpu/drm/msm/msm_gem.h b/drivers/gpu/drm/msm/msm_gem.h index 38d66e1248b1..efa2e5c19f1e 100644 --- a/drivers/gpu/drm/msm/msm_gem.h +++ b/drivers/gpu/drm/msm/msm_gem.h @@ -38,6 +38,12 @@ struct msm_gem_address_space { /* @faults: the number of GPU hangs associated with this address space */ int faults; + + /** @va_start: lowest possible address to allocate */ + uint64_t va_start; + + /** @va_size: the size of the address space (in bytes) */ + uint64_t va_size; }; struct msm_gem_address_space * @@ -144,6 +150,8 @@ struct msm_gem_vma *msm_gem_get_vma_locked(struct drm_gem_object *obj, struct msm_gem_address_space *aspace); int msm_gem_get_iova(struct drm_gem_object *obj, struct msm_gem_address_space *aspace, uint64_t *iova); +int msm_gem_set_iova(struct drm_gem_object *obj, + struct msm_gem_address_space *aspace, uint64_t iova); int msm_gem_get_and_pin_iova_range(struct drm_gem_object *obj, struct msm_gem_address_space *aspace, uint64_t *iova, u64 range_start, u64 range_end); diff --git a/drivers/gpu/drm/msm/msm_gem_vma.c b/drivers/gpu/drm/msm/msm_gem_vma.c index 6f9a402450f9..354f91aff573 100644 --- a/drivers/gpu/drm/msm/msm_gem_vma.c +++ b/drivers/gpu/drm/msm/msm_gem_vma.c @@ -182,6 +182,8 @@ msm_gem_address_space_create(struct msm_mmu *mmu, const char *name, spin_lock_init(&aspace->lock); aspace->name = name; aspace->mmu = mmu; + aspace->va_start = va_start; + aspace->va_size = size; drm_mm_init(&aspace->mm, va_start, size); diff --git a/include/uapi/drm/msm_drm.h b/include/uapi/drm/msm_drm.h index 794ad1948497..3c7b097c4e3d 100644 --- a/include/uapi/drm/msm_drm.h +++ b/include/uapi/drm/msm_drm.h @@ -84,6 +84,8 @@ struct drm_msm_timespec { #define MSM_PARAM_SYSPROF 0x0b /* WO: 1 preserves perfcntrs, 2 also disables suspend */ #define MSM_PARAM_COMM 0x0c /* WO: override for task->comm */ #define MSM_PARAM_CMDLINE 0x0d /* WO: override for task cmdline */ +#define MSM_PARAM_VA_START 0x0e /* RO: start of valid GPU iova range */ +#define MSM_PARAM_VA_SIZE 0x0f /* RO: size of valid GPU iova range (bytes) */ /* For backwards compat. The original support for preemption was based on * a single ring per priority level so # of priority levels equals the # @@ -135,6 +137,7 @@ struct drm_msm_gem_new { #define MSM_INFO_GET_IOVA 0x01 /* get iova, returned by value */ #define MSM_INFO_SET_NAME 0x02 /* set the debug name (by pointer) */ #define MSM_INFO_GET_NAME 0x03 /* get debug name, returned by pointer */ +#define MSM_INFO_SET_IOVA 0x04 /* set the iova, passed by value */ struct drm_msm_gem_info { __u32 handle; /* in */