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X-Received-From: 2607:f8b0:4864:20::234 Subject: [Qemu-devel] [PULL 01/32] tcg/i386: Always use %ebp for TCG_AREG0 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" For x86_64, this can remove a REX prefix resulting in smaller code when manipulating globals of type i32, as we move them between backing store via cpu_env, aka TCG_AREG0. Reviewed-by: Alex Bennée Reviewed-by: Emilio G. Cota Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.h | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) -- 2.17.2 diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h index 9fdf37f23c..7488c3d869 100644 --- a/tcg/i386/tcg-target.h +++ b/tcg/i386/tcg-target.h @@ -84,6 +84,8 @@ typedef enum { TCG_REG_RBP = TCG_REG_EBP, TCG_REG_RSI = TCG_REG_ESI, TCG_REG_RDI = TCG_REG_EDI, + + TCG_AREG0 = TCG_REG_EBP, } TCGReg; /* used for function call generation */ @@ -194,12 +196,6 @@ extern bool have_avx2; #define TCG_TARGET_extract_i64_valid(ofs, len) \ (((ofs) == 8 && (len) == 8) || ((ofs) + (len)) == 32) -#if TCG_TARGET_REG_BITS == 64 -# define TCG_AREG0 TCG_REG_R14 -#else -# define TCG_AREG0 TCG_REG_EBP -#endif - static inline void flush_icache_range(uintptr_t start, uintptr_t stop) { } From patchwork Fri Dec 14 03:18:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153708 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1596222ljp; Thu, 13 Dec 2018 19:22:38 -0800 (PST) X-Google-Smtp-Source: AFSGD/UmPVkiCdznrn1ew52/+NeL5a3JYbtE6de2nURFQBBMZyZMbRg9NtsBfkNtLlcy6Ly6xrUU X-Received: by 2002:ac8:3312:: with SMTP id t18mr1224540qta.225.1544757758492; Thu, 13 Dec 2018 19:22:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544757758; cv=none; d=google.com; s=arc-20160816; b=WOtg0Dv0iCXjffzaIpBMRiCibEZWBqUQ30EXiI551iR6hSz2u3S2N24g+l58BmMRQf QTW1HoDY9MgggVQpX+vRKAnjYEHkRKp31EBwyKxviAump5q3UF8MgB4oiQ0Rchyug/NQ xqW6nrQeslLnjRHFSlk1XJJwXHLkKL+XXYAuS7Z8UA2oFxd2YQlCRmmjeE0cmMdp8Md0 BrzfDo498r/kQ6L52TNvvf4CHLcpeNzy1jShCndUagaHk8uAICQB+Z4BGvpP8fUSiUr7 FEkt515bG2cE5saxqErrzo++waSmcyX1/9HygsktDV/uLfnk8SJ5iGgiLOrLw/iz/Q9X L05w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=Jrh4Y+SFq2jwiqT4wxhzL7fYXQ83Kj3wp2Zs2cGnVdE=; b=DF0d9cNQkGP9r7g1wSnP7qUfWmmHKs9MrBnVqPg4Eu3pW/aG01nuiWwS9hfCltPy3h S35fJBHto7o836OMQdCQ6sdHCq3dj+ENrd1Kf8lmHvQ/u/rgNXCH/87y+jZW1VNdvpyc K53qSaVg/Q/eIT7Nod+TeJHMIvuzhIx+E+wra+HRQcO8B8HUFHqXOcW29YMJCo0zuOVc /JY3+umwrp/FfxT4kD8xExQXqyWHudVOVvLfX+Ty/bS+uF4MLAu6Rd4sEAU4poufyI7i J6IeywLMjtp2eNCK8OTIAZi1YaPIRlJYDJOZgBOlLAjMpbNlYK2yDyerUcT0tkLhdd0C gQww== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=fnSZzo+v; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:4864:20::236 Subject: [Qemu-devel] [PULL 02/32] tcg/i386: Move TCG_REG_CALL_STACK from define to enum X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Reviewed-by: Alex Bennée Reviewed-by: Emilio G. Cota Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.17.2 diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h index 7488c3d869..2441658865 100644 --- a/tcg/i386/tcg-target.h +++ b/tcg/i386/tcg-target.h @@ -86,10 +86,10 @@ typedef enum { TCG_REG_RDI = TCG_REG_EDI, TCG_AREG0 = TCG_REG_EBP, + TCG_REG_CALL_STACK = TCG_REG_ESP } TCGReg; /* used for function call generation */ -#define TCG_REG_CALL_STACK TCG_REG_ESP #define TCG_TARGET_STACK_ALIGN 16 #if defined(_WIN64) #define TCG_TARGET_CALL_STACK_OFFSET 32 From patchwork Fri Dec 14 03:18:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153706 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1594708ljp; Thu, 13 Dec 2018 19:20:00 -0800 (PST) X-Google-Smtp-Source: AFSGD/UotuejkYL1/Eu0sPOvPD1HMpoardtEGxbF2CjYB9RTh2Ix1SLtY0v0pdPL2mA+KKkhxoNF X-Received: by 2002:aed:29c7:: with SMTP id o65mr1221897qtd.353.1544757600505; Thu, 13 Dec 2018 19:20:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544757600; cv=none; d=google.com; s=arc-20160816; b=Dk1qX3TWH4v4kIpId499zJ69z8QWZbUimYUaHBh0U4fO9v02j4vPcIj8cvm6DIJWIy 4Oi0A4Tg76j69/WzFR6k0/xgA9RSdji77Y+ROaZIrH/Zrw7d8oQ+NEs4D2cvGKeeNIDu +8jUoQi9oIwFAJKX4NywEcipGS3mBN574HZhoPIZQX9F0VRgER/dTL3pChjGhjlWTj2/ MWYO6CYLm//AJD6qcFJBgB70JCeszsRR+vIcAR3Q8xJb2f13PKUy1oRmBecBiTByAyfJ fadnuDZXVQRv0Bn5UMe4Mhm18isQ6pKKjMtxp7z62oNmAHvQvfhxqCK+vrYgV/TLUKqH us/Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=dMQt6Qd/7dZU/F7lE1TFtGKXBIbGd2E6AtbOYBca+Dk=; b=E2CEdMzYqfrR85T1pl8mmhw9ETCaVA5ZSQUkcU6qU5vdgwgmsBNGSVLejg9TSHk+Fc QuQisoeqHldFF0tlV0u79qLyLxQAi0vcftDYZnHrXEI2IXFlNYKS35VzL5nmlhoeB7CR fLOFvaNf52htX1RmIzUxA/7l3y/Hdgk6bFKYNkVRPaz4jhMtMjOTne1+Jwn7WyNVR/kC L7fZcVRUbrv8CnGAMAm2qE3ezgqu4dqMjbZZred1xNzYe7ZHG6SPlAP3AjEjfzdYxF0o A1BExLuZ7p4oeVxZvCpKzv0pUtip4eDKpSnqZL7Q2/Zg8UgFsOhxQ/Er+Mi0qVhBlCgH eGIA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=GoJeKaEp; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:4864:20::32d Subject: [Qemu-devel] [PULL 03/32] tcg/aarch64: Remove reloc_pc26_atomic X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" It is unused since b68686bd4bfeb70040b4099df993dfa0b4f37b03. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.inc.c | 12 ------------ 1 file changed, 12 deletions(-) -- 2.17.2 diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c index 083592a4d7..a41b633960 100644 --- a/tcg/aarch64/tcg-target.inc.c +++ b/tcg/aarch64/tcg-target.inc.c @@ -87,18 +87,6 @@ static inline void reloc_pc26(tcg_insn_unit *code_ptr, tcg_insn_unit *target) *code_ptr = deposit32(*code_ptr, 0, 26, offset); } -static inline void reloc_pc26_atomic(tcg_insn_unit *code_ptr, - tcg_insn_unit *target) -{ - ptrdiff_t offset = target - code_ptr; - tcg_insn_unit insn; - tcg_debug_assert(offset == sextract64(offset, 0, 26)); - /* read instruction, mask away previous PC_REL26 parameter contents, - set the proper offset, then write back the instruction. */ - insn = atomic_read(code_ptr); - atomic_set(code_ptr, deposit32(insn, 0, 26, offset)); -} - static inline void reloc_pc19(tcg_insn_unit *code_ptr, tcg_insn_unit *target) { ptrdiff_t offset = target - code_ptr; From patchwork Fri Dec 14 03:18:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153719 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1601041ljp; Thu, 13 Dec 2018 19:30:56 -0800 (PST) X-Google-Smtp-Source: AFSGD/WUyUi8WvYeq/m4XFGuBkZI24ihGPCbkd/d1/MhpGvs491riXVMMyHIIimUCSVTCRDvh+a5 X-Received: by 2002:ac8:30ac:: with SMTP id v41mr1241222qta.51.1544758256454; Thu, 13 Dec 2018 19:30:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544758256; cv=none; d=google.com; s=arc-20160816; b=V4jDAUmUhKHQ4fBNRgjQODiNlim662EP4iRtw/i756hZK56ihm++hRaQFmfGl+mdo+ Q3NU2x/vOGz315qh78xwU/vihjFk9vXxSh9ethAKyzF8s2QN0G5T4q7Ol/XLlVuP32wQ 3nR61Urn/Ik5IPQvL0RS4ZSQvlKqOboRKQwmFClhCAN/OEVmYDV8wyRcq0KteyEgZH1f MpSmKgvwo3G4VjdXLiFMY4+5ViqGTEUw5Wj9DNo+zGTd4Zo0Sj1bTGTiRf8PU/mfbh4J p+kMzoMM3+h4DQmKvnyLKymRbi+YozNQmhy2zNzx4H9uNZOeSstgxk7Ev5XzR7YqKv0i XEwg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=n03+W+s+dTlXDYsWDVZ6aqC7ETXVj+GjdAXOLOy0wp8=; b=sJisJ6ng3u0CDTi/kXv98CwDKqbI/PV9FTgZ/fU03ax1srMjK/CGLfkh3ju2n8JyKd iKXcHsDzr/HkdRj5XLdB+nLjAIrc8QrfJT+tTK0kSBAQYLxHQ2JnU92I+QsxKF56sM1i 06WZkWPzqcooamh5NouVarkPwGwUfqRRlwqz6yPexadYfGaufbiv0qBffMhxYHmsJUwP SJvceqt3o7oIXR6GElVPsXhNvjMdO9Iac9zjJWDThKvjbtg5oiq57qyGBmoZ7+2xhSaF uoBtlYmJodmmEp7MIy8pigFmNx+AeXIVOt6EE2kBD4iV7Q+a3haff/9zuBBKm1gUuNfv 5R4w== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=NbCFN2D0; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:4864:20::330 Subject: [Qemu-devel] [PULL 04/32] tcg/aarch64: Fold away "noaddr" branch routines X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" There are one use apiece for these. There is no longer a need for preserving branch offset operands, as we no longer re-translate. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.inc.c | 21 ++------------------- 1 file changed, 2 insertions(+), 19 deletions(-) -- 2.17.2 diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c index a41b633960..28de0226fb 100644 --- a/tcg/aarch64/tcg-target.inc.c +++ b/tcg/aarch64/tcg-target.inc.c @@ -1129,23 +1129,6 @@ static inline void tcg_out_goto_long(TCGContext *s, tcg_insn_unit *target) } } -static inline void tcg_out_goto_noaddr(TCGContext *s) -{ - /* We pay attention here to not modify the branch target by reading from - the buffer. This ensure that caches and memory are kept coherent during - retranslation. Mask away possible garbage in the high bits for the - first translation, while keeping the offset bits for retranslation. */ - uint32_t old = tcg_in32(s); - tcg_out_insn(s, 3206, B, old); -} - -static inline void tcg_out_goto_cond_noaddr(TCGContext *s, TCGCond c) -{ - /* See comments in tcg_out_goto_noaddr. */ - uint32_t old = tcg_in32(s) >> 5; - tcg_out_insn(s, 3202, B_C, c, old); -} - static inline void tcg_out_callr(TCGContext *s, TCGReg reg) { tcg_out_insn(s, 3207, BLR, reg); @@ -1192,7 +1175,7 @@ static inline void tcg_out_goto_label(TCGContext *s, TCGLabel *l) { if (!l->has_value) { tcg_out_reloc(s, s->code_ptr, R_AARCH64_JUMP26, l, 0); - tcg_out_goto_noaddr(s); + tcg_out_insn(s, 3206, B, 0); } else { tcg_out_goto(s, l->u.value_ptr); } @@ -1523,7 +1506,7 @@ static void tcg_out_tlb_read(TCGContext *s, TCGReg addr_reg, TCGMemOp opc, /* If not equal, we jump to the slow path. */ *label_ptr = s->code_ptr; - tcg_out_goto_cond_noaddr(s, TCG_COND_NE); + tcg_out_insn(s, 3202, B_C, TCG_COND_NE, 0); } #endif /* CONFIG_SOFTMMU */ From patchwork Fri Dec 14 03:18:56 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153711 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1596552ljp; Thu, 13 Dec 2018 19:23:10 -0800 (PST) X-Google-Smtp-Source: AFSGD/Xlv8fbIgFjQPQrPGC7UvxyHdmBkNQzVD8d+EsW/Go4RjCOgRdQbzYoB0QGTSusUvTk0DHr X-Received: by 2002:ac8:6606:: with SMTP id c6mr1236096qtp.376.1544757790188; Thu, 13 Dec 2018 19:23:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544757790; cv=none; d=google.com; s=arc-20160816; b=uUU7YXLVISTrci/N0tsOFZYZDM/+T73vI+cZXjdw3GBytPEUp+Om4yxR+w5+9I7OTN 0NBJvj15+EuV22zDdjrwSldk6M4PvVuJAzVhgE6s8uSiZ38zCtBLsHFyUhauIIwjkc2b z/4Wz2nvWSPncgzLAuCUzzshGKey6C6aWyNJQ7hJs4EIPgWzEM0O26LnQUPQhKriuqsk COXO3DhCVpHyu7o6OK+YRkj8au1g9dDmNCtT26aFwM64jeOU1Pk+crLtcY4bXGQsnJ3B q1P4sGaM0oP4n35SiT6FGQrwHXpCIRXquvsJQdd15rQCk0sLhAHQX86NjnTROQDGvW9X sLcg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=4U2KrQrShcYANcaPjJ360v70ytrgkZZMHswPcES6O0o=; b=rOKtecLwwCGsTaAG1PyFVj73meBPR+c7AM2dAtGt9WV8TN+Pc54bN9UmPqS62nm2LX OaUMWwpQRZL1PP6QyP/XZjqOl4wL8QmOOTKgABEgcfi59lrjlnwgWKkBfZclf95WfKTK b+2r4XBTlpWezzVh5e+zv3AJxlknS2Fc2BojCoKjyh7KPkLZ4m72XSKz76GUPM185c7a LZvuE8VhLntLbrowqt+h2tRQV2Gn6SIP/rpuywr3kUmOD9QCkzBoxrpV3DbMR6chlPsl rmxz68SgHBQOd34j3k1SKIVRBQZ9sHNcO3aq5iG8tTjta/F4rcw6y3Gc04bRMmjk7eoO sWuA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=kBve5oF7; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:4864:20::230 Subject: [Qemu-devel] [PULL 05/32] tcg/arm: Remove reloc_pc24_atomic X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" It is unused since 3fb53fb4d12f2e7833bd1659e6013237b130ef20. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.inc.c | 8 -------- 1 file changed, 8 deletions(-) -- 2.17.2 diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c index e1fbf465cb..1142eb13ad 100644 --- a/tcg/arm/tcg-target.inc.c +++ b/tcg/arm/tcg-target.inc.c @@ -193,14 +193,6 @@ static inline void reloc_pc24(tcg_insn_unit *code_ptr, tcg_insn_unit *target) *code_ptr = (*code_ptr & ~0xffffff) | (offset & 0xffffff); } -static inline void reloc_pc24_atomic(tcg_insn_unit *code_ptr, tcg_insn_unit *target) -{ - ptrdiff_t offset = (tcg_ptr_byte_diff(target, code_ptr) - 8) >> 2; - tcg_insn_unit insn = atomic_read(code_ptr); - tcg_debug_assert(offset == sextract32(offset, 0, 24)); - atomic_set(code_ptr, deposit32(insn, 0, 24, offset)); -} - static void patch_reloc(tcg_insn_unit *code_ptr, int type, intptr_t value, intptr_t addend) { From patchwork Fri Dec 14 03:18:57 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153722 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1603292ljp; Thu, 13 Dec 2018 19:34:31 -0800 (PST) X-Google-Smtp-Source: AFSGD/X1xFCNmSP3nX1+SJf5d2e34i+11/uSlBJ6qS/2mXSpXpWFxcNrr+wSN+cOWH4yTNdxsbqc X-Received: by 2002:a0c:bd9f:: with SMTP id n31mr1248564qvg.193.1544758471864; Thu, 13 Dec 2018 19:34:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544758471; cv=none; d=google.com; s=arc-20160816; b=r1Mz18+WVIzRQVf2LbtYBzEQguknQueyxwRZaS1HANmRWTaKeFrmdt1uu7CIw0cGRh PC8ZX1yLRDvW90iEL2pCR6qtIYb/oRXKe7g/EkUNIs6VJAUfDKP8o6bgs6HXVnyVSzDB hXxovBeKBVQmFiQKT1Ft/IZUombSeKWGErErS5FKhKQ8o9DlHE0XGfWacIcEoAUqNzb/ xQtoLrnG1LA5BGyjeLBRL/nID9XUvcjtpfx28HD6lUBLadoUCH6pIlTpWsM1uUS6ikrd FwcWOCwz5Ri4Rd62/jRkZ52lHeKBt7lbfqrYBQOHthTmvUVXbM6sLZY/HNJ8bsgHx54T NXKg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=buPH91XJpUfNOE4HN6QSs39fZ6Yqo5clHmdORG592tI=; b=AMIfVsAeNtKKvGCdTNIrxyoHoirf2VYTGuD1w+1e0hMlvJ3oYGAL2iy+Me8QnNGV85 +rXQEQVaogAlaxMU2bEKiyLr0xywKhfwN155C3mAKLfQ8mJpusj4Ig+IiZs9ZSyJcqnd KxGMT8nZZqt9rfpOaa38w17QSHRSlrkzvqzTs9gr9tql8VO5xr33yzFsNtp6F1V+oRIR 2FOSew+80alSXkETEHwCh+7MHCxxTUDAknSRNE5lecXL5gdFZeyaFdsLtBuZ+HzZ3Dvb Xzx2nm1HI3e4SPbCQZb9FmLRWlpe9HiMFSeUjk8DDaG4TZKalpv6tMvsm3ye4r2a79jU elHQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=AxxiwuuX; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:4864:20::330 Subject: [Qemu-devel] [PULL 06/32] tcg/arm: Fold away "noaddr" branch routines X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" There are one use apiece for these. There is no longer a need for preserving branch offset operands, as we no longer re-translate. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.inc.c | 22 +++------------------- 1 file changed, 3 insertions(+), 19 deletions(-) -- 2.17.2 diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c index 1142eb13ad..1651f00281 100644 --- a/tcg/arm/tcg-target.inc.c +++ b/tcg/arm/tcg-target.inc.c @@ -366,22 +366,6 @@ static inline void tcg_out_b(TCGContext *s, int cond, int32_t offset) (((offset - 8) >> 2) & 0x00ffffff)); } -static inline void tcg_out_b_noaddr(TCGContext *s, int cond) -{ - /* We pay attention here to not modify the branch target by masking - the corresponding bytes. This ensure that caches and memory are - kept coherent during retranslation. */ - tcg_out32(s, deposit32(*s->code_ptr, 24, 8, (cond << 4) | 0x0a)); -} - -static inline void tcg_out_bl_noaddr(TCGContext *s, int cond) -{ - /* We pay attention here to not modify the branch target by masking - the corresponding bytes. This ensure that caches and memory are - kept coherent during retranslation. */ - tcg_out32(s, deposit32(*s->code_ptr, 24, 8, (cond << 4) | 0x0b)); -} - static inline void tcg_out_bl(TCGContext *s, int cond, int32_t offset) { tcg_out32(s, (cond << 28) | 0x0b000000 | @@ -1082,7 +1066,7 @@ static inline void tcg_out_goto_label(TCGContext *s, int cond, TCGLabel *l) tcg_out_goto(s, cond, l->u.value_ptr); } else { tcg_out_reloc(s, s->code_ptr, R_ARM_PC24, l, 0); - tcg_out_b_noaddr(s, cond); + tcg_out_b(s, cond, 0); } } @@ -1628,7 +1612,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64) /* This a conditional BL only to load a pointer within this opcode into LR for the slow path. We will not be using the value for a tail call. */ label_ptr = s->code_ptr; - tcg_out_bl_noaddr(s, COND_NE); + tcg_out_bl(s, COND_NE, 0); tcg_out_qemu_ld_index(s, opc, datalo, datahi, addrlo, addend); @@ -1760,7 +1744,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64) /* The conditional call must come last, as we're going to return here. */ label_ptr = s->code_ptr; - tcg_out_bl_noaddr(s, COND_NE); + tcg_out_bl(s, COND_NE, 0); add_qemu_ldst_label(s, false, oi, datalo, datahi, addrlo, addrhi, s->code_ptr, label_ptr); From patchwork Fri Dec 14 03:18:58 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153712 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1596576ljp; Thu, 13 Dec 2018 19:23:12 -0800 (PST) X-Google-Smtp-Source: AFSGD/XTuCEDBCPHmnhcseJrAqVd1leQ6PkucgJ3b/Wli3YWFQNqC67KRnrrnG8XsD0hv/9tvGhR X-Received: by 2002:a37:dc04:: with SMTP id v4mr1153956qki.101.1544757792146; Thu, 13 Dec 2018 19:23:12 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544757792; cv=none; d=google.com; s=arc-20160816; b=LYH2YQKhr//NVanAAuT5Qi8/pZWRq0W7FUW0ct+kvde0PRDrsb/MiHmlppQRmdHVla Wetu8BvINDpphBL/cMqSys7jt0IdzJfMIkUGqNpmozRzux6GNhoT9hSABTkKmavV3Z3c jrwzqKhilzdCad/cklDtVW/PDLEgsdrwffnCi/t8hss+sxfGZKb6xKPOGhgZO3qO5BBd xZ3Y1Xo/H7aMQcXWzW9qkqwUCwINBIZRPS4sHNAerFkJkfi8eaOcQECb+5bdzRj0dE2R 68+BXbIGY/9EBguLOZFogtfBiPvxE+GDDYT9oSEen4UKhGdoFmKGT0dJuFTzlgrQrF1c k4zw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=7EGeWCwiLOWCXY2HFjlb7FD3hn04KtScBAMx3eYxs8U=; b=Rw3cXMZtV478YBEn29c25oSNG0IoelyrjseFkhxjEetJyCE9nAKsg4NGzNmQ6L95E1 gpmDcbqa9hY4oJNQ+C2YXjIU7bDte+eme4N478jjXs33rAn/nRvoOLw1JFl0ntDPei9C xANcNJCZ3X5bZTq6gnB3cFrP8S0BMLgNYFR50rZamdNBmUWvFrdNjcDWlfAb7PrSLUcv +jYLOhoxon/X2b+4J4kAXZ9E1LfKhWj7rjgLDdHfLYC/IGR3Ix6HujKvvWq+4yDsS6ww kEZYXGzw5W5+5GkQoH8e5dk+vWsdoFfbiHegQ3fzfb4n1ZE7lKHqiQ0qriJqcrcjEMPa XuAQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=TFH9AcDO; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:4864:20::329 Subject: [Qemu-devel] [PULL 07/32] tcg/ppc: Fold away "noaddr" branch routines X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" There is no longer a need for preserving branch offset operands, as we no longer re-translate. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.inc.c | 25 +++++++------------------ 1 file changed, 7 insertions(+), 18 deletions(-) -- 2.17.2 diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c index c2f729ee8f..2e2a22f579 100644 --- a/tcg/ppc/tcg-target.inc.c +++ b/tcg/ppc/tcg-target.inc.c @@ -210,18 +210,6 @@ static void reloc_pc14(tcg_insn_unit *pc, tcg_insn_unit *target) *pc = (*pc & ~0xfffc) | reloc_pc14_val(pc, target); } -static inline void tcg_out_b_noaddr(TCGContext *s, int insn) -{ - unsigned retrans = *s->code_ptr & 0x3fffffc; - tcg_out32(s, insn | retrans); -} - -static inline void tcg_out_bc_noaddr(TCGContext *s, int insn) -{ - unsigned retrans = *s->code_ptr & 0xfffc; - tcg_out32(s, insn | retrans); -} - /* parse target specific constraints */ static const char *target_parse_constraint(TCGArgConstraint *ct, const char *ct_str, TCGType type) @@ -1179,11 +1167,11 @@ static void tcg_out_setcond(TCGContext *s, TCGType type, TCGCond cond, static void tcg_out_bc(TCGContext *s, int bc, TCGLabel *l) { if (l->has_value) { - tcg_out32(s, bc | reloc_pc14_val(s->code_ptr, l->u.value_ptr)); + bc |= reloc_pc14_val(s->code_ptr, l->u.value_ptr); } else { tcg_out_reloc(s, s->code_ptr, R_PPC_REL14, l, 0); - tcg_out_bc_noaddr(s, bc); } + tcg_out32(s, bc); } static void tcg_out_brcond(TCGContext *s, TCGCond cond, @@ -1771,7 +1759,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is_64) /* Load a pointer into the current opcode w/conditional branch-link. */ label_ptr = s->code_ptr; - tcg_out_bc_noaddr(s, BC | BI(7, CR_EQ) | BO_COND_FALSE | LK); + tcg_out32(s, BC | BI(7, CR_EQ) | BO_COND_FALSE | LK); rbase = TCG_REG_R3; #else /* !CONFIG_SOFTMMU */ @@ -1846,7 +1834,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is_64) /* Load a pointer into the current opcode w/conditional branch-link. */ label_ptr = s->code_ptr; - tcg_out_bc_noaddr(s, BC | BI(7, CR_EQ) | BO_COND_FALSE | LK); + tcg_out32(s, BC | BI(7, CR_EQ) | BO_COND_FALSE | LK); rbase = TCG_REG_R3; #else /* !CONFIG_SOFTMMU */ @@ -2044,13 +2032,14 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, case INDEX_op_br: { TCGLabel *l = arg_label(args[0]); + uint32_t insn = B; if (l->has_value) { - tcg_out_b(s, 0, l->u.value_ptr); + insn |= reloc_pc24_val(s->code_ptr, l->u.value_ptr); } else { tcg_out_reloc(s, s->code_ptr, R_PPC_REL24, l, 0); - tcg_out_b_noaddr(s, B); } + tcg_out32(s, insn); } break; case INDEX_op_ld8u_i32: From patchwork Fri Dec 14 03:18:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153727 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1605216ljp; Thu, 13 Dec 2018 19:37:36 -0800 (PST) X-Google-Smtp-Source: AFSGD/XBnKqPTMLlgzu+BnD9eYFHcrclsLOkpdekJ1iZLBr+bQcUOze7woU6kayKsUwdNvuQkINj X-Received: by 2002:ac8:2c34:: with SMTP id d49mr1328258qta.152.1544758656395; Thu, 13 Dec 2018 19:37:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544758656; cv=none; d=google.com; s=arc-20160816; b=qv/zYKcIJvlHWJ+m2L4r+rzeoEbNK8hXKhUTe9zYly3b86LALK2Y4wZedGF4ERs0ns 0J9tAAcecThqZiBfjZSw6puOU37AEC+lQQYh5Fj857lXPU4pPhTAx3yBkfv801+T1TWi DNE7TDU+34KjaW7o0dsulQ2QnRlQ6DB/VtC/zIkTnQxSJbHUdNrhoTqZDPbJiay0p7Hg VNuEDLf0PIV0U6dVncWsx9EVyqbS3X2btrAUwOuSl7Fhs5V6fVvmyctFa9Uvqm2PGF9d D0E97Sbbw66oM0guM7ZZRLZkswv+O5c+LksR524nZc9p6onxqKUd7KIzIZIbBgx9ULmp n06w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=yGI0DQBrYmbbF5yNTiceyVNuONNc8y56jnkN6aCaCvM=; b=KhUq9NHjSFXRB1FJ6ZbONQcVxsemJFRQRIlojz2VddWJs+3el+Ev6bbSVo9l//v3qr F14IRxIMMbk4Of2srjAzyYxhPTe9I4KbdWK9W1Nsq35EEMFLByVrS3hpAe6cP8qCD5hc AKCYV9okBV6mZcsiHMCE7bsVNF6iwafMaY0LrMxJCW0dmGg7GjygX6VvFp85QjaVNiMa 3ON3OfCW/miBvvRagrKV34lghYHPS+UiP1J10MdF4doBh+Nqlf9oke51a7P4gYcbFcDm 2gocOMr0r/ECxPhErGCkXkH+PztayXoiR7hcq5rQJ+R+4WuUaU1CX3xJiHvFLrZbo0MX J9og== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=J70V09da; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:4864:20::334 Subject: [Qemu-devel] [PULL 08/32] tcg/s390: Remove retranslation code X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" There is no longer a need for preserving branch offset operands, as we no longer re-translate. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- tcg/s390/tcg-target.inc.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) -- 2.17.2 diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-target.inc.c index 17c435ade5..96c344142e 100644 --- a/tcg/s390/tcg-target.inc.c +++ b/tcg/s390/tcg-target.inc.c @@ -1329,13 +1329,11 @@ static void tgen_branch(TCGContext *s, int cc, TCGLabel *l) static void tgen_compare_branch(TCGContext *s, S390Opcode opc, int cc, TCGReg r1, TCGReg r2, TCGLabel *l) { - intptr_t off; + intptr_t off = 0; if (l->has_value) { off = l->u.value_ptr - s->code_ptr; } else { - /* We need to keep the offset unchanged for retranslation. */ - off = s->code_ptr[1]; tcg_out_reloc(s, s->code_ptr + 1, R_390_PC16DBL, l, 2); } @@ -1347,13 +1345,11 @@ static void tgen_compare_branch(TCGContext *s, S390Opcode opc, int cc, static void tgen_compare_imm_branch(TCGContext *s, S390Opcode opc, int cc, TCGReg r1, int i2, TCGLabel *l) { - tcg_target_long off; + tcg_target_long off = 0; if (l->has_value) { off = l->u.value_ptr - s->code_ptr; } else { - /* We need to keep the offset unchanged for retranslation. */ - off = s->code_ptr[1]; tcg_out_reloc(s, s->code_ptr + 1, R_390_PC16DBL, l, 2); } @@ -1696,7 +1692,6 @@ static void tcg_out_qemu_ld(TCGContext* s, TCGReg data_reg, TCGReg addr_reg, base_reg = tcg_out_tlb_read(s, addr_reg, opc, mem_index, 1); - /* We need to keep the offset unchanged for retranslation. */ tcg_out16(s, RI_BRC | (S390_CC_NE << 4)); label_ptr = s->code_ptr; s->code_ptr += 1; @@ -1724,7 +1719,6 @@ static void tcg_out_qemu_st(TCGContext* s, TCGReg data_reg, TCGReg addr_reg, base_reg = tcg_out_tlb_read(s, addr_reg, opc, mem_index, 0); - /* We need to keep the offset unchanged for retranslation. */ tcg_out16(s, RI_BRC | (S390_CC_NE << 4)); label_ptr = s->code_ptr; s->code_ptr += 1; From patchwork Fri Dec 14 03:19:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153713 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1598020ljp; Thu, 13 Dec 2018 19:25:41 -0800 (PST) X-Google-Smtp-Source: AFSGD/VlPPk+3mHnWtr8b87K0JRFkiftiW6r7yZcOQ+sjTcgp00ZT37dMdAXClZBUVpSRUKaGsLe X-Received: by 2002:a0c:e5c1:: with SMTP id u1mr1247983qvm.113.1544757941752; Thu, 13 Dec 2018 19:25:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544757941; cv=none; d=google.com; s=arc-20160816; b=E4aHZ4H7xTcuQrVXIEoryOMax6MFB5tVST3mfTj7e7bh9DEnCUhdYUZxs/hK8fsNlg Ku/7y6iWdz/k+oaxq47DIXUUpF8Ep2ImqLShrhT9ZWaLgQ0Ope6fyDVxvXi9cdpAo+L+ Z7srDSy3We8SqWOAeQDNiiQ6ClTZYP22SwXhac2P51YEEvH+g2a7wcj1cT4FwJ3TZJ8G x4ydeGBRq3LiHdxvQBwt1MrFhzlhtf8BN2ydKFRfmEpvE5qtnYBXqgpp0vzxygAgPIgE LNW5Th6Zk4KWYuhqUteA+RgjKZaSVPJoS0E7EppbuEqKTNoKejkBV6yt01XKsGIKbU4l 13rg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=qxCbulHcTezeCdPo1nMC+1Z/ifGcrvke19IzYpTinZ4=; b=Qsjm9M6rzSpW9MjaXwuF/inGJfNbM1vG/bsiVXIGAmfoGgNdAzfzTjKjXnDAA1e/tK UiIkZAllq6j5CZrspFQrWUjKZlrOIQOeZZ7CqTfiPcZmdycIdSgjai6TV5zqAjZgg3F7 opiK8pZO6CNsmX7gK2bS8vE0zhv8CyO2w8iXjO5YTEGoLWRufXeigUWRIPraN69QUYQA YaF7nL4a8gZniQ/NbpyucrZ3aEF5NpM1K2klczC/dGC4oA0oHcSR5mgD8Q/OTLtgwJhT 2Fzpi/NxCoJujUfXxErFv8lyWVwV+vBsTP555Xk7lfb68IK79o2mc+YzcWn+lydy8IRf 9sXA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=Jw+yqr2f; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:4864:20::22a Subject: [Qemu-devel] [PULL 09/32] tcg/sparc: Remove retranslation code X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" There is no longer a need for preserving branch offset operands, as we no longer re-translate. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- tcg/sparc/tcg-target.inc.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) -- 2.17.2 diff --git a/tcg/sparc/tcg-target.inc.c b/tcg/sparc/tcg-target.inc.c index 04bdc3df5e..671a04c54b 100644 --- a/tcg/sparc/tcg-target.inc.c +++ b/tcg/sparc/tcg-target.inc.c @@ -639,13 +639,11 @@ static void tcg_out_bpcc0(TCGContext *s, int scond, int flags, int off19) static void tcg_out_bpcc(TCGContext *s, int scond, int flags, TCGLabel *l) { - int off19; + int off19 = 0; if (l->has_value) { off19 = INSN_OFF19(tcg_pcrel_diff(s, l->u.value_ptr)); } else { - /* Make sure to preserve destinations during retranslation. */ - off19 = *s->code_ptr & INSN_OFF19(-1); tcg_out_reloc(s, s->code_ptr, R_SPARC_WDISP19, l, 0); } tcg_out_bpcc0(s, scond, flags, off19); @@ -685,13 +683,11 @@ static void tcg_out_brcond_i64(TCGContext *s, TCGCond cond, TCGReg arg1, { /* For 64-bit signed comparisons vs zero, we can avoid the compare. */ if (arg2 == 0 && !is_unsigned_cond(cond)) { - int off16; + int off16 = 0; if (l->has_value) { off16 = INSN_OFF16(tcg_pcrel_diff(s, l->u.value_ptr)); } else { - /* Make sure to preserve destinations during retranslation. */ - off16 = *s->code_ptr & INSN_OFF16(-1); tcg_out_reloc(s, s->code_ptr, R_SPARC_WDISP16, l, 0); } tcg_out32(s, INSN_OP(0) | INSN_OP2(3) | BPR_PT | INSN_RS1(arg1) From patchwork Fri Dec 14 03:19:01 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153707 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1594848ljp; Thu, 13 Dec 2018 19:20:12 -0800 (PST) X-Google-Smtp-Source: AFSGD/Xznp2Fyep94KrOl6JhNb+Ku3rYizD/zNN6/A/KNWSFfrMORxH1ZKoFfTR2RfFpVV1zSkLp X-Received: by 2002:aed:2b01:: with SMTP id p1mr1224343qtd.101.1544757611901; Thu, 13 Dec 2018 19:20:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544757611; cv=none; d=google.com; s=arc-20160816; b=BaCGOi8f3zcn6bVD41lTTNBtXlmGtox4NWX5qEoKcvswKPODRzwruNTLBhO5DdFtBE A68DroGJNRAiBq1TTW3d7Md6t3kktjN6Ro9W9Q2bRC60MKxEiInL0+cJOPS/O1BFVSBF neuIrSdgkOY5fxtvUUnNf/yWMlktp6AAxPXM5CyE819E1GL6cxRom7Avb/Z3mMLbuOm8 5d3DyovpYqCS/RV9f1uf5woYoJW9wLpVOlptnb/d9lih8rad9yjw/uSKCVyXUD0BzPDK QRI08kEDrrG4wv70QxCYNSrePx7duhpNBNcocGm7Pqq8rFy43QD8skH24ECXgNLKNviT xKGA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=I/odWjCOJHIQsNZnTEkgZki8MpiCHZCtHfZCeJ69w/I=; b=SRh4A7lKK2diK6uX/H9GbzcjRVcPXB1Xkp6/WbZLAANHfml1txuPNaOsr0t/qWDGWd yCbaZLb/5aHGC5Rn4PnHLZkl6wWr9X1+/KfZaAUg87RRJ2F5sY+0P5mjuu07KxfscAz3 gE8IF+sKDDYEX3tmaWnClHL8ciT0QhAdyoi4cHdVFruDwDAp9XLRJntwI0zsFaNEhsmO 0llFsTvJIX1SL4kP2e/k+cnAL7QHD5xe7Kfxrit5HVhN0KaVX333l4JtMUrGhM7Zr2VF hyOPT8NoCs3MZPpoM73VCCfh3oEuWslRoF6ZoK9dtIit7ZToSVMq/qWZ47mzLYzcfags O5Jg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=i1rOeiD+; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:4864:20::233 Subject: [Qemu-devel] [PULL 10/32] tcg/mips: Remove retranslation code X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" There is no longer a need for preserving branch offset operands, as we no longer re-translate. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- tcg/mips/tcg-target.inc.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) -- 2.17.2 diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c index cff525373b..e21cb1ae28 100644 --- a/tcg/mips/tcg-target.inc.c +++ b/tcg/mips/tcg-target.inc.c @@ -483,12 +483,7 @@ static inline void tcg_out_opc_bf64(TCGContext *s, MIPSInsn opc, MIPSInsn opm, static inline void tcg_out_opc_br(TCGContext *s, MIPSInsn opc, TCGReg rt, TCGReg rs) { - /* We pay attention here to not modify the branch target by reading - the existing value and using it again. This ensure that caches and - memory are kept coherent during retranslation. */ - uint16_t offset = (uint16_t)*s->code_ptr; - - tcg_out_opc_imm(s, opc, rt, rs, offset); + tcg_out_opc_imm(s, opc, rt, rs, 0); } /* From patchwork Fri Dec 14 03:19:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153717 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1599493ljp; Thu, 13 Dec 2018 19:28:24 -0800 (PST) X-Google-Smtp-Source: AFSGD/XGC8eOLbkbmQ3RHu7MXEqZawYWMEeiCpA2UXjB7/bsMotLcID4Ykn3AtX/6NMY+o6FxwXs X-Received: by 2002:a37:c946:: with SMTP id q67mr1183923qki.145.1544758104079; Thu, 13 Dec 2018 19:28:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544758104; cv=none; d=google.com; s=arc-20160816; b=bMvaQMlOQTDbC9VwXNBIhHzBCyI8KfU6YlJ3W9/sA3AXl2oHSPSrC5ccO3ociUuVwR vTzb1/muCS6Nkb9AFmqMaJ0MbFti01bVWHBTGnMvmIdYch3HhW2rNnCOvqnOWcfw9OLE EGgY2cRa391LA0o6WhP5DRn9CPacNxDD7BU0rNZhmSbX77gdPRAlqDoVAykfUBPGCW4G UZHw3cJwThX99S1FCwBScTU5kp/T8jVDzXNpXZdOXrnF9KmTbE3kbQXEFcyYtQ5+vnfS r94Qburo4ek2ZXvbuyxg+FwECmj2Jh/Q5OGWqKAxbH1ad2L1pYAkI1kD95wuEh04SMTl 4VHw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=NWDBLg4EJPpGo+Tg/cnkYmTbp1eugTTZ/aHQeyIz28k=; b=EgSOn2tX1IBf93noWSOa1w+tSlAnP8GQQyU0UYBRGMp6P/pOwkYd/Q65vhEEtTXl5M Vda+N3s0wyhcYcxccfIQV24krTvFoHd5DjmJY76OfhcHljk22qeMOuu2ak1JHTMiy/LN R8upz327U//4t3648VAI+1SZ92CWu8ss8TnkfDEUs3ylXvXPaukXodoQ2/1hPeX5Gw0S MoMXCBreb8Qg5X40xroTPZ1z4he+pT/mn4if43X/e39F2+5jBQIyuvSiQ5tftviB+qwc uMMb41ncZKT9YsFUC+vwX6nUNHnwavV/WaLc+6/qSTzwK24iU6x3sXv/Y/QVwCz+FORh vPWg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=jK2NvlPw; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:4864:20::344 Subject: [Qemu-devel] [PULL 11/32] tcg: Return success from patch_reloc X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This will move the assert for success from within (subroutines of) patch_reloc into the callers. It will also let new code do something different when a relocation is out of range. For the moment, all backends are trivially converted to return true. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.inc.c | 3 ++- tcg/arm/tcg-target.inc.c | 3 ++- tcg/i386/tcg-target.inc.c | 3 ++- tcg/mips/tcg-target.inc.c | 3 ++- tcg/ppc/tcg-target.inc.c | 3 ++- tcg/s390/tcg-target.inc.c | 3 ++- tcg/sparc/tcg-target.inc.c | 5 +++-- tcg/tcg.c | 8 +++++--- tcg/tci/tcg-target.inc.c | 3 ++- 9 files changed, 22 insertions(+), 12 deletions(-) -- 2.17.2 diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c index 28de0226fb..16f08c59c4 100644 --- a/tcg/aarch64/tcg-target.inc.c +++ b/tcg/aarch64/tcg-target.inc.c @@ -94,7 +94,7 @@ static inline void reloc_pc19(tcg_insn_unit *code_ptr, tcg_insn_unit *target) *code_ptr = deposit32(*code_ptr, 5, 19, offset); } -static inline void patch_reloc(tcg_insn_unit *code_ptr, int type, +static inline bool patch_reloc(tcg_insn_unit *code_ptr, int type, intptr_t value, intptr_t addend) { tcg_debug_assert(addend == 0); @@ -109,6 +109,7 @@ static inline void patch_reloc(tcg_insn_unit *code_ptr, int type, default: tcg_abort(); } + return true; } #define TCG_CT_CONST_AIMM 0x100 diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c index 1651f00281..deefa20fbf 100644 --- a/tcg/arm/tcg-target.inc.c +++ b/tcg/arm/tcg-target.inc.c @@ -193,7 +193,7 @@ static inline void reloc_pc24(tcg_insn_unit *code_ptr, tcg_insn_unit *target) *code_ptr = (*code_ptr & ~0xffffff) | (offset & 0xffffff); } -static void patch_reloc(tcg_insn_unit *code_ptr, int type, +static bool patch_reloc(tcg_insn_unit *code_ptr, int type, intptr_t value, intptr_t addend) { tcg_debug_assert(addend == 0); @@ -229,6 +229,7 @@ static void patch_reloc(tcg_insn_unit *code_ptr, int type, } else { g_assert_not_reached(); } + return true; } #define TCG_CT_CONST_ARM 0x100 diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c index 436195894b..5c88f1f36b 100644 --- a/tcg/i386/tcg-target.inc.c +++ b/tcg/i386/tcg-target.inc.c @@ -167,7 +167,7 @@ static bool have_lzcnt; static tcg_insn_unit *tb_ret_addr; -static void patch_reloc(tcg_insn_unit *code_ptr, int type, +static bool patch_reloc(tcg_insn_unit *code_ptr, int type, intptr_t value, intptr_t addend) { value += addend; @@ -191,6 +191,7 @@ static void patch_reloc(tcg_insn_unit *code_ptr, int type, default: tcg_abort(); } + return true; } #if TCG_TARGET_REG_BITS == 64 diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c index e21cb1ae28..a06ff257fa 100644 --- a/tcg/mips/tcg-target.inc.c +++ b/tcg/mips/tcg-target.inc.c @@ -168,12 +168,13 @@ static inline void reloc_26(tcg_insn_unit *pc, tcg_insn_unit *target) *pc = deposit32(*pc, 0, 26, reloc_26_val(pc, target)); } -static void patch_reloc(tcg_insn_unit *code_ptr, int type, +static bool patch_reloc(tcg_insn_unit *code_ptr, int type, intptr_t value, intptr_t addend) { tcg_debug_assert(type == R_MIPS_PC16); tcg_debug_assert(addend == 0); reloc_pc16(code_ptr, (tcg_insn_unit *)value); + return true; } #define TCG_CT_CONST_ZERO 0x100 diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c index 2e2a22f579..860b0d36e1 100644 --- a/tcg/ppc/tcg-target.inc.c +++ b/tcg/ppc/tcg-target.inc.c @@ -513,7 +513,7 @@ static const uint32_t tcg_to_isel[] = { [TCG_COND_GTU] = ISEL | BC_(7, CR_GT), }; -static void patch_reloc(tcg_insn_unit *code_ptr, int type, +static bool patch_reloc(tcg_insn_unit *code_ptr, int type, intptr_t value, intptr_t addend) { tcg_insn_unit *target; @@ -548,6 +548,7 @@ static void patch_reloc(tcg_insn_unit *code_ptr, int type, default: g_assert_not_reached(); } + return true; } static void tcg_out_mem_long(TCGContext *s, int opi, int opx, TCGReg rt, diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-target.inc.c index 96c344142e..68a4c60394 100644 --- a/tcg/s390/tcg-target.inc.c +++ b/tcg/s390/tcg-target.inc.c @@ -366,7 +366,7 @@ static void * const qemu_st_helpers[16] = { static tcg_insn_unit *tb_ret_addr; uint64_t s390_facilities; -static void patch_reloc(tcg_insn_unit *code_ptr, int type, +static bool patch_reloc(tcg_insn_unit *code_ptr, int type, intptr_t value, intptr_t addend) { intptr_t pcrel2; @@ -393,6 +393,7 @@ static void patch_reloc(tcg_insn_unit *code_ptr, int type, default: g_assert_not_reached(); } + return true; } /* parse target specific constraints */ diff --git a/tcg/sparc/tcg-target.inc.c b/tcg/sparc/tcg-target.inc.c index 671a04c54b..cadda770c4 100644 --- a/tcg/sparc/tcg-target.inc.c +++ b/tcg/sparc/tcg-target.inc.c @@ -291,7 +291,7 @@ static inline int check_fit_i32(int32_t val, unsigned int bits) # define check_fit_ptr check_fit_i32 #endif -static void patch_reloc(tcg_insn_unit *code_ptr, int type, +static bool patch_reloc(tcg_insn_unit *code_ptr, int type, intptr_t value, intptr_t addend) { uint32_t insn = *code_ptr; @@ -328,12 +328,13 @@ static void patch_reloc(tcg_insn_unit *code_ptr, int type, /* Note that we're abusing this reloc type for our own needs. */ code_ptr[0] = deposit32(code_ptr[0], 0, 22, value >> 10); code_ptr[1] = deposit32(code_ptr[1], 0, 10, value); - return; + return true; default: g_assert_not_reached(); } *code_ptr = insn; + return true; } /* parse target specific constraints */ diff --git a/tcg/tcg.c b/tcg/tcg.c index e85133ef05..54f1272187 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -66,7 +66,7 @@ static void tcg_target_init(TCGContext *s); static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode); static void tcg_target_qemu_prologue(TCGContext *s); -static void patch_reloc(tcg_insn_unit *code_ptr, int type, +static bool patch_reloc(tcg_insn_unit *code_ptr, int type, intptr_t value, intptr_t addend); /* The CIE and FDE header definitions will be common to all hosts. */ @@ -268,7 +268,8 @@ static void tcg_out_reloc(TCGContext *s, tcg_insn_unit *code_ptr, int type, /* FIXME: This may break relocations on RISC targets that modify instruction fields in place. The caller may not have written the initial value. */ - patch_reloc(code_ptr, type, l->u.value, addend); + bool ok = patch_reloc(code_ptr, type, l->u.value, addend); + tcg_debug_assert(ok); } else { /* add a new relocation entry */ r = tcg_malloc(sizeof(TCGRelocation)); @@ -288,7 +289,8 @@ static void tcg_out_label(TCGContext *s, TCGLabel *l, tcg_insn_unit *ptr) tcg_debug_assert(!l->has_value); for (r = l->u.first_reloc; r != NULL; r = r->next) { - patch_reloc(r->ptr, r->type, value, r->addend); + bool ok = patch_reloc(r->ptr, r->type, value, r->addend); + tcg_debug_assert(ok); } l->has_value = 1; diff --git a/tcg/tci/tcg-target.inc.c b/tcg/tci/tcg-target.inc.c index 62ed097254..0015a98485 100644 --- a/tcg/tci/tcg-target.inc.c +++ b/tcg/tci/tcg-target.inc.c @@ -369,7 +369,7 @@ static const char *const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { }; #endif -static void patch_reloc(tcg_insn_unit *code_ptr, int type, +static bool patch_reloc(tcg_insn_unit *code_ptr, int type, intptr_t value, intptr_t addend) { /* tcg_out_reloc always uses the same type, addend. */ @@ -381,6 +381,7 @@ static void patch_reloc(tcg_insn_unit *code_ptr, int type, } else { tcg_patch64(code_ptr, value); } + return true; } /* Parse target specific constraints. */ From patchwork Fri Dec 14 03:19:03 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153730 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1605505ljp; Thu, 13 Dec 2018 19:38:04 -0800 (PST) X-Google-Smtp-Source: AFSGD/WR4UEZab5B8cyrn02Jz3MvBoi21kiLiXjLJox2jP/w+u2f/qFJfvqHFdvHgoAbldQ43X9p X-Received: by 2002:ae9:e8d7:: with SMTP id a206mr93870qkg.317.1544758684112; Thu, 13 Dec 2018 19:38:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544758684; cv=none; d=google.com; s=arc-20160816; b=xf5qes1H7uUAzUD7Ck8jE5xfyHZog83yCj/ZuN23C8oqYT5mmeH+HQrBKqb2pJiUpX EmxBaFKL1Bvvmu9FTDIX4g8C+rxjxK517XStq1RDT5NLvGM+3x6cZ4sEZp1+hWeGcta/ lkliYF8ma9TT4XVNq/omjrXwdfX8eiCdGu0eUFDkImo+ZrO38lqOQkq1ljEdcVwJDLm9 sO5XosBW17mhyQAPMTeimP8uQXonNwg7ghITDQZfb1HWYWo4TkyDKhtCxNK17Or6xKqh JwK8c6REj442dSToe/F3+UTUNjLy5x9Wfb+1D+rH/Yj1dgCwhUTB50GnxiyLxkHHTdPu 9vhg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=b/KrQm54Hq8g9c6ylntqi8uAZ7geEAnFxKWxRn7UGwQ=; b=FBLA8tUi2oAr1jbzbNAHzwxPPb4ass5lijuMNzlJIip/877u9kOWFwM1bZWEVligzw EQR2t2YDdpRrwn4ZIFIURs7TkmXqq93B8V5fveInMDP7vK8R/ehDKwxs7YcO5/wQThxF /L6Pw4LwrNVJdyhciEumq0ds3BUA8BTWVIAMiCpzxyEv3aClBQZRR+i2TDN1YNM6oxk5 wrZXcezG4o9kjBZmoXhSY5mTWLYfbYSTbQWZa8E1s7jTVKq5XKJoz9ciMFfGBtxGUKjF rxaAD189SuDZ1fjgizmuxvJWxh5NHbxKOsNABxQvQvJEUw29dVDVHJYANeC1ahI67/Cr QFnA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="FyQ/bZLj"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:4864:20::233 Subject: [Qemu-devel] [PULL 12/32] tcg/i386: Return false on failure from patch_reloc X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.inc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.17.2 diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c index 5c88f1f36b..28192f4608 100644 --- a/tcg/i386/tcg-target.inc.c +++ b/tcg/i386/tcg-target.inc.c @@ -175,7 +175,7 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type, case R_386_PC32: value -= (uintptr_t)code_ptr; if (value != (int32_t)value) { - tcg_abort(); + return false; } /* FALLTHRU */ case R_386_32: @@ -184,7 +184,7 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type, case R_386_PC8: value -= (uintptr_t)code_ptr; if (value != (int8_t)value) { - tcg_abort(); + return false; } tcg_patch8(code_ptr, value); break; From patchwork Fri Dec 14 03:19:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153716 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1599430ljp; Thu, 13 Dec 2018 19:28:17 -0800 (PST) X-Google-Smtp-Source: AFSGD/XuQXqz2nyldkTYnNlL53I/QzDN8/c8qR16B6hsN8sVYPNbc/RbfM1CReKzq/SYMvo13dDc X-Received: by 2002:aed:2b01:: with SMTP id p1mr1238945qtd.101.1544758096945; Thu, 13 Dec 2018 19:28:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544758096; cv=none; d=google.com; s=arc-20160816; b=RMllzCyw0wKf/hWeREJoYqiI13f0eDi1ToBpqhAX4YWMzMffN3/y6q7MhSHR5nCEw9 gJGOgqa6exyarGywOYz7bITNr0DU/3YARAb+P7iTfTKldoZ68eLZI4w9a2Bzq7z0MU/5 XJ4cCkM4oqwotJnbYINEPi5eUU4Vcn5yGQdSBi+LIzKRXfjaPzJm+vgU6BwFP+dijl95 N8rRF4+U8xzwQtN78oUjS+rTuOGI5+9uxF3bo6WhP7TfsIXtZtlgMjeBEWQezuKddYcd zpYD3i1LtTuyx7LFnpr7jigWaqSd5qnvcWDuQYVBt6LFjOYV3bT5jREFCIAaFeHA6el2 ha7Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=tf1fH1QCj4h1v07jYuR/vhe6G4F8YsGZZLEPQJ0aYfc=; b=HA9l0PU7hJYzgMk3Qu5e3T03zXUuN8j0auBzUoRV4R8bKr4l0eJRIQMCkylVEc82fM SjrxMA77yQsFm6tHrDErtQvFijfjX5g+L/Q1LKEy3atqfrCKNPk1T6A/KLpFAv0ZQZZZ H0bMJ2Ze8UWiXbYaEcI4+sFwUinSV1JMey6WEvlIA5/xgKwv6Qh2NTES+zgKltsUJGZG hKWNCrbHQSVF/9YkQcoyUOFpLTsQkjlLYzdJyFqLwJCgg019gjz2KHV3r5IHr+X2psN4 gWih3wucrpiFS08uYn/43f3lHmZ7NZTZcyvTfuN90viFU18H/PhiqM4nQbZ4jrduryOv R64Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=HIX62xd2; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:4864:20::330 Subject: [Qemu-devel] [PULL 13/32] tcg/aarch64: Return false on failure from patch_reloc X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This does require an extra two checks within the slow paths to replace the assert that we're moving. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.inc.c | 37 ++++++++++++++++++++---------------- 1 file changed, 21 insertions(+), 16 deletions(-) -- 2.17.2 diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c index 16f08c59c4..0562e0aa40 100644 --- a/tcg/aarch64/tcg-target.inc.c +++ b/tcg/aarch64/tcg-target.inc.c @@ -78,20 +78,26 @@ static const int tcg_target_call_oarg_regs[1] = { #define TCG_REG_GUEST_BASE TCG_REG_X28 #endif -static inline void reloc_pc26(tcg_insn_unit *code_ptr, tcg_insn_unit *target) +static inline bool reloc_pc26(tcg_insn_unit *code_ptr, tcg_insn_unit *target) { ptrdiff_t offset = target - code_ptr; - tcg_debug_assert(offset == sextract64(offset, 0, 26)); - /* read instruction, mask away previous PC_REL26 parameter contents, - set the proper offset, then write back the instruction. */ - *code_ptr = deposit32(*code_ptr, 0, 26, offset); + if (offset == sextract64(offset, 0, 26)) { + /* read instruction, mask away previous PC_REL26 parameter contents, + set the proper offset, then write back the instruction. */ + *code_ptr = deposit32(*code_ptr, 0, 26, offset); + return true; + } + return false; } -static inline void reloc_pc19(tcg_insn_unit *code_ptr, tcg_insn_unit *target) +static inline bool reloc_pc19(tcg_insn_unit *code_ptr, tcg_insn_unit *target) { ptrdiff_t offset = target - code_ptr; - tcg_debug_assert(offset == sextract64(offset, 0, 19)); - *code_ptr = deposit32(*code_ptr, 5, 19, offset); + if (offset == sextract64(offset, 0, 19)) { + *code_ptr = deposit32(*code_ptr, 5, 19, offset); + return true; + } + return false; } static inline bool patch_reloc(tcg_insn_unit *code_ptr, int type, @@ -101,15 +107,12 @@ static inline bool patch_reloc(tcg_insn_unit *code_ptr, int type, switch (type) { case R_AARCH64_JUMP26: case R_AARCH64_CALL26: - reloc_pc26(code_ptr, (tcg_insn_unit *)value); - break; + return reloc_pc26(code_ptr, (tcg_insn_unit *)value); case R_AARCH64_CONDBR19: - reloc_pc19(code_ptr, (tcg_insn_unit *)value); - break; + return reloc_pc19(code_ptr, (tcg_insn_unit *)value); default: - tcg_abort(); + g_assert_not_reached(); } - return true; } #define TCG_CT_CONST_AIMM 0x100 @@ -1387,7 +1390,8 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) TCGMemOp opc = get_memop(oi); TCGMemOp size = opc & MO_SIZE; - reloc_pc19(lb->label_ptr[0], s->code_ptr); + bool ok = reloc_pc19(lb->label_ptr[0], s->code_ptr); + tcg_debug_assert(ok); tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_X0, TCG_AREG0); tcg_out_mov(s, TARGET_LONG_BITS == 64, TCG_REG_X1, lb->addrlo_reg); @@ -1409,7 +1413,8 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) TCGMemOp opc = get_memop(oi); TCGMemOp size = opc & MO_SIZE; - reloc_pc19(lb->label_ptr[0], s->code_ptr); + bool ok = reloc_pc19(lb->label_ptr[0], s->code_ptr); + tcg_debug_assert(ok); tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_X0, TCG_AREG0); tcg_out_mov(s, TARGET_LONG_BITS == 64, TCG_REG_X1, lb->addrlo_reg); From patchwork Fri Dec 14 03:19:05 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153733 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1607050ljp; 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X-Received-From: 2607:f8b0:4864:20::234 Subject: [Qemu-devel] [PULL 14/32] tcg/arm: Return false on failure from patch_reloc X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This does require an extra two checks within the slow paths to replace the assert that we're moving. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.inc.c | 22 ++++++++++++++++------ 1 file changed, 16 insertions(+), 6 deletions(-) -- 2.17.2 diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c index deefa20fbf..49f57d655e 100644 --- a/tcg/arm/tcg-target.inc.c +++ b/tcg/arm/tcg-target.inc.c @@ -187,10 +187,14 @@ static const uint8_t tcg_cond_to_arm_cond[] = { [TCG_COND_GTU] = COND_HI, }; -static inline void reloc_pc24(tcg_insn_unit *code_ptr, tcg_insn_unit *target) +static inline bool reloc_pc24(tcg_insn_unit *code_ptr, tcg_insn_unit *target) { ptrdiff_t offset = (tcg_ptr_byte_diff(target, code_ptr) - 8) >> 2; - *code_ptr = (*code_ptr & ~0xffffff) | (offset & 0xffffff); + if (offset == sextract32(offset, 0, 24)) { + *code_ptr = (*code_ptr & ~0xffffff) | (offset & 0xffffff); + return true; + } + return false; } static bool patch_reloc(tcg_insn_unit *code_ptr, int type, @@ -199,7 +203,7 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type, tcg_debug_assert(addend == 0); if (type == R_ARM_PC24) { - reloc_pc24(code_ptr, (tcg_insn_unit *)value); + return reloc_pc24(code_ptr, (tcg_insn_unit *)value); } else if (type == R_ARM_PC13) { intptr_t diff = value - (uintptr_t)(code_ptr + 2); tcg_insn_unit insn = *code_ptr; @@ -213,7 +217,11 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type, } else { int rd = extract32(insn, 12, 4); int rt = rd == TCG_REG_PC ? TCG_REG_TMP : rd; - assert(diff >= 0x1000 && diff < 0x100000); + + if (diff < 0x1000 || diff >= 0x100000) { + return false; + } + /* add rt, pc, #high */ *code_ptr++ = ((insn & 0xf0000000) | (1 << 25) | ARITH_ADD | (TCG_REG_PC << 16) | (rt << 12) @@ -1372,7 +1380,8 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) TCGMemOp opc = get_memop(oi); void *func; - reloc_pc24(lb->label_ptr[0], s->code_ptr); + bool ok = reloc_pc24(lb->label_ptr[0], s->code_ptr); + tcg_debug_assert(ok); argreg = tcg_out_arg_reg32(s, TCG_REG_R0, TCG_AREG0); if (TARGET_LONG_BITS == 64) { @@ -1432,7 +1441,8 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) TCGMemOpIdx oi = lb->oi; TCGMemOp opc = get_memop(oi); - reloc_pc24(lb->label_ptr[0], s->code_ptr); + bool ok = reloc_pc24(lb->label_ptr[0], s->code_ptr); + tcg_debug_assert(ok); argreg = TCG_REG_R0; argreg = tcg_out_arg_reg32(s, argreg, TCG_AREG0); From patchwork Fri Dec 14 03:19:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153721 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1601235ljp; Thu, 13 Dec 2018 19:31:14 -0800 (PST) X-Google-Smtp-Source: AFSGD/V9+kcbReVB5HJiQhgc05V0s2RqNnz6ysNB2bUVCwmITphhtThcV2p47c6VyIKWN238rwjK X-Received: by 2002:a37:a483:: with SMTP id n125mr1146789qke.184.1544758273990; Thu, 13 Dec 2018 19:31:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544758273; cv=none; d=google.com; s=arc-20160816; b=kg3oOMOGLGOBLFgECedSe/UAxFSq0+fA8TnDuxaTysE+OTfisqQ182ZboUSpgyoReT itnOZ+CC5Pxw59+NHJy3KuSm6UZZJX24GrLuS6/Z6CV7+sD7prByAgEBicpz1T1/QvD3 gHjUk/5vJjNor+Ueprt5pbFexgxv0NyoT8aCPbVxFH0RDkmFKbgGq0BBwuePeEq7qRxR 5sDcJxegcW0yYan625ApwQegG0iSDhNvaUNRH+CLOJTEIrqL7HCBEIdP8x6JMKNZ4nXk s/yEwbAPzDV65LawSjDI4TuHQ9RlKJ1jE0dgs6y4+s3aRXpLrAB5KMhFrHfFYZ4ZoWf/ EmuQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=xvjP2G4QREW4vGKsLkdyqEmRLoa4L5gxnmBP6Wt9koU=; b=kpg3RV4U6iNwkaZFRyjMD9ZDj2iO8r7zJZqx9GS970pJLbVSrmfmzJ5FHl7IZcI5Zd HYD8jVRwroYjhOoqa7vnV28Q3vYVbu8t3r2/l9yZ5ide6aOHQvDm8m7fgYuarYSAJemU dOr4l179fmX9wjy8SyiLrGzIcv9RIVdjm1anDIOAA3H3KLoqI7hU+KGZBW1gd6Kq6441 5EjzLPFY0VXlzRaj2vXpvvurDiOspXu/t1133tu8Fvg1ZFF+yLSQ8qbmc+lhmJm9iDpd P/b3NImjsPskKpGJdU8tMJ1h7T0X+33F/ux4s5QBRHvfbQjuoRM2cl86/dekEFcrhogO B64g== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=M9pWvzOj; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:4864:20::233 Subject: [Qemu-devel] [PULL 15/32] tcg/ppc: Return false on failure from patch_reloc X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The reloc_pc{14,24}_val routines retain their asserts. Use these directly within the slow paths. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.inc.c | 32 +++++++++++++++++++++----------- 1 file changed, 21 insertions(+), 11 deletions(-) -- 2.17.2 diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c index 860b0d36e1..8c1cfdd7ac 100644 --- a/tcg/ppc/tcg-target.inc.c +++ b/tcg/ppc/tcg-target.inc.c @@ -193,9 +193,14 @@ static uint32_t reloc_pc24_val(tcg_insn_unit *pc, tcg_insn_unit *target) return disp & 0x3fffffc; } -static void reloc_pc24(tcg_insn_unit *pc, tcg_insn_unit *target) +static bool reloc_pc24(tcg_insn_unit *pc, tcg_insn_unit *target) { - *pc = (*pc & ~0x3fffffc) | reloc_pc24_val(pc, target); + ptrdiff_t disp = tcg_ptr_byte_diff(target, pc); + if (in_range_b(disp)) { + *pc = (*pc & ~0x3fffffc) | (disp & 0x3fffffc); + return true; + } + return false; } static uint16_t reloc_pc14_val(tcg_insn_unit *pc, tcg_insn_unit *target) @@ -205,9 +210,14 @@ static uint16_t reloc_pc14_val(tcg_insn_unit *pc, tcg_insn_unit *target) return disp & 0xfffc; } -static void reloc_pc14(tcg_insn_unit *pc, tcg_insn_unit *target) +static bool reloc_pc14(tcg_insn_unit *pc, tcg_insn_unit *target) { - *pc = (*pc & ~0xfffc) | reloc_pc14_val(pc, target); + ptrdiff_t disp = tcg_ptr_byte_diff(target, pc); + if (disp == (int16_t) disp) { + *pc = (*pc & ~0xfffc) | (disp & 0xfffc); + return true; + } + return false; } /* parse target specific constraints */ @@ -524,11 +534,9 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type, switch (type) { case R_PPC_REL14: - reloc_pc14(code_ptr, target); - break; + return reloc_pc14(code_ptr, target); case R_PPC_REL24: - reloc_pc24(code_ptr, target); - break; + return reloc_pc24(code_ptr, target); case R_PPC_ADDR16: /* We are abusing this relocation type. This points to a pair of insns, addis + load. If the displacement is small, we @@ -540,7 +548,9 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type, } else { int16_t lo = value; int hi = value - lo; - assert(hi + lo == value); + if (hi + lo != value) { + return false; + } code_ptr[0] = deposit32(code_ptr[0], 0, 16, hi >> 16); code_ptr[1] = deposit32(code_ptr[1], 0, 16, lo); } @@ -1638,7 +1648,7 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) TCGMemOp opc = get_memop(oi); TCGReg hi, lo, arg = TCG_REG_R3; - reloc_pc14(lb->label_ptr[0], s->code_ptr); + **lb->label_ptr |= reloc_pc14_val(*lb->label_ptr, s->code_ptr); tcg_out_mov(s, TCG_TYPE_PTR, arg++, TCG_AREG0); @@ -1683,7 +1693,7 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) TCGMemOp s_bits = opc & MO_SIZE; TCGReg hi, lo, arg = TCG_REG_R3; - reloc_pc14(lb->label_ptr[0], s->code_ptr); + **lb->label_ptr |= reloc_pc14_val(*lb->label_ptr, s->code_ptr); tcg_out_mov(s, TCG_TYPE_PTR, arg++, TCG_AREG0); From patchwork Fri Dec 14 03:19:07 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153725 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1603474ljp; Thu, 13 Dec 2018 19:34:47 -0800 (PST) X-Google-Smtp-Source: AFSGD/Xo9h8HKYJl5SpJT4e0UoukrQgvL/5i5fua0V1AJDTQPLnDGX4Tuq5NXxAsivYe4sH/2z4k X-Received: by 2002:ac8:fd4:: with SMTP id f20mr1307874qtk.63.1544758487457; Thu, 13 Dec 2018 19:34:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544758487; cv=none; d=google.com; s=arc-20160816; b=ajwGvNNPMaMPdOTmJMh8xqGmIUq6qhmCyZkoD2zxbztCKHntGH42TfhuGlYhbNd037 dE127P0Xr2o61KaSsssnPLZX9stvh7GqCXmsG/0a8Hu0LnFENc2d6EtQRa2CjBJqNcW1 NqRCsW/t3dg2bPJWuw1GCfd25ctAEsjWHlF9wvhzrSLarpntUDaDx1JLxd+zI9yrTKou q+IRDwdvRw7q/hVgvCJOC/OxDbxuj0W6Cm79nvF7H4lHg5HuN9elTqCS3fRwFDpK2zQi kSv1mcOU+gFG0yLcgVEj2ZKxCU+jWv2KbJgoMCdhrKWD/EhHKV6HJ5iWm6QZJ2TbK4Z/ yW1w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=ROFG7TZHTA0dfs36r/Nwv/zpP8/0UI1AqpPTTpG4eqc=; b=DhX0FoCHPAZxXh9Q10csHUS61dcJFVFOYsnpvpBNL5i2OdlMO8b16osRlE0lbB16Fg 2CterH9p5If9RxQI4ezDGINm2FOkYBwFrOXVGK+uFO4bn7Kp5MJssK7kzieAIzAnyjrs 1IMr87TeguxwXHI2cAxRELWZN4MlZcSCI7KZHMkh/pRyl/Fb8/uAWDpZX2es1ZUWewsh cdRB/TcBiPF3D3LroizbfyNUDuVsOuOrp/lWPMQmA75DgOM00g+/Uo7pG6KmP9ogun8i crfVA7tBH4UoJflAWvgxzwmq6dba8dm27c99MvqO39Z99ypyw8f1DSIpELDISG5h/m9c OFSQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=ZKkFHlI3; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:4864:20::229 Subject: [Qemu-devel] [PULL 16/32] tcg/s390x: Return false on failure from patch_reloc X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This does require an extra two checks within the slow paths to replace the assert that we're moving. Also add two checks within existing functions that lacked any kind of assert for out of range branch. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- tcg/s390/tcg-target.inc.c | 34 +++++++++++++++++++++++----------- 1 file changed, 23 insertions(+), 11 deletions(-) -- 2.17.2 diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-target.inc.c index 68a4c60394..39ecf609a1 100644 --- a/tcg/s390/tcg-target.inc.c +++ b/tcg/s390/tcg-target.inc.c @@ -377,23 +377,29 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type, switch (type) { case R_390_PC16DBL: - assert(pcrel2 == (int16_t)pcrel2); - tcg_patch16(code_ptr, pcrel2); + if (pcrel2 == (int16_t)pcrel2) { + tcg_patch16(code_ptr, pcrel2); + return true; + } break; case R_390_PC32DBL: - assert(pcrel2 == (int32_t)pcrel2); - tcg_patch32(code_ptr, pcrel2); + if (pcrel2 == (int32_t)pcrel2) { + tcg_patch32(code_ptr, pcrel2); + return true; + } break; case R_390_20: - assert(value == sextract64(value, 0, 20)); - old = *(uint32_t *)code_ptr & 0xf00000ff; - old |= ((value & 0xfff) << 16) | ((value & 0xff000) >> 4); - tcg_patch32(code_ptr, old); + if (value == sextract64(value, 0, 20)) { + old = *(uint32_t *)code_ptr & 0xf00000ff; + old |= ((value & 0xfff) << 16) | ((value & 0xff000) >> 4); + tcg_patch32(code_ptr, old); + return true; + } break; default: g_assert_not_reached(); } - return true; + return false; } /* parse target specific constraints */ @@ -1334,6 +1340,7 @@ static void tgen_compare_branch(TCGContext *s, S390Opcode opc, int cc, if (l->has_value) { off = l->u.value_ptr - s->code_ptr; + tcg_debug_assert(off == (int16_t)off); } else { tcg_out_reloc(s, s->code_ptr + 1, R_390_PC16DBL, l, 2); } @@ -1350,6 +1357,7 @@ static void tgen_compare_imm_branch(TCGContext *s, S390Opcode opc, int cc, if (l->has_value) { off = l->u.value_ptr - s->code_ptr; + tcg_debug_assert(off == (int16_t)off); } else { tcg_out_reloc(s, s->code_ptr + 1, R_390_PC16DBL, l, 2); } @@ -1615,7 +1623,9 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) TCGMemOpIdx oi = lb->oi; TCGMemOp opc = get_memop(oi); - patch_reloc(lb->label_ptr[0], R_390_PC16DBL, (intptr_t)s->code_ptr, 2); + bool ok = patch_reloc(lb->label_ptr[0], R_390_PC16DBL, + (intptr_t)s->code_ptr, 2); + tcg_debug_assert(ok); tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_R2, TCG_AREG0); if (TARGET_LONG_BITS == 64) { @@ -1636,7 +1646,9 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) TCGMemOpIdx oi = lb->oi; TCGMemOp opc = get_memop(oi); - patch_reloc(lb->label_ptr[0], R_390_PC16DBL, (intptr_t)s->code_ptr, 2); + bool ok = patch_reloc(lb->label_ptr[0], R_390_PC16DBL, + (intptr_t)s->code_ptr, 2); + tcg_debug_assert(ok); tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_R2, TCG_AREG0); if (TARGET_LONG_BITS == 64) { From patchwork Fri Dec 14 03:19:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153714 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1599390ljp; Thu, 13 Dec 2018 19:28:11 -0800 (PST) X-Google-Smtp-Source: AFSGD/Xs6OGNgOr2O0b7JElxyKregCB9hEOP57VF5rMC2cA+qVbZSpHx38+IhtAc7qxgScP9Hfqo X-Received: by 2002:a0c:872a:: with SMTP id 39mr1256597qvh.1.1544758091488; Thu, 13 Dec 2018 19:28:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544758091; cv=none; d=google.com; s=arc-20160816; b=Zv1rQjDOp7+SKDhvmwueQ1qf9mNAZvb4vbpMHx+L/GFDLBy4phnhbYO+67z8Xl2KRe JDJwY15/D0ZI7Ehw+lrLBD+b95wtb4PzNjA8FtGAFsmX9VwlAPouWz55ffQtsX2JujjJ ioZVQxGEEM0UgknBMmviDlkABDxdPLXpH0EmIQu13fDX9y4LJvTd2zdKZT1sjtK5F1Zy mv/neyaMGhLoqV9r61mtyOStBU4uXbdzQ5Gm//6m1SeiuBywdpK9UtFJlRWPx6NzDKTX D5PPshcoQAX4GcjlEQtJ2i+7fLKSPYZjrP+9andaVcHRVt6YLhNoN29Z0GBT+EDEQQeW pWKQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=CtqIyel2tpyuO1DikJ2tmjkdO7bVPfOV4BgRU7p4jzw=; b=OGEbCiN4xRwMu1a14WybbshhQKlSatz37Tv1oSvkwj+U7rk+zucFQMJPhI/QpcryNv 3opznee+gXkyan3P+Uv1rDcKGQ5iPFO/DkCnHCDawZFbOef32MZ7UUucj5EzDHX0SOtH oihyRQd8Si+SoilhrtJiG122yOu39K5aQdVbNZqKkJDLf4UIetuTwWK5DZa0ONIJD+6j UzjqV6edHkM/Ths8RYPyGZA0PotMjQNaBx3eXOcl2khqFna6Hiw71WO4Pfklj3KIvJRd PObXsSduAw51PRHJnl7JowlUSlyA0nZTWVNTgFJTNTS5yXJ9+SIF0LBiU508gg2gmh/Z j3VA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=LpCzDysW; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:4864:20::32b Subject: [Qemu-devel] [PULL 17/32] tcg/i386: Propagate is64 to tcg_out_qemu_ld_direct X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This helps preserve the invariant that all TCG_TYPE_I32 values are stored zero-extended in the 64-bit host registers. Reviewed-by: Emilio G. Cota Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.inc.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) -- 2.17.2 diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c index 28192f4608..6bf4f84b20 100644 --- a/tcg/i386/tcg-target.inc.c +++ b/tcg/i386/tcg-target.inc.c @@ -1883,10 +1883,11 @@ static inline void setup_guest_base_seg(void) { } static void tcg_out_qemu_ld_direct(TCGContext *s, TCGReg datalo, TCGReg datahi, TCGReg base, int index, intptr_t ofs, - int seg, TCGMemOp memop) + int seg, bool is64, TCGMemOp memop) { const TCGMemOp real_bswap = memop & MO_BSWAP; TCGMemOp bswap = real_bswap; + int rexw = is64 * P_REXW; int movop = OPC_MOVL_GvEv; if (have_movbe && real_bswap) { @@ -1900,7 +1901,7 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, TCGReg datalo, TCGReg datahi, base, index, 0, ofs); break; case MO_SB: - tcg_out_modrm_sib_offset(s, OPC_MOVSBL + P_REXW + seg, datalo, + tcg_out_modrm_sib_offset(s, OPC_MOVSBL + rexw + seg, datalo, base, index, 0, ofs); break; case MO_UW: @@ -1920,9 +1921,9 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, TCGReg datalo, TCGReg datahi, base, index, 0, ofs); tcg_out_rolw_8(s, datalo); } - tcg_out_modrm(s, OPC_MOVSWL + P_REXW, datalo, datalo); + tcg_out_modrm(s, OPC_MOVSWL + rexw, datalo, datalo); } else { - tcg_out_modrm_sib_offset(s, OPC_MOVSWL + P_REXW + seg, + tcg_out_modrm_sib_offset(s, OPC_MOVSWL + rexw + seg, datalo, base, index, 0, ofs); } break; @@ -2010,7 +2011,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64) label_ptr, offsetof(CPUTLBEntry, addr_read)); /* TLB Hit. */ - tcg_out_qemu_ld_direct(s, datalo, datahi, TCG_REG_L1, -1, 0, 0, opc); + tcg_out_qemu_ld_direct(s, datalo, datahi, TCG_REG_L1, -1, 0, 0, is64, opc); /* Record the current context of a load into ldst label */ add_qemu_ldst_label(s, true, oi, datalo, datahi, addrlo, addrhi, @@ -2045,7 +2046,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64) } tcg_out_qemu_ld_direct(s, datalo, datahi, - base, index, offset, seg, opc); + base, index, offset, seg, is64, opc); } #endif } From patchwork Fri Dec 14 03:19:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153726 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1603830ljp; Thu, 13 Dec 2018 19:35:17 -0800 (PST) X-Google-Smtp-Source: AFSGD/VbNzqgiYWJX/DEr13aCxiKGVuZg+EMQkSOu07fsSBfYIseJXXp8HDkcXlb7OdWp5Z98qVZ X-Received: by 2002:a0c:f74c:: with SMTP id e12mr1316608qvo.26.1544758517693; Thu, 13 Dec 2018 19:35:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544758517; cv=none; d=google.com; s=arc-20160816; b=0629Xbdo/RZNY/CO1BZefXRFECgeIPW+e9byrlHVALrkETCdpEQPjKM0zzODWn1kUY lnWMAofTADFWsu/sW0X9TNm6+ZCmAPrNY2XONgmAjbUrjYPDb4rpNMhOxGRcMEbZYSXO b0Hht0KrBQN1m0auJLNeLhiDc12sEMjjC0lhEAjPhUyFfDy56tFN7Pucl5E7RIIn/Zxq /zrXmg2zLI3/wi1C40cQlKtXv9ONZR0McNW0p5aTw7O8SDuF20hIru/jFIPMlMLIXrOF a9TMHrU8Ahv5yDY9LTkYGNheoGgboIjlHEq67/EBO+g4Y9B9RKHamIQ44STYhnrpA7Ey qy7Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=6mHwjj2JnZ4j8BKSV9ucEb9kxOPPQx5bB8d1Hiuehjc=; b=M2dNopxeoAkD03RTsgHC2lv98kt9FeTTN0leQTyTcCs5I/9A8KPA5S/lA95eVOiG/X U3pyfJ+BcGUdtj9kajZ97NYnHfKLgwg0t0F44eSJFTGWJI3DINP7+3lM99O+2x0BQVlh BCx/L+ifYRkaStoBzdsy26kseis2uCr6D0b1xS2mTadDCZlVfDVHA6u2eJAIX6F+ijO8 qKYb3pcfof/girRPtefErf6PM2/cuC5UsSxV+QKbo38vzV4ITFOSg7j3sBt/3l+3qLjL gRndJXbvgOKdEZ0xXTOu76uw9KHYagW8jwUMK1ZR7SMHcjl1tRcZ/NPitH5ZEDzJeBK5 hbGg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="Yl/dJUBH"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:4864:20::22c Subject: [Qemu-devel] [PULL 18/32] tcg/i386: Propagate is64 to tcg_out_qemu_ld_slow_path X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This helps preserve the invariant that all TCG_TYPE_I32 values are stored zero-extended in the 64-bit host registers. Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.inc.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) -- 2.17.2 diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c index 6bf4f84b20..695b406b4e 100644 --- a/tcg/i386/tcg-target.inc.c +++ b/tcg/i386/tcg-target.inc.c @@ -1692,7 +1692,8 @@ static inline void tcg_out_tlb_load(TCGContext *s, TCGReg addrlo, TCGReg addrhi, * Record the context of a call to the out of line helper code for the slow path * for a load or store, so that we can later generate the correct helper code */ -static void add_qemu_ldst_label(TCGContext *s, bool is_ld, TCGMemOpIdx oi, +static void add_qemu_ldst_label(TCGContext *s, bool is_ld, bool is_64, + TCGMemOpIdx oi, TCGReg datalo, TCGReg datahi, TCGReg addrlo, TCGReg addrhi, tcg_insn_unit *raddr, @@ -1702,6 +1703,7 @@ static void add_qemu_ldst_label(TCGContext *s, bool is_ld, TCGMemOpIdx oi, label->is_ld = is_ld; label->oi = oi; + label->type = is_64 ? TCG_TYPE_I64 : TCG_TYPE_I32; label->datalo_reg = datalo; label->datahi_reg = datahi; label->addrlo_reg = addrlo; @@ -1722,6 +1724,7 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l) TCGMemOp opc = get_memop(oi); TCGReg data_reg; tcg_insn_unit **label_ptr = &l->label_ptr[0]; + int rexw = (l->type == TCG_TYPE_I64 ? P_REXW : 0); /* resolve label address */ tcg_patch32(label_ptr[0], s->code_ptr - label_ptr[0] - 4); @@ -1760,10 +1763,10 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l) data_reg = l->datalo_reg; switch (opc & MO_SSIZE) { case MO_SB: - tcg_out_ext8s(s, data_reg, TCG_REG_EAX, P_REXW); + tcg_out_ext8s(s, data_reg, TCG_REG_EAX, rexw); break; case MO_SW: - tcg_out_ext16s(s, data_reg, TCG_REG_EAX, P_REXW); + tcg_out_ext16s(s, data_reg, TCG_REG_EAX, rexw); break; #if TCG_TARGET_REG_BITS == 64 case MO_SL: @@ -2014,7 +2017,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64) tcg_out_qemu_ld_direct(s, datalo, datahi, TCG_REG_L1, -1, 0, 0, is64, opc); /* Record the current context of a load into ldst label */ - add_qemu_ldst_label(s, true, oi, datalo, datahi, addrlo, addrhi, + add_qemu_ldst_label(s, true, is64, oi, datalo, datahi, addrlo, addrhi, s->code_ptr, label_ptr); #else { @@ -2154,7 +2157,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64) tcg_out_qemu_st_direct(s, datalo, datahi, TCG_REG_L1, 0, 0, opc); /* Record the current context of a store into ldst label */ - add_qemu_ldst_label(s, false, oi, datalo, datahi, addrlo, addrhi, + add_qemu_ldst_label(s, false, is64, oi, datalo, datahi, addrlo, addrhi, s->code_ptr, label_ptr); #else { From patchwork Fri Dec 14 03:19:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153720 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1601077ljp; Thu, 13 Dec 2018 19:30:59 -0800 (PST) X-Google-Smtp-Source: AFSGD/VjYIhqAFqWMxJX1nZauiKolp5BUgdi0p3hrB76w0rp6+0doMQPCKvJc1DsGauQZtKXXVjy X-Received: by 2002:aed:3ae4:: with SMTP id o91mr1261578qte.251.1544758259433; Thu, 13 Dec 2018 19:30:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544758259; cv=none; d=google.com; s=arc-20160816; b=AGqs6u5S/rySdxtUi1MHogGAHRWBGiQSaj/Gc3lAeoII5CJzMl9v5Urcs7TouNcoa3 RsWFDCzRlQDaALwLvxODdW+ceX1eSvlPGcU8Jh+/hXYusI7DX+wsecMFab8UGQE3Ub8D kZvAdEjhkZKWrn11PBrmTNPBVO1uBBsS/Gq9SuWXPLNcBO5yCjh6dx5D6D+WiiHDQ6Nt T7SN0lJkIAyNJOQQ0W1kWo6+AZS8P3wB+QucSNBi4yvMqgw9OvTOPT7G69OuavzNsIbZ UgDUIJQWyLSusl0IgPJXKxG/52NuTjBsY8lstAAVvoHYay7lqoECjPxW5Ckv0q6WaZJY docA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=BAbxztkWwjj+pjyiBgJ/SLhSHcB8sxV7SOKltc0srtM=; b=mmrkXctfX0dkjeeq2FvVv0Syp+TxCcLGQIVmmg8Xg4ADH21/24kNx2ExwQ5mWc9lVG A5I1KVmoF3bEQ0DZXqxICfsolvkaH5/WadPf5bUkAIXZESzK0kf3SGW3Ur9bHMI/Thsn 98hZajLRiNOcRCf3o6pJYMbf6K02kXpT5vMauOfdBvww/5O6yChRQ52vI5H47ZLSx9It KfEQBFKJhDczFapLW7BQspE/VvTyqu5N5uQU+6nJtU/tiq3usbyInr/NIew5u/yFg9by A2cTj6Fk6AWu9TZ/fnlhImgEucjblQeTXBkBfOivtu8aOpPRvAYofaM2tyWbQZTHMIlG GUPg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=WTJch88P; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:4864:20::22a Subject: [Qemu-devel] [PULL 19/32] tcg/i386: Implement INDEX_op_extr{lh}_i64_i32 for 32-bit guests X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This preserves the invariant that all TCG_TYPE_I32 values are zero-extended in the 64-bit host register. Reviewed-by: Emilio G. Cota Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.h | 5 +++-- tcg/i386/tcg-target.inc.c | 6 ++++++ 2 files changed, 9 insertions(+), 2 deletions(-) -- 2.17.2 diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h index 2441658865..c523d5f5e1 100644 --- a/tcg/i386/tcg-target.h +++ b/tcg/i386/tcg-target.h @@ -135,8 +135,9 @@ extern bool have_avx2; #define TCG_TARGET_HAS_direct_jump 1 #if TCG_TARGET_REG_BITS == 64 -#define TCG_TARGET_HAS_extrl_i64_i32 0 -#define TCG_TARGET_HAS_extrh_i64_i32 0 +/* Keep target addresses zero-extended in a register. */ +#define TCG_TARGET_HAS_extrl_i64_i32 (TARGET_LONG_BITS == 32) +#define TCG_TARGET_HAS_extrh_i64_i32 (TARGET_LONG_BITS == 32) #define TCG_TARGET_HAS_div2_i64 1 #define TCG_TARGET_HAS_rot_i64 1 #define TCG_TARGET_HAS_ext8s_i64 1 diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c index 695b406b4e..fe864e9ef9 100644 --- a/tcg/i386/tcg-target.inc.c +++ b/tcg/i386/tcg-target.inc.c @@ -2549,12 +2549,16 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, break; case INDEX_op_extu_i32_i64: case INDEX_op_ext32u_i64: + case INDEX_op_extrl_i64_i32: tcg_out_ext32u(s, a0, a1); break; case INDEX_op_ext_i32_i64: case INDEX_op_ext32s_i64: tcg_out_ext32s(s, a0, a1); break; + case INDEX_op_extrh_i64_i32: + tcg_out_shifti(s, SHIFT_SHR + P_REXW, a0, 32); + break; #endif OP_32_64(deposit): @@ -2918,6 +2922,7 @@ static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op) case INDEX_op_neg_i64: case INDEX_op_not_i32: case INDEX_op_not_i64: + case INDEX_op_extrh_i64_i32: return &r_0; case INDEX_op_ext8s_i32: @@ -2933,6 +2938,7 @@ static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op) case INDEX_op_ext32u_i64: case INDEX_op_ext_i32_i64: case INDEX_op_extu_i32_i64: + case INDEX_op_extrl_i64_i32: case INDEX_op_extract_i32: case INDEX_op_extract_i64: case INDEX_op_sextract_i32: From patchwork Fri Dec 14 03:19:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153724 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1603367ljp; Thu, 13 Dec 2018 19:34:39 -0800 (PST) X-Google-Smtp-Source: AFSGD/VBQBGnfXic51RVLQFfNbg49UDlEIHRq/uXPJZMWwS9dKJUlIi/M7K1IUEkNU9elrgosrvL X-Received: by 2002:ac8:1185:: with SMTP id d5mr1283296qtj.117.1544758478971; Thu, 13 Dec 2018 19:34:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544758478; cv=none; d=google.com; s=arc-20160816; b=gVVkr6ugf1EXMa6vwCEfERStGl6spXfP2UF9gOmBiD4ZDrIZfC5lLnz9bgP0K0UOkC u27hjGf5I6MxjS/4IYpPmx+sJE6TWrz55I01UgZvwtWqVouAGOaWppjROBLfOHFwF1t4 4o4kqe4wa8Pxk3dBuuxlheJbyXqTuLZwE6XsWsbiXxN+EyQkIFVVZweMkrGyO/SFHR/+ iWJhUkot+fP8riL/VEX8Qp8AHmzyH2Zpaee9Lb0Mo8GYUJ436RPRUDKbTI2DjfsiAXTY jbiHzKIkwx9Klu1Nthn4TjATZc8KypfCv9Ke820Zal7Mdxid3CqtuHPhrjrxsmEFqHuY 3sUg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=pslDJhZOs3HENdfCbus0Q6EEJ68zjJFPdZYdmDq28Gs=; b=EKQUeQFjW80X47OLwKQSo0SuMKHvonBZj4TBrsNMIdOslWNYXu4TN0v3VuGnFUO/hA 5HqFEE2crVUloMWc36NRtNpFgX51/BLDiBeOYtIHL8cj1dgVaOCqpx88sfESQYocZuiu ocaBJMO1gaNCnudg8I9tA6Qthw+Hy4xmXQ2Q2ukBN4RUxi/tfFCPg/revtwdRAqVCAZe snIR8bGgA5Y81732MvyEs4QzOAFf7PJRUiysQjzPigg1AVsda+SYXjVr0Dhhq95qFGe9 nLnRmVXQk+Lm9YM/V0WoT1YGVjwtavkXf6fHk2Pd1hTm2G1R9COrJUniuGnal9U+MYUA 1pCg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=RYAJhD93; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:4864:20::22e Subject: [Qemu-devel] [PULL 20/32] tcg/i386: Assume 32-bit values are zero-extended X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We now have an invariant that all TCG_TYPE_I32 values are zero-extended, which means that we do not need to extend them again during qemu_ld/st, either explicitly via a separate tcg_out_ext32u or implicitly via P_ADDR32. Reviewed-by: Emilio G. Cota Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.inc.c | 103 +++++++++++++++----------------------- 1 file changed, 40 insertions(+), 63 deletions(-) -- 2.17.2 diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c index fe864e9ef9..f7b548545a 100644 --- a/tcg/i386/tcg-target.inc.c +++ b/tcg/i386/tcg-target.inc.c @@ -309,13 +309,11 @@ static inline int tcg_target_const_match(tcg_target_long val, TCGType type, #define P_EXT38 0x200 /* 0x0f 0x38 opcode prefix */ #define P_DATA16 0x400 /* 0x66 opcode prefix */ #if TCG_TARGET_REG_BITS == 64 -# define P_ADDR32 0x800 /* 0x67 opcode prefix */ # define P_REXW 0x1000 /* Set REX.W = 1 */ # define P_REXB_R 0x2000 /* REG field as byte register */ # define P_REXB_RM 0x4000 /* R/M field as byte register */ # define P_GS 0x8000 /* gs segment override */ #else -# define P_ADDR32 0 # define P_REXW 0 # define P_REXB_R 0 # define P_REXB_RM 0 @@ -528,9 +526,6 @@ static void tcg_out_opc(TCGContext *s, int opc, int r, int rm, int x) tcg_debug_assert((opc & P_REXW) == 0); tcg_out8(s, 0x66); } - if (opc & P_ADDR32) { - tcg_out8(s, 0x67); - } if (opc & P_SIMDF3) { tcg_out8(s, 0xf3); } else if (opc & P_SIMDF2) { @@ -1659,11 +1654,7 @@ static inline void tcg_out_tlb_load(TCGContext *s, TCGReg addrlo, TCGReg addrhi, tcg_out_modrm_offset(s, OPC_CMP_GvEv + trexw, r1, r0, 0); /* Prepare for both the fast path add of the tlb addend, and the slow - path function argument setup. There are two cases worth note: - For 32-bit guest and x86_64 host, MOVL zero-extends the guest address - before the fastpath ADDQ below. For 64-bit guest and x32 host, MOVQ - copies the entire guest address for the slow path, while truncation - for the 32-bit host happens with the fastpath ADDL below. */ + path function argument setup. */ tcg_out_mov(s, ttype, r1, addrlo); /* jne slow_path */ @@ -2022,41 +2013,31 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64) #else { int32_t offset = guest_base; - TCGReg base = addrlo; int index = -1; int seg = 0; - /* For a 32-bit guest, the high 32 bits may contain garbage. - We can do this with the ADDR32 prefix if we're not using - a guest base, or when using segmentation. Otherwise we - need to zero-extend manually. */ + /* + * Recall we store 32-bit values zero-extended. No need for + * further manual extension or an addr32 (0x67) prefix. + */ if (guest_base == 0 || guest_base_flags) { seg = guest_base_flags; offset = 0; - if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) { - seg |= P_ADDR32; - } - } else if (TCG_TARGET_REG_BITS == 64) { - if (TARGET_LONG_BITS == 32) { - tcg_out_ext32u(s, TCG_REG_L0, base); - base = TCG_REG_L0; - } - if (offset != guest_base) { - tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_L1, guest_base); - index = TCG_REG_L1; - offset = 0; - } + } else if (TCG_TARGET_REG_BITS == 64 && offset != guest_base) { + tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_L1, guest_base); + index = TCG_REG_L1; + offset = 0; } tcg_out_qemu_ld_direct(s, datalo, datahi, - base, index, offset, seg, is64, opc); + addrlo, index, offset, seg, is64, opc); } #endif } static void tcg_out_qemu_st_direct(TCGContext *s, TCGReg datalo, TCGReg datahi, - TCGReg base, intptr_t ofs, int seg, - TCGMemOp memop) + TCGReg base, int index, intptr_t ofs, + int seg, TCGMemOp memop) { /* ??? Ideally we wouldn't need a scratch register. For user-only, we could perform the bswap twice to restore the original value @@ -2080,8 +2061,8 @@ static void tcg_out_qemu_st_direct(TCGContext *s, TCGReg datalo, TCGReg datahi, tcg_out_mov(s, TCG_TYPE_I32, scratch, datalo); datalo = scratch; } - tcg_out_modrm_offset(s, OPC_MOVB_EvGv + P_REXB_R + seg, - datalo, base, ofs); + tcg_out_modrm_sib_offset(s, OPC_MOVB_EvGv + P_REXB_R + seg, + datalo, base, index, 0, ofs); break; case MO_16: if (bswap) { @@ -2089,7 +2070,8 @@ static void tcg_out_qemu_st_direct(TCGContext *s, TCGReg datalo, TCGReg datahi, tcg_out_rolw_8(s, scratch); datalo = scratch; } - tcg_out_modrm_offset(s, movop + P_DATA16 + seg, datalo, base, ofs); + tcg_out_modrm_sib_offset(s, movop + P_DATA16 + seg, datalo, + base, index, 0, ofs); break; case MO_32: if (bswap) { @@ -2097,7 +2079,7 @@ static void tcg_out_qemu_st_direct(TCGContext *s, TCGReg datalo, TCGReg datahi, tcg_out_bswap32(s, scratch); datalo = scratch; } - tcg_out_modrm_offset(s, movop + seg, datalo, base, ofs); + tcg_out_modrm_sib_offset(s, movop + seg, datalo, base, index, 0, ofs); break; case MO_64: if (TCG_TARGET_REG_BITS == 64) { @@ -2106,22 +2088,27 @@ static void tcg_out_qemu_st_direct(TCGContext *s, TCGReg datalo, TCGReg datahi, tcg_out_bswap64(s, scratch); datalo = scratch; } - tcg_out_modrm_offset(s, movop + P_REXW + seg, datalo, base, ofs); + tcg_out_modrm_sib_offset(s, movop + P_REXW + seg, datalo, + base, index, 0, ofs); } else if (bswap) { tcg_out_mov(s, TCG_TYPE_I32, scratch, datahi); tcg_out_bswap32(s, scratch); - tcg_out_modrm_offset(s, OPC_MOVL_EvGv + seg, scratch, base, ofs); + tcg_out_modrm_sib_offset(s, OPC_MOVL_EvGv + seg, scratch, + base, index, 0, ofs); tcg_out_mov(s, TCG_TYPE_I32, scratch, datalo); tcg_out_bswap32(s, scratch); - tcg_out_modrm_offset(s, OPC_MOVL_EvGv + seg, scratch, base, ofs+4); + tcg_out_modrm_sib_offset(s, OPC_MOVL_EvGv + seg, scratch, + base, index, 0, ofs + 4); } else { if (real_bswap) { int t = datalo; datalo = datahi; datahi = t; } - tcg_out_modrm_offset(s, movop + seg, datalo, base, ofs); - tcg_out_modrm_offset(s, movop + seg, datahi, base, ofs+4); + tcg_out_modrm_sib_offset(s, movop + seg, datalo, + base, index, 0, ofs); + tcg_out_modrm_sib_offset(s, movop + seg, datahi, + base, index, 0, ofs + 4); } break; default: @@ -2154,7 +2141,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64) label_ptr, offsetof(CPUTLBEntry, addr_write)); /* TLB Hit. */ - tcg_out_qemu_st_direct(s, datalo, datahi, TCG_REG_L1, 0, 0, opc); + tcg_out_qemu_st_direct(s, datalo, datahi, TCG_REG_L1, -1, 0, 0, opc); /* Record the current context of a store into ldst label */ add_qemu_ldst_label(s, false, is64, oi, datalo, datahi, addrlo, addrhi, @@ -2162,35 +2149,25 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64) #else { int32_t offset = guest_base; - TCGReg base = addrlo; + int index = -1; int seg = 0; - /* See comment in tcg_out_qemu_ld re zero-extension of addrlo. */ + /* + * Recall we store 32-bit values zero-extended. No need for + * further manual extension or an addr32 (0x67) prefix. + */ if (guest_base == 0 || guest_base_flags) { seg = guest_base_flags; offset = 0; - if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) { - seg |= P_ADDR32; - } - } else if (TCG_TARGET_REG_BITS == 64) { - /* ??? Note that we can't use the same SIB addressing scheme - as for loads, since we require L0 free for bswap. */ - if (offset != guest_base) { - if (TARGET_LONG_BITS == 32) { - tcg_out_ext32u(s, TCG_REG_L0, base); - base = TCG_REG_L0; - } - tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_L1, guest_base); - tgen_arithr(s, ARITH_ADD + P_REXW, TCG_REG_L1, base); - base = TCG_REG_L1; - offset = 0; - } else if (TARGET_LONG_BITS == 32) { - tcg_out_ext32u(s, TCG_REG_L1, base); - base = TCG_REG_L1; - } + } else if (TCG_TARGET_REG_BITS == 64 && offset != guest_base) { + /* ??? Note that we require L0 free for bswap. */ + tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_L1, guest_base); + index = TCG_REG_L1; + offset = 0; } - tcg_out_qemu_st_direct(s, datalo, datahi, base, offset, seg, opc); + tcg_out_qemu_st_direct(s, datalo, datahi, + addrlo, index, offset, seg, opc); } #endif } From patchwork Fri Dec 14 03:19:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153731 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1605613ljp; Thu, 13 Dec 2018 19:38:15 -0800 (PST) X-Google-Smtp-Source: AFSGD/XOqYxvY1szvab0Mh+SyCVK9Y4P1g7xRjMbbktqv2f0RjE/wjZhsyU7aUIXTPPdIVBeD0PI X-Received: by 2002:a0c:d174:: with SMTP id c49mr1229507qvh.231.1544758695395; Thu, 13 Dec 2018 19:38:15 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544758695; cv=none; d=google.com; s=arc-20160816; b=XowEzIYoAH09DV00f3sLveng9D15RWKCgZaAEM7dzJ8PZ6u5lOrmO+wCNysgmqDcHN lHvMDi7PKJxB2idctqOGv8XnWSiGT88/bdJE1qrrxaGCl3k1cjYDdb7EBjZ2bzGlswL4 zSUA3qqQYVwLliGgHnn+w7IGrh1pVVzTRwgOw0wJcT4ZIpqWm2QiaBS+MRB11Et1Zlf+ /vb4EsVv1MW7y9n1pKMbjRSY+mfjxdgH7YF5q2jDXFwOqLgpU5KtnaHIuZ+iRenrc1hS VXkGl4yTYClpYV3wUvBQu8uznFgnvhc1E1PI/YgDqJjqwymRPWRLSPagwB1PJ9iHYIsQ SxtA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=RGLha6wnqV2UoHvC7GVzmeu/KOuO36ywWoKZjz4PETE=; b=yoAyneVY3y5tj7vz6SNeNhsyB4ZoUl5V6kXDgdUECIAiUpmLNDGqrfQW2KY9/B8ty4 6VknCBhmUmX9+Ya8Izgn/R/QLLqW/DfCMMLNSoA2xqMwYBfnZjN4zt7Cj+v1/gPU5DgD g3ppn/ycGW9tcULAMe+wVTFGj1EM4qRrdV638X+N5w15vDFQDgufMi7As3jbosXDD9eh Hzc1pe9PCpDjwgCbwGhhpS2RrmJXyISVvDZZM8AimJZf3Rxcyf20IQ8MCMLQaqfXj/9o E44kL6nkOqvX9DMwohpJWnbxT0Mwk7r05Xfl7PLMP1WU+PV6Ygetjiuk/rq5u8zmRVYL BIdg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=cFdevTll; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:4864:20::229 Subject: [Qemu-devel] [PULL 21/32] tcg/i386: Precompute all guest_base parameters X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" These values are constant between all qemu_ld/st invocations; there is no need to figure this out each time. If we cannot use a segment or an offset directly for guest_base, load the value into a register in the prologue. Reviewed-by: Emilio G. Cota Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.inc.c | 101 +++++++++++++++----------------------- 1 file changed, 40 insertions(+), 61 deletions(-) -- 2.17.2 diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c index f7b548545a..3fb2f4b971 100644 --- a/tcg/i386/tcg-target.inc.c +++ b/tcg/i386/tcg-target.inc.c @@ -1857,22 +1857,31 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l) tcg_out_push(s, retaddr); tcg_out_jmp(s, qemu_st_helpers[opc & (MO_BSWAP | MO_SIZE)]); } -#elif defined(__x86_64__) && defined(__linux__) -# include -# include - +#elif TCG_TARGET_REG_BITS == 32 +# define x86_guest_base_seg 0 +# define x86_guest_base_index -1 +# define x86_guest_base_offset guest_base +#else +static int x86_guest_base_seg; +static int x86_guest_base_index = -1; +static int32_t x86_guest_base_offset; +# if defined(__x86_64__) && defined(__linux__) +# include +# include int arch_prctl(int code, unsigned long addr); - -static int guest_base_flags; -static inline void setup_guest_base_seg(void) +static inline int setup_guest_base_seg(void) { if (arch_prctl(ARCH_SET_GS, guest_base) == 0) { - guest_base_flags = P_GS; + return P_GS; } + return 0; } -#else -# define guest_base_flags 0 -static inline void setup_guest_base_seg(void) { } +# else +static inline int setup_guest_base_seg(void) +{ + return 0; +} +# endif #endif /* SOFTMMU */ static void tcg_out_qemu_ld_direct(TCGContext *s, TCGReg datalo, TCGReg datahi, @@ -2011,27 +2020,9 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64) add_qemu_ldst_label(s, true, is64, oi, datalo, datahi, addrlo, addrhi, s->code_ptr, label_ptr); #else - { - int32_t offset = guest_base; - int index = -1; - int seg = 0; - - /* - * Recall we store 32-bit values zero-extended. No need for - * further manual extension or an addr32 (0x67) prefix. - */ - if (guest_base == 0 || guest_base_flags) { - seg = guest_base_flags; - offset = 0; - } else if (TCG_TARGET_REG_BITS == 64 && offset != guest_base) { - tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_L1, guest_base); - index = TCG_REG_L1; - offset = 0; - } - - tcg_out_qemu_ld_direct(s, datalo, datahi, - addrlo, index, offset, seg, is64, opc); - } + tcg_out_qemu_ld_direct(s, datalo, datahi, addrlo, x86_guest_base_index, + x86_guest_base_offset, x86_guest_base_seg, + is64, opc); #endif } @@ -2147,28 +2138,8 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64) add_qemu_ldst_label(s, false, is64, oi, datalo, datahi, addrlo, addrhi, s->code_ptr, label_ptr); #else - { - int32_t offset = guest_base; - int index = -1; - int seg = 0; - - /* - * Recall we store 32-bit values zero-extended. No need for - * further manual extension or an addr32 (0x67) prefix. - */ - if (guest_base == 0 || guest_base_flags) { - seg = guest_base_flags; - offset = 0; - } else if (TCG_TARGET_REG_BITS == 64 && offset != guest_base) { - /* ??? Note that we require L0 free for bswap. */ - tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_L1, guest_base); - index = TCG_REG_L1; - offset = 0; - } - - tcg_out_qemu_st_direct(s, datalo, datahi, - addrlo, index, offset, seg, opc); - } + tcg_out_qemu_st_direct(s, datalo, datahi, addrlo, x86_guest_base_index, + x86_guest_base_offset, x86_guest_base_seg, opc); #endif } @@ -3415,6 +3386,21 @@ static void tcg_target_qemu_prologue(TCGContext *s) (ARRAY_SIZE(tcg_target_callee_save_regs) + 2) * 4 + stack_addend); #else +# if !defined(CONFIG_SOFTMMU) && TCG_TARGET_REG_BITS == 64 + if (guest_base) { + int seg = setup_guest_base_seg(); + if (seg != 0) { + x86_guest_base_seg = seg; + } else if (guest_base == (int32_t)guest_base) { + x86_guest_base_offset = guest_base; + } else { + /* Choose R12 because, as a base, it requires a SIB byte. */ + x86_guest_base_index = TCG_REG_R12; + tcg_out_mov(s, TCG_TYPE_PTR, x86_guest_base_index, guest_base); + tcg_regset_set_reg(s->reserved_regs, x86_guest_base_index); + } + } +# endif tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, tcg_target_call_iarg_regs[0]); tcg_out_addi(s, TCG_REG_ESP, -stack_addend); /* jmp *tb. */ @@ -3440,13 +3426,6 @@ static void tcg_target_qemu_prologue(TCGContext *s) tcg_out_pop(s, tcg_target_callee_save_regs[i]); } tcg_out_opc(s, OPC_RET, 0, 0, 0); - -#if !defined(CONFIG_SOFTMMU) - /* Try to set up a segment register to point to guest_base. */ - if (guest_base) { - setup_guest_base_seg(); - } -#endif } static void tcg_out_nop_fill(tcg_insn_unit *p, int count) From patchwork Fri Dec 14 03:19:13 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153723 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1603298ljp; Thu, 13 Dec 2018 19:34:32 -0800 (PST) X-Google-Smtp-Source: AFSGD/VdBha1bQJnV40psgeDEm/zx9CRpFgHSSYgNUaBNAvjoq3wCrGlC6dVofHsUb+BhSP190r/ X-Received: by 2002:a37:7cc5:: with SMTP id x188mr1095430qkc.307.1544758472548; Thu, 13 Dec 2018 19:34:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544758472; cv=none; d=google.com; s=arc-20160816; b=O7/RC2uZoIqaqef7tftblBj4QsFCZ96IMfY0xV3SDu6LziBaLpmx6MAbRUXB3KxaTa JBZfbR4NatN8gdDd0maW58QzEKs81TZznSG3gExobDjozliqN+cABQStNsVHWHOKQi/P wSz+yzSxx9YhVPipsgOgtIsBe2pXvF7TQdRjf2iJeaLar4Do2k66tEcOF/h1zTmaUyuU F8ynANi0Az8D4Dfe3+Ok+RE6v9A9srHG2M/U/x0xT3uJxJTWiIKswy9ZhyyZJalKAa10 sMXT4ktgFwzwdxKHOYjTe6FN8N81cRcA3JfDNZOlVU8dOFEjMIpUL2YkRCtzrZTOQ9yD 6+4A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=uVZMeAEuQkuDfx0GTso68uP/IjGxBfXPVSvp3EKoquc=; b=yCPTZNWYgLGdoItmXZlc8iZ4+vAOyQz6HggscQPZGw1H8QlGMngDvR2/Bb6P8xVBH0 lNu2ziuXeFvsw6+DMQy6BnAhNByNEFKvjVPH0lsOC8RHGjpPkCAvDNchhCxX2wa3f/lW Dly0CDeFK+gOWOD/Bxm69hmHBjYFqvzIvSxkDscNns2hQ0F2upJbGYXLdMU4txPYV7NZ inUJz8QnrCXX8LandpUkX+66EeLOtYlMkTcKXF6yvwD9wzdTg3CS8CRCkgEce+2hglQJ FTXMMtHfIRWDymG1OxO/5qvY8RWhlqWCYjC27j+YU0dZJTiCJz4iPs47BbTipVrUhszz 048g== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=IlYfe1SY; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:4864:20::22a Subject: [Qemu-devel] [PULL 22/32] tcg/i386: Add setup_guest_base_seg for FreeBSD X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Reviewed-by: Emilio G. Cota Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.inc.c | 9 +++++++++ 1 file changed, 9 insertions(+) -- 2.17.2 diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c index 3fb2f4b971..c21c3272f2 100644 --- a/tcg/i386/tcg-target.inc.c +++ b/tcg/i386/tcg-target.inc.c @@ -1876,6 +1876,15 @@ static inline int setup_guest_base_seg(void) } return 0; } +# elif defined (__FreeBSD__) || defined (__FreeBSD_kernel__) +# include +static inline int setup_guest_base_seg(void) +{ + if (sysarch(AMD64_SET_GSBASE, &guest_base) == 0) { + return P_GS; + } + return 0; +} # else static inline int setup_guest_base_seg(void) { From patchwork Fri Dec 14 03:19:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153732 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1606800ljp; Thu, 13 Dec 2018 19:40:25 -0800 (PST) X-Google-Smtp-Source: AFSGD/Xiv3sTdJftaj8o7QmYIh5RxWhoA8pfOb2KGqkZMjDuitjBo9XJq4M37Jnpvq5sz0E+WkI3 X-Received: by 2002:ae9:ed13:: with SMTP id c19mr1157286qkg.85.1544758825139; Thu, 13 Dec 2018 19:40:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544758825; cv=none; d=google.com; s=arc-20160816; b=fC6iWzOga6ruIptBJoJQTPltQxAYRjTlF9mSwsoUEcJu+pMrlYDZWoh4WhNrOnXToc ILpGFImhJ/wxtMxOk8UOGSu9BOM1Otr5myWXAjl4Vl692PPsVu2zHQFLUhcMB6H+3TsF u6njB751xvh2TLBYdwpi1QhKw36mALnKMIKVsFTr/A0LX+OSsW/7O7EzOR6WKlOxtSCO ZF6Ruj7S03A4sNkIBor9yjD6kBLZEWIdj4m3dZvjJ+GfNMYdl0skHQpYkcsCCUx2KPT1 aMvs1swx+KiZr7fa5bOus51uD44wa+IpwOjggjXbYNEKDBBrnIGe4cuwWRTeWaAtJZSl Fu6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=ZdFhnUufyrFc19z7ViZt8Wb0ZHqiPUdjffxN+QTai+8=; b=OQifk5fujkQIMu/PvhsSQASA+F6a//2Neog/gkDZVmA7DOgrE2ZKrzMCD/wz9IicOI Z2gK7XxEUvkk21RNntHIeO0qC32Ff5b4t0gKmXYHowUwJ1s/oAQZbTxSWHDwIZgARXTi 2n6CukO+smpK09OcYxs14317/fEv48PNc+c6V2mrizo8MZ0QzykyFU8zDS76UMmMXbrH uDGVyUF5vaVcboN6yVrzq5XszKh8qn73LJ2qw/Z7WpF426pRliYV5eT9lRpk//9KwAHK 87T2XSsIJ7CPRdsEFuLO5B+vq9QwNwtcZaAwHb8oOoNI0vyamYXz/7Zh6M5fs7si4K9v 1L9g== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=Ab0xZM5+; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id c198si2193264qke.267.2018.12.13.19.40.24 for (version=TLS1 cipher=AES128-SHA bits=128/128); Thu, 13 Dec 2018 19:40:25 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=Ab0xZM5+; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:59158 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gXeKu-0007Hw-Kh for patch@linaro.org; Thu, 13 Dec 2018 22:40:24 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58952) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gXe1C-0006Gd-63 for qemu-devel@nongnu.org; Thu, 13 Dec 2018 22:20:03 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gXe1B-0007fY-1q for qemu-devel@nongnu.org; Thu, 13 Dec 2018 22:20:01 -0500 Received: from mail-ot1-x32c.google.com ([2607:f8b0:4864:20::32c]:37718) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gXe18-0007KD-O1 for qemu-devel@nongnu.org; Thu, 13 Dec 2018 22:19:59 -0500 Received: by mail-ot1-x32c.google.com with SMTP id 40so4122092oth.4 for ; Thu, 13 Dec 2018 19:19:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ZdFhnUufyrFc19z7ViZt8Wb0ZHqiPUdjffxN+QTai+8=; b=Ab0xZM5+p7jt2C1eY6xTAYgj/nyCM9kJ43gpeMnw+PGQtrjCveEnR2/NHhIwy8ro35 h9PQ2d0mZaU4kjX9GmWUfq0kY1MPNjm1ShF+1OBm0+zi9VG5PDrrDC2aG9ViUeU1lzwY 89xSsgQxMyMEWeJlKwzjiAq/eLJkfaPnG72p8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ZdFhnUufyrFc19z7ViZt8Wb0ZHqiPUdjffxN+QTai+8=; b=KyOANR+T1dE54bud+YDnXGOq0dwJ8ycF9lc0+lT5npv21cEwBAdUJdX1WCiXMymriq mYRsRrf3u+qlDsdPIyEmdtCaLnHL2K1B+3rCVGNIsv6/rPZnc9Xor4Q1zc5dP+2uG4ip OrUXKEbiJ9jij4xAmOaUrJLAEHHEqtKl2GWyBIhpQr3HK1FRMbLREST/3WzXX0bxHNGs NPqRINn96i4yTd6UzAJ4Km+d63umNo+Dzx7UkhBW8hSpX+eE0CzWVRWBEadxXwB/YZAL HPoOtJOcp1TfVTlUWEDmdDfvHi1KPeAn6rJDZWuMROYz4HuUrzrdIIAx3ygEGGdRIQ3A nzAQ== X-Gm-Message-State: AA+aEWbMSqx9DOJANS+C+kjmHGS2W34aaAWvS0q5rpM8NS8oojW+CKIj OgeLJFpAhUMaYnD+gfar/OGECxNSthovHQ== X-Received: by 2002:a05:6830:1204:: with SMTP id r4mr1034296otp.101.1544757592168; Thu, 13 Dec 2018 19:19:52 -0800 (PST) Received: from cloudburst.twiddle.net ([187.217.227.243]) by smtp.gmail.com with ESMTPSA id g138sm2367537oib.26.2018.12.13.19.19.51 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 13 Dec 2018 19:19:51 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 13 Dec 2018 21:19:14 -0600 Message-Id: <20181214031923.29527-25-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181214031923.29527-1-richard.henderson@linaro.org> References: <20181214031923.29527-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::32c Subject: [Qemu-devel] [PULL 23/32] tcg: Clean up generic bswap32 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Based on the only current user, Sparc: New code uses 1 constant that takes 2 insns to create, plus 8. Old code used 2 constants that took 2 insns to create, plus 9. The result is a new total of 10 vs an old total of 13. Signed-off-by: Richard Henderson --- tcg/tcg-op.c | 54 ++++++++++++++++++++++++++-------------------------- 1 file changed, 27 insertions(+), 27 deletions(-) -- 2.17.2 diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index 7a8015c5a9..a956499e46 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -1012,22 +1012,22 @@ void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg) if (TCG_TARGET_HAS_bswap32_i32) { tcg_gen_op2_i32(INDEX_op_bswap32_i32, ret, arg); } else { - TCGv_i32 t0, t1; - t0 = tcg_temp_new_i32(); - t1 = tcg_temp_new_i32(); + TCGv_i32 t0 = tcg_temp_new_i32(); + TCGv_i32 t1 = tcg_temp_new_i32(); + TCGv_i32 t2 = tcg_const_i32(0x00ff00ff); - tcg_gen_shli_i32(t0, arg, 24); + /* arg = abcd */ + tcg_gen_shri_i32(t0, arg, 8); /* t0 = .abc */ + tcg_gen_and_i32(t1, arg, t2); /* t1 = .b.d */ + tcg_gen_and_i32(t0, t0, t2); /* t0 = .a.c */ + tcg_temp_free_i32(t2); + tcg_gen_shli_i32(t1, t1, 8); /* t1 = b.d. */ + tcg_gen_or_i32(ret, t0, t1); /* ret = badc */ - tcg_gen_andi_i32(t1, arg, 0x0000ff00); - tcg_gen_shli_i32(t1, t1, 8); - tcg_gen_or_i32(t0, t0, t1); + tcg_gen_shri_i32(t0, ret, 16); /* t0 = ..ba */ + tcg_gen_shli_i32(t1, ret, 16); /* t1 = dc.. */ + tcg_gen_or_i32(ret, t0, t1); /* ret = dcba */ - tcg_gen_shri_i32(t1, arg, 8); - tcg_gen_andi_i32(t1, t1, 0x0000ff00); - tcg_gen_or_i32(t0, t0, t1); - - tcg_gen_shri_i32(t1, arg, 24); - tcg_gen_or_i32(ret, t0, t1); tcg_temp_free_i32(t0); tcg_temp_free_i32(t1); } @@ -1638,23 +1638,23 @@ void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg) } else if (TCG_TARGET_HAS_bswap32_i64) { tcg_gen_op2_i64(INDEX_op_bswap32_i64, ret, arg); } else { - TCGv_i64 t0, t1; - t0 = tcg_temp_new_i64(); - t1 = tcg_temp_new_i64(); + TCGv_i64 t0 = tcg_temp_new_i64(); + TCGv_i64 t1 = tcg_temp_new_i64(); + TCGv_i64 t2 = tcg_const_i64(0x00ff00ff); - tcg_gen_shli_i64(t0, arg, 24); - tcg_gen_ext32u_i64(t0, t0); + /* arg = ....abcd */ + tcg_gen_shri_i64(t0, arg, 8); /* t0 = .....abc */ + tcg_gen_and_i64(t1, arg, t2); /* t1 = .....b.d */ + tcg_gen_and_i64(t0, t0, t2); /* t0 = .....a.c */ + tcg_temp_free_i64(t2); + tcg_gen_shli_i64(t1, t1, 8); /* t1 = ....b.d. */ + tcg_gen_or_i64(ret, t0, t1); /* ret = ....badc */ - tcg_gen_andi_i64(t1, arg, 0x0000ff00); - tcg_gen_shli_i64(t1, t1, 8); - tcg_gen_or_i64(t0, t0, t1); + tcg_gen_shli_i64(t1, ret, 48); /* t1 = dc...... */ + tcg_gen_shri_i64(t0, ret, 16); /* t0 = ......ba */ + tcg_gen_shri_i64(t1, ret, 32); /* t1 = ....dc.. */ + tcg_gen_or_i64(ret, t0, t1); /* ret = ....dcba */ - tcg_gen_shri_i64(t1, arg, 8); - tcg_gen_andi_i64(t1, t1, 0x0000ff00); - tcg_gen_or_i64(t0, t0, t1); - - tcg_gen_shri_i64(t1, arg, 24); - tcg_gen_or_i64(ret, t0, t1); tcg_temp_free_i64(t0); tcg_temp_free_i64(t1); } From patchwork Fri Dec 14 03:19:15 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153728 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1605241ljp; Thu, 13 Dec 2018 19:37:38 -0800 (PST) X-Google-Smtp-Source: AFSGD/XsrPy21cq/i8rrOzsF9SH7v9VRAt/7aRHvaL6W2qvWvJWwDQqHCllOpgZCMW3LJ8k2CDHS X-Received: by 2002:ac8:2ca9:: with SMTP id 38mr1310152qtw.338.1544758658053; Thu, 13 Dec 2018 19:37:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544758658; cv=none; d=google.com; s=arc-20160816; b=a0EbN4fS4JIa8aIjMS6f29b+zosruaF+Y5595ppg1UaOBA9eISslRHj/w7c9u5nxJo qhxZ6Z8HP8FvHkOfw8KG86GeTypQ+hNShGRFMRSgRuTQiNE9/a9Cg11f5RkcpcXYfJjw k1rqeh5U9CDN88Ef/i43tf301X8D3PF0ebXDfhQ/z3JuOHS7nXeEod685xev36n5/irf warrTSpiMy2Ri9s1Rh9mRuQhjmgcN9kUr4yniewLfu1/M+4kygVAtsurisZ25Po4Z025 BqRIUDISO1fuyiMvEZ8i0w0TAjrxpQObofzA8nV1SaKKMkWACFLM83wGECtSwgAWQnPy 25AQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=U/S7zmMlyfjLiA6mFcj5+nW10ojCNetN9JvrDZkZZc8=; b=t7t8Vgc4bfPxbw6BUTpqmuQGbw56/vmRzU1Z8OtQr3SWIw281P+9hmG0S15ntbcfQj XCO3iYJ24SjYSqOVRCb9aVrR4UTTyPUU3CEefaEFXDOO2veeGeJMYNcGD9kdRHDBZusa BFqNiWIMbdjSiEuNzREOhX1TcSaFhk6RL6hOXcTgyP8pOWtaS9eOw1my6UKQxeV5QAsP syzLIeiSwogUgJoJJ6puh/L6ssVmeLhxMv8r48B7+lg0LG17VwLoEhEMD2/1TZUATw1o +tv3UxFKI6Kn4lq306QVAmcBmpNS+5r3F/1pK2Bad9hEFutN8E+O+r8MgCTo/o/p5oAj lvpw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="Xx5AQVt/"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:4864:20::329 Subject: [Qemu-devel] [PULL 24/32] tcg: Clean up generic bswap64 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Based on the only current user, Sparc: New code uses 2 constants that take 2 insns to load from constant pool, plus 13. Old code used 6 constants that took 1 or 2 insns to create, plus 21. The result is a new total of 17 vs an old total of 29. Signed-off-by: Richard Henderson --- tcg/tcg-op.c | 43 ++++++++++++++++++------------------------- 1 file changed, 18 insertions(+), 25 deletions(-) -- 2.17.2 diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index a956499e46..887b371a81 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -1678,37 +1678,30 @@ void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg) } else { TCGv_i64 t0 = tcg_temp_new_i64(); TCGv_i64 t1 = tcg_temp_new_i64(); + TCGv_i64 t2 = tcg_temp_new_i64(); - tcg_gen_shli_i64(t0, arg, 56); + /* arg = abcdefgh */ + tcg_gen_movi_i64(t2, 0x00ff00ff00ff00ffull); + tcg_gen_shri_i64(t0, arg, 8); /* t0 = .abcdefg */ + tcg_gen_and_i64(t1, arg, t2); /* t1 = .b.d.f.h */ + tcg_gen_and_i64(t0, t0, t2); /* t0 = .a.c.e.g */ + tcg_gen_shli_i64(t1, t1, 8); /* t1 = b.d.f.h. */ + tcg_gen_or_i64(ret, t0, t1); /* ret = badcfehg */ - tcg_gen_andi_i64(t1, arg, 0x0000ff00); - tcg_gen_shli_i64(t1, t1, 40); - tcg_gen_or_i64(t0, t0, t1); + tcg_gen_movi_i64(t2, 0x0000ffff0000ffffull); + tcg_gen_shri_i64(t0, ret, 16); /* t0 = ..badcfe */ + tcg_gen_and_i64(t1, ret, t2); /* t1 = ..dc..hg */ + tcg_gen_and_i64(t0, t0, t2); /* t0 = ..ba..fe */ + tcg_gen_shli_i64(t1, t1, 16); /* t1 = dc..hg.. */ + tcg_gen_or_i64(ret, t0, t1); /* ret = dcbahgfe */ - tcg_gen_andi_i64(t1, arg, 0x00ff0000); - tcg_gen_shli_i64(t1, t1, 24); - tcg_gen_or_i64(t0, t0, t1); + tcg_gen_shri_i64(t0, ret, 32); /* t0 = ....dcba */ + tcg_gen_shli_i64(t1, ret, 32); /* t1 = hgfe.... */ + tcg_gen_or_i64(ret, t0, t1); /* ret = hgfedcba */ - tcg_gen_andi_i64(t1, arg, 0xff000000); - tcg_gen_shli_i64(t1, t1, 8); - tcg_gen_or_i64(t0, t0, t1); - - tcg_gen_shri_i64(t1, arg, 8); - tcg_gen_andi_i64(t1, t1, 0xff000000); - tcg_gen_or_i64(t0, t0, t1); - - tcg_gen_shri_i64(t1, arg, 24); - tcg_gen_andi_i64(t1, t1, 0x00ff0000); - tcg_gen_or_i64(t0, t0, t1); - - tcg_gen_shri_i64(t1, arg, 40); - tcg_gen_andi_i64(t1, t1, 0x0000ff00); - tcg_gen_or_i64(t0, t0, t1); - - tcg_gen_shri_i64(t1, arg, 56); - tcg_gen_or_i64(ret, t0, t1); tcg_temp_free_i64(t0); tcg_temp_free_i64(t1); + tcg_temp_free_i64(t2); } } From patchwork Fri Dec 14 03:19:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153738 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1610162ljp; Thu, 13 Dec 2018 19:46:06 -0800 (PST) X-Google-Smtp-Source: AFSGD/VW9yB1YAy3KpBrObY/ylW2wlYHwcDrsr7aldVejLsUo9I+SjfAk4w30xisljiLZj1jedio X-Received: by 2002:ac8:366a:: with SMTP id n39mr1249380qtb.133.1544759166428; Thu, 13 Dec 2018 19:46:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544759166; cv=none; d=google.com; s=arc-20160816; b=IpYvQnyhOoOOOo6GC6ofYaXbn3voMJ5peo4mWScfD8VmFi6yFJNZycez6eJkm5ZOzO hwUSlxfM6MDN7C+r1CwaNmhDUKvUjKWMVFmfDuEbPVh7PRfj6FfmYj/iEa1z2TtsveoS ECHziVUz1j9lzS579ODMXMMbuaa1onN6aHcc5x0/jsAf2ihii+86wxpH4eoHY9OfK3nU xKwz7yfrN897koP8PWtA/LeCzdneYqHcUH3O7apwQM8sWiq0RGL7PL/RNBNwSAjOpq+G izQt+n2Me/tDJcWiF+GAHOKoLp/ZvAm8LLSh+5BMlg469oWkOZxSBuwDOaWCqF5Kr/WC I/Mg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=tusyFviTXg3Z07DzPNMpcS9w3/27t1wRBGHj82A/Eoc=; b=EHpnTZC1hkPBZWLRTcmp5tMXBrReOILls8K5SwK+W2pSRp5x65f/Jjz6w/qrYLTAva NNoXh8mQNaKuxcOXKi1AyJrxjjikNMP0Ua4/qeeE+UsUGGKZXcW2otm3xqh3zj57Sfps 2wDuR1aWlwwGsDKUuAj7Wp2uVYds9NP3O6Vd53hRyxcyTQnYa6TJqcC3a0gGRj+mVAI6 t7WUD90Cht2yHR1eWnOHZwdW4vsemtOiAG7/y9/0Tz/9Ls1euGtpDNd38VgPnjY9JRga wWyAvbl3wehmYuIhPg6KEEmZfT5ymcw0Vpt82vMHyEDOG9H/i5VPJNV5Zw2hagT0TrjS zumQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=YXsINChI; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:4864:20::330 Subject: [Qemu-devel] [PULL 25/32] tcg/optimize: Optimize bswap X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Somehow we forgot these operations, once upon a time. This will allow immediate stores to have their bswap optimized away. Signed-off-by: Richard Henderson --- tcg/optimize.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) -- 2.17.2 diff --git a/tcg/optimize.c b/tcg/optimize.c index 5dbe11c3c8..6b98ec13e6 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -353,6 +353,15 @@ static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg x, TCGArg y) CASE_OP_32_64(ext16u): return (uint16_t)x; + CASE_OP_32_64(bswap16): + return bswap16(x); + + CASE_OP_32_64(bswap32): + return bswap32(x); + + case INDEX_op_bswap64_i64: + return bswap64(x); + case INDEX_op_ext_i32_i64: case INDEX_op_ext32s_i64: return (int32_t)x; @@ -1105,6 +1114,9 @@ void tcg_optimize(TCGContext *s) CASE_OP_32_64(ext16s): CASE_OP_32_64(ext16u): CASE_OP_32_64(ctpop): + CASE_OP_32_64(bswap16): + CASE_OP_32_64(bswap32): + case INDEX_op_bswap64_i64: case INDEX_op_ext32s_i64: case INDEX_op_ext32u_i64: case INDEX_op_ext_i32_i64: From patchwork Fri Dec 14 03:19:17 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153736 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1608590ljp; Thu, 13 Dec 2018 19:43:25 -0800 (PST) X-Google-Smtp-Source: AFSGD/ULoc5a9gSd38sJ+I/50QyNvhj1xMJIkitcaxBxhZFezyaRQR+x9yB4fGP40+DWOsp8Xr9A X-Received: by 2002:aed:29c7:: with SMTP id o65mr1267397qtd.353.1544759004998; Thu, 13 Dec 2018 19:43:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544759004; cv=none; d=google.com; s=arc-20160816; b=JXZ917DHr4jH/2dEijIfMTQQK9TgUsobjDERnfJDnl5kYhXSG39ie23ZgdDjw+tLY+ JNi6eD/WOwCZpF9okUDHlqHAFu+n8M+Mvb+8DgqFT2/pQpZBUjfxItcwV0yrdvp/af6B zG1vTqyhMmmDZtluXYwKJxp01ICr97yKZqsCmAsGynUDwHTKL0z22OLhaDmCwFe0lQuF JQkFTaR9DtgVb+YanZdbxfZu6+BwQvw5OWHdz6skJirRoihUu/WfW6Rn07N0XKE0GSFC LCf26zrjqeCiR7u45GjFeEoO3SkaoRuWlPOv1g/U75dxvyhDD3896+bgKLLNKhv2V0md WJSQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=LcBBcFRjYQz+LoRSm9rm8gl8jSJCzN4g2UGdqvWB9yY=; b=IfUKh6/9udzvFc2I7Knuo9jGYDD2wv8ULskuslkXTmvxNqhzhRM8LOjzz1Uyp1TmEs 0X2laY4Qv7TtpwoKOWowuZvh044x01QqzPvYB6dF3T2GNz3Wx2MxBPlGIbQcjLeGkeNI Jm7suM1Kz9/Fs+rr8Z1ophFiPxyZn9fMurS/ZurdPRbcpW//vDjt/Ymx3qK0Hrn2C9eO F1UvbyCEovTN9MOsL8IV+NTxWQnr32ZhK6IgoTaHcbxCChvsHPbmAb7eZa7YBt7eKF17 nE0HieW0Gvbpp9VaNRbcodF4skho5d280aTvZBCera3X3rDzw/K8MLkuNncDnDOtiE70 UNUA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=hoN68lRk; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id x2si1329025qte.376.2018.12.13.19.43.24 for (version=TLS1 cipher=AES128-SHA bits=128/128); Thu, 13 Dec 2018 19:43:24 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=hoN68lRk; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:59189 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gXeNo-0001r2-Gk for patch@linaro.org; Thu, 13 Dec 2018 22:43:24 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59022) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gXe1D-0006IG-Qj for qemu-devel@nongnu.org; Thu, 13 Dec 2018 22:20:05 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gXe1B-0007hq-Uy for qemu-devel@nongnu.org; Thu, 13 Dec 2018 22:20:03 -0500 Received: from mail-ot1-x32b.google.com ([2607:f8b0:4864:20::32b]:46610) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gXe19-0007SR-UQ for qemu-devel@nongnu.org; Thu, 13 Dec 2018 22:20:00 -0500 Received: by mail-ot1-x32b.google.com with SMTP id w25so4078187otm.13 for ; Thu, 13 Dec 2018 19:19:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=LcBBcFRjYQz+LoRSm9rm8gl8jSJCzN4g2UGdqvWB9yY=; b=hoN68lRkuT7UVwc4F/X0QK7jat5Oq7FclPGwqaRr/ZTjxnKEi27uKw6l1Gsikm6ENO kZxBNLk9lj/9aBL9gNJWR+KQF5HFam0E+P5SOHn5NS6x5zhLoMvhZ9hRpQGYBRmJSsuU QCV7f8upAmcy4RPRSd4dWLV5KNJWZwnYSa9Lo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=LcBBcFRjYQz+LoRSm9rm8gl8jSJCzN4g2UGdqvWB9yY=; b=gw2UfW92e/132Jl4ng++M6zYWAk+/pTeSQAZpifWKIxks7gZ9F4XcLx9571mU+/CMA dYa+xUHiBqEtadsT4rnH9B957HgB4rJYIH71OII4NWlbGKhN3Zl2ffRh/aux082cXXbt 3/CncTsGVD494iI1MM/m/eW18y9hnRgyi17cOh1N71BaSi0Hp+n6JDQ291QpxqS/MMEm J+zJcixs/2O0RZ2hJpaX22fqVNo1t3havLcLR83ktxFI9BhAopjFR+N/WmLjoReG9Hmw dbQlzRwk9a5MaGv44HI5DIGH9c3WqICHGYSOYFne/QpTNCa8RE6TIOiSRMuMueE50F6Z nd0w== X-Gm-Message-State: AA+aEWabc0pJuqQSZGNJnVK42uVH46m95QJF+gsfmAKbQa3qdTaBVBhI j/iSXAtjGUM39PfyM+8Gw4AHp5cZNYCwHA== X-Received: by 2002:a9d:ed1:: with SMTP id 75mr1018032otj.137.1544757595369; Thu, 13 Dec 2018 19:19:55 -0800 (PST) Received: from cloudburst.twiddle.net ([187.217.227.243]) by smtp.gmail.com with ESMTPSA id g138sm2367537oib.26.2018.12.13.19.19.54 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 13 Dec 2018 19:19:54 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 13 Dec 2018 21:19:17 -0600 Message-Id: <20181214031923.29527-28-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181214031923.29527-1-richard.henderson@linaro.org> References: <20181214031923.29527-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::32b Subject: [Qemu-devel] [PULL 26/32] tcg: Add TCG_TARGET_HAS_MEMORY_BSWAP X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" For now, defined universally as true, since we previously required backends to implement swapped memory operations. Future patches may now remove that support where it is onerous. Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.h | 1 + tcg/arm/tcg-target.h | 1 + tcg/i386/tcg-target.h | 2 + tcg/mips/tcg-target.h | 1 + tcg/ppc/tcg-target.h | 1 + tcg/s390/tcg-target.h | 1 + tcg/sparc/tcg-target.h | 1 + tcg/tci/tcg-target.h | 2 + tcg/tcg-op.c | 118 ++++++++++++++++++++++++++++++++++++++- 9 files changed, 126 insertions(+), 2 deletions(-) -- 2.17.2 diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h index 9aea1d1771..f966a4fcb3 100644 --- a/tcg/aarch64/tcg-target.h +++ b/tcg/aarch64/tcg-target.h @@ -137,6 +137,7 @@ typedef enum { #define TCG_TARGET_HAS_mul_vec 1 #define TCG_TARGET_DEFAULT_MO (0) +#define TCG_TARGET_HAS_MEMORY_BSWAP 1 static inline void flush_icache_range(uintptr_t start, uintptr_t stop) { diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h index 94b3578c55..16172f73a3 100644 --- a/tcg/arm/tcg-target.h +++ b/tcg/arm/tcg-target.h @@ -131,6 +131,7 @@ enum { }; #define TCG_TARGET_DEFAULT_MO (0) +#define TCG_TARGET_HAS_MEMORY_BSWAP 1 static inline void flush_icache_range(uintptr_t start, uintptr_t stop) { diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h index c523d5f5e1..f378d29568 100644 --- a/tcg/i386/tcg-target.h +++ b/tcg/i386/tcg-target.h @@ -220,6 +220,8 @@ static inline void tb_target_set_jmp_target(uintptr_t tc_ptr, #define TCG_TARGET_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) +#define TCG_TARGET_HAS_MEMORY_BSWAP 1 + #ifdef CONFIG_SOFTMMU #define TCG_TARGET_NEED_LDST_LABELS #endif diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h index a8222476f0..5cb8672470 100644 --- a/tcg/mips/tcg-target.h +++ b/tcg/mips/tcg-target.h @@ -203,6 +203,7 @@ extern bool use_mips32r2_instructions; #endif #define TCG_TARGET_DEFAULT_MO (0) +#define TCG_TARGET_HAS_MEMORY_BSWAP 1 static inline void flush_icache_range(uintptr_t start, uintptr_t stop) { diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h index be52ad1d2e..52c1bb04b1 100644 --- a/tcg/ppc/tcg-target.h +++ b/tcg/ppc/tcg-target.h @@ -128,6 +128,7 @@ void flush_icache_range(uintptr_t start, uintptr_t stop); void tb_target_set_jmp_target(uintptr_t, uintptr_t, uintptr_t); #define TCG_TARGET_DEFAULT_MO (0) +#define TCG_TARGET_HAS_MEMORY_BSWAP 1 #ifdef CONFIG_SOFTMMU #define TCG_TARGET_NEED_LDST_LABELS diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h index 6f2b06a7d1..853ed6e7aa 100644 --- a/tcg/s390/tcg-target.h +++ b/tcg/s390/tcg-target.h @@ -135,6 +135,7 @@ extern uint64_t s390_facilities; #define TCG_TARGET_CALL_STACK_OFFSET 160 #define TCG_TARGET_EXTEND_ARGS 1 +#define TCG_TARGET_HAS_MEMORY_BSWAP 1 #define TCG_TARGET_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h index d8339bf010..a0ed2a3342 100644 --- a/tcg/sparc/tcg-target.h +++ b/tcg/sparc/tcg-target.h @@ -164,6 +164,7 @@ extern bool use_vis3_instructions; #define TCG_AREG0 TCG_REG_I0 #define TCG_TARGET_DEFAULT_MO (0) +#define TCG_TARGET_HAS_MEMORY_BSWAP 1 static inline void flush_icache_range(uintptr_t start, uintptr_t stop) { diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h index 26140d78cb..086f34e69a 100644 --- a/tcg/tci/tcg-target.h +++ b/tcg/tci/tcg-target.h @@ -198,6 +198,8 @@ static inline void flush_icache_range(uintptr_t start, uintptr_t stop) We prefer consistency across hosts on this. */ #define TCG_TARGET_DEFAULT_MO (0) +#define TCG_TARGET_HAS_MEMORY_BSWAP 1 + static inline void tb_target_set_jmp_target(uintptr_t tc_ptr, uintptr_t jmp_addr, uintptr_t addr) { diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index 887b371a81..1ad095cc35 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -2694,25 +2694,78 @@ static void tcg_gen_req_mo(TCGBar type) void tcg_gen_qemu_ld_i32(TCGv_i32 val, TCGv addr, TCGArg idx, TCGMemOp memop) { + TCGMemOp orig_memop; + tcg_gen_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD); memop = tcg_canonicalize_memop(memop, 0, 0); trace_guest_mem_before_tcg(tcg_ctx->cpu, cpu_env, addr, trace_mem_get_info(memop, 0)); + + orig_memop = memop; + if (!TCG_TARGET_HAS_MEMORY_BSWAP && (memop & MO_BSWAP)) { + memop &= ~MO_BSWAP; + /* The bswap primitive requires zero-extended input. */ + if ((memop & MO_SSIZE) == MO_SW) { + memop &= ~MO_SIGN; + } + } + gen_ldst_i32(INDEX_op_qemu_ld_i32, val, addr, memop, idx); + + if ((orig_memop ^ memop) & MO_BSWAP) { + switch (orig_memop & MO_SIZE) { + case MO_16: + tcg_gen_bswap16_i32(val, val); + if (orig_memop & MO_SIGN) { + tcg_gen_ext16s_i32(val, val); + } + break; + case MO_32: + tcg_gen_bswap32_i32(val, val); + break; + default: + g_assert_not_reached(); + } + } } void tcg_gen_qemu_st_i32(TCGv_i32 val, TCGv addr, TCGArg idx, TCGMemOp memop) { + TCGv_i32 swap = NULL; + tcg_gen_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST); memop = tcg_canonicalize_memop(memop, 0, 1); trace_guest_mem_before_tcg(tcg_ctx->cpu, cpu_env, addr, trace_mem_get_info(memop, 1)); + + if (!TCG_TARGET_HAS_MEMORY_BSWAP && (memop & MO_BSWAP)) { + swap = tcg_temp_new_i32(); + switch (memop & MO_SIZE) { + case MO_16: + tcg_gen_ext16u_i32(swap, val); + tcg_gen_bswap16_i32(swap, swap); + break; + case MO_32: + tcg_gen_bswap32_i32(swap, val); + break; + default: + g_assert_not_reached(); + } + val = swap; + memop &= ~MO_BSWAP; + } + gen_ldst_i32(INDEX_op_qemu_st_i32, val, addr, memop, idx); + + if (swap) { + tcg_temp_free_i32(swap); + } } void tcg_gen_qemu_ld_i64(TCGv_i64 val, TCGv addr, TCGArg idx, TCGMemOp memop) { - tcg_gen_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD); + TCGMemOp orig_memop; + if (TCG_TARGET_REG_BITS == 32 && (memop & MO_SIZE) < MO_64) { tcg_gen_qemu_ld_i32(TCGV_LOW(val), addr, idx, memop); if (memop & MO_SIGN) { @@ -2723,24 +2776,85 @@ void tcg_gen_qemu_ld_i64(TCGv_i64 val, TCGv addr, TCGArg idx, TCGMemOp memop) return; } + tcg_gen_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD); memop = tcg_canonicalize_memop(memop, 1, 0); trace_guest_mem_before_tcg(tcg_ctx->cpu, cpu_env, addr, trace_mem_get_info(memop, 0)); + + orig_memop = memop; + if (!TCG_TARGET_HAS_MEMORY_BSWAP && (memop & MO_BSWAP)) { + memop &= ~MO_BSWAP; + /* The bswap primitive requires zero-extended input. */ + if ((memop & MO_SIGN) && (memop & MO_SIZE) < MO_64) { + memop &= ~MO_SIGN; + } + } + gen_ldst_i64(INDEX_op_qemu_ld_i64, val, addr, memop, idx); + + if ((orig_memop ^ memop) & MO_BSWAP) { + switch (orig_memop & MO_SIZE) { + case MO_16: + tcg_gen_bswap16_i64(val, val); + if (orig_memop & MO_SIGN) { + tcg_gen_ext16s_i64(val, val); + } + break; + case MO_32: + tcg_gen_bswap32_i64(val, val); + if (orig_memop & MO_SIGN) { + tcg_gen_ext32s_i64(val, val); + } + break; + case MO_64: + tcg_gen_bswap64_i64(val, val); + break; + default: + g_assert_not_reached(); + } + } } void tcg_gen_qemu_st_i64(TCGv_i64 val, TCGv addr, TCGArg idx, TCGMemOp memop) { - tcg_gen_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST); + TCGv_i64 swap = NULL; + if (TCG_TARGET_REG_BITS == 32 && (memop & MO_SIZE) < MO_64) { tcg_gen_qemu_st_i32(TCGV_LOW(val), addr, idx, memop); return; } + tcg_gen_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST); memop = tcg_canonicalize_memop(memop, 1, 1); trace_guest_mem_before_tcg(tcg_ctx->cpu, cpu_env, addr, trace_mem_get_info(memop, 1)); + + if (!TCG_TARGET_HAS_MEMORY_BSWAP && (memop & MO_BSWAP)) { + swap = tcg_temp_new_i64(); + switch (memop & MO_SIZE) { + case MO_16: + tcg_gen_ext16u_i64(swap, val); + tcg_gen_bswap16_i64(swap, swap); + break; + case MO_32: + tcg_gen_ext32u_i64(swap, val); + tcg_gen_bswap32_i64(swap, swap); + break; + case MO_64: + tcg_gen_bswap64_i64(swap, val); + break; + default: + g_assert_not_reached(); + } + val = swap; + memop &= ~MO_BSWAP; + } + gen_ldst_i64(INDEX_op_qemu_st_i64, val, addr, memop, idx); + + if (swap) { + tcg_temp_free_i64(swap); + } } static void tcg_gen_ext_i32(TCGv_i32 ret, TCGv_i32 val, TCGMemOp opc) From patchwork Fri Dec 14 03:19:18 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153739 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1610369ljp; Thu, 13 Dec 2018 19:46:32 -0800 (PST) X-Google-Smtp-Source: AFSGD/XmFJzCLfbxNjLqV65s4nebXB4NlZTgedIP4Srcl18oy5QnBKdzPBrYAm1MD0kzpJyttkOL X-Received: by 2002:aed:2314:: with SMTP id h20mr1292584qtc.286.1544759192207; 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X-Received-From: 2607:f8b0:4864:20::334 Subject: [Qemu-devel] [PULL 27/32] tcg/mips: Improve the add2/sub2 command to use TCG_TARGET_REG_BITS X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Alistair Francis Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Alistair Francis Instead of hard coding 31 for the shift right use TCG_TARGET_REG_BITS - 1. Signed-off-by: Alistair Francis Message-Id: <7dfbddf7014a595150aa79011ddb342c3cc17ec3.1544648105.git.alistair.francis@wdc.com> Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson --- tcg/mips/tcg-target.inc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.17.2 diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c index a06ff257fa..be0bc92e8e 100644 --- a/tcg/mips/tcg-target.inc.c +++ b/tcg/mips/tcg-target.inc.c @@ -792,7 +792,7 @@ static void tcg_out_addsub2(TCGContext *s, TCGReg rl, TCGReg rh, TCGReg al, tcg_out_opc_imm(s, OPC_ADDIU, rl, al, bl); tcg_out_opc_imm(s, OPC_SLTIU, TCG_TMP0, rl, bl); } else if (rl == al && rl == bl) { - tcg_out_opc_sa(s, OPC_SRL, TCG_TMP0, al, 31); + tcg_out_opc_sa(s, OPC_SRL, TCG_TMP0, al, TCG_TARGET_REG_BITS - 1); tcg_out_opc_reg(s, OPC_ADDU, rl, al, bl); } else { tcg_out_opc_reg(s, OPC_ADDU, rl, al, bl); From patchwork Fri Dec 14 03:19:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153735 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1608362ljp; Thu, 13 Dec 2018 19:43:02 -0800 (PST) X-Google-Smtp-Source: AFSGD/W28tykikaLCUgS5V6lpb/cHqkv5AsxQERxgw6uWsSXqCnElbLo3d/skwdvocQ4+KUP+7UW X-Received: by 2002:ac8:5344:: with SMTP id d4mr1278583qto.372.1544758982247; Thu, 13 Dec 2018 19:43:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544758982; cv=none; d=google.com; s=arc-20160816; b=tOvF2UKNA5nMRdj3ai37DIRPafwPXmTWFEcMHhWfBrnnOT9RokOV1G09g6rmVw3IKI yDWZDxSYQcV9CqU9wlANFTNdLPrbaVxl5u2QGjUAOdf2sDUC6UgMNHWBkHCzR8g3sO6C lhu8/k0IHpt3WDqjexoUa1Vh0DnJdHmcD/6qmKEbGrnLoEuwJZhnMRnbDsjo/omYQOyf 0Szns70SWPbWBo0jnmuLwPwRPqdG3zZXn2w9nT5dhH+Umuf1eXXUVRIp9MMhf1+INiHd 2avPZLvHqTnncIqvFnWW84taYKcqx+hAsyRlMKcT04mAHrQaF3569SEWf+ymppu4bAC6 XVnA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=JqFbH0qOpR2THtxNKT63TiFEtHZ/a0vfq2LRWkSUcCo=; b=tMo4RcRpxz62BhJxotx7d/2PxT2/Vh5TKZy2erGt4XcMmZ2Ia1pv8x6mLVGZITJvRw ql0OIU5X2e/xSKRAicCvaSxuE+ihuvWt2060ae6g7GPbSaLkXAY95xPSpt+YOgJ027qQ M++kCs3Fw093R3wE3M/brpYtAKhOxndHR/9I/wHp8Fyj6KrALf3jiaTDeSKcWo8CAgkU 1XwFQRatUIK5t6DFBm5MeIY5utxAhgcvHxKXELuqHqcvrOuV4mAj/IvdXnNy+zW03nw9 EiDLFX61Dfo/CdfbJhTFDnXQXj74hW1dJxVPnmIO6J0ph9oA4Ex0s+TP9fAiQ3UIJVtO 0PKA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=DLtvfSo9; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:4864:20::32c Subject: [Qemu-devel] [PULL 28/32] tcg: Drop nargs from tcg_op_insert_{before, after} X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, "Emilio G. Cota" Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: "Emilio G. Cota" It's unused since 75e8b9b7aa0b95a761b9add7e2f09248b101a392. Signed-off-by: Emilio G. Cota Message-Id: <20181209193749.12277-9-cota@braap.org> Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson --- tcg/tcg.h | 4 ++-- tcg/optimize.c | 4 ++-- tcg/tcg.c | 10 ++++------ 3 files changed, 8 insertions(+), 10 deletions(-) -- 2.17.2 diff --git a/tcg/tcg.h b/tcg/tcg.h index f4efbaa680..a745e926bb 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -1073,8 +1073,8 @@ void tcg_gen_callN(void *func, TCGTemp *ret, int nargs, TCGTemp **args); TCGOp *tcg_emit_op(TCGOpcode opc); void tcg_op_remove(TCGContext *s, TCGOp *op); -TCGOp *tcg_op_insert_before(TCGContext *s, TCGOp *op, TCGOpcode opc, int narg); -TCGOp *tcg_op_insert_after(TCGContext *s, TCGOp *op, TCGOpcode opc, int narg); +TCGOp *tcg_op_insert_before(TCGContext *s, TCGOp *op, TCGOpcode opc); +TCGOp *tcg_op_insert_after(TCGContext *s, TCGOp *op, TCGOpcode opc); void tcg_optimize(TCGContext *s); diff --git a/tcg/optimize.c b/tcg/optimize.c index 6b98ec13e6..01e80c3e46 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -1261,7 +1261,7 @@ void tcg_optimize(TCGContext *s) uint64_t a = ((uint64_t)ah << 32) | al; uint64_t b = ((uint64_t)bh << 32) | bl; TCGArg rl, rh; - TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32, 2); + TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32); if (opc == INDEX_op_add2_i32) { a += b; @@ -1283,7 +1283,7 @@ void tcg_optimize(TCGContext *s) uint32_t b = arg_info(op->args[3])->val; uint64_t r = (uint64_t)a * b; TCGArg rl, rh; - TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32, 2); + TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32); rl = op->args[0]; rh = op->args[1]; diff --git a/tcg/tcg.c b/tcg/tcg.c index 54f1272187..963cb37892 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -2205,16 +2205,14 @@ TCGOp *tcg_emit_op(TCGOpcode opc) return op; } -TCGOp *tcg_op_insert_before(TCGContext *s, TCGOp *old_op, - TCGOpcode opc, int nargs) +TCGOp *tcg_op_insert_before(TCGContext *s, TCGOp *old_op, TCGOpcode opc) { TCGOp *new_op = tcg_op_alloc(opc); QTAILQ_INSERT_BEFORE(old_op, new_op, link); return new_op; } -TCGOp *tcg_op_insert_after(TCGContext *s, TCGOp *old_op, - TCGOpcode opc, int nargs) +TCGOp *tcg_op_insert_after(TCGContext *s, TCGOp *old_op, TCGOpcode opc) { TCGOp *new_op = tcg_op_alloc(opc); QTAILQ_INSERT_AFTER(&s->ops, old_op, new_op, link); @@ -2552,7 +2550,7 @@ static bool liveness_pass_2(TCGContext *s) TCGOpcode lopc = (arg_ts->type == TCG_TYPE_I32 ? INDEX_op_ld_i32 : INDEX_op_ld_i64); - TCGOp *lop = tcg_op_insert_before(s, op, lopc, 3); + TCGOp *lop = tcg_op_insert_before(s, op, lopc); lop->args[0] = temp_arg(dir_ts); lop->args[1] = temp_arg(arg_ts->mem_base); @@ -2621,7 +2619,7 @@ static bool liveness_pass_2(TCGContext *s) TCGOpcode sopc = (arg_ts->type == TCG_TYPE_I32 ? INDEX_op_st_i32 : INDEX_op_st_i64); - TCGOp *sop = tcg_op_insert_after(s, op, sopc, 3); + TCGOp *sop = tcg_op_insert_after(s, op, sopc); sop->args[0] = temp_arg(dir_ts); sop->args[1] = temp_arg(arg_ts->mem_base); From patchwork Fri Dec 14 03:19:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153718 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1599664ljp; Thu, 13 Dec 2018 19:28:43 -0800 (PST) X-Google-Smtp-Source: AFSGD/UPvAzjKcVsLff+EIl7fku+9D4lTJ9m1SreYdm4R6gDF7tdCpSWQ+D4OysyKzx9uk1jTWyK X-Received: by 2002:a0c:e394:: with SMTP id a20mr1266948qvl.42.1544758123103; Thu, 13 Dec 2018 19:28:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544758123; cv=none; d=google.com; s=arc-20160816; b=Sfyvlz+hvQNs4lrHCRo0dWczcbgbuu1FPskqYG/Cv9eh1uJJbXu1PQEofqrRGCamKK ItjiHd7o7xXX61xheRNkoCdYjDXzEMrTxxWQc1xDGBowYUoXzfEkp459lKhDU1tdTJSA TSzwZDVn8ONN0Ne2KUWgZzjzEhz6a9lUZxZl38akj24zeO9BGf/ppID8UKeGTXEW5944 Vog2XV91SpXigHZTY+wi7AgdYp53v4bmnMMDiiTBpK+bZvorB+HcxpsPRLXd7H8IU6dG IoD7b0mE3WLbIPfQ8Hp2W/noJpJ4gQyqHW8c3kdjRj3g46NzqrqAdFsQU1wp04BQGSnR sRmw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=u+Axxgq67CeNiPhZ/z+UFVgogfn9bRZpOeLo02pbgQE=; b=Mi+Svjoi+uo3dOhkr0tZ7zN6K4iTv+I+L0NUzih2RKbNjwOuFGNvqQk8PapvNdel6v XzYZC1qeIkadvayWSVFyMNWaog8WB/R1MQLPoToAzDk6tKmnuk4VkCKTvz5tWz2I5Xa/ oJCEhXmFWM+4KxAF+t0mLGzMUnRPllPYX9iXRlLnRiywf55Yw7t63eWmlC0IdR/hbMFJ mWdq1fSqO4C3aGPncCuE3FDXhThffjLQfanIdZMv6kKndThFA+nsykL4jYQRYi0toOF9 dY7aFP4wufc0O/J5J6gGX2dysqMHerGJ0/CwthomiZrX697pzUK5NyWILanrUsmc049/ Qwow== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=L7NleC9h; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:4864:20::32f Subject: [Qemu-devel] [PULL 29/32] qht-bench: document -p flag X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, "Emilio G. Cota" Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: "Emilio G. Cota" Which we forgot to do in bd224fce60 ("qht-bench: add -p flag to precompute hash values", 2018-09-26). Reviewed-by: Alex Bennée Signed-off-by: Emilio G. Cota Signed-off-by: Richard Henderson --- tests/qht-bench.c | 1 + 1 file changed, 1 insertion(+) -- 2.17.2 diff --git a/tests/qht-bench.c b/tests/qht-bench.c index 2089e2bed1..636750d39f 100644 --- a/tests/qht-bench.c +++ b/tests/qht-bench.c @@ -72,6 +72,7 @@ static const char commands_string[] = " -n = number of threads\n" "\n" " -o = offset at which keys start\n" + " -p = precompute hashes\n" "\n" " -g = set -s,-k,-K,-l,-r to the same value\n" " -s = initial size hint\n" From patchwork Fri Dec 14 03:19:21 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153734 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1607065ljp; Thu, 13 Dec 2018 19:40:49 -0800 (PST) X-Google-Smtp-Source: AFSGD/UvbWYAOmspKgMzwZlpRKEhB94WIz0n+Z9WG++kiUE7dQnT/0rf8TOUE+cX4tPtxKdxcBy+ X-Received: by 2002:aed:25f2:: with SMTP id y47mr1241500qtc.217.1544758849700; Thu, 13 Dec 2018 19:40:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544758849; cv=none; d=google.com; s=arc-20160816; b=V/SPKvdxMUoJRWUGRFh0DYbXHUZhNy9oEwhf4jCalkVkK2bSQAQm3MJE4cVRoDQja5 RD/0k9jsNZYXs0d8BXPJ7cSmWZFmBExdLvE35BHS+VLpEipgtiRsqEBb8IEwUOzrFK7V DkRGIET95522YmT1SsnfgtsS8HU1jES0IGZAKihRlRAPo76SO989dfxRrs56VvvteBmZ iFO4b3B0WIUJX2klg0Q4xwyE1EsAEOLmLJyfonYuLL7v7L8TzQ/f4X9NDnOGKXuJC5Ry NTcRIg7n0sk0PIAjhdl3ZQh7yi2Nhct1QVkKQmTs4k0DiioBnZHj0e6RuBjoa69GqXgS R2CA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=rSLn4sAllcbYQ44EjOT6wIuUmlyloNNdXcTUlyxEZyE=; b=HYIvJnqWYqLckWfHjV9FEtndUjoF1VYsvfYxwru97WdPsINAfIMnC7iXDF9KYEM1o2 QSHPASTon31JImc3PlY0WbOJ64dSWFAnG/cabNydeSy0L7pPKkdC/sarDvaNHX8i3Js3 lujtZ+j224uoheSuVUt3/bH/6WhIj3Pg9UoGHfaHKY8c6bK1DF1RlNtwyr7G/xyIMW0O GGczIj+b/00s536+JvjUgk0E3v9oTbQKXzV6v1b4n/U8hekKmN5+29ulL0OiXuxnmOUZ 4FqdqmWMk/SPXuwS639TBsiRx4Ey90MFXzkKvYkN8dhRJNT2EZ8yp8MeeTwFlVNtGgmZ a/RA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=fFro9Vq+; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:4864:20::331 Subject: [Qemu-devel] [PULL 30/32] exec: introduce qemu_xxhash{2,4,5,6,7} X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, "Emilio G. Cota" Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: "Emilio G. Cota" Before moving them all to include/qemu/xxhash.h. Reviewed-by: Alex Bennée Signed-off-by: Emilio G. Cota Signed-off-by: Richard Henderson --- include/exec/tb-hash-xx.h | 41 +++++++++++++++++++++++++++++---------- include/exec/tb-hash.h | 2 +- tests/qht-bench.c | 2 +- util/qsp.c | 12 ++++++------ 4 files changed, 39 insertions(+), 18 deletions(-) -- 2.17.2 diff --git a/include/exec/tb-hash-xx.h b/include/exec/tb-hash-xx.h index 747a9a612c..98ce4b628a 100644 --- a/include/exec/tb-hash-xx.h +++ b/include/exec/tb-hash-xx.h @@ -42,23 +42,23 @@ #define PRIME32_4 668265263U #define PRIME32_5 374761393U -#define TB_HASH_XX_SEED 1 +#define QEMU_XXHASH_SEED 1 /* * xxhash32, customized for input variables that are not guaranteed to be * contiguous in memory. */ static inline uint32_t -tb_hash_func7(uint64_t a0, uint64_t b0, uint32_t e, uint32_t f, uint32_t g) +qemu_xxhash7(uint64_t ab, uint64_t cd, uint32_t e, uint32_t f, uint32_t g) { - uint32_t v1 = TB_HASH_XX_SEED + PRIME32_1 + PRIME32_2; - uint32_t v2 = TB_HASH_XX_SEED + PRIME32_2; - uint32_t v3 = TB_HASH_XX_SEED + 0; - uint32_t v4 = TB_HASH_XX_SEED - PRIME32_1; - uint32_t a = a0 >> 32; - uint32_t b = a0; - uint32_t c = b0 >> 32; - uint32_t d = b0; + uint32_t v1 = QEMU_XXHASH_SEED + PRIME32_1 + PRIME32_2; + uint32_t v2 = QEMU_XXHASH_SEED + PRIME32_2; + uint32_t v3 = QEMU_XXHASH_SEED + 0; + uint32_t v4 = QEMU_XXHASH_SEED - PRIME32_1; + uint32_t a = ab >> 32; + uint32_t b = ab; + uint32_t c = cd >> 32; + uint32_t d = cd; uint32_t h32; v1 += a * PRIME32_2; @@ -98,4 +98,25 @@ tb_hash_func7(uint64_t a0, uint64_t b0, uint32_t e, uint32_t f, uint32_t g) return h32; } +static inline uint32_t qemu_xxhash2(uint64_t ab) +{ + return qemu_xxhash7(ab, 0, 0, 0, 0); +} + +static inline uint32_t qemu_xxhash4(uint64_t ab, uint64_t cd) +{ + return qemu_xxhash7(ab, cd, 0, 0, 0); +} + +static inline uint32_t qemu_xxhash5(uint64_t ab, uint64_t cd, uint32_t e) +{ + return qemu_xxhash7(ab, cd, e, 0, 0); +} + +static inline uint32_t qemu_xxhash6(uint64_t ab, uint64_t cd, uint32_t e, + uint32_t f) +{ + return qemu_xxhash7(ab, cd, e, f, 0); +} + #endif /* EXEC_TB_HASH_XX_H */ diff --git a/include/exec/tb-hash.h b/include/exec/tb-hash.h index 0526c4f678..731ba4c272 100644 --- a/include/exec/tb-hash.h +++ b/include/exec/tb-hash.h @@ -61,7 +61,7 @@ static inline uint32_t tb_hash_func(tb_page_addr_t phys_pc, target_ulong pc, uint32_t flags, uint32_t cf_mask, uint32_t trace_vcpu_dstate) { - return tb_hash_func7(phys_pc, pc, flags, cf_mask, trace_vcpu_dstate); + return qemu_xxhash7(phys_pc, pc, flags, cf_mask, trace_vcpu_dstate); } #endif diff --git a/tests/qht-bench.c b/tests/qht-bench.c index 636750d39f..0278f4da04 100644 --- a/tests/qht-bench.c +++ b/tests/qht-bench.c @@ -105,7 +105,7 @@ static bool is_equal(const void *ap, const void *bp) static uint32_t h(unsigned long v) { - return tb_hash_func7(v, 0, 0, 0, 0); + return qemu_xxhash2(v); } static uint32_t hval(unsigned long v) diff --git a/util/qsp.c b/util/qsp.c index a848b09c6d..dc29c41fde 100644 --- a/util/qsp.c +++ b/util/qsp.c @@ -135,13 +135,13 @@ QemuCondWaitFunc qemu_cond_wait_func = qemu_cond_wait_impl; * without it we still get a pretty unique hash. */ static inline -uint32_t do_qsp_callsite_hash(const QSPCallSite *callsite, uint64_t a) +uint32_t do_qsp_callsite_hash(const QSPCallSite *callsite, uint64_t ab) { - uint64_t b = (uint64_t)(uintptr_t)callsite->obj; + uint64_t cd = (uint64_t)(uintptr_t)callsite->obj; uint32_t e = callsite->line; uint32_t f = callsite->type; - return tb_hash_func7(a, b, e, f, 0); + return qemu_xxhash6(ab, cd, e, f); } static inline @@ -169,11 +169,11 @@ static uint32_t qsp_entry_no_thread_hash(const QSPEntry *entry) static uint32_t qsp_entry_no_thread_obj_hash(const QSPEntry *entry) { const QSPCallSite *callsite = entry->callsite; - uint64_t a = g_str_hash(callsite->file); - uint64_t b = callsite->line; + uint64_t ab = g_str_hash(callsite->file); + uint64_t cd = callsite->line; uint32_t e = callsite->type; - return tb_hash_func7(a, b, e, 0, 0); + return qemu_xxhash5(ab, cd, e); } static bool qsp_callsite_cmp(const void *ap, const void *bp) From patchwork Fri Dec 14 03:19:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153729 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1605318ljp; Thu, 13 Dec 2018 19:37:46 -0800 (PST) X-Google-Smtp-Source: AFSGD/Ulix1Blpf8NIY3tGTVfYq2ge8AHl5EgTuFb2HKBj8WWbWcyJwdqhmcocqXRR9+udWvc2ov X-Received: by 2002:a0c:df12:: with SMTP id g18mr1256895qvl.208.1544758666122; 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X-Received-From: 2607:f8b0:4864:20::232 Subject: [Qemu-devel] [PULL 31/32] include: move exec/tb-hash-xx.h to qemu/xxhash.h X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, "Emilio G. Cota" Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: "Emilio G. Cota" Reviewed-by: Alex Bennée Signed-off-by: Emilio G. Cota Signed-off-by: Richard Henderson --- include/exec/tb-hash.h | 2 +- include/{exec/tb-hash-xx.h => qemu/xxhash.h} | 6 +++--- tests/qht-bench.c | 2 +- util/qsp.c | 2 +- 4 files changed, 6 insertions(+), 6 deletions(-) rename include/{exec/tb-hash-xx.h => qemu/xxhash.h} (97%) -- 2.17.2 diff --git a/include/exec/tb-hash.h b/include/exec/tb-hash.h index 731ba4c272..4f3a37d927 100644 --- a/include/exec/tb-hash.h +++ b/include/exec/tb-hash.h @@ -20,7 +20,7 @@ #ifndef EXEC_TB_HASH_H #define EXEC_TB_HASH_H -#include "exec/tb-hash-xx.h" +#include "qemu/xxhash.h" #ifdef CONFIG_SOFTMMU diff --git a/include/exec/tb-hash-xx.h b/include/qemu/xxhash.h similarity index 97% rename from include/exec/tb-hash-xx.h rename to include/qemu/xxhash.h index 98ce4b628a..fe35dde328 100644 --- a/include/exec/tb-hash-xx.h +++ b/include/qemu/xxhash.h @@ -31,8 +31,8 @@ * - xxHash source repository : https://github.com/Cyan4973/xxHash */ -#ifndef EXEC_TB_HASH_XX_H -#define EXEC_TB_HASH_XX_H +#ifndef QEMU_XXHASH_H +#define QEMU_XXHASH_H #include "qemu/bitops.h" @@ -119,4 +119,4 @@ static inline uint32_t qemu_xxhash6(uint64_t ab, uint64_t cd, uint32_t e, return qemu_xxhash7(ab, cd, e, f, 0); } -#endif /* EXEC_TB_HASH_XX_H */ +#endif /* QEMU_XXHASH_H */ diff --git a/tests/qht-bench.c b/tests/qht-bench.c index 0278f4da04..ab4e708180 100644 --- a/tests/qht-bench.c +++ b/tests/qht-bench.c @@ -9,7 +9,7 @@ #include "qemu/atomic.h" #include "qemu/qht.h" #include "qemu/rcu.h" -#include "exec/tb-hash-xx.h" +#include "qemu/xxhash.h" struct thread_stats { size_t rd; diff --git a/util/qsp.c b/util/qsp.c index dc29c41fde..410f1ba004 100644 --- a/util/qsp.c +++ b/util/qsp.c @@ -61,7 +61,7 @@ #include "qemu/timer.h" #include "qemu/qht.h" #include "qemu/rcu.h" -#include "exec/tb-hash-xx.h" +#include "qemu/xxhash.h" enum QSPType { QSP_MUTEX, From patchwork Fri Dec 14 03:19:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153737 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1609968ljp; Thu, 13 Dec 2018 19:45:47 -0800 (PST) X-Google-Smtp-Source: AFSGD/XXsur1X3/kfM/oty5rrcXk6+oCIOlX/pTF4HuRvQvbSxrGulUROLuDHSonlSIKyqVwc72F X-Received: by 2002:ac8:7353:: with SMTP id q19mr1247411qtp.265.1544759146773; Thu, 13 Dec 2018 19:45:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544759146; cv=none; d=google.com; s=arc-20160816; b=LrXcVBITw8TsWAsHxsKxOTdYpzmgHdUsvp+3rqMm5wM1xjjtVulZZoPiUfFcpWCRrx y3KrZ8SRKXqHx9Uq8zMF4lCVwkXCqX+YwVF+6OA33+bFnD2vWhZz59n77b1MFlITpvA8 MZvaqDclvSNkQsvwX49/kfy4ECIK0ZIp7vlmb29foVF92F95hI0YqQq+58iU+1pwv4oF uDv2UqIfFBRB5IotHnJeUGoxK/RCtmG1MK8KL//7VcdNfWXO98rVZvajjZf0B/FmIYdg 4nmz6+yfG8MX+VKmGEJZaa4so4M2gMTM2LBNoBVp1TllmuH0b3JPg+ArQZTD0WTDHQfX 4rDg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=HOR5xbwz9EmkIQh396vVWN9pPwvDwijcaDuswD3C1fw=; b=wKX/MvBwueo5anBEBo7Fa71j4G3yKQJY+PBYCAwav3aCV7+dhYJkXz+j8H41ywDFUH P0vSjtce2wSSjd+u1pZVwMej9X/ooOekSoYz7RIbXRA5gXjxmFE/egSJsx/A61pHsOhl wySlNz6s5gHJZuAHVnKbDjoZZLY9j4+1ltjplvTgCEVczdn7YMkf6TYg+zBOdIjgXPFN /9lYjVxjzPn1bw459KeGKdI5QXWmOqL3NbvaVcwAAn0+NbP85ORF/XyIuBTjkd1hRffB LM9cGs7HnL8U8kW7gKx/Bo/48tSLb9LFaPBwMH03lmSIsyxCTV01pQs/xDLSnZesq/dW yq3w== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=EMDnI1jZ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:4864:20::234 Subject: [Qemu-devel] [PULL 32/32] xxhash: match output against the original xxhash32 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, "Emilio G. Cota" Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: "Emilio G. Cota" Change the order in which we extract a/b and c/d to match the output of the upstream xxhash32. Tested with: https://github.com/cota/xxhash/tree/qemu Reviewed-by: Alex Bennée Tested-by: Alex Bennée Signed-off-by: Emilio G. Cota Signed-off-by: Richard Henderson --- include/qemu/xxhash.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) -- 2.17.2 diff --git a/include/qemu/xxhash.h b/include/qemu/xxhash.h index fe35dde328..076f1f6054 100644 --- a/include/qemu/xxhash.h +++ b/include/qemu/xxhash.h @@ -55,10 +55,10 @@ qemu_xxhash7(uint64_t ab, uint64_t cd, uint32_t e, uint32_t f, uint32_t g) uint32_t v2 = QEMU_XXHASH_SEED + PRIME32_2; uint32_t v3 = QEMU_XXHASH_SEED + 0; uint32_t v4 = QEMU_XXHASH_SEED - PRIME32_1; - uint32_t a = ab >> 32; - uint32_t b = ab; - uint32_t c = cd >> 32; - uint32_t d = cd; + uint32_t a = ab; + uint32_t b = ab >> 32; + uint32_t c = cd; + uint32_t d = cd >> 32; uint32_t h32; v1 += a * PRIME32_2;