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[213.113.123.174]) by smtp.gmail.com with ESMTPSA id v19sm1709880lfe.69.2018.12.15.15.45.58 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 15 Dec 2018 15:45:58 -0800 (PST) From: Linus Walleij To: Mark Brown , linux-spi@vger.kernel.org Cc: linux-gpio@vger.kernel.org, Bartosz Golaszewski , linuxarm@huawei.com, Linus Walleij Subject: [PATCH 1/7 v1] spi: Optionally use GPIO descriptors for CS GPIOs Date: Sun, 16 Dec 2018 00:38:17 +0100 Message-Id: <20181215233823.1042-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181215233823.1042-1-linus.walleij@linaro.org> References: <20181215233823.1042-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org This augments the SPI core to optionally use GPIO descriptors for chip select on a per-master-driver opt-in basis. Drivers using this will rely on the SPI core to look up GPIO descriptors associated with the device, such as when using device tree or board files with GPIO descriptor tables. When getting descriptors from the device tree, this will in turn activate the code in gpiolib that was added in commit 6953c57ab172 ("gpio: of: Handle SPI chipselect legacy bindings") which means that these descriptors are aware of the active low semantics that is the default for SPI CS GPIO lines and we can assume that all of these are "active high" and thus assign SPI_CS_HIGH to all CS lines on the DT path. The previously used gpio_set_value() would call down into gpiod_set_raw_value() and ignore the polarity inversion semantics. It seems like many drivers go to great lengths to set up the CS GPIO line as non-asserted, respecting SPI_CS_HIGH. We pull this out of the SPI drivers and into the core, and by simply requesting the line as GPIOD_OUT_LOW when retrieveing it from the device and relying on the gpiolib to handle any inversion semantics. This way a lot of code can be simplified and removed in each converted driver. The end goal after dealing with each driver in turn, is to delete the non-descriptor path (of_spi_register_master() for example) and let the core deal with only descriptors. The different SPI drivers have complex interactions with the core so we cannot simply change them all over, we need to use a stepwise, bisectable approach so that each driver can be converted and fixed in isolation. Cc: Linuxarm Signed-off-by: Linus Walleij --- Jay, I think this patch should cover your ACPI usecase as well, as in subject "spi: add ACPI support for SPI controller chip select lines(cs-gpios)" --- drivers/spi/spi.c | 105 ++++++++++++++++++++++++++++++++++++---- include/linux/spi/spi.h | 23 +++++++-- 2 files changed, 114 insertions(+), 14 deletions(-) -- 2.19.2 diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 6ca59406b0b7..05e73290cdf3 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -509,6 +510,7 @@ struct spi_device *spi_alloc_device(struct spi_controller *ctlr) spi->dev.bus = &spi_bus_type; spi->dev.release = spidev_release; spi->cs_gpio = -ENOENT; + spi->cs_gpiod = NULL; spin_lock_init(&spi->statistics.lock); @@ -580,7 +582,10 @@ int spi_add_device(struct spi_device *spi) goto done; } - if (ctlr->cs_gpios) + /* Descriptors take precedence */ + if (ctlr->cs_gpiods) + spi->cs_gpiod = ctlr->cs_gpiods[spi->chip_select]; + else if (ctlr->cs_gpios) spi->cs_gpio = ctlr->cs_gpios[spi->chip_select]; /* Drivers may modify this initial i/o setup, but will @@ -774,10 +779,20 @@ static void spi_set_cs(struct spi_device *spi, bool enable) if (spi->mode & SPI_CS_HIGH) enable = !enable; - if (gpio_is_valid(spi->cs_gpio)) { - /* Honour the SPI_NO_CS flag */ - if (!(spi->mode & SPI_NO_CS)) - gpio_set_value(spi->cs_gpio, !enable); + if (spi->cs_gpiod || gpio_is_valid(spi->cs_gpio)) { + /* + * Honour the SPI_NO_CS flag and invert the enable line, as + * active low is default for SPI. Execution paths that handle + * polarity inversion in gpiolib (such as device tree) will + * enforce active high using the SPI_CS_HIGH resulting in a + * double inversion through the code above. + */ + if (!(spi->mode & SPI_NO_CS)) { + if (spi->cs_gpiod) + gpiod_set_value(spi->cs_gpiod, !enable); + else + gpio_set_value(spi->cs_gpio, !enable); + } /* Some SPI masters need both GPIO CS & slave_select */ if ((spi->controller->flags & SPI_MASTER_GPIO_SS) && spi->controller->set_cs) @@ -1599,13 +1614,21 @@ static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi, spi->mode |= SPI_CPHA; if (of_property_read_bool(nc, "spi-cpol")) spi->mode |= SPI_CPOL; - if (of_property_read_bool(nc, "spi-cs-high")) - spi->mode |= SPI_CS_HIGH; if (of_property_read_bool(nc, "spi-3wire")) spi->mode |= SPI_3WIRE; if (of_property_read_bool(nc, "spi-lsb-first")) spi->mode |= SPI_LSB_FIRST; + /* + * For descriptors associated with the device, polarity inversion is + * handled in the gpiolib, so all chip selects are "active high" in + * the logical sense, the gpiolib will invert the line if need be. + */ + if (ctlr->use_gpio_descriptors) + spi->mode |= SPI_CS_HIGH; + else if (of_property_read_bool(nc, "spi-cs-high")) + spi->mode |= SPI_CS_HIGH; + /* Device DUAL/QUAD mode */ if (!of_property_read_u32(nc, "spi-tx-bus-width", &value)) { switch (value) { @@ -2115,6 +2138,60 @@ static int of_spi_register_master(struct spi_controller *ctlr) } #endif +/** + * spi_get_gpio_descs() - grab chip select GPIOs for the master + * @ctlr: The SPI master to grab GPIO descriptors for + */ +static int spi_get_gpio_descs(struct spi_controller *ctlr) +{ + int nb, i; + struct gpio_desc **cs; + struct device *dev = &ctlr->dev; + + nb = gpiod_count(dev, "cs"); + ctlr->num_chipselect = max_t(int, nb, ctlr->num_chipselect); + + /* No GPIOs at all is fine, else return the error */ + if (nb == 0 || nb == -ENOENT) + return 0; + else if (nb < 0) + return nb; + + cs = devm_kcalloc(dev, ctlr->num_chipselect, sizeof(*cs), + GFP_KERNEL); + if (!cs) + return -ENOMEM; + ctlr->cs_gpiods = cs; + + for (i = 0; i < nb; i++) { + /* + * Most chipselects are active low, the inverted + * semantics are handled by special quirks in gpiolib, + * so initializing them GPIOD_OUT_LOW here means + * "unasserted", in most cases the will drive the physical + * line high. + */ + cs[i] = devm_gpiod_get_index_optional(dev, "cs", i, + GPIOD_OUT_LOW); + + if (cs[i]) { + /* + * If we find a CS GPIO, name it after the device and + * chip select line. + */ + char *gpioname; + + gpioname = devm_kasprintf(dev, GFP_KERNEL, "%s CS%d", + dev_name(dev), i); + if (!gpioname) + return -ENOMEM; + gpiod_set_consumer_name(cs[i], gpioname); + } + } + + return 0; +} + static int spi_controller_check_ops(struct spi_controller *ctlr) { /* @@ -2177,9 +2254,16 @@ int spi_register_controller(struct spi_controller *ctlr) return status; if (!spi_controller_is_slave(ctlr)) { - status = of_spi_register_master(ctlr); - if (status) - return status; + if (ctlr->use_gpio_descriptors) { + status = spi_get_gpio_descs(ctlr); + if (status) + return status; + } else { + /* Legacy code path for GPIOs from DT */ + status = of_spi_register_master(ctlr); + if (status) + return status; + } } /* even if it's just one always-selected device, there must @@ -2891,6 +2975,7 @@ static int __spi_validate(struct spi_device *spi, struct spi_message *message) * cs_change is set for each transfer. */ if ((spi->mode & SPI_CS_WORD) && (!(ctlr->mode_bits & SPI_CS_WORD) || + spi->cs_gpiod || gpio_is_valid(spi->cs_gpio))) { size_t maxsize; int ret; diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index 6be77fa5ab90..68d77cfc8bb7 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -12,6 +12,7 @@ #include #include #include +#include struct dma_chan; struct property_entry; @@ -116,7 +117,10 @@ void spi_statistics_add_transfer_stats(struct spi_statistics *stats, * @modalias: Name of the driver to use with this device, or an alias * for that name. This appears in the sysfs "modalias" attribute * for driver coldplugging, and in uevents used for hotplugging - * @cs_gpio: gpio number of the chipselect line (optional, -ENOENT when + * @cs_gpio: LEGACY: gpio number of the chipselect line (optional, -ENOENT when + * not using a GPIO line) use cs_gpiod in new drivers by opting in on + * the spi_master. + * @cs_gpiod: gpio descriptor of the chipselect line (optional, NULL when * not using a GPIO line) * * @statistics: statistics for the spi_device @@ -160,7 +164,8 @@ struct spi_device { void *controller_data; char modalias[SPI_NAME_SIZE]; const char *driver_override; - int cs_gpio; /* chip select gpio */ + int cs_gpio; /* LEGACY: chip select gpio */ + struct gpio_desc *cs_gpiod; /* chip select gpio desc */ /* the statistics */ struct spi_statistics statistics; @@ -373,9 +378,17 @@ static inline void spi_unregister_driver(struct spi_driver *sdrv) * controller has native support for memory like operations. * @unprepare_message: undo any work done by prepare_message(). * @slave_abort: abort the ongoing transfer request on an SPI slave controller - * @cs_gpios: Array of GPIOs to use as chip select lines; one per CS - * number. Any individual value may be -ENOENT for CS lines that + * @cs_gpios: LEGACY: array of GPIO descs to use as chip select lines; one per + * CS number. Any individual value may be -ENOENT for CS lines that + * are not GPIOs (driven by the SPI controller itself). Use the cs_gpiods + * in new drivers. + * @cs_gpiods: Array of GPIO descs to use as chip select lines; one per CS + * number. Any individual value may be NULL for CS lines that * are not GPIOs (driven by the SPI controller itself). + * @use_gpio_descriptors: Turns on the code in the SPI core to parse and grab + * GPIO descriptors rather than using global GPIO numbers grabbed by the + * driver. This will fill in @cs_gpiods and @cs_gpios should not be used, + * and SPI devices will have the cs_gpiod assigned rather than cs_gpio. * @statistics: statistics for the spi_controller * @dma_tx: DMA transmit channel * @dma_rx: DMA receive channel @@ -554,6 +567,8 @@ struct spi_controller { /* gpio chip select */ int *cs_gpios; + struct gpio_desc **cs_gpiods; + bool use_gpio_descriptors; /* statistics */ struct spi_statistics statistics; From patchwork Sat Dec 15 23:38:18 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 153939 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp955813ljp; Sat, 15 Dec 2018 15:46:05 -0800 (PST) X-Google-Smtp-Source: AFSGD/WgDkW+bfAuMHfOqsXjxi6szp6/yn0Ryrz/zjDP2vAArKAhQhpg6faFa5cQpwkAFAjvu4yG X-Received: by 2002:a62:47d9:: with SMTP id p86mr7755994pfi.95.1544917565856; Sat, 15 Dec 2018 15:46:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544917565; cv=none; d=google.com; s=arc-20160816; b=ZWicsEKjryr7CQXODLez9nUON1r+yFqfZL4tP80d5OS+LHwAXfUFj0NMhKAko/s+sF 0eamdnwvfKqzg7FD78hlrhJE+7bWRQx9mJLePIMe93Tn1zQlmhjh7m/YOm7MdLiM063I 0QsNRzPRQNHK1C2rIewQsN59XlsefBeFy/wyM0qaX1HsHDh2KGsxyVpYgEqqjo0Yhq6i v64inm+ho26u8+HxXGRk/MnATIsJ9RFCxpjheb8ZJj7SHGcMjV8QJu+i0kvQjFgCKEc/ H5GSdZwqpAlm+66/VZhIYuOVU4BynrUuieRttvJQK6K51re43U8ALy3ad4NuoBj8jDdF mwSA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Bzptg/pgzZPM+HOhvWBONTGwUcMYZLne6Yt/fn2ljxc=; b=GY2P0dqLgjOtVmWny6a3faWDBIbe+TujcTgHNUdoie5kKfRfJ/8Jjich4uNn5HWf1V bHiimMbLqd3J/VspWpAW5CROZURh+dOAT4SOrWmCSiIN8FqZLCFteoawedNUyygFM5Iv SEhkgXl0WiGxnGXcbqXm5xATvtrX2gZteCPE9dTGoXTxEu3XInoCQtVz5dRdq0N5DTzM kBCXdh+kqrMINGrgrg/15vmcqGc6AGE+z+us4SUjtQNZh6jenrv8NmzsftbEA7RaLVZK yVvT3DpmOFU373O8N8M9N3e1y8xZxZGQ8aGh7emrvIqvweYONdFRI7kFFaIuMLxUz9O6 0FWg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YvwXs68p; spf=pass (google.com: best guess record for domain of linux-spi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-spi-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[213.113.123.174]) by smtp.gmail.com with ESMTPSA id v19sm1709880lfe.69.2018.12.15.15.46.00 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 15 Dec 2018 15:46:01 -0800 (PST) From: Linus Walleij To: Mark Brown , linux-spi@vger.kernel.org Cc: linux-gpio@vger.kernel.org, Bartosz Golaszewski , linuxarm@huawei.com, Linus Walleij , Felix Fietkau , Alban Bedel Subject: [PATCH 2/7 v1] spi: ath79: Convert to use CS GPIO descriptors Date: Sun, 16 Dec 2018 00:38:18 +0100 Message-Id: <20181215233823.1042-3-linus.walleij@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181215233823.1042-1-linus.walleij@linaro.org> References: <20181215233823.1042-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org This converts the ATH79 SPI master driver to use GPIO descriptors for chip select handling. The ATH79 driver was requesting the GPIO and driving it from the bitbang .chipselect callback. Do not request it anymore as the SPI core will request it, remove the line inversion semantics for the GPIO case (handled by gpiolib) and let the SPI core deal with requesting the GPIO line from the device tree node of the controller. This driver can be instantiated from a board file (no device tree) but the board files only use native CS (no GPIO lines) so we should be fine just letting the SPI core grab the GPIO from the device. The fact that the driver is actively driving the GPIO in the ath79_spi_chipselect() callback is confusing since the host does not set SPI_MASTER_GPIO_SS so this should not ever get called when using GPIO CS. I put in a comment about this. Cc: Felix Fietkau Cc: Alban Bedel Cc: Linuxarm Signed-off-by: Linus Walleij --- drivers/spi/spi-ath79.c | 42 ++++++++++++++--------------------------- 1 file changed, 14 insertions(+), 28 deletions(-) -- 2.19.2 diff --git a/drivers/spi/spi-ath79.c b/drivers/spi/spi-ath79.c index 3f6b657394de..ed1068ac055f 100644 --- a/drivers/spi/spi-ath79.c +++ b/drivers/spi/spi-ath79.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include #include @@ -78,9 +78,16 @@ static void ath79_spi_chipselect(struct spi_device *spi, int is_active) ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); } - if (gpio_is_valid(spi->cs_gpio)) { - /* SPI is normally active-low */ - gpio_set_value_cansleep(spi->cs_gpio, cs_high); + if (spi->cs_gpiod) { + /* + * SPI chipselect is normally active-low, but + * inversion semantics are handled by gpiolib. + * + * FIXME: is this ever used? The driver doesn't + * set SPI_MASTER_GPIO_SS so this callback should not + * get called if a CS GPIO is found by the SPI core. + */ + gpiod_set_value_cansleep(spi->cs_gpiod, is_active); } else { u32 cs_bit = AR71XX_SPI_IOC_CS(spi->chip_select); @@ -118,21 +125,8 @@ static void ath79_spi_disable(struct ath79_spi *sp) static int ath79_spi_setup_cs(struct spi_device *spi) { struct ath79_spi *sp = ath79_spidev_to_sp(spi); - int status; - status = 0; - if (gpio_is_valid(spi->cs_gpio)) { - unsigned long flags; - - flags = GPIOF_DIR_OUT; - if (spi->mode & SPI_CS_HIGH) - flags |= GPIOF_INIT_LOW; - else - flags |= GPIOF_INIT_HIGH; - - status = gpio_request_one(spi->cs_gpio, flags, - dev_name(&spi->dev)); - } else { + if (!spi->cs_gpiod) { u32 cs_bit = AR71XX_SPI_IOC_CS(spi->chip_select); if (spi->mode & SPI_CS_HIGH) @@ -143,13 +137,7 @@ static int ath79_spi_setup_cs(struct spi_device *spi) ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); } - return status; -} - -static void ath79_spi_cleanup_cs(struct spi_device *spi) -{ - if (gpio_is_valid(spi->cs_gpio)) - gpio_free(spi->cs_gpio); + return 0; } static int ath79_spi_setup(struct spi_device *spi) @@ -163,15 +151,12 @@ static int ath79_spi_setup(struct spi_device *spi) } status = spi_bitbang_setup(spi); - if (status && !spi->controller_state) - ath79_spi_cleanup_cs(spi); return status; } static void ath79_spi_cleanup(struct spi_device *spi) { - ath79_spi_cleanup_cs(spi); spi_bitbang_cleanup(spi); } @@ -225,6 +210,7 @@ static int ath79_spi_probe(struct platform_device *pdev) pdata = dev_get_platdata(&pdev->dev); + master->use_gpio_descriptors = true; master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); master->setup = ath79_spi_setup; master->cleanup = ath79_spi_cleanup; From patchwork Sat Dec 15 23:38:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 153940 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp955833ljp; Sat, 15 Dec 2018 15:46:08 -0800 (PST) X-Google-Smtp-Source: AFSGD/UNi7REwsGG/8bgyrvkYK43WJWea9XHY3n6tqxnpN8Fm7GzH6d4YCegy7YGfMqXo4b7kWUr X-Received: by 2002:aa7:868f:: with SMTP id d15mr7836989pfo.225.1544917568155; Sat, 15 Dec 2018 15:46:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544917568; cv=none; d=google.com; s=arc-20160816; b=FB0pLONoaLMUpWuHMbecqYs/IqQ22K2NBS/9m/8399zlmSMU6qsob9BXU+2uuy1eMJ TiZi9VOW2kNJjHDxHZ49B/UmbYCUzRGwefEax5rK7S641Z43kyRLN1y0gCPm9HbTcmwl LNXtPtjb8DNQ00G2gckIzJNtwPYyTH6tLq01u+kRVuboM6UG0s8X5Psy0fz8qnI8N0gF wZAf5ok5m+EUG9YGkfimzzcieYznaWotxfbC6xBOtdBt1dT4CYPqBuwrG63FpMIcLTue fJhtHy7jkL+1aA3I8Y/ReaOxhAwVlM2LvFKq2WJ2TxiRf71ZfzoodhkOAXTB6G2cxf/o FpJA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=iHv29zTjPCD2odmzofUPFh/r9yEa+aBrNFMCDdhB260=; b=qctScp6/2mZ68efvrWhz3TTFvUdJwt1CZLHy4qAeqpoxoUlznB5jmqZzZklwdSRdpd HQ9LBJw2F3KnjQvzBBKQkqnvU+tvZIPmjhKMZuEovBbrFJKrd2ROUXed7w/qHhsLvdvv 4QK/9aigix+4eSQIjgQdPf/ufgz4OXg1zkYOYSsxOcBxGcWWlXDj6GEEdd7gXkxDhugk A9Lr22yTa65yqFpeP1cqkHV+iVniO/f/OKKN6ZcJRA42u837EQpBy8Vm8hFu+qp9nmfc 5gOBU9nW0mytD24IDIkFExfJFL8BRxFbR74b8dfz+9HJRs4ljPhMu0hJH1JKYglXZzUV oMng== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="HOS/z83j"; spf=pass (google.com: best guess record for domain of linux-spi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-spi-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[213.113.123.174]) by smtp.gmail.com with ESMTPSA id v19sm1709880lfe.69.2018.12.15.15.46.02 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 15 Dec 2018 15:46:03 -0800 (PST) From: Linus Walleij To: Mark Brown , linux-spi@vger.kernel.org Cc: linux-gpio@vger.kernel.org, Bartosz Golaszewski , linuxarm@huawei.com, Linus Walleij , Eugen Hristev , Nicolas Ferre , Radu Pirea Subject: [PATCH 3/7 v1] spi: atmel: Convert to use CS GPIO descriptors Date: Sun, 16 Dec 2018 00:38:19 +0100 Message-Id: <20181215233823.1042-4-linus.walleij@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181215233823.1042-1-linus.walleij@linaro.org> References: <20181215233823.1042-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org This converts the Atmel SPI master driver to use GPIO descriptors for chip select handling. The Atmel driver has duplicate code to look up and initialize CS GPIOs from the device tree, so this is removed. It further has code to retrieve a CS GPIO from .controller_data but this seems to be completely unused in the kernel (legacy codepath?) so I deleted this support. It keeps track of polarity when switching the CS, but this is not needed anymore since we moved this over to the gpiolib. The local handling of the "npcs_pin" (I guess this might mean "negative polarity chip select pin") is preserved, but I strongly suspect this can be switched over to handling by the core and using the SPI_MASTER_GPIO_SS flag on the master to assure that the additional CS handling in the driver is also done. Cc: Eugen Hristev Cc: Nicolas Ferre Cc: Radu Pirea Cc: Linuxarm Signed-off-by: Linus Walleij --- drivers/spi/spi-atmel.c | 93 ++++++++++++----------------------------- 1 file changed, 27 insertions(+), 66 deletions(-) -- 2.19.2 diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c index 74fddcd3282b..f53f0c5e63da 100644 --- a/drivers/spi/spi-atmel.c +++ b/drivers/spi/spi-atmel.c @@ -23,8 +23,7 @@ #include #include -#include -#include +#include #include #include @@ -312,7 +311,7 @@ struct atmel_spi { /* Controller-specific per-slave state */ struct atmel_spi_device { - unsigned int npcs_pin; + struct gpio_desc *npcs_pin; u32 csr; }; @@ -355,7 +354,6 @@ static bool atmel_spi_is_v2(struct atmel_spi *as) static void cs_activate(struct atmel_spi *as, struct spi_device *spi) { struct atmel_spi_device *asd = spi->controller_state; - unsigned active = spi->mode & SPI_CS_HIGH; u32 mr; if (atmel_spi_is_v2(as)) { @@ -379,7 +377,7 @@ static void cs_activate(struct atmel_spi *as, struct spi_device *spi) mr = spi_readl(as, MR); if (as->use_cs_gpios) - gpio_set_value(asd->npcs_pin, active); + gpiod_set_value(asd->npcs_pin, 1); } else { u32 cpol = (spi->mode & SPI_CPOL) ? SPI_BIT(CPOL) : 0; int i; @@ -396,19 +394,16 @@ static void cs_activate(struct atmel_spi *as, struct spi_device *spi) mr = spi_readl(as, MR); mr = SPI_BFINS(PCS, ~(1 << spi->chip_select), mr); if (as->use_cs_gpios && spi->chip_select != 0) - gpio_set_value(asd->npcs_pin, active); + gpiod_set_value(asd->npcs_pin, 1); spi_writel(as, MR, mr); } - dev_dbg(&spi->dev, "activate %u%s, mr %08x\n", - asd->npcs_pin, active ? " (high)" : "", - mr); + dev_dbg(&spi->dev, "activate NPCS, mr %08x\n", mr); } static void cs_deactivate(struct atmel_spi *as, struct spi_device *spi) { struct atmel_spi_device *asd = spi->controller_state; - unsigned active = spi->mode & SPI_CS_HIGH; u32 mr; /* only deactivate *this* device; sometimes transfers to @@ -420,14 +415,12 @@ static void cs_deactivate(struct atmel_spi *as, struct spi_device *spi) spi_writel(as, MR, mr); } - dev_dbg(&spi->dev, "DEactivate %u%s, mr %08x\n", - asd->npcs_pin, active ? " (low)" : "", - mr); + dev_dbg(&spi->dev, "DEactivate NPCS, mr %08x\n", mr); if (!as->use_cs_gpios) spi_writel(as, CR, SPI_BIT(LASTXFER)); else if (atmel_spi_is_v2(as) || spi->chip_select != 0) - gpio_set_value(asd->npcs_pin, !active); + gpiod_set_value(asd->npcs_pin, 0); } static void atmel_spi_lock(struct atmel_spi *as) __acquires(&as->lock) @@ -1188,7 +1181,6 @@ static int atmel_spi_setup(struct spi_device *spi) struct atmel_spi_device *asd; u32 csr; unsigned int bits = spi->bits_per_word; - unsigned int npcs_pin; as = spi_master_get_devdata(spi->master); @@ -1217,25 +1209,27 @@ static int atmel_spi_setup(struct spi_device *spi) csr |= SPI_BF(DLYBS, 0); csr |= SPI_BF(DLYBCT, 0); - /* chipselect must have been muxed as GPIO (e.g. in board setup) */ - npcs_pin = (unsigned long)spi->controller_data; - - if (!as->use_cs_gpios) - npcs_pin = spi->chip_select; - else if (gpio_is_valid(spi->cs_gpio)) - npcs_pin = spi->cs_gpio; - asd = spi->controller_state; if (!asd) { asd = kzalloc(sizeof(struct atmel_spi_device), GFP_KERNEL); if (!asd) return -ENOMEM; - if (as->use_cs_gpios) - gpio_direction_output(npcs_pin, - !(spi->mode & SPI_CS_HIGH)); + /* + * If use_cs_gpios is true this means that we have "cs-gpios" + * defined in the device tree node so we should have + * gotten the GPIO lines from the device tree inside the + * SPI core. Warn if this is not the case but continue since + * CS GPIOs are after all optional. + */ + if (as->use_cs_gpios) { + if (!spi->cs_gpiod) { + dev_err(&spi->dev, + "host claims to use CS GPIOs but no CS found in DT by the SPI core\n"); + } + asd->npcs_pin = spi->cs_gpiod; + } - asd->npcs_pin = npcs_pin; spi->controller_state = asd; } @@ -1473,41 +1467,6 @@ static void atmel_get_caps(struct atmel_spi *as) as->caps.has_pdc_support = version < 0x212; } -/*-------------------------------------------------------------------------*/ -static int atmel_spi_gpio_cs(struct platform_device *pdev) -{ - struct spi_master *master = platform_get_drvdata(pdev); - struct atmel_spi *as = spi_master_get_devdata(master); - struct device_node *np = master->dev.of_node; - int i; - int ret = 0; - int nb = 0; - - if (!as->use_cs_gpios) - return 0; - - if (!np) - return 0; - - nb = of_gpio_named_count(np, "cs-gpios"); - for (i = 0; i < nb; i++) { - int cs_gpio = of_get_named_gpio(pdev->dev.of_node, - "cs-gpios", i); - - if (cs_gpio == -EPROBE_DEFER) - return cs_gpio; - - if (gpio_is_valid(cs_gpio)) { - ret = devm_gpio_request(&pdev->dev, cs_gpio, - dev_name(&pdev->dev)); - if (ret) - return ret; - } - } - - return 0; -} - static void atmel_spi_init(struct atmel_spi *as) { spi_writel(as, CR, SPI_BIT(SWRST)); @@ -1560,6 +1519,7 @@ static int atmel_spi_probe(struct platform_device *pdev) goto out_free; /* the spi->mode bits understood by this driver: */ + master->use_gpio_descriptors = true; master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; master->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 16); master->dev.of_node = pdev->dev.of_node; @@ -1592,6 +1552,11 @@ static int atmel_spi_probe(struct platform_device *pdev) atmel_get_caps(as); + /* + * If there are chip selects in the device tree, those will be + * discovered by the SPI core when registering the SPI master + * and assigned to each SPI device. + */ as->use_cs_gpios = true; if (atmel_spi_is_v2(as) && pdev->dev.of_node && @@ -1600,10 +1565,6 @@ static int atmel_spi_probe(struct platform_device *pdev) master->num_chipselect = 4; } - ret = atmel_spi_gpio_cs(pdev); - if (ret) - goto out_unmap_regs; - as->use_dma = false; as->use_pdc = false; if (as->caps.has_dma_support) { From patchwork Sat Dec 15 23:38:21 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 153942 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp955863ljp; Sat, 15 Dec 2018 15:46:10 -0800 (PST) X-Google-Smtp-Source: AFSGD/Up9xDkq87R3ols1/bZk6BWgwuOYDzUY5lpJdrvFl+4SHk43I9nLk2JzPagxXc0srtDroRn X-Received: by 2002:a17:902:9305:: with SMTP id bc5mr7843161plb.86.1544917570547; Sat, 15 Dec 2018 15:46:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544917570; cv=none; d=google.com; s=arc-20160816; b=wUXsrC2EAgf7DrvIdDZbOpyBIfjoJxiMZRBPgDYA0mGW1AspVtuZA20+NK/NAXWruo 79/xm4sJ0xtai//htEwXO8kj2E7Q48Q9eEqMygD6XtpC/4AV8SD619bj7kRUwyte6erL 809Zz/5HUsEpa6AMltVnFY0xm6BfISMY3Qa7hXF1Zz3Z78iAfG1lJwv0bzR99dHDKp1h cLzN5otLCrCHW2BjrCNKaBZki/Oelwvj+gXTipIT1coJ9Ip9vOB4BscePE4mW6V3s6kd teiisKG2giraC3eEtVBEbF30o7cavDQkAdnCzN8CMXrQrzk4pWL4nUt1sk5hjx5reB1Z 6g0A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=uHetMijksPyCSUIw0pfFByRtDh1ZLhdoLZ37wl+MRTg=; b=eBRgd3vo3sEceI4m58U281jKRxhlDw1JhdUbOmJvhSv8mjaUtR6ySelEZlqxDYxdXh eSeziXFn9MkyL3FkJhT7Ftnbi1jjQJ/W0XFD5KCpDnSJyQQtNRWJuo1L1U1oEJDHt1ft Hb2r0270kGAIOLXXc1juE1LW1wsQnDvlJsu8zQfknuxQ+FkCoKFxXLH1TdjOc5v6tIEX gn6XuKD5hlLgBa9K8Zr99oMqVzskYcqRHJH8BeuiiSD5Gfe9e4OXbhMOGxWxX+wh4PC4 xC4pikUw+reJDKOFIQzooDvsmSq3F2p5odDYsf0GBtqy94CNXnPA15uddy8QgMboBN6J 72Ow== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Nq3Oq1Ue; spf=pass (google.com: best guess record for domain of linux-spi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-spi-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[213.113.123.174]) by smtp.gmail.com with ESMTPSA id v19sm1709880lfe.69.2018.12.15.15.46.06 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 15 Dec 2018 15:46:06 -0800 (PST) From: Linus Walleij To: Mark Brown , linux-spi@vger.kernel.org Cc: linux-gpio@vger.kernel.org, Bartosz Golaszewski , linuxarm@huawei.com, Linus Walleij , Alexander Shiyan Subject: [PATCH 5/7 v1] spi: clps711x: Convert to use CS GPIO descriptors Date: Sun, 16 Dec 2018 00:38:21 +0100 Message-Id: <20181215233823.1042-6-linus.walleij@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181215233823.1042-1-linus.walleij@linaro.org> References: <20181215233823.1042-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org This converts the CLPS711x SPI master driver to use GPIO descriptors for chip select handling. The CLPS711x driver was merely requesting the GPIO and setting the CS line non-asserted so this was a pretty straight-forward conversion. The setup callback goes away. Cc: Alexander Shiyan Cc: Linuxarm Signed-off-by: Linus Walleij --- drivers/spi/spi-clps711x.c | 23 ++--------------------- 1 file changed, 2 insertions(+), 21 deletions(-) -- 2.19.2 diff --git a/drivers/spi/spi-clps711x.c b/drivers/spi/spi-clps711x.c index 18193df2eba8..8c03c409fc07 100644 --- a/drivers/spi/spi-clps711x.c +++ b/drivers/spi/spi-clps711x.c @@ -11,7 +11,7 @@ #include #include -#include +#include #include #include #include @@ -36,25 +36,6 @@ struct spi_clps711x_data { int len; }; -static int spi_clps711x_setup(struct spi_device *spi) -{ - if (!spi->controller_state) { - int ret; - - ret = devm_gpio_request(&spi->master->dev, spi->cs_gpio, - dev_name(&spi->master->dev)); - if (ret) - return ret; - - spi->controller_state = spi; - } - - /* We are expect that SPI-device is not selected */ - gpio_direction_output(spi->cs_gpio, !(spi->mode & SPI_CS_HIGH)); - - return 0; -} - static int spi_clps711x_prepare_message(struct spi_master *master, struct spi_message *msg) { @@ -125,11 +106,11 @@ static int spi_clps711x_probe(struct platform_device *pdev) if (!master) return -ENOMEM; + master->use_gpio_descriptors = true; master->bus_num = -1; master->mode_bits = SPI_CPHA | SPI_CS_HIGH; master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 8); master->dev.of_node = pdev->dev.of_node; - master->setup = spi_clps711x_setup; master->prepare_message = spi_clps711x_prepare_message; master->transfer_one = spi_clps711x_transfer_one; From patchwork Sat Dec 15 23:38:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 153943 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp955888ljp; Sat, 15 Dec 2018 15:46:13 -0800 (PST) X-Google-Smtp-Source: AFSGD/W+/da5ZqU7ryKQflCiWQ386h7tjbZSF5ZC7H+IoQNMCd3WSFOWQqbGCjhvtJpbARAOGk48 X-Received: by 2002:a17:902:7296:: with SMTP id d22mr8096868pll.265.1544917573823; Sat, 15 Dec 2018 15:46:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544917573; cv=none; d=google.com; s=arc-20160816; b=w5J5e4V9rloJl1Wm5/a0m5fN5DKlEJskt1PXu2orhDmab2ok+01hXRcsc/yEeSw1EP +RQXtoej1zTgqBrMoGYA5V0kF0fiuwQdC3rM0+wIk0WJQ1dwELrNXFSoTEt1VgPtpXky DHEJ9MMQXlVUjUt4+XdmMy9D2daYkFUNA5lN43u+/o0bD4N3HtU/yWf9dQ67GuszMMFa OmoMgtrhhQQ9+uomNMEL1V560IDJhuD4ateJhzid1hyjGnc1n/0q2PbDm3q5E9GkQqXE hREXOluC44tJ4gIMI+9PO1tWbEKRL91/33R+rFGyFvZ4//3IYLE7nr2sSmDyvUoINRjM bHIw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=+QVluDsAh2KxwyVgFTK4TpkVU9aWMBwmEKsmYxoK/Rw=; b=qRlbBi265rpSiJs+/9zwIVV3N6VJDLrxWRaMA5+onjUX7g8NgnGDtUl/beSUk3p+nK jMXiJzJB2OqDyZ3KsUgEl+ytsTJd5jiI+zff6sLip5iDS6m9gwvj2hQ0GSeuJkIW+v69 2pJU5VAviyVR0aHhmxI4B/rQjeQUM5dxkyjvAM3u1NzeNR+RKsVVdTvPSPt9HBf9XKGb YMUfcSgna7249Xicf3D2msFBw5t9lhT8u8ENeAYJ4SPIQXlkD0H7Zk61VKd8fAQhKInp OSNSGOd/Uye4dMgDDBfCp/6GnJl5an7CqEfOyVheZgs4g7PslgWGeUNGKVJa7KdTNe8Q 3b3g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=aG3aq7yl; spf=pass (google.com: best guess record for domain of linux-spi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-spi-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[213.113.123.174]) by smtp.gmail.com with ESMTPSA id v19sm1709880lfe.69.2018.12.15.15.46.08 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 15 Dec 2018 15:46:08 -0800 (PST) From: Linus Walleij To: Mark Brown , linux-spi@vger.kernel.org Cc: linux-gpio@vger.kernel.org, Bartosz Golaszewski , linuxarm@huawei.com, Linus Walleij , David Lechner Subject: [PATCH 6/7 v1] spi: davinci: Convert to use CS GPIO descriptors Date: Sun, 16 Dec 2018 00:38:22 +0100 Message-Id: <20181215233823.1042-7-linus.walleij@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181215233823.1042-1-linus.walleij@linaro.org> References: <20181215233823.1042-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org This converts the DaVinci SPI master driver to use GPIO descriptors for chip select handling. DaVinci parses the device tree a second time for the chip select GPIOs (no relying on the parsing already happening in the SPI core) and handles inversion semantics locally. We simply drop the extra parsing and set up and move the CS handling to the core and gpiolib. The fact that the driver is actively driving the GPIO in the davinci_spi_chipselect() callback is confusing since the host does not set SPI_MASTER_GPIO_SS so this should not ever get called when using GPIO CS. I put in a comment about this. This driver also supports instantiation from board files, but these are all using native chip selects so no problem with GPIO lines here. Cc: David Lechner Cc: Bartosz Golaszewski Cc: Linuxarm Signed-off-by: Linus Walleij --- drivers/spi/spi-davinci.c | 53 ++++++++++----------------------------- 1 file changed, 13 insertions(+), 40 deletions(-) -- 2.19.2 diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c index 56adec83f8fc..5870afe3845b 100644 --- a/drivers/spi/spi-davinci.c +++ b/drivers/spi/spi-davinci.c @@ -15,7 +15,7 @@ #include #include -#include +#include #include #include #include @@ -25,7 +25,6 @@ #include #include #include -#include #include #include #include @@ -222,12 +221,17 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value) * Board specific chip select logic decides the polarity and cs * line for the controller */ - if (spi->cs_gpio >= 0) { + if (spi->cs_gpiod) { + /* + * FIXME: is this code ever executed? This host does not + * set SPI_MASTER_GPIO_SS so this chipselect callback should + * not get called from the SPI core when we are using + * GPIOs for chip select. + */ if (value == BITBANG_CS_ACTIVE) - gpio_set_value(spi->cs_gpio, spi->mode & SPI_CS_HIGH); + gpiod_set_value(spi->cs_gpiod, 1); else - gpio_set_value(spi->cs_gpio, - !(spi->mode & SPI_CS_HIGH)); + gpiod_set_value(spi->cs_gpiod, 0); } else { if (value == BITBANG_CS_ACTIVE) { if (!(spi->mode & SPI_CS_WORD)) @@ -418,7 +422,6 @@ static int davinci_spi_of_setup(struct spi_device *spi) */ static int davinci_spi_setup(struct spi_device *spi) { - int retval = 0; struct davinci_spi *dspi; struct spi_master *master = spi->master; struct device_node *np = spi->dev.of_node; @@ -427,21 +430,11 @@ static int davinci_spi_setup(struct spi_device *spi) dspi = spi_master_get_devdata(spi->master); if (!(spi->mode & SPI_NO_CS)) { - if (np && (master->cs_gpios != NULL) && (spi->cs_gpio >= 0)) { - retval = gpio_direction_output( - spi->cs_gpio, !(spi->mode & SPI_CS_HIGH)); + if (np && spi->cs_gpiod) internal_cs = false; - } - - if (retval) { - dev_err(&spi->dev, "GPIO %d setup failed (%d)\n", - spi->cs_gpio, retval); - return retval; - } - if (internal_cs) { + if (internal_cs) set_io_bits(dspi->base + SPIPC0, 1 << spi->chip_select); - } } if (spi->mode & SPI_READY) @@ -962,6 +955,7 @@ static int davinci_spi_probe(struct platform_device *pdev) if (ret) goto free_master; + master->use_gpio_descriptors = true; master->dev.of_node = pdev->dev.of_node; master->bus_num = pdev->id; master->num_chipselect = pdata->num_chipselect; @@ -980,27 +974,6 @@ static int davinci_spi_probe(struct platform_device *pdev) if (dspi->version == SPI_VERSION_2) dspi->bitbang.flags |= SPI_READY; - if (pdev->dev.of_node) { - int i; - - for (i = 0; i < pdata->num_chipselect; i++) { - int cs_gpio = of_get_named_gpio(pdev->dev.of_node, - "cs-gpios", i); - - if (cs_gpio == -EPROBE_DEFER) { - ret = cs_gpio; - goto free_clk; - } - - if (gpio_is_valid(cs_gpio)) { - ret = devm_gpio_request(&pdev->dev, cs_gpio, - dev_name(&pdev->dev)); - if (ret) - goto free_clk; - } - } - } - dspi->bitbang.txrx_bufs = davinci_spi_bufs; ret = davinci_spi_request_dma(dspi);