From patchwork Mon Apr 25 16:23:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 565857 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E3EECC433FE for ; Mon, 25 Apr 2022 16:25:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237946AbiDYQ2g (ORCPT ); Mon, 25 Apr 2022 12:28:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37344 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243450AbiDYQ1c (ORCPT ); Mon, 25 Apr 2022 12:27:32 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.196]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 35EFC11F953; Mon, 25 Apr 2022 09:24:28 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0M5dpW-1o71br34iu-00xYXo; Mon, 25 Apr 2022 18:24:16 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Philippe Schenker , Denys Drozdov , Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 03/14] ARM: dts: imx6ull-colibri: add phy-supply to fec Date: Mon, 25 Apr 2022 18:23:45 +0200 Message-Id: <20220425162356.176665-4-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220425162356.176665-1-marcel@ziswiler.com> References: <20220425162356.176665-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:0+FdhGU/ntWSyzpR14rp2dCwoQdc4CNQ9T0hYVYyUUwi3KM+KpG exShnAs/Ds92DrnCQj9hmRrR3CY3VHg5D59Tn0fGbc0do/tbUZP9hScRYNVA9Z0kVD3WNct FiujCO8oh5T04QNabFA86wcpfTXRM58mkzyHAyWcER/2Ats2XSBcUXeb7LX5blokcD3ifmT ashJGylaG1yJzpz7Vdb3w== X-UI-Out-Filterresults: notjunk:1;V03:K0:xYLDPxswUR0=:cWdIX1HrKGoQCP4mL+ejXx IWVgTVNNsKu57P1t4tmxUKqH1T9s5K8kDGLaSjDHqVGgMpulZN5FHSLHtlzB5jsIIcPvXn7JJ QJEmUuPmL1XrjrEcp/8tW3UA9ICLq8mtaxMkcurBQHzRKLMzr4hrEvDtxsnY877/7zwCld7bS WLnysdB3x8YdJn8hyHhjlecNZ2r9mPZX9rYAeoxts5D5Z7S6kyByH5Ihs8tn7r4LDcwse6IRM s7RXd/GoKjBwDJQx/tdSbACL4eyEQbSmQjNS+OtUzjQtHlw7Mn+Oi2hjVLULrEwILDHOG934M UuZRaqXWhJJtgG6r6ksdjXq1LZ4ghrmU0+BbL3flxXbKzZTJqm1u7jPwoMvRvpVgGqRhjfShP 8ZcRfKrDHDWqRojRMofNgPVQUbPLqvmQKip3rg5fAfbWtnYZVGTTrHwtK2tPlJ+YXrYTKE2Yz Bj8Nka4iqFxf37KWxmp3ltRkiPcEpG8MnVs7z86xcSH9DFq5i7rwQsDNK4qYRhHw5Umxu5xaW cVq1urtJmBgnPiw2RKpi2IkWUiOeTCoK11OE1It6AV4vUlc2HYnEjMkEmkuAkPhJ6uHi/MzgI /gVipa6ywOGRjzM8rVVa5N++lJBiApjjGDb0gwHwDPQ+0fZ5ROLVhhSKN6yi+hMpls4l+/ycg YmBloNQv7aDS35YY65VtvDcNVjzZjKVUYz7pT1DoqstkT3toK/9ZM9Nowt/lIO78NSos= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Philippe Schenker This adds the proper phy-supply to the FEC. This supply is actually switched by a clock that is now properly stated. This has the advantage to add a delay for that particular regulator which is needed. Signed-off-by: Philippe Schenker Signed-off-by: Denys Drozdov Signed-off-by: Marcel Ziswiler --- (no changes since v1) arch/arm/boot/dts/imx6ull-colibri.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx6ull-colibri.dtsi index bea00cfaa820..e619da3b00b3 100644 --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi @@ -47,6 +47,18 @@ reg_sd1_vmmc: regulator-sd1-vmmc { states = <1800000 0x1 3300000 0x0>; vin-supply = <®_module_3v3>; }; + + reg_eth_phy: regulator-eth-phy { + compatible = "regulator-fixed-clock"; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "+V3.3_ETH"; + regulator-type = "voltage"; + vin-supply = <®_module_3v3>; + clocks = <&clks IMX6UL_CLK_ENET2_REF_125M>; + startup-delay-us = <150000>; + }; }; &adc1 { @@ -81,6 +93,7 @@ &fec2 { pinctrl-1 = <&pinctrl_enet2_sleep>; phy-mode = "rmii"; phy-handle = <ðphy1>; + phy-supply = <®_eth_phy>; status = "okay"; mdio { From patchwork Mon Apr 25 16:23:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 565860 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1B904C4332F for ; Mon, 25 Apr 2022 16:25:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243491AbiDYQ2X (ORCPT ); Mon, 25 Apr 2022 12:28:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38110 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243497AbiDYQ1o (ORCPT ); Mon, 25 Apr 2022 12:27:44 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0005311F953; Mon, 25 Apr 2022 09:24:39 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MIcLW-1nlDMm0OF6-002Gzw; Mon, 25 Apr 2022 18:24:24 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Denys Drozdov , Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 06/14] ARM: dts: imx6ull-colibri: update device trees to support overlays Date: Mon, 25 Apr 2022 18:23:48 +0200 Message-Id: <20220425162356.176665-7-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220425162356.176665-1-marcel@ziswiler.com> References: <20220425162356.176665-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:+igbeOghPhe6M3gEizB8AVT7oSjjfiUdrze/kubBf24xhfoW15O O6mFkgRIAi+NMEP9ztA8Cx66mpJtVKPBVPOuuT5kONJVhezN+L+Zt9O8R/glThQLCLwKNIo uaKSMosEQoY68PsU0BXn5KR1buyrrUQZul/hHsTJjtXhomCdX72UcREW7Y+xmA1anfaRr+D 7mTxKOg/TerJ8JP1OyzqQ== X-UI-Out-Filterresults: notjunk:1;V03:K0:t8g3efxgEBg=:BvN3l9h5fjZ7lUIsV5IsqF I7PJtrF3Pp51fJ93iVf9R5GjrH5oRFQaOBDotbK69D7qUQgZFGeooF8Nho3GnqYvUmG6FKlyH pII2mpnAnX+LQ5UX1Ku2wP43yF5zfr0ocxpKz/zoWn87uUnR/UT8aG2oy9OKixx58bLSIZqJ+ XdXZT+Ms4ZQ5K5R9Rgxrhuupx0pbm/KWuaIE2RsmJdMZFAkwk0rsgBw9JWscery+rWArhluVi fyPKKpdL+DEUQY+uxJc5t0z8cyo4rzg1u5syFkx1DGEefcb05/ndUrZPXtmnl91aU2ql8RfjM IPBy97Tit7o2xJxcOfhL64RXSAzMQJ1KBvsBK2pk3G5kL1RywY10zcVHnBj/lCbBuUHT5eAQx GFj2PK5QA3rYk209qlmFgdLpeM/1aFO5uuDAItxJ24dnFPDqSKyz+GLkTvEvdaeEBUZZAZFGF UIhaz3JXlYcUKRcSFK79odOgUWGi+UUPthvbczuG4kY+Dhn2DyDRyF/T/M1+vFArp9flsU+Md vBl9FPf1YufcQWy2efiyLBRVP6uyzOytN2FZ+BItUt33TMJUWWzOvdv3xeXmivrexiL2Y9vbS MR/gtFTQsefdYYi6OW/x9IH/R2Z7cu9wsqgzX3VS7t2tqrgK5SHvAFPJ/RPoZWOF0RXcFD4l+ ki1pgMOmO2obbAGWADTrNp3GzU06DDixphUtYlTSYpUqNrzsE7xB9JmonmuDHBftjc/sLalB/ EBAssrKQSRa8rK9U Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Denys Drozdov Prepare in-tree device trees for out-of-tree device tree overlay support (eMMC SKU only). Relocate panel-dpi default to edt,et057090dhu (RGB 18bit VGA 640x480) to the module-level dtsi and remove it from the carrier board dtsi. Keep backlight, resistive touch and Atmel maxtouch nodes enabled for both eMMC and NAND modules. Signed-off-by: Denys Drozdov Signed-off-by: Marcel Ziswiler --- (no changes since v1) .../arm/boot/dts/imx6ull-colibri-eval-v3.dtsi | 29 ----------------- arch/arm/boot/dts/imx6ull-colibri.dtsi | 31 ++++++++++++++++--- 2 files changed, 27 insertions(+), 33 deletions(-) diff --git a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi index ea086b305d22..3c07b4273e80 100644 --- a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi @@ -29,17 +29,6 @@ clk16m: clk16m { clock-frequency = <16000000>; }; - panel: panel { - compatible = "edt,et057090dhu"; - backlight = <&bl>; - power-supply = <®_3v3>; - - port { - panel_in: endpoint { - remote-endpoint = <&lcdif_out>; - }; - }; - }; reg_3v3: regulator-3v3 { compatible = "regulator-fixed"; @@ -71,14 +60,6 @@ &adc1 { status = "okay"; }; -&bl { - brightness-levels = <0 4 8 16 32 64 128 255>; - default-brightness-level = <6>; - power-supply = <®_3v3>; - pwms = <&pwm4 0 5000000 1>; - status = "okay"; -}; - &ecspi1 { status = "okay"; @@ -107,16 +88,6 @@ m41t0m6: rtc@68 { }; }; -&lcdif { - status = "okay"; - - port { - lcdif_out: endpoint { - remote-endpoint = <&panel_in>; - }; - }; -}; - /* PWM */ &pwm4 { status = "okay"; diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx6ull-colibri.dtsi index bd8736d90cbb..756cb4222805 100644 --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi @@ -11,12 +11,29 @@ aliases { ethernet1 = &fec1; }; - bl: backlight { + backlight: backlight { compatible = "pwm-backlight"; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; + enable-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_bl_on>; - enable-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>; - status = "disabled"; + power-supply = <®_3v3>; + pwms = <&pwm4 0 5000000 1>; + status = "okay"; + }; + + panel_dpi: panel-dpi { + compatible = "edt,et057090dhu"; + backlight = <&backlight>; + power-supply = <®_3v3>; + status = "okay"; + + port { + lcd_panel_in: endpoint { + remote-endpoint = <&lcdif_out>; + }; + }; }; reg_module_3v3: regulator-module-3v3 { @@ -149,7 +166,7 @@ &i2c2 { scl-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status = "okay"; - ad7879@2c { + ad7879_ts: touchscreen@2c { compatible = "adi,ad7879-1"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_snvs_ad7879_int>; @@ -170,6 +187,12 @@ &lcdif { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lcdif_dat &pinctrl_lcdif_ctrl>; + + port { + lcdif_out: endpoint { + remote-endpoint = <&lcd_panel_in>; + }; + }; }; &pwm4 { From patchwork Mon Apr 25 16:23:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 565861 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 60FF2C4332F for ; Mon, 25 Apr 2022 16:25:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243499AbiDYQ2Q (ORCPT ); Mon, 25 Apr 2022 12:28:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39062 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243537AbiDYQ14 (ORCPT ); Mon, 25 Apr 2022 12:27:56 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.196]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E359011F953; Mon, 25 Apr 2022 09:24:51 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0M5dpW-1o71aO2Im0-00xYXo; Mon, 25 Apr 2022 18:24:37 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Denys Drozdov , Marcel Ziswiler , Arnd Bergmann , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Olof Johansson , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, soc@kernel.org Subject: [PATCH v2 10/14] ARM: dts: imx6ull-colibri: add support for toradex aster carrier boards Date: Mon, 25 Apr 2022 18:23:52 +0200 Message-Id: <20220425162356.176665-11-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220425162356.176665-1-marcel@ziswiler.com> References: <20220425162356.176665-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:Hzr4iHc16kut1SNComZgrRs7isdK2Ry5z8GurKHUydqJTTC1fQT ZKtj/cM4MAoNy294udAHPQDujvE7B+/A5GwSy3sYlCODuKxzV9KzRMBv+rizSOAQISv2WrQ cRlqd/90TWZFQWzUefnF4XdmkZmxriN7gAjQIUUSYzhuo/akePzPpWTE/2hlBZ8Emi2MNnq KqqmlK742DIUsOwF1gAfw== X-UI-Out-Filterresults: notjunk:1;V03:K0:L27nKVNhx7s=:k5VF5uqJSuiihzASpAUSa2 0xiET0q86BMaG7NqS1vqcZCk55y38oyUUXY6juSRcuAUrCHm944CcieqVv1C+9jMM/ysWKcbE P6FWeP17t/fjlw5CseTUX6uc9ZKoluMUWPf+Os8wC1i5suHvSR80HuHwcM9yuOEKRjT9+xoY3 QfZbbXZtJYRHhQE41JSgNH9THv6KOqiZoNld/+89+TG49WYaK7AkF7nIuKcNS/eQCec1isdcj NQ02UBo2M+l8tWUayNTL+dJLngb1UwT7OyzqBMlmS56ssWpZqw8nTlo7Z8J+vOhzQAz94x2FK FiZy96X1QZKtzdGsNOVg3MRkXDGJemAbQgFD3w850jb1V2LKzvhrP9VyZBr3+tGJFNe8P5W0D gAuZ7DoGTDorUfI0z+gCQDo3vj7sgAJHn/oomr4ds3CpIGcGqBNKNi9ppITYCmGVp1RY/P5fn idcfiCvvkBjlheMMPb7nmnqC5+ul+O6ALalWICJRuKBJmMOtgsyQrjLdHUSEtRuR7gU1xw913 oxlmfJn//lmv5WlC0gOuHX0KGqTZgaFhpKzoFhJ/aOdoKtydaIdgeoOqo+zkPkTononilpNpu S5fUIT58dOdNajy79NIs6Rz8CeCi/wXieM1EBBJGy/qHcbswz+tuE2sxbU2c0/9d0hGLeXGK9 9FGvbju1kMUmalllbXaZ/i5vDSGV2gLoNnwI6UWW7XNw1d9ItItmyVfSVca4s5nHjShE= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Denys Drozdov Add support for Toradex Aster, small form-factor Colibri Arm Computer Module family carrier board. Aster Device Trees: - imx6ull-colibri-aster.dtb - imx6ull-colibri-emmc-aster.dtb - imx6ull-colibri-wifi-aster.dtb Signed-off-by: Denys Drozdov Signed-off-by: Marcel Ziswiler --- Changes in v2: - Dropped [PATCH v1 02/14] ARM: dts: imx6ull-colibri: fix vqmmc regulator which already got applied by Shawn. Thanks! arch/arm/boot/dts/Makefile | 3 + arch/arm/boot/dts/imx6ull-colibri-aster.dts | 20 +++ arch/arm/boot/dts/imx6ull-colibri-aster.dtsi | 145 ++++++++++++++++++ .../boot/dts/imx6ull-colibri-emmc-aster.dts | 17 ++ .../boot/dts/imx6ull-colibri-wifi-aster.dts | 20 +++ 5 files changed, 205 insertions(+) create mode 100644 arch/arm/boot/dts/imx6ull-colibri-aster.dts create mode 100644 arch/arm/boot/dts/imx6ull-colibri-aster.dtsi create mode 100644 arch/arm/boot/dts/imx6ull-colibri-emmc-aster.dts create mode 100644 arch/arm/boot/dts/imx6ull-colibri-wifi-aster.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 727aa78443e1..011f0747fdb2 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -706,12 +706,15 @@ dtb-$(CONFIG_SOC_IMX6UL) += \ imx6ul-tx6ul-0011.dtb \ imx6ul-tx6ul-mainboard.dtb \ imx6ull-14x14-evk.dtb \ + imx6ull-colibri-aster.dtb \ + imx6ull-colibri-emmc-aster.dtb \ imx6ull-colibri-emmc-eval-v3.dtb \ imx6ull-colibri-emmc-iris.dtb \ imx6ull-colibri-emmc-iris-v2.dtb \ imx6ull-colibri-eval-v3.dtb \ imx6ull-colibri-iris.dtb \ imx6ull-colibri-iris-v2.dtb \ + imx6ull-colibri-wifi-aster.dtb \ imx6ull-colibri-wifi-eval-v3.dtb \ imx6ull-colibri-wifi-iris.dtb \ imx6ull-colibri-wifi-iris-v2.dtb \ diff --git a/arch/arm/boot/dts/imx6ull-colibri-aster.dts b/arch/arm/boot/dts/imx6ull-colibri-aster.dts new file mode 100644 index 000000000000..d3f2fb7c6c1e --- /dev/null +++ b/arch/arm/boot/dts/imx6ull-colibri-aster.dts @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2017-2022 Toradex + */ + +/dts-v1/; + +#include "imx6ull-colibri-nonwifi.dtsi" +#include "imx6ull-colibri-aster.dtsi" + +/ { + model = "Toradex Colibri iMX6ULL 256/512MB on Colibri Aster"; + compatible = "toradex,colibri-imx6ull-aster", + "toradex,colibri-imx6ull", + "fsl,imx6ull"; +}; + +&atmel_mxt_ts { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx6ull-colibri-aster.dtsi b/arch/arm/boot/dts/imx6ull-colibri-aster.dtsi new file mode 100644 index 000000000000..c9133ba2d705 --- /dev/null +++ b/arch/arm/boot/dts/imx6ull-colibri-aster.dtsi @@ -0,0 +1,145 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2017-2022 Toradex + */ + +/ { + chosen { + stdout-path = "serial0:115200n8"; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_snvs_gpiokeys>; + + power { + label = "Wake-Up"; + gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; + linux,code = ; + debounce-interval = <10>; + wakeup-source; + }; + }; + + reg_3v3: regulator-3v3 { + compatible = "regulator-fixed"; + regulator-name = "3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_5v0: regulator-5v0 { + compatible = "regulator-fixed"; + regulator-name = "5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + reg_usbh_vbus: regulator-usbh-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh_reg>; + regulator-name = "VCC_USB[1-4]"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 2 GPIO_ACTIVE_LOW>; + vin-supply = <®_5v0>; + }; +}; + +&adc1 { + status = "okay"; +}; + +&ecspi1 { + status = "okay"; + + num-cs = <2>; + cs-gpios = < + &gpio3 26 GPIO_ACTIVE_HIGH /* SODIMM 86 LCD_DATA21 */ + &gpio4 28 GPIO_ACTIVE_HIGH /* SODIMM 65 CSI_DATA07 */ + >; +}; + +/* + * Following SODIMM Pins should not be accessed as GPIO on Aster board: + * 134 - AIN5_SCL (no connection) + * 127 - Voltage Level Translator OE# signal (IC11 and IC12) + * + * To configure GPIO to LED5, please disable FEC2 and uncomment the following: + * &iomuxc { + * pinctrl-names = "default"; + * pinctrl-0 = < + * &pinctrl_gpio1 + * &pinctrl_gpio2 + * &pinctrl_gpio3 + * &pinctrl_gpio4 + * &pinctrl_gpio6 - for non-WiFi modules only + * &pinctrl_gpio7 + * &pinctrl_gpio_aster + * >; + * + * pinctrl_gpio_aster: gpio-aster { + * fsl,pins = < + * MX6UL_PAD_GPIO1_IO07__GPIO1_IO07 0x1b0b0 + * >; + * }; + * }; + */ + +&i2c1 { + status = "okay"; + + m41t0m6: rtc@68 { + compatible = "st,m41t0"; + reg = <0x68>; + }; +}; + +/* PWM */ +&pwm4 { + status = "okay"; +}; + +/* PWM */ +&pwm5 { + status = "okay"; +}; + +/* PWM */ +&pwm6 { + status = "okay"; +}; + +/* PWM */ +&pwm7 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&uart5 { + status = "okay"; +}; + +&usbotg1 { + vbus-supply = <®_usbh_vbus>; + status = "okay"; +}; + +&usbotg2 { + vbus-supply = <®_usbh_vbus>; + status = "okay"; +}; + +&usdhc1 { + vmmc-supply = <®_3v3>; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx6ull-colibri-emmc-aster.dts b/arch/arm/boot/dts/imx6ull-colibri-emmc-aster.dts new file mode 100644 index 000000000000..919c0464d6cb --- /dev/null +++ b/arch/arm/boot/dts/imx6ull-colibri-emmc-aster.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx6ull-colibri-emmc-nonwifi.dtsi" +#include "imx6ull-colibri-aster.dtsi" + +/ { + model = "Toradex Colibri iMX6ULL 1GB (eMMC) on Colibri Aster"; + compatible = "toradex,colibri-imx6ull-emmc-aster", + "toradex,colibri-imx6ull-emmc", + "toradex,colibri-imx6ull", + "fsl,imx6ull"; +}; diff --git a/arch/arm/boot/dts/imx6ull-colibri-wifi-aster.dts b/arch/arm/boot/dts/imx6ull-colibri-wifi-aster.dts new file mode 100644 index 000000000000..b4f65e8c5857 --- /dev/null +++ b/arch/arm/boot/dts/imx6ull-colibri-wifi-aster.dts @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2017-2022 Toradex + */ + +/dts-v1/; + +#include "imx6ull-colibri-wifi.dtsi" +#include "imx6ull-colibri-aster.dtsi" + +/ { + model = "Toradex Colibri iMX6ULL 512MB on Colibri Aster"; + compatible = "toradex,colibri-imx6ull-wifi-aster", + "toradex,colibri-imx6ull", + "fsl,imx6ull"; +}; + +&atmel_mxt_ts { + status = "okay"; +}; From patchwork Mon Apr 25 16:23:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 565859 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 159F5C433EF for ; Mon, 25 Apr 2022 16:25:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243503AbiDYQ2Z (ORCPT ); Mon, 25 Apr 2022 12:28:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38882 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243531AbiDYQ1y (ORCPT ); Mon, 25 Apr 2022 12:27:54 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.196]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 435E111F97B; Mon, 25 Apr 2022 09:24:50 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MXab2-1nLMMz0i7K-00WVig; Mon, 25 Apr 2022 18:24:39 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 11/14] ARM: dts: imx6ull-colibri: fix nand bch geometry Date: Mon, 25 Apr 2022 18:23:53 +0200 Message-Id: <20220425162356.176665-12-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220425162356.176665-1-marcel@ziswiler.com> References: <20220425162356.176665-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:VPvbNQmlE2SkG8+cY0c+w5lLEPlSKKBcNKtm47mUvAqrpNmgFYX j+IhkW/XtLJQb09apN7GZkg9jqD4ify51guGplTI2ClxEqGAWWYsoys9OILPzi7YKM+/Vys 83JjrHwLf2OHDLjGGucDBRHy4Np2b51jg8iOkH/5AqyoJwbd0mwgMjXfnit+AudWH01m2jU pAQGkyJnBRtb5hn+LUmqg== X-UI-Out-Filterresults: notjunk:1;V03:K0:djS0+e1cOrg=:tJr1Qc8WBCQ3kQaRL9zTdN zN4AhtlDmQHP4jZz8r4i/RXUptDAuos9u4VxQoaIDxULdNU1eOHFbqKfZTahz6kr9Z/ReoS09 BoYb4PWoqTExKpgTG3kjW2SXb7mCOKxtqfM9jvXuPT7OKe0j4osUmGAjjE9qwhbxE6O0MBpt+ qfLxfEIkTc8u0oysfXAB2kcDJRTE5y2+CMuOmlWi0f037oGYqigOyqf8168se6lfUto+ooUaL KrFzdMvTFWm8kNUmzO/2UpNzRsVkdt1ijjlGDuSUqYnhhLzBkW0/3dp54yOi3BVLTerDBQx6X eNctA13pKvoZn52SlZoEQu9QQhEhNV9VcKRTVsOaV441WYylqbSsgC0VuDFJ2n0rARWMH/6ma e9DlK4cetokNbbhE8yznGzYtid8t+aG3wtlUpPzY/jhZfWo8T+rOJ3Fi+YBxmmyICQ6nGLgEN J+57qZ6Vs2bKjfO0SDKGRBbPVzB3HKlPUw1rzY31vJDa5m6v1D/z1VJMQ26qWDnepbkf7y+RT sqUfqHrWitUIHxxSQ5+BR3hGtRM5GEGKBR7LIMx6s4VjYV+IBDxVLSQGJEMDUNHiibJUYltv4 4ZwbYU5b4xz5QDz1pXEWwlW+wcHi99nNLRl5Bmi0cS+Os1DViJmWIOa0ZZgXx8/Uoxn76nByq 3sKclVnx5I1hmYGcE3g9FcEqVAgCccHwlA2mv8HG7BeDF3tjezuxYNNjsnFXU6AaQBktSz2q4 8wvtG3n+3vzp76Ct Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Fix NAND BCH geometry relevant mainly for U-Boot. Signed-off-by: Marcel Ziswiler --- (no changes since v1) arch/arm/boot/dts/imx6ull-colibri.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx6ull-colibri.dtsi index 86855738f2bd..10e5242fd516 100644 --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi @@ -128,6 +128,7 @@ ethphy1: ethernet-phy@2 { &gpmi { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpmi_nand>; + fsl,use-minimum-ecc; nand-on-flash-bbt; nand-ecc-mode = "hw"; nand-ecc-strength = <8>; From patchwork Mon Apr 25 16:23:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 565856 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 25296C433EF for ; Mon, 25 Apr 2022 16:25:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243407AbiDYQ2j (ORCPT ); Mon, 25 Apr 2022 12:28:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39228 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243542AbiDYQ2A (ORCPT ); Mon, 25 Apr 2022 12:28:00 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9AAB911F953; Mon, 25 Apr 2022 09:24:53 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0M8fpd-1o4YTi37aN-00wBtz; Mon, 25 Apr 2022 18:24:42 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 12/14] ARM: dts: imx6ull-colibri: add/update some comments Date: Mon, 25 Apr 2022 18:23:54 +0200 Message-Id: <20220425162356.176665-13-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220425162356.176665-1-marcel@ziswiler.com> References: <20220425162356.176665-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:X35BKI64vq4Rev9p9fnBW1cBTv6G1LEYaMPHz6WZVAGcvay/und Ol7rnxlhXydyp3xjC93TN+o28bvEH2GDC/ioYBosZS+ZzbEG52eeomobyzwU0U9kGQ4wpQM 5uXxkw81eQOxZuFKydbR+MMjyFxy+cgXZtfr2Ncc+DkrXm6NS/VGxMTEgbHfQEMAUyTkbXW GLiBSL9VP2yOwIOpVDnMQ== X-UI-Out-Filterresults: notjunk:1;V03:K0:Fk0YdMNY5EQ=:7AxSi/+a9D4w847f1MSObZ 19drRh0LNiwBva6HyQC3ihI1f1EUZD1l6cd7jZMSxoA9ylLsRyofByUDAv5zF7qaO4GlNVsmp 2YYcQk63Lh6AgzmUZWujHh3hZhMSn/lGP4PC9t0oWqcDfuKRbqNq7n7HvwuHuqakmIVOUEzLh zBlPjL9rbhk5gnuY5r56RQGzqO9tfUFTI4tSVRCvqWBjzoDOjw62c2ZPkceaXFa3GIfzjqGgK ZDdj7/CqDB+z9AGAYZCI002YjPSU8T8YaJvb9HXPOoOd+vxv7apJblkXqKWr5vcL9bc0IHRdq FDVJsaOifLIvcJxQOvg2uFeOkBPXlV+vFXdkua0/UijV8YSyCZtztHjM+N427Hm6HkNjEI/iO LTmXhB1NinmuRze5HexwgD3kMuuBnrF409/xNQeGXU3jJE730aK8GKLEH5tt4bKW9mW2cb5rS ImIwgTk86LzLVZNBNrpzSJvwjZzo+JPtvz+0L9Bz3E0lbEZw76MgBN1mvHOk5RFAAOPbY78V/ JGjiBN0WqC96xVxemW1A9L9p0nGmFSt3DJiUtqWAmz7/Q+7i6E/PaQjPB4UZqSeoJRKSmpTpS d5l+6ss+xGljCpyuDXaL1ICyZCBXcGWA93cyT1ewS11lWsx/EpZWrzg7E/t1tkbxitQT+999C kJT15+mDe6qoTFOp/97zr9LZtVf6p2MDuMk6mavfhy5Hoew2rlzGMEcUxXtl5hcyOjGK+k67p YBtiOduUNk7wG+Ur Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Add/update some comments. Signed-off-by: Marcel Ziswiler --- (no changes since v1) .../dts/imx6ull-colibri-emmc-nonwifi.dtsi | 4 ++- arch/arm/boot/dts/imx6ull-colibri.dtsi | 36 ++++++++++++++----- 2 files changed, 30 insertions(+), 10 deletions(-) diff --git a/arch/arm/boot/dts/imx6ull-colibri-emmc-nonwifi.dtsi b/arch/arm/boot/dts/imx6ull-colibri-emmc-nonwifi.dtsi index 1d75bc671f75..ea238525d5c0 100644 --- a/arch/arm/boot/dts/imx6ull-colibri-emmc-nonwifi.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri-emmc-nonwifi.dtsi @@ -8,7 +8,7 @@ / { aliases { mmc0 = &usdhc2; /* eMMC */ - mmc1 = &usdhc1; /* MMC 4bit slot */ + mmc1 = &usdhc1; /* MMC 4-bit slot */ }; memory@80000000 { @@ -154,6 +154,7 @@ &gpio5 { "SODIMM_127"; }; +/* NAND */ &gpmi { status = "disabled"; }; @@ -170,6 +171,7 @@ &iomuxc_snvs { pinctrl-0 = <&pinctrl_snvs_gpio1 &pinctrl_snvs_gpio3>; }; +/* eMMC */ &usdhc2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc2emmc>; diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx6ull-colibri.dtsi index 10e5242fd516..13a3f251d9eb 100644 --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi @@ -6,6 +6,7 @@ #include "imx6ull.dtsi" / { + /* Ethernet aliases to ensure correct MAC addresses */ aliases { ethernet0 = &fec2; ethernet1 = &fec1; @@ -104,6 +105,7 @@ &ecspi1 { pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>; }; +/* Ethernet */ &fec2 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&pinctrl_enet2>; @@ -125,6 +127,7 @@ ethphy1: ethernet-phy@2 { }; }; +/* NAND */ &gpmi { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpmi_nand>; @@ -136,6 +139,7 @@ &gpmi { status = "okay"; }; +/* I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board) */ &i2c1 { pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; @@ -157,6 +161,10 @@ atmel_mxt_ts: touchscreen@4a { }; }; +/* + * PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and + * touch screen controller + */ &i2c2 { /* Use low frequency to compensate for the high pull-up values. */ clock-frequency = <40000>; @@ -196,21 +204,25 @@ lcdif_out: endpoint { }; }; +/* PWM */ &pwm4 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm4>; }; +/* PWM */ &pwm5 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm5>; }; +/* PWM */ &pwm6 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm6>; }; +/* PWM */ &pwm7 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm7>; @@ -224,6 +236,7 @@ &snvs_pwrkey { status = "disabled"; }; +/* Colibri UART_A */ &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1>; @@ -231,6 +244,7 @@ &uart1 { fsl,dte-mode; }; +/* Colibri UART_B */ &uart2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; @@ -238,12 +252,14 @@ &uart2 { fsl,dte-mode; }; +/* Colibri UART_C */ &uart5 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart5>; fsl,dte-mode; }; +/* Colibri USBC */ &usbotg1 { dr_mode = "otg"; srp-disable; @@ -251,10 +267,12 @@ &usbotg1 { adp-disable; }; +/* Colibri USBH */ &usbotg2 { dr_mode = "host"; }; +/* Colibri MMC/SD */ &usdhc1 { pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd>; @@ -265,7 +283,7 @@ &usdhc1 { assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>; assigned-clock-rates = <0>, <198000000>; bus-width = <4>; - cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; + cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; /* MMC_CD */ disable-wp; keep-power-in-suspend; no-1-8-v; @@ -431,7 +449,7 @@ MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01 0xb0b0 /* SODIMM 63 */ /* * With an eMMC instead of a raw NAND device the following pins - * are available at SODIMM pins + * are available at SODIMM pins. */ pinctrl_gpmi_gpio: gpmi-gpio-grp { fsl,pins = < @@ -556,10 +574,10 @@ MX6UL_PAD_UART1_CTS_B__UART1_DTE_RTS 0x1b0b1 /* SODIMM 25 */ pinctrl_uart1_ctrl1: uart1-ctrl1-grp { /* Additional DTR, DCD */ fsl,pins = < - MX6UL_PAD_JTAG_TDI__GPIO1_IO13 0x70a0 /* SODIMM 31 */ - MX6UL_PAD_LCD_DATA18__GPIO3_IO23 0x10b0 /* SODIMM 29 */ - MX6UL_PAD_JTAG_TDO__GPIO1_IO12 0x90b1 /* SODIMM 23 */ - MX6UL_PAD_LCD_DATA19__GPIO3_IO24 0x10b0 /* SODIMM 37 */ + MX6UL_PAD_JTAG_TDI__GPIO1_IO13 0x70a0 /* SODIMM 31 / DCD */ + MX6UL_PAD_LCD_DATA18__GPIO3_IO23 0x10b0 /* SODIMM 29 / DSR */ + MX6UL_PAD_JTAG_TDO__GPIO1_IO12 0x90b1 /* SODIMM 23 / DTR */ + MX6UL_PAD_LCD_DATA19__GPIO3_IO24 0x10b0 /* SODIMM 37 / RI */ >; }; @@ -580,7 +598,7 @@ MX6UL_PAD_GPIO1_IO05__UART5_DTE_TX 0x1b0b1 /* SODIMM 21 */ pinctrl_usbh_reg: gpio-usbh-reg { fsl,pins = < - MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0x10b0 /* SODIMM 129 */ + MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0x10b0 /* SODIMM 129 / USBH_PEN */ >; }; @@ -658,7 +676,7 @@ pinctrl_snvs_gpio1: snvs-gpio1-grp { MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x110a0 /* SODIMM 93 */ MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x110a0 /* SODIMM 95 */ MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10 0x1b0a0 /* SODIMM 105 */ - MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0b0a0 /* SODIMM 131 */ + MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0b0a0 /* SODIMM 131 / USBH_OC */ MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x110a0 /* SODIMM 138 */ >; }; @@ -695,7 +713,7 @@ MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x130a0 /* SODIMM 45 */ pinctrl_snvs_usdhc1_cd: snvs-usdhc1-cd-grp { fsl,pins = < - MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0a0 /* SODIMM 43 */ + MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0a0 /* SODIMM 43 / MMC_CD */ >; }; From patchwork Mon Apr 25 16:23:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 565862 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5265DC433FE for ; Mon, 25 Apr 2022 16:25:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243475AbiDYQ2Q (ORCPT ); Mon, 25 Apr 2022 12:28:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39246 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243541AbiDYQ2A (ORCPT ); Mon, 25 Apr 2022 12:28:00 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CEC0211F961; Mon, 25 Apr 2022 09:24:55 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0LiS78-1oJBD61bGW-00chkK; Mon, 25 Apr 2022 18:24:44 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 13/14] ARM: dts: imx6ull-colibri: move gpio-keys node to som dtsi Date: Mon, 25 Apr 2022 18:23:55 +0200 Message-Id: <20220425162356.176665-14-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220425162356.176665-1-marcel@ziswiler.com> References: <20220425162356.176665-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:2wLqalwvBvHjQI0F6bwaX+aju6hhfLeigrJDH7hvf7o4SviWJsz YjPxhFznJJ09jTQTFqTNy48dlPYgRPzdAVgSshekfav2zeuXZILl7tPO4CKTDqsYpGUTDG8 I1j7Q/YTWdzbZpURx1j64jrd64IS+HEenyPsO/BP67qxnIILye/x2eQ3PlPnc0kic2r7pkM XsPzbMRKRq8m9C22+So5A== X-UI-Out-Filterresults: notjunk:1;V03:K0:YK334HG6ib4=:Ovs1iPJGRN9wr3DHRSPc0l OUhzsIK9U5FFfDu+4+zBN6RTQUTggDIS1mYlaNhVbxGXhu/m4Ufr4mdmgyRsjynfpPllCvJTB UHHdWoe9bpnzr0aIJ0dgWBPas17MY0QJXYxe/vrz+BxombJSywzTL1SneSFk2LqMYvuDKMQiB kwgTo6SXwA380cXM7TMX4/SjRej7+GcgKcZqsZtCgtAG1AQcJF67N9Y+qR8TElb4G7V/B2kqD Wu+A0SmyKjp66OBBcwXtrX3yhMbiIITcoVEJXixKT/JGKdzdgGROgsmZdnRA5uRzOcs99+J6Q 0uBHndvydR0Uuewad3Q547VEq/lab2QVEXL0dW17JJW7DvPticU7DV6hKcUW++0J3l2pzdC8g Q2s8kxSl9R0Wnxhc/p8KASLV/N444IcoNz4qlfWkXxEuJqjaJh/O+dFFybEXtyb34vSj5JLLb xIH91wGRrkbV96CKi5S6BBcDyt9JMwBgD3KNPERXNrTfweimljjFDRdnzJ+pKv5/F+Id+90U2 M/oKB089xTg6IFK9LFXfC1Ty7TAUg9tczNWM2dxz6Te0ouFXvv09CmODJXg84boUc6fjRLsWa 9jC0MvdlmDxCM+GBttt55PBbG7M91T4Q7VP44jz780X/lcqJILHfB+fWvmN2LcVS0N7fiI9t5 6mHPO3R/EOo5yqitcU6emN2UwmVJoyqvT35AbPsn8N09D2eI15/SCcm625U1Wtfvx6IIf7rh7 58MNCXpQlJsTi0H5 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler The gpio-keys define module level wake-up pin functionality. Move it from the carrier board dts file to the Som dtsi file. While at it, also re-order the properties in the gpio-keys node alphabetically and rename to sub-node from power to wakeup. Signed-off-by: Marcel Ziswiler --- (no changes since v1) arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi | 15 --------------- arch/arm/boot/dts/imx6ull-colibri.dtsi | 16 +++++++++++++++- 2 files changed, 15 insertions(+), 16 deletions(-) diff --git a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi index 08197c66af12..e29907428c20 100644 --- a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi @@ -8,20 +8,6 @@ chosen { stdout-path = "serial0:115200n8"; }; - gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_snvs_gpiokeys>; - - power { - label = "Wake-Up"; - gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; - linux,code = ; - debounce-interval = <10>; - wakeup-source; - }; - }; - /* fixed crystal dedicated to mcp2515 */ clk16m: clk16m { compatible = "fixed-clock"; @@ -29,7 +15,6 @@ clk16m: clk16m { clock-frequency = <16000000>; }; - reg_3v3: regulator-3v3 { compatible = "regulator-fixed"; regulator-name = "3.3V"; diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx6ull-colibri.dtsi index 13a3f251d9eb..f1e724f6cdfc 100644 --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi @@ -24,6 +24,20 @@ backlight: backlight { status = "okay"; }; + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_snvs_gpiokeys>; + + wakeup { + debounce-interval = <10>; + gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* SODIMM 45 */ + label = "Wake-Up"; + linux,code = ; + wakeup-source; + }; + }; + panel_dpi: panel-dpi { compatible = "edt,et057090dhu"; backlight = <&backlight>; @@ -707,7 +721,7 @@ MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x130b0 pinctrl_snvs_gpiokeys: snvs-gpiokeys-grp { fsl,pins = < - MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x130a0 /* SODIMM 45 */ + MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x130a0 /* SODIMM 45 / WAKE_UP */ >; }; From patchwork Mon Apr 25 16:23:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 565858 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E1D71C433EF for ; Mon, 25 Apr 2022 16:25:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243476AbiDYQ21 (ORCPT ); Mon, 25 Apr 2022 12:28:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39780 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243393AbiDYQ2J (ORCPT ); Mon, 25 Apr 2022 12:28:09 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.196]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3106FFF; Mon, 25 Apr 2022 09:25:00 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MX2dG-1nLubS3tRc-00VxUK; Mon, 25 Apr 2022 18:24:47 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 14/14] ARM: dts: imx6ull-colibri: improve pinctrl node names Date: Mon, 25 Apr 2022 18:23:56 +0200 Message-Id: <20220425162356.176665-15-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220425162356.176665-1-marcel@ziswiler.com> References: <20220425162356.176665-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:Whjpx5n/qdybkQ7T1QbJ+atL1ykOESLcqi8QNtAtBXFFt+ws87P nL/Stw8BMDAJTcafzAgat6TvZpDb/QV7GZ+RErqvgCltRejoGPfbwB+/HaDT+918LfMg7YA QGtfyFaZrVq4lDXIuEeb4Bi1kbtgMBE6VWowKwR8VrEkIMxmEXBlm0qUMXYfSD0QGPEub/3 Q3y9b94Hped/U2RVzN9bQ== X-UI-Out-Filterresults: notjunk:1;V03:K0:QK0yuB8fsSU=:hKY4/NFG+erhTd8a0RdwnD +oee7KYyKXeXzfAwQFtTQQjQnkMRgz/pyBE/G/klvI8FYfnodcZ089VjjXWlrMfmtfUK5U54A DyxiuvJctUtxQufU/yYWJ7tM21sTIXn6KVLEe8HHkPmg64djhlugiNYKUgsy5w1FOYBOT0tNy ZPlZntO+zMwqWmT7L+T5wawcnt7LC0gTFYwu2S4NyZNkll55EhCE9kSN5c8O9sk8xSzrEuYcC YndI37OnNKGiJ2B4wyXJzxBH6M/71lyz9h6dvSdPv5omXZHsJ72lMbmdSYHdWB66vaBF9O7aQ AsIbS8fowJYQsPf9g1CsYbdjqcPl+rMqKNwPa6i8YnWSLOn/ZjeIYlOAQC4ZozDjywyAAz3Yt /g3saEkTBnoEkWYndGAWr+CqQnxIPW60NexiZgfSrTkMThfElVRWsPPO+iPhe2NmzaEDVGZNs 7ZipHSGhxSIHp8JqSXO79etu2T3DWu3qFxXh+5cr2dyBUPk/5odktT4Lvc9CVHx9Ts9wmYB1/ qB4ogmhXFuJt4FODnMvV8Kk9I5MVtaK54Pyele7nXoMZaCRnrmhCy6A7lPq28MjjhwfVmPHMd NJHn4cZZivQek16sZBegXRDBHNYVKx6I9efpdjiEL8sFy4fg9a7JCswk0g8oUsTkhFsRGvGuZ oraI6HjIpA29ZZFxTVIa2sI+vVNRMu7b5jVMyiNP3y8HCL/1kHem801NQEuY0H6vNwAxiGLmb mr1H8Yl5zaXQgS/o Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Improve on pinctrl node names. Signed-off-by: Marcel Ziswiler --- Changes in v2: - New commit with pinctrl node name improvements as suggested by Shawn. arch/arm/boot/dts/imx6ull-colibri.dtsi | 93 +++++++++++++------------- 1 file changed, 46 insertions(+), 47 deletions(-) diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx6ull-colibri.dtsi index f1e724f6cdfc..bb1c3e6c4afe 100644 --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi @@ -292,7 +292,7 @@ &usdhc1 { pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd>; pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_snvs_usdhc1_cd>; pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_snvs_usdhc1_cd>; - pinctrl-3 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_sleep_cd>; + pinctrl-3 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd_sleep>; assigned-clocks = <&clks IMX6UL_CLK_USDHC1_SEL>, <&clks IMX6UL_CLK_USDHC1>; assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>; assigned-clock-rates = <0>, <198000000>; @@ -312,7 +312,6 @@ &wdog1 { }; &iomuxc { - pinctrl_adc1: adc1grp { fsl,pins = < MX6UL_PAD_GPIO1_IO00__GPIO1_IO00 0x3000 /* SODIMM 8 */ @@ -336,13 +335,13 @@ MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04 0xb0a0 /* SODIMM 107 */ >; }; - pinctrl_can_int: canint-grp { + pinctrl_can_int: canintgrp { fsl,pins = < MX6UL_PAD_ENET1_TX_DATA1__GPIO2_IO04 0x13010 /* SODIMM 73 */ >; }; - pinctrl_enet2: enet2-grp { + pinctrl_enet2: enet2grp { fsl,pins = < MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 @@ -357,7 +356,7 @@ MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 >; }; - pinctrl_enet2_sleep: enet2sleepgrp { + pinctrl_enet2_sleep: enet2-sleepgrp { fsl,pins = < MX6UL_PAD_GPIO1_IO06__GPIO1_IO06 0x0 MX6UL_PAD_GPIO1_IO07__GPIO1_IO07 0x0 @@ -372,13 +371,13 @@ MX6UL_PAD_ENET2_TX_EN__GPIO2_IO13 0x0 >; }; - pinctrl_ecspi1_cs: ecspi1-cs-grp { + pinctrl_ecspi1_cs: ecspi1csgrp { fsl,pins = < MX6UL_PAD_LCD_DATA21__GPIO3_IO26 0x70a0 /* SODIMM 86 */ >; }; - pinctrl_ecspi1: ecspi1-grp { + pinctrl_ecspi1: ecspi1grp { fsl,pins = < MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK 0x000a0 /* SODIMM 88 */ MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI 0x000a0 /* SODIMM 92 */ @@ -386,27 +385,27 @@ MX6UL_PAD_LCD_DATA23__ECSPI1_MISO 0x100a0 /* SODIMM 90 */ >; }; - pinctrl_flexcan1: flexcan1-grp { + pinctrl_flexcan1: flexcan1grp { fsl,pins = < MX6UL_PAD_ENET1_RX_DATA0__FLEXCAN1_TX 0x1b020 MX6UL_PAD_ENET1_RX_DATA1__FLEXCAN1_RX 0x1b020 >; }; - pinctrl_flexcan2: flexcan2-grp { + pinctrl_flexcan2: flexcan2grp { fsl,pins = < MX6UL_PAD_ENET1_TX_DATA0__FLEXCAN2_RX 0x1b020 MX6UL_PAD_ENET1_RX_EN__FLEXCAN2_TX 0x1b020 >; }; - pinctrl_gpio_bl_on: gpio-bl-on-grp { + pinctrl_gpio_bl_on: gpioblongrp { fsl,pins = < MX6UL_PAD_JTAG_TMS__GPIO1_IO11 0x30a0 /* SODIMM 71 */ >; }; - pinctrl_gpio1: gpio1-grp { + pinctrl_gpio1: gpio1grp { fsl,pins = < MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25 0x10b0 /* SODIMM 77 */ MX6UL_PAD_JTAG_TCK__GPIO1_IO14 0x70a0 /* SODIMM 99 */ @@ -419,7 +418,7 @@ MX6UL_PAD_UART3_RTS_B__GPIO1_IO27 0x10b0 /* SODIMM 186 */ >; }; - pinctrl_gpio2: gpio2-grp { /* Camera */ + pinctrl_gpio2: gpio2grp { /* Camera */ fsl,pins = < MX6UL_PAD_CSI_DATA04__GPIO4_IO25 0x10b0 /* SODIMM 69 */ MX6UL_PAD_CSI_MCLK__GPIO4_IO17 0x10b0 /* SODIMM 75 */ @@ -429,20 +428,20 @@ MX6UL_PAD_CSI_DATA05__GPIO4_IO26 0x10b0 /* SODIMM 98 */ >; }; - pinctrl_gpio3: gpio3-grp { /* CAN2 */ + pinctrl_gpio3: gpio3grp { /* CAN2 */ fsl,pins = < MX6UL_PAD_ENET1_RX_EN__GPIO2_IO02 0x10b0 /* SODIMM 178 */ MX6UL_PAD_ENET1_TX_DATA0__GPIO2_IO03 0x10b0 /* SODIMM 188 */ >; }; - pinctrl_gpio4: gpio4-grp { + pinctrl_gpio4: gpio4grp { fsl,pins = < MX6UL_PAD_CSI_DATA07__GPIO4_IO28 0x10b0 /* SODIMM 65 */ >; }; - pinctrl_gpio6: gpio6-grp { /* Wifi pins */ + pinctrl_gpio6: gpio6grp { /* Wifi pins */ fsl,pins = < MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0x10b0 /* SODIMM 89 */ MX6UL_PAD_CSI_DATA02__GPIO4_IO23 0x10b0 /* SODIMM 79 */ @@ -454,7 +453,7 @@ MX6UL_PAD_CSI_HSYNC__GPIO4_IO20 0x10b0 /* SODIMM 94 */ >; }; - pinctrl_gpio7: gpio7-grp { /* CAN1 */ + pinctrl_gpio7: gpio7grp { /* CAN1 */ fsl,pins = < MX6UL_PAD_ENET1_RX_DATA0__GPIO2_IO00 0xb0b0/* SODIMM 55 */ MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01 0xb0b0 /* SODIMM 63 */ @@ -465,7 +464,7 @@ MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01 0xb0b0 /* SODIMM 63 */ * With an eMMC instead of a raw NAND device the following pins * are available at SODIMM pins. */ - pinctrl_gpmi_gpio: gpmi-gpio-grp { + pinctrl_gpmi_gpio: gpmigpiogrp { fsl,pins = < MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x10b0 /* SODIMM 140 */ MX6UL_PAD_NAND_CE0_B__GPIO4_IO13 0x10b0 /* SODIMM 144 */ @@ -474,7 +473,7 @@ MX6UL_PAD_NAND_READY_B__GPIO4_IO12 0x10b0 /* SODIMM 142 */ >; }; - pinctrl_gpmi_nand: gpmi-nand-grp { + pinctrl_gpmi_nand: gpminandgrp { fsl,pins = < MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0x100a9 MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0x100a9 @@ -493,35 +492,35 @@ MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0x100a9 >; }; - pinctrl_i2c1: i2c1-grp { + pinctrl_i2c1: i2c1grp { fsl,pins = < MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 /* SODIMM 196 */ MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0 /* SODIMM 194 */ >; }; - pinctrl_i2c1_gpio: i2c1-gpio-grp { + pinctrl_i2c1_gpio: i2c1-gpiogrp { fsl,pins = < MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28 0x4001b8b0 /* SODIMM 196 */ MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x4001b8b0 /* SODIMM 194 */ >; }; - pinctrl_i2c2: i2c2-grp { + pinctrl_i2c2: i2c2grp { fsl,pins = < MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001f8b0 MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001f8b0 >; }; - pinctrl_i2c2_gpio: i2c2-gpio-grp { + pinctrl_i2c2_gpio: i2c2-gpiogrp { fsl,pins = < MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x4001f8b0 MX6UL_PAD_UART5_RX_DATA__GPIO1_IO31 0x4001f8b0 >; }; - pinctrl_lcdif_dat: lcdif-dat-grp { + pinctrl_lcdif_dat: lcdifdatgrp { fsl,pins = < MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x00079 /* SODIMM 76 */ MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x00079 /* SODIMM 70 */ @@ -544,7 +543,7 @@ MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x00079 /* SODIMM 61 */ >; }; - pinctrl_lcdif_ctrl: lcdif-ctrl-grp { + pinctrl_lcdif_ctrl: lcdifctrlgrp { fsl,pins = < MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x00079 /* SODIMM 56 */ MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x00079 /* SODIMM 44 */ @@ -553,31 +552,31 @@ MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x00079 /* SODIMM 82 */ >; }; - pinctrl_pwm4: pwm4-grp { + pinctrl_pwm4: pwm4grp { fsl,pins = < MX6UL_PAD_NAND_WP_B__PWM4_OUT 0x00079 /* SODIMM 59 */ >; }; - pinctrl_pwm5: pwm5-grp { + pinctrl_pwm5: pwm5grp { fsl,pins = < MX6UL_PAD_NAND_DQS__PWM5_OUT 0x00079 /* SODIMM 28 */ >; }; - pinctrl_pwm6: pwm6-grp { + pinctrl_pwm6: pwm6grp { fsl,pins = < MX6UL_PAD_ENET1_TX_EN__PWM6_OUT 0x00079 /* SODIMM 30 */ >; }; - pinctrl_pwm7: pwm7-grp { + pinctrl_pwm7: pwm7grp { fsl,pins = < MX6UL_PAD_ENET1_TX_CLK__PWM7_OUT 0x00079 /* SODIMM 67 */ >; }; - pinctrl_uart1: uart1-grp { + pinctrl_uart1: uart1grp { fsl,pins = < MX6UL_PAD_UART1_TX_DATA__UART1_DTE_RX 0x1b0b1 /* SODIMM 33 */ MX6UL_PAD_UART1_RX_DATA__UART1_DTE_TX 0x1b0b1 /* SODIMM 35 */ @@ -586,7 +585,7 @@ MX6UL_PAD_UART1_CTS_B__UART1_DTE_RTS 0x1b0b1 /* SODIMM 25 */ >; }; - pinctrl_uart1_ctrl1: uart1-ctrl1-grp { /* Additional DTR, DCD */ + pinctrl_uart1_ctrl1: uart1ctrl1grp { /* Additional DTR, DCD */ fsl,pins = < MX6UL_PAD_JTAG_TDI__GPIO1_IO13 0x70a0 /* SODIMM 31 / DCD */ MX6UL_PAD_LCD_DATA18__GPIO3_IO23 0x10b0 /* SODIMM 29 / DSR */ @@ -595,7 +594,7 @@ MX6UL_PAD_LCD_DATA19__GPIO3_IO24 0x10b0 /* SODIMM 37 / RI */ >; }; - pinctrl_uart2: uart2-grp { + pinctrl_uart2: uart2grp { fsl,pins = < MX6UL_PAD_UART2_TX_DATA__UART2_DTE_RX 0x1b0b1 /* SODIMM 36 */ MX6UL_PAD_UART2_RX_DATA__UART2_DTE_TX 0x1b0b1 /* SODIMM 38 */ @@ -603,20 +602,20 @@ MX6UL_PAD_UART2_CTS_B__UART2_DTE_RTS 0x1b0b1 /* SODIMM 32 */ MX6UL_PAD_UART2_RTS_B__UART2_DTE_CTS 0x1b0b1 /* SODIMM 34 */ >; }; - pinctrl_uart5: uart5-grp { + pinctrl_uart5: uart5grp { fsl,pins = < MX6UL_PAD_GPIO1_IO04__UART5_DTE_RX 0x1b0b1 /* SODIMM 19 */ MX6UL_PAD_GPIO1_IO05__UART5_DTE_TX 0x1b0b1 /* SODIMM 21 */ >; }; - pinctrl_usbh_reg: gpio-usbh-reg { + pinctrl_usbh_reg: usbhreggrp { fsl,pins = < MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0x10b0 /* SODIMM 129 / USBH_PEN */ >; }; - pinctrl_usdhc1: usdhc1-grp { + pinctrl_usdhc1: usdhc1grp { fsl,pins = < MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 /* SODIMM 47 */ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 /* SODIMM 190 */ @@ -627,7 +626,7 @@ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 /* SODIMM 53 */ >; }; - pinctrl_usdhc1_100mhz: usdhc1-100mhz-grp { + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { fsl,pins = < MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 @@ -638,7 +637,7 @@ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 >; }; - pinctrl_usdhc1_200mhz: usdhc1-200mhz-grp { + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { fsl,pins = < MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 @@ -649,7 +648,7 @@ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 >; }; - pinctrl_usdhc2: usdhc2-grp { + pinctrl_usdhc2: usdhc2grp { fsl,pins = < MX6UL_PAD_CSI_DATA00__USDHC2_DATA0 0x17069 MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17069 @@ -677,7 +676,7 @@ MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059 >; }; - pinctrl_wdog: wdog-grp { + pinctrl_wdog: wdoggrp { fsl,pins = < MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0 >; @@ -685,7 +684,7 @@ MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0 }; &iomuxc_snvs { - pinctrl_snvs_gpio1: snvs-gpio1-grp { + pinctrl_snvs_gpio1: snvsgpio1grp { fsl,pins = < MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x110a0 /* SODIMM 93 */ MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x110a0 /* SODIMM 95 */ @@ -695,49 +694,49 @@ MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x110a0 /* SODIMM 138 */ >; }; - pinctrl_snvs_gpio3: snvs-gpio3-grp { /* Wifi pins */ + pinctrl_snvs_gpio3: snvsgpio3grp { /* Wifi pins */ fsl,pins = < MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 0x130a0 /* SODIMM 127 */ >; }; - pinctrl_snvs_ad7879_int: snvs-ad7879-int-grp { /* TOUCH Interrupt */ + pinctrl_snvs_ad7879_int: snvsad7879intgrp { /* TOUCH Interrupt */ fsl,pins = < MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x100b0 >; }; - pinctrl_snvs_reg_sd: snvs-reg-sd-grp { + pinctrl_snvs_reg_sd: snvsregsdgrp { fsl,pins = < MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x400100b0 >; }; - pinctrl_snvs_usbc_det: snvs-usbc-det-grp { + pinctrl_snvs_usbc_det: snvsusbcdetgrp { fsl,pins = < MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x130b0 >; }; - pinctrl_snvs_gpiokeys: snvs-gpiokeys-grp { + pinctrl_snvs_gpiokeys: snvsgpiokeysgrp { fsl,pins = < MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x130a0 /* SODIMM 45 / WAKE_UP */ >; }; - pinctrl_snvs_usdhc1_cd: snvs-usdhc1-cd-grp { + pinctrl_snvs_usdhc1_cd: snvsusdhc1cdgrp { fsl,pins = < MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0a0 /* SODIMM 43 / MMC_CD */ >; }; - pinctrl_snvs_usdhc1_sleep_cd: snvs-usdhc1-cd-grp-slp { + pinctrl_snvs_usdhc1_cd_sleep: snvsusdhc1cd-sleepgrp { fsl,pins = < MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x0 >; }; - pinctrl_snvs_wifi_pdn: snvs-wifi-pdn-grp { + pinctrl_snvs_wifi_pdn: snvswifipdngrp { fsl,pins = < MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 0x130a0 >;