From patchwork Mon Apr 25 10:53:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 565940 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65C2DC433F5 for ; Mon, 25 Apr 2022 10:54:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241522AbiDYK5B (ORCPT ); Mon, 25 Apr 2022 06:57:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50152 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240952AbiDYK5A (ORCPT ); Mon, 25 Apr 2022 06:57:00 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e3e3]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8DB3E83011; Mon, 25 Apr 2022 03:53:57 -0700 (PDT) Received: from benjamin-XPS-13-9310.. (unknown [IPv6:2a01:e0a:120:3210:ad99:4ace:ca31:d49f]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by bhuna.collabora.co.uk (Postfix) with ESMTPSA id 856BE1F44328; Mon, 25 Apr 2022 11:53:55 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1650884035; bh=hzcZXqIkMs9nS6rOMt1Lmuz1EhLkkGs74FZ6lSHHdTI=; h=From:To:Cc:Subject:Date:From; b=NUW0Zx9IDCo+f4uira4DkA+u/WKyaqg+k/c+dQaL5OPa+0F74BZjqYDGIZJ2HA1S3 9MbqUtwWGxG+5kRfaIH8oYWvlvYa822Cs51aWxZBdgURseislmR4d/CXY/80F+oz4L nf5SJQ8CZOTZcviKAs8854aKbFvhJoZG/1nf0J/ULwtop7HpsKAwTkjCgoEt/bymeR RKvBqBXcJ0jZthvJDTBhGWd2yOIo8E+3HAzmBmZJSElOwUjXvPw/GeYMUOJhSpP/82 e/nPH4DQONcNllNkr8/NVc3LCPDJx3eYI/jUuYe/gCCAJj+GTs3EetJLXRYX/3d8o+ 8puPGikdV/2pg== From: Benjamin Gaignard To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, mchehab@kernel.org, gregkh@linuxfoundation.org Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org, jon@nanocrew.net, aford173@gmail.com, kernel@collabora.com, Benjamin Gaignard Subject: [PATCH] media: hantro: HEVC: unconditionnaly set pps_{cb/cr}_qp_offset values Date: Mon, 25 Apr 2022 12:53:46 +0200 Message-Id: <20220425105346.324864-1-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.32.0 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Always set pps_cb_qp_offset and pps_cr_qp_offset values in Hantro/G2 register whatever is V4L2_HEVC_PPS_FLAG_PPS_SLICE_CHROMA_QP_OFFSETS_PRESENT flag value. This fix a couple of tests in fluster. Signed-off-by: Benjamin Gaignard --- drivers/staging/media/hantro/hantro_g2_hevc_dec.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/drivers/staging/media/hantro/hantro_g2_hevc_dec.c b/drivers/staging/media/hantro/hantro_g2_hevc_dec.c index 2c8eb0720db8..bb512389c1a5 100644 --- a/drivers/staging/media/hantro/hantro_g2_hevc_dec.c +++ b/drivers/staging/media/hantro/hantro_g2_hevc_dec.c @@ -194,13 +194,8 @@ static void set_params(struct hantro_ctx *ctx) hantro_reg_write(vpu, &g2_max_cu_qpd_depth, 0); } - if (pps->flags & V4L2_HEVC_PPS_FLAG_PPS_SLICE_CHROMA_QP_OFFSETS_PRESENT) { - hantro_reg_write(vpu, &g2_cb_qp_offset, pps->pps_cb_qp_offset); - hantro_reg_write(vpu, &g2_cr_qp_offset, pps->pps_cr_qp_offset); - } else { - hantro_reg_write(vpu, &g2_cb_qp_offset, 0); - hantro_reg_write(vpu, &g2_cr_qp_offset, 0); - } + hantro_reg_write(vpu, &g2_cb_qp_offset, pps->pps_cb_qp_offset); + hantro_reg_write(vpu, &g2_cr_qp_offset, pps->pps_cr_qp_offset); hantro_reg_write(vpu, &g2_filt_offset_beta, pps->pps_beta_offset_div2); hantro_reg_write(vpu, &g2_filt_offset_tc, pps->pps_tc_offset_div2);