From patchwork Wed Apr 27 08:19:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Shiyan X-Patchwork-Id: 566965 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 578D9C433F5 for ; Wed, 27 Apr 2022 08:19:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1359365AbiD0IWd (ORCPT ); Wed, 27 Apr 2022 04:22:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49570 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344335AbiD0IWc (ORCPT ); Wed, 27 Apr 2022 04:22:32 -0400 Received: from mail-lj1-x231.google.com (mail-lj1-x231.google.com [IPv6:2a00:1450:4864:20::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CF6E6326D9; Wed, 27 Apr 2022 01:19:21 -0700 (PDT) Received: by mail-lj1-x231.google.com with SMTP id s27so1659704ljd.2; Wed, 27 Apr 2022 01:19:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=thO53jrsOAs+etGPIDbDDOLCF7ipiCwZm4mRmJqCtTU=; b=Qa5dd+ssUqh50/ykcVuGzQ8zbSJEJxchFGwT3Tvcbz/NHtln6T+aFY/sqp47SQx/jH 4mw9ChFNbEMUMEwzUNJu5RS3YllnXrxxLfEE5NzghfAJgOmBqk1+8ycZbE8DB6NjW7nF 1Qkk8a4zimYUGHHk2Nx4cOMyQPpG3V/utIeolahqKQ7N4bdx3HdQFYYo3OsrWTqVgpqr SSENCdF469BqR4yAxwTqKR+HqbJ/S9eySykyUrcIsNk93CBbprxlGGRnrrPiymDFJw4B 0wxLdD/eXmHZ3m3wPOxnN8leLYjVcnal3bdPqJ9gROy+kuefDyC0mNg0dnlnsQs4rNMR jX7A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=thO53jrsOAs+etGPIDbDDOLCF7ipiCwZm4mRmJqCtTU=; b=h3Te5Vu4fRstGBGE9zbx0yPsMXXe1EsMiqnir63yTW9kdYaTtcrMzRyalLmK4YnF5E qm8CFLAvDmjvXnnPgJAv4DPd2XBT2cxb987K0a1JKE9mHWmnkjI4EJVuniyZfhSfW4Tq +Q6zCBR7ZLhRKDxTU+Uv2n7jvW8rSLKsF2F5D4Ge8jjzDJgaBZhRFqgVg+J4pCf5Efol 5ENmslsYtk8wwDDHdR6jVHCePc8Nzzw7GA1/EkFCYN1O1glxP9yWvr/zPAoljApor4vf nUmEdhFDsQaVOrHEbGB0An09S5itpgkyrEu+yHFAAOzZxCUyG5SRK9LT7FmbuTl64E0F Wa1w== X-Gm-Message-State: AOAM530g2azWF7KWAxzoM3RGHckH1+itIT4gEMjX/5l0tp43GMb+1Ypo DCqWpKUe6pNC2HJptm7LMeaXdaDkwj3L8c6tzNH4CQ== X-Google-Smtp-Source: ABdhPJzuhkG2f1JAG17NHqxFNJHSMDgu1TKiTs+OPWZDKu3CRibtIRuGxBP8IDLhZMA/92nljuamVw== X-Received: by 2002:a2e:8ec6:0:b0:24f:e8c:230f with SMTP id e6-20020a2e8ec6000000b0024f0e8c230fmr11085538ljl.530.1651047559622; Wed, 27 Apr 2022 01:19:19 -0700 (PDT) Received: from shc.milas.spb.ru ([188.243.217.78]) by smtp.gmail.com with ESMTPSA id y10-20020a2e978a000000b0024f17b6db32sm526092lji.97.2022.04.27.01.19.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Apr 2022 01:19:19 -0700 (PDT) From: Alexander Shiyan To: linux-omap@vger.kernel.org Cc: devicetree@vger.kernel.org, =?utf-8?q?Beno=C3=AEt_Cousson?= , Krzysztof Kozlowski , Alexander Shiyan Subject: [PATCH 1/2] ARM: dts: am335x-myirtech: Add an external clock oscillator for CPU RTC Date: Wed, 27 Apr 2022 11:19:13 +0300 Message-Id: <20220427081914.6773-1-eagle.alexander923@gmail.com> X-Mailer: git-send-email 2.32.0 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The CPU RTC has an external crystal, so to keep time, let's define it for devicetree. Signed-off-by: Alexander Shiyan --- arch/arm/boot/dts/am335x-myirtech-myc.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/am335x-myirtech-myc.dtsi b/arch/arm/boot/dts/am335x-myirtech-myc.dtsi index 245c35f41cdf..d94e096983c7 100644 --- a/arch/arm/boot/dts/am335x-myirtech-myc.dtsi +++ b/arch/arm/boot/dts/am335x-myirtech-myc.dtsi @@ -27,6 +27,13 @@ memory@80000000 { reg = <0x80000000 0x10000000>; }; + clk32k: clk32k { + compatible = "fixed-clock"; + clock-frequency = <32768>; + + #clock-cells = <0>; + }; + vdd_mod: vdd_mod_reg { compatible = "regulator-fixed"; regulator-name = "vdd-mod"; @@ -149,6 +156,8 @@ eeprom: eeprom@50 { }; &rtc { + clocks = <&clk32k>; + clock-names = "ext-clk"; system-power-controller; }; From patchwork Wed Apr 27 08:19:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Shiyan X-Patchwork-Id: 567407 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CB8EEC433EF for ; Wed, 27 Apr 2022 08:19:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1359367AbiD0IWj (ORCPT ); Wed, 27 Apr 2022 04:22:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50016 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344335AbiD0IWj (ORCPT ); Wed, 27 Apr 2022 04:22:39 -0400 Received: from mail-lj1-x22d.google.com (mail-lj1-x22d.google.com [IPv6:2a00:1450:4864:20::22d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 29AB25132E; Wed, 27 Apr 2022 01:19:28 -0700 (PDT) Received: by mail-lj1-x22d.google.com with SMTP id q14so1593382ljc.12; Wed, 27 Apr 2022 01:19:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Menmuaf0e0Qo4q5+TG+xw4d45Ug3x7/RbPb1vBLZhMU=; b=UnZ43Ud4hbgbtFF3APhThOuGig2R6GeS2MtctK5XAkNB5jpjt2UxhrH+O8TD0LR52Q 03LwYpa1Y/DaOfP+cZkHdulnS4VGJaKoGqjn/UI9z8xlDcz+VqGzWmh7pISUR3JL8ub0 RAdjk4K35Kpf3bIBWrOzlFbm9B8rF+9/3Peu2kJ4UkKF3jXWJvcqMUIlVUTc5orghafQ NlK+aSqD9Qc1bArI7m8ZQOFe8RLyRNA7zk7DFzPhjajikdvY3ftj62wgg1dFrYEqsxvb tLFu5AK6HAmLeAZdxEdljisw2+tUxdSbF3NM99GJrc3Go8cErkvZSm9Qy/AzTLylRGJT ngVg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Menmuaf0e0Qo4q5+TG+xw4d45Ug3x7/RbPb1vBLZhMU=; b=c8UuaJhhVPjrlujslL2ViqdBjpPbJxBOCUPkZX2m3OQpCGUW5NqBAudDKkl21cD+0x 09zwTLbIQe919gYlBkXH/O5UNjSgGw5a3kPipxC/sgMkclRbG1kxbdaRXvzjmxANUvwl qzAWxPbfWY9kqljiQc1VOVn3BjSCHXHmdciDn3fgLu2GQ9AS7K/2e1RYXtLaAzzGsrue KnChwQrqdtFJoW2zhhM2er1bn3i9sMfEGf1+Ad+4ztyqzoyoOGAA3rHduApqYl41UXGV nprzIuCQmdB8NAKhH9vFavRxPOKKIPCRHGr9yVYYBrbmJi0wVAE2cpdGxzmJjAd3NS4Z mbqw== X-Gm-Message-State: AOAM5304QheCDkwPUTa8mVYnqtAgsKupyci8VaBklkvvo9TxvytaqxYN SxK9JrXwuIoa3Nzvl8FF/DyoSHJsgoMueECaeba6Qg== X-Google-Smtp-Source: ABdhPJyv+gVl16YvzgbFljhJtF6IzdeX5XODLb8i5OwfH7WfoTJNZJOOhPjTtCD+5pP02tb1GThmFw== X-Received: by 2002:a05:651c:210d:b0:24f:146c:698a with SMTP id a13-20020a05651c210d00b0024f146c698amr7911463ljq.362.1651047565989; Wed, 27 Apr 2022 01:19:25 -0700 (PDT) Received: from shc.milas.spb.ru ([188.243.217.78]) by smtp.gmail.com with ESMTPSA id y10-20020a2e978a000000b0024f17b6db32sm526092lji.97.2022.04.27.01.19.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Apr 2022 01:19:25 -0700 (PDT) From: Alexander Shiyan To: linux-omap@vger.kernel.org Cc: devicetree@vger.kernel.org, =?utf-8?q?Beno=C3=AEt_Cousson?= , Krzysztof Kozlowski , Alexander Shiyan Subject: [PATCH 2/2] ARM: dts: am335x-myirtech: Update NAND default partition table layout Date: Wed, 27 Apr 2022 11:19:14 +0300 Message-Id: <20220427081914.6773-2-eagle.alexander923@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220427081914.6773-1-eagle.alexander923@gmail.com> References: <20220427081914.6773-1-eagle.alexander923@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org This patch replaces the legacy partition table layout with a modern style. As an additional change, we are reserving space for three backup MLO entries and increasing space for the main bootloader. Signed-off-by: Alexander Shiyan --- arch/arm/boot/dts/am335x-myirtech-myc.dtsi | 3 --- arch/arm/boot/dts/am335x-myirtech-myd.dts | 20 +++++++++++++------- 2 files changed, 13 insertions(+), 10 deletions(-) diff --git a/arch/arm/boot/dts/am335x-myirtech-myc.dtsi b/arch/arm/boot/dts/am335x-myirtech-myc.dtsi index d94e096983c7..6eea18b29355 100644 --- a/arch/arm/boot/dts/am335x-myirtech-myc.dtsi +++ b/arch/arm/boot/dts/am335x-myirtech-myc.dtsi @@ -131,9 +131,6 @@ nand0: nand@0,0 { gpmc,wr-data-mux-bus-ns = <0>; ti,elm-id = <&elm>; ti,nand-ecc-opt = "bch8"; - - #address-cells = <1>; - #size-cells = <1>; }; }; diff --git a/arch/arm/boot/dts/am335x-myirtech-myd.dts b/arch/arm/boot/dts/am335x-myirtech-myd.dts index 1479fd95dec2..9d81d4cc6890 100644 --- a/arch/arm/boot/dts/am335x-myirtech-myd.dts +++ b/arch/arm/boot/dts/am335x-myirtech-myd.dts @@ -227,14 +227,20 @@ &mmc1 { }; &nand0 { - partition@0 { - label = "MLO"; - reg = <0x00000 0x20000>; - }; + nand_parts: partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - partition@20000 { - label = "boot"; - reg = <0x20000 0x80000>; + partition@0 { + label = "MLO"; + reg = <0x00000 0x20000>; + }; + + partition@80000 { + label = "boot"; + reg = <0x80000 0x100000>; + }; }; };