From patchwork Sat Apr 30 05:44:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 568624 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 764E2C43217 for ; Sat, 30 Apr 2022 12:53:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236750AbiD3M4k (ORCPT ); Sat, 30 Apr 2022 08:56:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60632 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232320AbiD3M4j (ORCPT ); Sat, 30 Apr 2022 08:56:39 -0400 Received: from mail-ej1-x62a.google.com (mail-ej1-x62a.google.com [IPv6:2a00:1450:4864:20::62a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2EB1A60AAA; Sat, 30 Apr 2022 05:53:18 -0700 (PDT) Received: by mail-ej1-x62a.google.com with SMTP id i19so20009394eja.11; Sat, 30 Apr 2022 05:53:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=qDkW5nE/uuJ/Z7IiY96dISQWO6W0w+uLl2SRDnr1tyo=; b=TF3OH95Mk6sx/ukpPzDLZAWThjxkqbSUjSzy8qdnWy0RWIAb7dhgSYWJo9BMLUnbwe tUlgRUPN9JJgSNQqFtttfN0EyGR04Fl/3dZO+ZtLUsUp2tM/hczGD8LxdiH7LxrUeb3h OXyiLt7q6fhu2vsOV5ya+jk5PgnMOW+59NPAnLA/a9Ttc50ZqElIg2Y/DBTCxpjzeKaA pGEvJQp11Pbin260SmwnXH21IikFwU03ME/OKLHMnyYfHiinrU+Vg8K/b5QYBHp6k55/ Lk3AVOEyJ6XPBwY106JaDdBqw5iG8xGfcbaO3gAuiB10R4hT1FVBkTcV5rlJ+YpOQib/ PkfQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=qDkW5nE/uuJ/Z7IiY96dISQWO6W0w+uLl2SRDnr1tyo=; b=ionjc4ZHkkX7RgSJD2KTjkFpTpEvC3tG+qe5RrWGNVHl8RrDUO0rDW3AOx/wJoNcSl FZToivbFUHWWuM6+gmd08XhocqzgZ89FzM+2/CXSgqePXEvYEdqS99lPpVgkhkmZKe+W JB9q+Si/z6J7QnKCgzi7RbRK7f04UX9sGE4XLJ8ttGWvpwzZ67YzNVLnCfhzMYrHCPha lUSsqgQr1G76J4CAwYYknYEXsSl5PKsZ7C9uKQkkCjMIvvc7oAEzK6/sF2MT486awZgz IUxtIoWyOSKnA0ExPuUPQFCgnKuE9FQYJmuNeVNwrrUNfCOi12V1K53Fl1kp+mlYu8A5 /qgQ== X-Gm-Message-State: AOAM5330v+JjzqeqEF4mqozqy8AYJCmF0Wr2Q3V80obGUdUx74z3bn3K 0caRvAI9KUDuMf9utJpT9dj3GZ1VgyE= X-Google-Smtp-Source: ABdhPJzOCXeYnaTR2xDY+g0h7VFvbibtZi3+y88Um1MJneQyNSYAXRUd67PtfIuqj+ArTbrRAKNzCw== X-Received: by 2002:a17:907:9622:b0:6f3:9797:8eaf with SMTP id gb34-20020a170907962200b006f397978eafmr3823374ejc.96.1651323196654; Sat, 30 Apr 2022 05:53:16 -0700 (PDT) Received: from localhost.localdomain (93-42-70-190.ip85.fastwebnet.it. [93.42.70.190]) by smtp.googlemail.com with ESMTPSA id jl25-20020a17090775d900b006f3ef214dc5sm1597209ejc.43.2022.04.30.05.53.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 30 Apr 2022 05:53:16 -0700 (PDT) From: Ansuel Smith To: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Sricharan R , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Ansuel Smith , Dmitry Baryshkov Subject: [PATCH v2 1/3] clk: qcom: clk-hfpll: use poll_timeout macro Date: Sat, 30 Apr 2022 07:44:56 +0200 Message-Id: <20220430054458.31321-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220430054458.31321-1-ansuelsmth@gmail.com> References: <20220430054458.31321-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Use regmap_read_poll_timeout macro instead of do-while structure to tidy things up. Also set a timeout to prevent any sort of system stall. Signed-off-by: Ansuel Smith Reviewed-by: Dmitry Baryshkov --- drivers/clk/qcom/clk-hfpll.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/clk/qcom/clk-hfpll.c b/drivers/clk/qcom/clk-hfpll.c index e847d586a73a..7dd17c184b69 100644 --- a/drivers/clk/qcom/clk-hfpll.c +++ b/drivers/clk/qcom/clk-hfpll.c @@ -72,13 +72,16 @@ static void __clk_hfpll_enable(struct clk_hw *hw) regmap_update_bits(regmap, hd->mode_reg, PLL_RESET_N, PLL_RESET_N); /* Wait for PLL to lock. */ - if (hd->status_reg) { - do { - regmap_read(regmap, hd->status_reg, &val); - } while (!(val & BIT(hd->lock_bit))); - } else { + if (hd->status_reg) + /* + * Busy wait. Should never timeout, we add a timeout to + * prevent any sort of stall. + */ + regmap_read_poll_timeout(regmap, hd->status_reg, val, + !(val & BIT(hd->lock_bit)), 0, + 100 * USEC_PER_MSEC); + else udelay(60); - } /* Enable PLL output. */ regmap_update_bits(regmap, hd->mode_reg, PLL_OUTCTRL, PLL_OUTCTRL); From patchwork Sat Apr 30 05:44:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 568192 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 95A1BC4332F for ; Sat, 30 Apr 2022 12:53:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240801AbiD3M4l (ORCPT ); Sat, 30 Apr 2022 08:56:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60646 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238849AbiD3M4k (ORCPT ); Sat, 30 Apr 2022 08:56:40 -0400 Received: from mail-ej1-x632.google.com (mail-ej1-x632.google.com [IPv6:2a00:1450:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4EA7A60AA5; Sat, 30 Apr 2022 05:53:19 -0700 (PDT) Received: by mail-ej1-x632.google.com with SMTP id n10so2628832ejk.5; Sat, 30 Apr 2022 05:53:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=qQHp5HtdzpGu2u7npAjmiOBiFIiFXdFVAgc4KgBu3V0=; b=hxZJ1Xggho6ovzXV+Z55jxBgGNCDKN6/bAQZH8ATQDFvNpbAU0hPv+W/fgcFNq1mA7 LfT8m7VrHrV2NQdVVnEdMuCYavw17uvlXGQ8Gp/egYKfD5lopBpOwTeKdpBlAeLo72UC uugUPhWhwa+avAJLdEwhmk2lcTS8cBObfVU/eyXW2Ae8ctR5eqqpVEWyRiK+AYEamv0U n8XClKt8hlNCHui0SzPnMCgRPG1jhYPcm98M8HhP5eDYyJlGpM0Tju5gFy/rJI9dfuLt B6Dh73kAqiO/cY/n7Dco12peIp5Sn0yzOuk5kAM4/YENmDPiyuVR6mv0iMQihowolHnf MHMQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=qQHp5HtdzpGu2u7npAjmiOBiFIiFXdFVAgc4KgBu3V0=; b=dDDXhZhl2KxQZcmbmq7eRi48o6x80GJYQJRHr0Ct70+xfVWtryBtQOI5mS3V4cslQa sMiZJYgIS7uLQ9GrvZ+dS0CZFKDIbTrJY90hrlZ3dKy1c9x2YDbN6xUy6w5SDwbLT0eG Oy6QC2FeVLl4T2yTiQPwPHjFjytNeJiaZS2+GQ9fC+vHIfNRf7N+2kdfSbtdjuszpIBv bJ9kx6lbc2N6CzPxsF0K2XiQQVBOOu7vI2wh+yCG9mupkG17CKNTLQ6fYPMksocuAQmq 0HCvLtS1zKECiK/CPH4uEAD6Il1QKcvabrDUKdihbpJ5GMkToRg3AL/UxNA4BpyGeHkS c4EA== X-Gm-Message-State: AOAM530kIvqakAm5kT4HdfcpVsLNz2oq/Lrr1EUVZ7luOa52zFK7BRJA GpcOSF05ihyktMAcXAp6GiGlN8xnq0s= X-Google-Smtp-Source: ABdhPJw5TykKCl8ZZD5YKi4a+JnFVOpeJekWxBLzqw6pvBJzJHzSNQnkfB9wlv+aC6wgGr2Fp0cIXw== X-Received: by 2002:a17:906:7948:b0:6da:64ed:178e with SMTP id l8-20020a170906794800b006da64ed178emr3843533ejo.523.1651323197664; Sat, 30 Apr 2022 05:53:17 -0700 (PDT) Received: from localhost.localdomain (93-42-70-190.ip85.fastwebnet.it. [93.42.70.190]) by smtp.googlemail.com with ESMTPSA id jl25-20020a17090775d900b006f3ef214dc5sm1597209ejc.43.2022.04.30.05.53.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 30 Apr 2022 05:53:17 -0700 (PDT) From: Ansuel Smith To: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Sricharan R , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Ansuel Smith , Dmitry Baryshkov Subject: [PATCH v2 2/3] clk: qcom: clk-krait: unlock spin after mux completion Date: Sat, 30 Apr 2022 07:44:57 +0200 Message-Id: <20220430054458.31321-3-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220430054458.31321-1-ansuelsmth@gmail.com> References: <20220430054458.31321-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Unlock spinlock after the mux switch is completed to prevent any corner case of mux request while the switch still needs to be done. Fixes: 4d7dc77babfe ("clk: qcom: Add support for Krait clocks") Signed-off-by: Ansuel Smith Reviewed-by: Dmitry Baryshkov --- drivers/clk/qcom/clk-krait.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/clk/qcom/clk-krait.c b/drivers/clk/qcom/clk-krait.c index 59f1af415b58..90046428693c 100644 --- a/drivers/clk/qcom/clk-krait.c +++ b/drivers/clk/qcom/clk-krait.c @@ -32,11 +32,16 @@ static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel) regval |= (sel & mux->mask) << (mux->shift + LPL_SHIFT); } krait_set_l2_indirect_reg(mux->offset, regval); - spin_unlock_irqrestore(&krait_clock_reg_lock, flags); /* Wait for switch to complete. */ mb(); udelay(1); + + /* + * Unlock now to make sure the mux register is not + * modified while switching to the new parent. + */ + spin_unlock_irqrestore(&krait_clock_reg_lock, flags); } static int krait_mux_set_parent(struct clk_hw *hw, u8 index) From patchwork Sat Apr 30 05:44:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 568623 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 36E46C433FE for ; Sat, 30 Apr 2022 12:53:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1378971AbiD3M4v (ORCPT ); Sat, 30 Apr 2022 08:56:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60668 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241936AbiD3M4m (ORCPT ); Sat, 30 Apr 2022 08:56:42 -0400 Received: from mail-ed1-x52f.google.com (mail-ed1-x52f.google.com [IPv6:2a00:1450:4864:20::52f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3B9A860AA6; Sat, 30 Apr 2022 05:53:20 -0700 (PDT) Received: by mail-ed1-x52f.google.com with SMTP id g20so11863029edw.6; Sat, 30 Apr 2022 05:53:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=aIciRzMYkPzkWig+LRqnWt0TUAKSu0ybKrdfIEn8ELs=; b=hKFZj3/poS2k6vehXqzJjUZj7lYJotX+HhSK81+6TdiszUC6ARUqOyjqCdoTV+2771 hoLw+dWMsU10TEXeHOH7eLnx24FM2HxeOB8ksqhEPVIj8lbFrfD9ePQB7lqHmjBk0V+i ebVtT0ed8mo3E8TqZt79vl5xsQSdDFOYx74PS4poXbjqw8aMfnpDKoeB6NBZ9EmpJkn2 brQMbUeCcGoqY6vrfTtBzxJaNqeSfhGdyDL21moqaloosq8189F7MvciEyCTtSiZeEFt AJl770S7qW8aMDGYxUcveM/ZvFJZcHGOnXwAouBXLu5VTST2Sa6xgZacj6jZCvVUSZNa x44g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=aIciRzMYkPzkWig+LRqnWt0TUAKSu0ybKrdfIEn8ELs=; b=qgjVlslTdLWjBaED17fcIDZJPkmIE1pTqrqzTOqpYEVp5V7Naj1++leWMv67FI8Klf mW6TBH9DEAuGQ3hMWRYEtPb0jgcsThuxHKmWuPyabq9nYH8qvMdtMLbuVP2FYFQfbkbu 9ZtbeopAZ3RPPiCZ5GQzLmMJTp3+x4jBvu/EWdffOszzq5Bhvx2iFUTu3mlSnT0oLNTt AuzrwpRw1JKLZMqwOV41++lo2NE08YbDGWg8xY/pAh9e6KTrz2+gYIbJP7QYc1J9M3F7 QXOBhe/PreqprCyXEUMrhsqijALMJNhjCM/IM1z0+dqgHS14nZ3bCpKIp4muOv1K/cNf e74A== X-Gm-Message-State: AOAM533Z4ge9+UGH+XtDQsIQJS1YUrRvN5dGEpUwdjqM4zfsUFQo5tBi XStYJeyCLHU2pTOgqno7/7f0m19z1/Q= X-Google-Smtp-Source: ABdhPJy2h6rIHiYMLoby/9pT0hFxIKZSyn6LwkfW77ktbhv0M96NEht68ivMa/+J8v57jqkEN3gXZg== X-Received: by 2002:aa7:da08:0:b0:425:af3c:196a with SMTP id r8-20020aa7da08000000b00425af3c196amr4325510eds.69.1651323198687; Sat, 30 Apr 2022 05:53:18 -0700 (PDT) Received: from localhost.localdomain (93-42-70-190.ip85.fastwebnet.it. [93.42.70.190]) by smtp.googlemail.com with ESMTPSA id jl25-20020a17090775d900b006f3ef214dc5sm1597209ejc.43.2022.04.30.05.53.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 30 Apr 2022 05:53:18 -0700 (PDT) From: Ansuel Smith To: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Sricharan R , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Ansuel Smith Subject: [PATCH v2 3/3] clk: qcom: clk-krait: add apq/ipq8064 errata workaround Date: Sat, 30 Apr 2022 07:44:58 +0200 Message-Id: <20220430054458.31321-4-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220430054458.31321-1-ansuelsmth@gmail.com> References: <20220430054458.31321-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add apq/ipq8064 errata workaround where the sec_src clock gating needs to be disabled during switching. krait-cc compatible is not enough to handle this and limit this workaround to apq/ipq8064. We check machine compatible to handle this. Signed-off-by: Ansuel Smith --- drivers/clk/qcom/clk-krait.c | 16 ++++++++++++++++ drivers/clk/qcom/clk-krait.h | 1 + drivers/clk/qcom/krait-cc.c | 8 ++++++++ 3 files changed, 25 insertions(+) diff --git a/drivers/clk/qcom/clk-krait.c b/drivers/clk/qcom/clk-krait.c index 90046428693c..45da736bd5f4 100644 --- a/drivers/clk/qcom/clk-krait.c +++ b/drivers/clk/qcom/clk-krait.c @@ -18,13 +18,23 @@ static DEFINE_SPINLOCK(krait_clock_reg_lock); #define LPL_SHIFT 8 +#define SECCLKAGD BIT(4) + static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel) { unsigned long flags; u32 regval; spin_lock_irqsave(&krait_clock_reg_lock, flags); + regval = krait_get_l2_indirect_reg(mux->offset); + + /* apq/ipq8064 Errata: disable sec_src clock gating during switch. */ + if (mux->disable_sec_src_gating) { + regval |= SECCLKAGD; + krait_set_l2_indirect_reg(mux->offset, regval); + } + regval &= ~(mux->mask << mux->shift); regval |= (sel & mux->mask) << mux->shift; if (mux->lpl) { @@ -33,6 +43,12 @@ static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel) } krait_set_l2_indirect_reg(mux->offset, regval); + /* apq/ipq8064 Errata: re-enabled sec_src clock gating. */ + if (mux->disable_sec_src_gating) { + regval &= ~SECCLKAGD; + krait_set_l2_indirect_reg(mux->offset, regval); + } + /* Wait for switch to complete. */ mb(); udelay(1); diff --git a/drivers/clk/qcom/clk-krait.h b/drivers/clk/qcom/clk-krait.h index 9120bd2f5297..f930538c539e 100644 --- a/drivers/clk/qcom/clk-krait.h +++ b/drivers/clk/qcom/clk-krait.h @@ -15,6 +15,7 @@ struct krait_mux_clk { u8 safe_sel; u8 old_index; bool reparent; + bool disable_sec_src_gating; struct clk_hw hw; struct notifier_block clk_nb; diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c index 4d4b657d33c3..cfd961d5cc45 100644 --- a/drivers/clk/qcom/krait-cc.c +++ b/drivers/clk/qcom/krait-cc.c @@ -139,6 +139,14 @@ krait_add_sec_mux(struct device *dev, int id, const char *s, mux->hw.init = &init; mux->safe_sel = 0; + /* Checking for qcom,krait-cc-v1 or qcom,krait-cc-v2 is not + * enough to limit this to apq/ipq8064. Directly check machine + * compatible to correctly handle this errata. + */ + if (of_machine_is_compatible("qcom,ipq8064") || + of_machine_is_compatible("qcom,apq8064")) + mux->disable_sec_src_gating = true; + init.name = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s); if (!init.name) return -ENOMEM;