From patchwork Sun May 1 20:33:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gil Fine X-Patchwork-Id: 568748 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4BEE6C433EF for ; Sun, 1 May 2022 20:24:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347241AbiEAU1Y (ORCPT ); Sun, 1 May 2022 16:27:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52126 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245521AbiEAU1X (ORCPT ); Sun, 1 May 2022 16:27:23 -0400 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2871C3EF39 for ; Sun, 1 May 2022 13:23:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1651436637; x=1682972637; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=8FcK3JT6tLgXermoJZpvyCzZDB/VYzv6Hi6+HVyZybI=; b=bnlqyHkHNSDk8MlZxIsY+8vq685n02xv1/ZDEckW6XeoZPN6QOVlKXtW GVlzA+v3mZfVJLVpoFN2Qp7ZKcPhqaXk4zy00qgmmCRdH7yjx8jc2v1dl 1vzy+FNjyNky93NOOTNgDT8bUxjqGBWLpkv/yD+xR6vU1l/swW35Yl8rq 7Xc1t6PcctHKytdVF1UQdCA34EtPeixrxescy3X9iTaCv8Zj7NU716TT0 4If7RWf3nNb0tz2vw08rcToh5d0hVM2nkdt9E2uf1uKi5QaMyUhskRQmE lYBEvUY+8cuI2IC8im5FnuDT7eThidvEkbqzD+wr+W9iopgIdAtMIsqQp A==; X-IronPort-AV: E=McAfee;i="6400,9594,10334"; a="247611826" X-IronPort-AV: E=Sophos;i="5.91,190,1647327600"; d="scan'208";a="247611826" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 May 2022 13:23:56 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,190,1647327600"; d="scan'208";a="583310203" Received: from ccdjpclinux26.jer.intel.com ([10.12.48.253]) by orsmga008.jf.intel.com with ESMTP; 01 May 2022 13:23:54 -0700 From: Gil Fine To: andreas.noever@gmail.com, michael.jamet@intel.com, mika.westerberg@linux.intel.com, YehezkelShB@gmail.com Cc: gil.fine@intel.com, linux-usb@vger.kernel.org, lukas@wunner.de Subject: [PATCH 1/5] thunderbolt: Silently ignore CLx enabling in case CLx is not supported Date: Sun, 1 May 2022 23:33:17 +0300 Message-Id: <20220501203321.19021-2-gil.fine@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220501203321.19021-1-gil.fine@intel.com> References: <20220501203321.19021-1-gil.fine@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org We can't enable CLx if it is not supported either by the host or device, or by the USB4/TBT link (e.g. when an optical cable is used). We silently ignore CLx enabling in this case. Signed-off-by: Gil Fine --- drivers/thunderbolt/tb.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/thunderbolt/tb.c b/drivers/thunderbolt/tb.c index 44d04b651a8b..7419cd1aefba 100644 --- a/drivers/thunderbolt/tb.c +++ b/drivers/thunderbolt/tb.c @@ -581,6 +581,7 @@ static void tb_scan_port(struct tb_port *port) struct tb_cm *tcm = tb_priv(port->sw->tb); struct tb_port *upstream_port; struct tb_switch *sw; + int ret; if (tb_is_upstream_port(port)) return; @@ -669,7 +670,9 @@ static void tb_scan_port(struct tb_port *port) tb_switch_lane_bonding_enable(sw); /* Set the link configured */ tb_switch_configure_link(sw); - if (tb_switch_enable_clx(sw, TB_CL0S)) + /* Silently ignore CLx enabling in case CLx is not supported */ + ret = tb_switch_enable_clx(sw, TB_CL0S); + if (ret && ret != -EOPNOTSUPP) tb_sw_warn(sw, "failed to enable CLx on upstream port\n"); tb_switch_tmu_configure(sw, TB_SWITCH_TMU_RATE_HIFI, @@ -1452,12 +1455,15 @@ static int tb_suspend_noirq(struct tb *tb) static void tb_restore_children(struct tb_switch *sw) { struct tb_port *port; + int ret; /* No need to restore if the router is already unplugged */ if (sw->is_unplugged) return; - if (tb_switch_enable_clx(sw, TB_CL0S)) + /* Silently ignore CLx re-enabling in case CLx is not supported */ + ret = tb_switch_enable_clx(sw, TB_CL0S); + if (ret && ret != -EOPNOTSUPP) tb_sw_warn(sw, "failed to re-enable CLx on upstream port\n"); /* From patchwork Sun May 1 20:33:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gil Fine X-Patchwork-Id: 568747 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 04CA4C433F5 for ; Sun, 1 May 2022 20:24:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354274AbiEAU12 (ORCPT ); Sun, 1 May 2022 16:27:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52174 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353732AbiEAU11 (ORCPT ); Sun, 1 May 2022 16:27:27 -0400 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4AE7B3EF36 for ; Sun, 1 May 2022 13:24:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1651436641; x=1682972641; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=BAFJ+DR2d6Bu7mqJI39cIz/ZIgjvFu/xGC4HeIIR05Q=; b=gdxZl5CDNXs1QEC8g26ZMn//kv5BwfptZPs8V0M9/dQKeXYSBP4n/ntp Sm0/GvTI0KLfwGfEt5/9jmZNQ7tLljImOqcIYDFnx6xMYB1q5inu69wzb KF9qL7Zf1XqZKhAfwa793/PIsTycgUs6gG7PP93okGOS3iR46i5XlugY7 Ah8DFt2T5V48T10AeHSm+JDajBP+9StkA2C/Y//WCKNEcwl/KuxWtPm4I FXAiB0dtF8IyNrvocaSV8fCZr0tlFg6AvyjnA44ErR1BDVeVQIS0KvyYf 7kJDUlsUarqouKPkduRdsADAlgCOiv8SIcmnqRIKeNpCxy+x2lBIZ8Hv8 Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10334"; a="247611832" X-IronPort-AV: E=Sophos;i="5.91,190,1647327600"; d="scan'208";a="247611832" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 May 2022 13:24:01 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,190,1647327600"; d="scan'208";a="583310219" Received: from ccdjpclinux26.jer.intel.com ([10.12.48.253]) by orsmga008.jf.intel.com with ESMTP; 01 May 2022 13:23:59 -0700 From: Gil Fine To: andreas.noever@gmail.com, michael.jamet@intel.com, mika.westerberg@linux.intel.com, YehezkelShB@gmail.com Cc: gil.fine@intel.com, linux-usb@vger.kernel.org, lukas@wunner.de Subject: [PATCH 3/5] thunderbolt: Change downstream router's TMU rate in both TMU uni/bidir mode Date: Sun, 1 May 2022 23:33:19 +0300 Message-Id: <20220501203321.19021-4-gil.fine@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220501203321.19021-1-gil.fine@intel.com> References: <20220501203321.19021-1-gil.fine@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org In case of uni-directional time sync, TMU handshake is initiated by upstream router. In case of bi-directional time sync, TMU handshake is initiated by downstream router. In order to handle correctly the case of uni-directional mode, we avoid changing the upstream router's rate to off, because it might have another downstream router plugged that is set to uni-directional mode (and we don't want to change its mode). Instead, we always change downstream router's rate. Signed-off-by: Gil Fine --- drivers/thunderbolt/tmu.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/thunderbolt/tmu.c b/drivers/thunderbolt/tmu.c index b656659d02fb..985ca43b8f39 100644 --- a/drivers/thunderbolt/tmu.c +++ b/drivers/thunderbolt/tmu.c @@ -359,13 +359,14 @@ int tb_switch_tmu_disable(struct tb_switch *sw) * In case of uni-directional time sync, TMU handshake is * initiated by upstream router. In case of bi-directional * time sync, TMU handshake is initiated by downstream router. - * Therefore, we change the rate to off in the respective - * router. + * We change downstream router's rate to off for both uni/bidir + * cases although it is needed only for the bi-directional mode. + * We avoid changing upstream router's mode since it might + * have another downstream router plugged, that is set to + * uni-directional mode and we don't want to change it's TMU + * mode. */ - if (unidirectional) - tb_switch_tmu_rate_write(parent, TB_SWITCH_TMU_RATE_OFF); - else - tb_switch_tmu_rate_write(sw, TB_SWITCH_TMU_RATE_OFF); + tb_switch_tmu_rate_write(sw, TB_SWITCH_TMU_RATE_OFF); tb_port_tmu_time_sync_disable(up); ret = tb_port_tmu_time_sync_disable(down); From patchwork Sun May 1 20:33:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gil Fine X-Patchwork-Id: 568746 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0A86FC433FE for ; Sun, 1 May 2022 20:24:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354331AbiEAU1d (ORCPT ); Sun, 1 May 2022 16:27:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52302 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1354343AbiEAU1c (ORCPT ); Sun, 1 May 2022 16:27:32 -0400 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9AD4A3EF39 for ; Sun, 1 May 2022 13:24:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1651436646; x=1682972646; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=qB8FXQ0fDT7sJ4/yVweDns83nJ1kKPZHSiUWavVKEdE=; b=hNo/Xd4OaVppTzN68zXZb1EqFp6B2VeHhiK7uQFLKWKd7GX0TLaKo5n+ Wr8p4F4rvbZCXIOPtXC8pezqz3LmhN9vJJWH/ZAewZxTdJpK9QUzr9ZJi I0HH+WMQMqqcsUCZUuF0xwGHsmBOgx314BYODdRe72L7ma15GU4CkbRMY efwp8m+h0TuKiJLwT2aTFXcNQFwoF++PgJ9VUXb07/cnmRiPGAJlXgaVR O7D+1Y2I2a+5FKiLhWBYrQ/WgA8JZL/V6/FjXD4U7iiCMrgU7SvI7rLHB yQF+TsQavM8hhbTEfxCbjJi1+U/b1PkLxm44RjZPzleWki/fR7xg4hkIL A==; X-IronPort-AV: E=McAfee;i="6400,9594,10334"; a="247611839" X-IronPort-AV: E=Sophos;i="5.91,190,1647327600"; d="scan'208";a="247611839" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 May 2022 13:24:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,190,1647327600"; d="scan'208";a="583310238" Received: from ccdjpclinux26.jer.intel.com ([10.12.48.253]) by orsmga008.jf.intel.com with ESMTP; 01 May 2022 13:24:03 -0700 From: Gil Fine To: andreas.noever@gmail.com, michael.jamet@intel.com, mika.westerberg@linux.intel.com, YehezkelShB@gmail.com Cc: gil.fine@intel.com, linux-usb@vger.kernel.org, lukas@wunner.de Subject: [PATCH 5/5] thunderbolt: Change TMU mode to Hifi-Uni once DP tunneled Date: Sun, 1 May 2022 23:33:21 +0300 Message-Id: <20220501203321.19021-6-gil.fine@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220501203321.19021-1-gil.fine@intel.com> References: <20220501203321.19021-1-gil.fine@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Here we configure TMU mode to Hifi-Uni once DP tunnel is created. This is due to accuracy requirement for DP tunneling as appears in CM guide 1.0, section 7.3.2 Due to Intel HW limitation, once we changed the TMU mode to Hifi-Uni (when DP is tunnel exists), we don't change TMU mode back to Normal-Uni, even if DP tunnel is teared-down later. Signed-off-by: Gil Fine --- drivers/thunderbolt/tb.c | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/drivers/thunderbolt/tb.c b/drivers/thunderbolt/tb.c index 05a084e3e9f6..efe53d221ca8 100644 --- a/drivers/thunderbolt/tb.c +++ b/drivers/thunderbolt/tb.c @@ -50,6 +50,8 @@ struct tb_hotplug_event { }; static void tb_handle_hotplug(struct work_struct *work); +static int tb_enable_tmu_1st_child(struct tb *tb, + enum tb_switch_tmu_rate rate); static void tb_queue_hotplug(struct tb *tb, u64 route, u8 port, bool unplug) { @@ -118,6 +120,13 @@ static void tb_switch_discover_tunnels(struct tb_switch *sw, switch (port->config.type) { case TB_TYPE_DP_HDMI_IN: tunnel = tb_tunnel_discover_dp(tb, port, alloc_hopids); + /* + * In case of DP tunnel exists, change TMU mode to + * HiFi for CL0s to work. + */ + if (tunnel) + tb_enable_tmu_1st_child(tb, + TB_SWITCH_TMU_RATE_HIFI); break; case TB_TYPE_PCIE_DOWN: @@ -235,6 +244,31 @@ static int tb_enable_tmu(struct tb_switch *sw) return tb_switch_tmu_enable(sw); } +/* + * Once a DP tunnel exists in the domain, we set the TMU mode so that + * it meets the accuracy requirements and also enables CLx entry (CL0s). + * We set the TMU mode of the first depth router(s) for CL0s to work. + */ +static int tb_enable_tmu_1st_child(struct tb *tb, enum tb_switch_tmu_rate rate) +{ + struct tb_switch *root_sw = tb->root_switch; + struct tb_port *port; + + tb_switch_for_each_port(root_sw, port) { + struct tb_switch *sw; + int ret; + + if (!tb_port_has_remote(port) || !tb_port_is_null(port)) + continue; + sw = port->remote->sw; + tb_switch_tmu_configure(sw, rate, tb_switch_is_clx_enabled(sw)); + if (tb_switch_tmu_enable(sw)) + tb_dbg(tb, "Fail switching TMU to HiFi for 1st depth router %d\n", ret); + } + + return 0; +} + /** * tb_find_unused_port() - return the first inactive port on @sw * @sw: Switch to find the port on @@ -981,6 +1015,12 @@ static void tb_tunnel_dp(struct tb *tb) list_add_tail(&tunnel->list, &tcm->tunnel_list); tb_reclaim_usb3_bandwidth(tb, in, out); + /* + * In case of DP tunnel exists, change TMU mode to + * HiFi for CL0s to work. + */ + tb_enable_tmu_1st_child(tb, TB_SWITCH_TMU_RATE_HIFI); + return; err_free: