From patchwork Fri May 6 15:27:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 570287 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3A91CC433F5 for ; Fri, 6 May 2022 15:29:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1442903AbiEFPdO (ORCPT ); Fri, 6 May 2022 11:33:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53624 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1442897AbiEFPc4 (ORCPT ); Fri, 6 May 2022 11:32:56 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B27F06D38C; Fri, 6 May 2022 08:29:11 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus004 [74.208.5.2]) with ESMTPSA (Nemesis) id 1Md62J-1oMbc60tF5-00aBhj; Fri, 06 May 2022 17:28:29 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 01/24] ARM: dts: imx7-colibri: overhaul display/touch functionality Date: Fri, 6 May 2022 17:27:46 +0200 Message-Id: <20220506152809.295409-2-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506152809.295409-1-marcel@ziswiler.com> References: <20220506152809.295409-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:77h+1xeLkAt53wPfBbFh9kkuLoma1S0AcIWUDi4rl7DsdSNusTp zg+aOQBxj4C6nY6hg/K34dj02JEwAX5krxqRLZCzPxGj5NWk6zISsof5YLyM4nFhIL+Y36j qho/Nx/mbxwXFrnYlXiW9csu90DsIM0C7mGCbhuXk7Vdd3kpvr+X5iXnEemjYd9S9cuIBPU /KH6aaVWK2OuHlBH0mhIA== X-UI-Out-Filterresults: notjunk:1;V03:K0:vmx6wwkPXok=:9MaAlJzW4RESRUnv+VEx8M D7B8A9y73Kq+U94vR+v4Sr6CmWNlHEy7JFvxqPLVPnQc8cp69C7yJs4m6od/U2QZADVzHssJ/ qbyqmgGdvJiC0PNhLpOwe87EAX77dNSgDLNA0nbx8qQw70yw6XDbyXu1sbx0OSTFKkjdtzknZ Fr7O8q8qzEoydQWpfpXwDz7JfLU5G3POucpQmxx+1VC+RNAVROsh4yy2TnRoFqVayZxlcBUMc 1P69rYYfWSPKOy1nrJ8JGkfLS99Y8PEybGC/GVlHDGu2VVVD6Pg+wa1I64MnNWMPKk1+NJd8s BoPRpq8KJKeKKlSJ1UPL+8CejHitUg4BplTjwep1GkFBWTcANz7mFUPnsHutMs4pZf40s4PCZ FdTQdq+MAU7E39uezY3FePp4FnA3EdGqzuwbIf4+NevbtAHmCxIqLyWz6S2Eaouz9ck8TZhcq fSArGO2kmx+ovTSnQ0Iqd+Z2s2NvV9kjI01XjMLWvPvU8UrpxL/PRsc7AnKRxHJbREBo81Jiz zeiByYDK2X39gNIqYlq9hia2yl/fK8lTYQ/t/3RrhKjDkjQNrg2+VYwyjYnjq3H60ye2vVxCJ UyyNLIYNdid3v7GWt2PKgji3McG2LTT2Y+QSf+zrlp92uqENp6n6tgnATLa/vGvuC8ZPQWIK5 SvWhn9beMfqKNSG8fOgI/co/9OGF3VksfC1jWys7hGV5NM73SB8UUZz6qeGN/qxZJryiITMnX 1F7trBJZW38xF6nv Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Rename display interface to match other modules to make it easier to use device tree overlays. The parallel RGB interface (lcdif) and all related stuff turn on in a device tree overlay. Keep them disabled in the main devicetree. As these subsystems are provided by module and not a part of boards, move their definitions into the module-level devicetree. Disable ad7879 touchscreen which turns on in a devic tree overlay. Remains it disabled in the main devicetree. Move Atmel MXT capacitive touch controller device tree nodes from carrier board to module level and add iomux pinctl groups for both the Capacitive Touch Adapter (using SODIMM 28/30) and the capacitive touch connector as found on later carrier boards (using SODIMM 106/107). Keep touchscreen and display nodes enabled for NAND based i.MX 7 modules, since device tree overlays are not yet supported. For the Colibri Evaluation Board keep the Capacitive Touch Adapter node disabled and PWM2, PWM3 enabled instead. For eMMC based modules keep nodes disabled to work in conjunction with device tree overlays. Add the iomuxc pinctrl group for the LVDS transceiver related signals to use it in a device tree overlay. While at it also alphabetically re=order them properties. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/imx7-colibri-aster.dtsi | 53 ------------ arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 66 +++----------- arch/arm/boot/dts/imx7-colibri.dtsi | 95 ++++++++++++++++++--- arch/arm/boot/dts/imx7d-colibri-aster.dts | 20 +++++ arch/arm/boot/dts/imx7d-colibri-eval-v3.dts | 32 +++++++ arch/arm/boot/dts/imx7s-colibri-aster.dts | 20 +++++ arch/arm/boot/dts/imx7s-colibri-eval-v3.dts | 32 +++++++ 7 files changed, 197 insertions(+), 121 deletions(-) diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi index b770fc937970..950b4e5f6cf4 100644 --- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi @@ -4,10 +4,6 @@ * */ - -#include -#include - / { chosen { stdout-path = "serial0:115200n8"; @@ -27,18 +23,6 @@ power { }; }; - panel: panel { - compatible = "edt,et057090dhu"; - backlight = <&bl>; - power-supply = <®_3v3>; - - port { - panel_in: endpoint { - remote-endpoint = <&lcdif_out>; - }; - }; - }; - reg_3v3: regulator-3v3 { compatible = "regulator-fixed"; regulator-name = "3.3V"; @@ -77,13 +61,6 @@ &adc2 { status = "disabled"; }; -&bl { - brightness-levels = <0 4 8 16 32 64 128 255>; - default-brightness-level = <6>; - power-supply = <®_3v3>; - status = "okay"; -}; - &fec1 { status = "okay"; }; @@ -91,17 +68,6 @@ &fec1 { &i2c4 { status = "okay"; - /* Microchip/Atmel maxtouch controller */ - touchscreen@4a { - compatible = "atmel,maxtouch"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpiotouch>; - reg = <0x4a>; - interrupt-parent = <&gpio2>; - interrupts = <15 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 107 */ - reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* SODIMM 106 */ - }; - /* M41T0M6 real time clock on carrier board */ rtc: rtc@68 { compatible = "st,m41t0"; @@ -109,25 +75,6 @@ rtc: rtc@68 { }; }; -&iomuxc { - pinctrl_gpiotouch: touchgpios { - fsl,pins = < - MX7D_PAD_EPDC_DATA15__GPIO2_IO15 0x74 - MX7D_PAD_EPDC_BDR0__GPIO2_IO28 0x14 - >; - }; -}; - -&lcdif { - status = "okay"; - - port { - lcdif_out: endpoint { - remote-endpoint = <&panel_in>; - }; - }; -}; - &pwm1 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index 3b9df8c82ae3..d6fa74222960 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -34,18 +34,6 @@ power { }; }; - panel: panel { - compatible = "edt,et057090dhu"; - backlight = <&bl>; - power-supply = <®_3v3>; - - port { - panel_in: endpoint { - remote-endpoint = <&lcdif_out>; - }; - }; - }; - reg_3v3: regulator-3v3 { compatible = "regulator-fixed"; regulator-name = "3.3V"; @@ -72,14 +60,6 @@ reg_usbh_vbus: regulator-usbh-vbus { }; }; -&bl { - brightness-levels = <0 4 8 16 32 64 128 255>; - default-brightness-level = <6>; - power-supply = <®_3v3>; - - status = "okay"; -}; - &adc1 { status = "okay"; }; @@ -88,6 +68,18 @@ &adc2 { status = "okay"; }; +/* + * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM, PWM, aka pwm2, pwm3. + * So if you enable following capacitive touch controller, disable pwm2/pwm3 first. + */ +&atmel_mxt_ts { + interrupt-parent = <&gpio1>; + interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28 / INT */ + pinctrl-0 = <&pinctrl_atmel_adapter>; + reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; /* SODIMM 30 / RST */ + status = "disabled"; +}; + &ecspi3 { status = "okay"; @@ -113,21 +105,6 @@ &fec1 { &i2c4 { status = "okay"; - /* - * Touchscreen is using SODIMM 28/30, also used for PWM, PWM, - * aka pwm2, pwm3. so if you enable touchscreen, disable the pwms - */ - touchscreen@4a { - compatible = "atmel,maxtouch"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpiotouch>; - reg = <0x4a>; - interrupt-parent = <&gpio1>; - interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28 */ - reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; /* SODIMM 30 */ - status = "disabled"; - }; - /* M41T0M6 real time clock on carrier board */ rtc: rtc@68 { compatible = "st,m41t0"; @@ -135,16 +112,6 @@ rtc: rtc@68 { }; }; -&lcdif { - status = "okay"; - - port { - lcdif_out: endpoint { - remote-endpoint = <&panel_in>; - }; - }; -}; - &pwm1 { status = "okay"; }; @@ -183,12 +150,3 @@ &usdhc1 { vmmc-supply = <®_3v3>; status = "okay"; }; - -&iomuxc { - pinctrl_gpiotouch: touchgpios { - fsl,pins = < - MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x74 - MX7D_PAD_GPIO1_IO10__GPIO1_IO10 0x14 - >; - }; -}; diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index f1c60b0cb143..e20b0977f38f 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -3,13 +3,32 @@ * Copyright 2016-2020 Toradex */ +#include + / { - bl: backlight { + backlight: backlight { + brightness-levels = <0 45 63 88 119 158 203 255>; compatible = "pwm-backlight"; + default-brightness-level = <4>; + enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_bl_on>; - pwms = <&pwm1 0 5000000 0>; - enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; + power-supply = <®_module_3v3>; + pwms = <&pwm1 0 6666667 PWM_POLARITY_INVERTED>; + status = "disabled"; + }; + + panel_dpi: panel-dpi { + backlight = <&backlight>; + compatible = "edt,et057090dhu"; + power-supply = <®_3v3>; + status = "disabled"; + + port { + lcd_panel_in: endpoint { + remote-endpoint = <&lcdif_out>; + }; + }; }; reg_module_3v3: regulator-module-3v3 { @@ -301,18 +320,19 @@ codec: sgtl5000@a { VDDD-supply = <®_DCDC3>; }; - ad7879@2c { + ad7879_ts: touchscreen@2c { + adi,acquisition-time = /bits/ 8 <1>; + adi,averaging = /bits/ 8 <1>; + adi,conversion-interval = /bits/ 8 <255>; + adi,first-conversion-delay = /bits/ 8 <3>; + adi,median-filter-size = /bits/ 8 <2>; + adi,resistance-plate-x = <120>; compatible = "adi,ad7879-1"; - reg = <0x2c>; interrupt-parent = <&gpio1>; interrupts = <13 IRQ_TYPE_EDGE_FALLING>; + reg = <0x2c>; touchscreen-max-pressure = <4096>; - adi,resistance-plate-x = <120>; - adi,first-conversion-delay = /bits/ 8 <3>; - adi,acquisition-time = /bits/ 8 <1>; - adi,median-filter-size = /bits/ 8 <2>; - adi,averaging = /bits/ 8 <1>; - adi,conversion-interval = /bits/ 8 <255>; + status = "disabled"; }; pmic@33 { @@ -392,12 +412,32 @@ &i2c4 { pinctrl-1 = <&pinctrl_i2c4_recovery>; scl-gpios = <&gpio7 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; sda-gpios = <&gpio7 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status = "disabled"; + + /* Atmel maxtouch controller */ + atmel_mxt_ts: touchscreen@4a { + compatible = "atmel,maxtouch"; + interrupt-parent = <&gpio2>; + interrupts = <15 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 107 / INT */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_atmel_connector>; + reg = <0x4a>; + reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* SODIMM 106 / RST */ + status = "disabled"; + }; }; &lcdif { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lcdif_dat &pinctrl_lcdif_ctrl>; + status = "disabled"; + + port { + lcdif_out: endpoint { + remote-endpoint = <&lcd_panel_in>; + }; + }; }; &pwm1 { @@ -486,7 +526,27 @@ &usdhc3 { &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 &pinctrl_gpio4 - &pinctrl_gpio7 &pinctrl_usbc_det>; + &pinctrl_usbc_det>; + + /* + * Atmel MXT touchsceen + Capacitive Touch Adapter + * NOTE: This pin group conflicts with pin groups pinctrl_pwm2/pinctrl_pwm3. + * Don't use them simultaneously. + */ + pinctrl_atmel_adapter: atmelconnectorgrp { + fsl,pins = < + MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x74 /* SODIMM 28 / INT */ + MX7D_PAD_GPIO1_IO10__GPIO1_IO10 0x14 /* SODIMM 30 / RST */ + >; + }; + + /* Atmel MXT touchsceen + boards with built-in Capacitive Touch Connector */ + pinctrl_atmel_connector: atmeladaptergrp { + fsl,pins = < + MX7D_PAD_EPDC_BDR0__GPIO2_IO28 0x14 /* SODIMM 106 / RST */ + MX7D_PAD_EPDC_DATA15__GPIO2_IO15 0x74 /* SODIMM 107 / INT */ + >; + }; pinctrl_gpio1: gpio1-grp { fsl,pins = < @@ -494,8 +554,6 @@ MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 0x14 /* SODIMM 77 */ MX7D_PAD_EPDC_DATA09__GPIO2_IO9 0x14 /* SODIMM 89 */ MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x74 /* SODIMM 91 */ MX7D_PAD_LCD_RESET__GPIO3_IO4 0x14 /* SODIMM 93 */ - MX7D_PAD_EPDC_DATA13__GPIO2_IO13 0x14 /* SODIMM 95 */ - MX7D_PAD_ENET1_RGMII_TXC__GPIO7_IO11 0x14 /* SODIMM 99 */ MX7D_PAD_EPDC_DATA10__GPIO2_IO10 0x74 /* SODIMM 105 */ MX7D_PAD_EPDC_DATA00__GPIO2_IO0 0x14 /* SODIMM 111 */ MX7D_PAD_EPDC_DATA01__GPIO2_IO1 0x14 /* SODIMM 113 */ @@ -729,6 +787,15 @@ MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79 >; }; + pinctrl_lvds_transceiver: lvdstx { + fsl,pins = < + MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 0x14 /* SODIMM 63 */ + MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x74 /* SODIMM 55 */ + MX7D_PAD_ENET1_RGMII_TXC__GPIO7_IO11 0x14 /* SODIMM 99 */ + MX7D_PAD_EPDC_DATA13__GPIO2_IO13 0x14 /* SODIMM 95 */ + >; + }; + pinctrl_pwm1: pwm1-grp { fsl,pins = < MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79 diff --git a/arch/arm/boot/dts/imx7d-colibri-aster.dts b/arch/arm/boot/dts/imx7d-colibri-aster.dts index f3f0537d5a37..ce0e6bb7db37 100644 --- a/arch/arm/boot/dts/imx7d-colibri-aster.dts +++ b/arch/arm/boot/dts/imx7d-colibri-aster.dts @@ -14,6 +14,26 @@ / { "fsl,imx7d"; }; +&ad7879_ts { + status = "okay"; +}; + +&atmel_mxt_ts { + status = "okay"; +}; + +&backlight { + status = "okay"; +}; + +&lcdif { + status = "okay"; +}; + +&panel_dpi { + status = "okay"; +}; + &usbotg2 { vbus-supply = <®_usbh_vbus>; status = "okay"; diff --git a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts index 87b132bcd272..c610c50c003a 100644 --- a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts @@ -13,6 +13,38 @@ / { "fsl,imx7d"; }; +&ad7879_ts { + status = "okay"; +}; + +/* + * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM, PWM, aka pwm2, pwm3. + * So if you enable following capacitive touch controller, disable pwm2/pwm3 first. + */ +&atmel_mxt_ts { + status = "disabled"; +}; + +&backlight { + status = "okay"; +}; + +&lcdif { + status = "okay"; +}; + +&panel_dpi { + status = "okay"; +}; + +&pwm2 { + status = "okay"; +}; + +&pwm3 { + status = "okay"; +}; + &usbotg2 { vbus-supply = <®_usbh_vbus>; status = "okay"; diff --git a/arch/arm/boot/dts/imx7s-colibri-aster.dts b/arch/arm/boot/dts/imx7s-colibri-aster.dts index fca4e0a95c1b..87f9e0e079a8 100644 --- a/arch/arm/boot/dts/imx7s-colibri-aster.dts +++ b/arch/arm/boot/dts/imx7s-colibri-aster.dts @@ -13,3 +13,23 @@ / { compatible = "toradex,colibri-imx7s-aster", "toradex,colibri-imx7s", "fsl,imx7s"; }; + +&ad7879_ts { + status = "okay"; +}; + +&atmel_mxt_ts { + status = "okay"; +}; + +&backlight { + status = "okay"; +}; + +&lcdif { + status = "okay"; +}; + +&panel_dpi { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts b/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts index aa70d3f2e2e2..81956c16b95b 100644 --- a/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts @@ -12,3 +12,35 @@ / { compatible = "toradex,colibri-imx7s-eval-v3", "toradex,colibri-imx7s", "fsl,imx7s"; }; + +&ad7879_ts { + status = "okay"; +}; + +/* + * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM, PWM, aka pwm2, pwm3. + * So if you enable following capacitive touch controller, disable pwm2/pwm3 first. + */ +&atmel_mxt_ts { + status = "disabled"; +}; + +&backlight { + status = "okay"; +}; + +&lcdif { + status = "okay"; +}; + +&panel_dpi { + status = "okay"; +}; + +&pwm2 { + status = "okay"; +}; + +&pwm3 { + status = "okay"; +}; From patchwork Fri May 6 15:27:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 570582 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E9814C433FE for ; Fri, 6 May 2022 15:29:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1442849AbiEFPcl (ORCPT ); Fri, 6 May 2022 11:32:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53054 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1442846AbiEFPch (ORCPT ); Fri, 6 May 2022 11:32:37 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 99C246D1B1; Fri, 6 May 2022 08:28:48 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus004 [74.208.5.2]) with ESMTPSA (Nemesis) id 1MpE2t-1oARSy3KZD-00qhR9; Fri, 06 May 2022 17:28:32 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 02/24] ARM: dts: imx7-colibri: add mdio phy node Date: Fri, 6 May 2022 17:27:47 +0200 Message-Id: <20220506152809.295409-3-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506152809.295409-1-marcel@ziswiler.com> References: <20220506152809.295409-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:oVrkLLgygwWKvFTplELyCAW33WTzbFbsXbnpKbLKnd1GGvNvLC4 JQkrrOraOdfcZUwewFg/6ZUW/QB3bn1Qgf9gVZ0r+IdWaZ5go6lo6AXdAEQFymz29TaIF4G Bvv3oYI1HEIhoUowBsHaQ9VaCfdQxlrP2yukwLTUyAL6pAihNxiz2vyJ4q2iw2E27+uN07j cZLuKCZcd0M6Z1Ahm/SDw== X-UI-Out-Filterresults: notjunk:1;V03:K0:oCyVUsQyThk=:mAtEvTMhBtv/d3XevJvliU DIbKP6Cs+mzoi7ntuMhr2EFVnmDN42cuyWc/hzerRwMemIm2b3ZQEAJf6fX6+8qJCKZd3+tw4 1XjF2deIOhjvecfv7IDCZOdwdMQvUOVQTb6pttyEz/PRfcgmGlFSlN/LawTZgDYzMFphx9F5J CCTTjPPksW/0G87rAnMCrtw2JHK3BNS7KvzSQNu3M75D5Bt4JzhLXKnDj783w4+1v/9oeDst4 sgWr/4041TsF5x1gi1cHVSQH6HEck3jSNgnQGf7DLwdJAzzrLOKhGW4mjB+xn6rjbGAe0FmmQ zTEbpbJw/JQcfgWu/tVoS55+mKyi0V9aoXL8uDWaTG7BxM3UCunrnDiDuQL4oyiQActBtVx9z NWxTqCiLaUxTdlQcVzSiQto2ofEu5+AEjVpcW6RenyV80oneO8YCbnbasXHMIJP8qtLWx5BOD 350jro+MV2eVDCRYAZb/a849bmm76ygXTlouluMzNBRBe15gFp2wfNxXHFC5o8hhfSztoePV9 qciiMDnUttkNHYjtgfPsamNRK4ovLLCptUgWnQPTRFOiBVfm5Pj/vmsE2RY2h9blonIB0bmjg ewA5leIVkgMveqUzYlpJOabmZI1iBITJLXsaAxnnLSvAVbkcilQuSahTWik34X6N6WMDd4HGE 1PlyAmqPKqsDrsSGsD1hVBjBZ070mqZ3CWUZLbZ1e7SmKnfNwQM05lWk0JeUXIGnHQYw= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Add the MDIO bus with the respective PHY to allow for making changes to that easier. While at it also alphabetically re-order properties and improve indentation. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/imx7-colibri.dtsi | 35 ++++++++++++++++++++--------- 1 file changed, 24 insertions(+), 11 deletions(-) diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index e20b0977f38f..074ebb0f8001 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -83,21 +83,34 @@ &ecspi3 { }; &fec1 { - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&pinctrl_enet1>; - pinctrl-1 = <&pinctrl_enet1_sleep>; - clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>, - <&clks IMX7D_ENET_AXI_ROOT_CLK>, - <&clks IMX7D_ENET1_TIME_ROOT_CLK>, - <&clks IMX7D_PLL_ENET_MAIN_50M_CLK>; - clock-names = "ipg", "ahb", "ptp", "enet_clk_ref"; - assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>, - <&clks IMX7D_ENET1_TIME_ROOT_CLK>; assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; assigned-clock-rates = <0>, <100000000>; + assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>, + <&clks IMX7D_ENET1_TIME_ROOT_CLK>; + clock-names = "ipg", "ahb", "ptp", "enet_clk_ref"; + clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>, + <&clks IMX7D_ENET_AXI_ROOT_CLK>, + <&clks IMX7D_ENET1_TIME_ROOT_CLK>, + <&clks IMX7D_PLL_ENET_MAIN_50M_CLK>; + fsl,magic-packet; + phy-handle = <ðphy0>; phy-mode = "rmii"; phy-supply = <®_LDO1>; - fsl,magic-packet; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&pinctrl_enet1>; + pinctrl-1 = <&pinctrl_enet1_sleep>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + max-speed = <100>; + micrel,led-mode = <0>; + reg = <0>; + }; + }; }; &flexcan1 { From patchwork Fri May 6 15:27:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 570583 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08A04C433F5 for ; Fri, 6 May 2022 15:28:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1442841AbiEFPcj (ORCPT ); Fri, 6 May 2022 11:32:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52964 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1442844AbiEFPcc (ORCPT ); Fri, 6 May 2022 11:32:32 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 90E216D1B7; Fri, 6 May 2022 08:28:47 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus004 [74.208.5.2]) with ESMTPSA (Nemesis) id 1Mf0mU-1oKec41w30-00gUIs; Fri, 06 May 2022 17:28:34 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Stefan Agner , Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 03/24] ARM: dts: imx7-colibri: set lcdif clock source to video pll Date: Fri, 6 May 2022 17:27:48 +0200 Message-Id: <20220506152809.295409-4-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506152809.295409-1-marcel@ziswiler.com> References: <20220506152809.295409-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:vSCZ5YgcOnht+rU+P/yp5XZyFPki1/TnBDAr4rZvvxjZug1loKm 947oYNZNiwSoDJcvYgd81ounf2xpYhPf7Hr1kVVI9KvXVl8vFxHkWC7PZctVo3K2/O22zPV A1xHmesZSdkONkBslRYtqcoE4R0twLtP2EZuxDNX7by/07bZe6W5npUFCV5RPDjB4UGiN4D 0ozs5iq03oamS8FRWiogA== X-UI-Out-Filterresults: notjunk:1;V03:K0:lkBEgLpH6RM=:oRXdYnalGQzxW2RYQF7h0n yA+gxkED7KBqgnTWGcd9/YOD2Cw44R5i7VgOQZ+LwWNGypbhRPG4/Pc9NuUx9yxKGnwB3KceF 5ROitGnengQD77e6uGgYnKSD27djktNgx6sBCayPY7wCVY7F6rvzSQYn7xNpZKzZTU1RWptpE Dywv8PZcLhh+P5gkxTEKxJiEZ4lIix068KirIz//j/McQkJWVhUtZtqCxz7ChMAQFojljLK4q fCPM+uFSt1nmhgdT0rSvp6cSNs/uM2vmkxz3fbGGx1i634c+VNH3FLpjzwm7pUvKHeYQthdur 4/a4yDthk9QCcsSXd/XThV1EjkPBRSFAMO/IDQYz/VgNbTSWy5M1C/j2Sxu1Z9wbfJW3gXzaX zj26rYxthv7Apluuz0p5ijhaTX8Ae+LD0SsgHCKOxrA/eezf8qST8TeJLY7DIJRF5vFYJMQTi JW2+AmCWbPsVdJYvHHEMX8TnZKTxZc6K+Lli6NEiBWfE31rDBRSIk9x2eNu3cxCP50XFGzfti chtY85QTidK6OnxL2aBRXF9MOGXJefCJl2lXRc/jscBmK9KMRAsqe0RoaU2dudG4BURzAaW67 gmGOFHy13v/INgCOXfp3SyAt6f0sGdZcI46HOxeu/MXA0N7Wd3CUrFSzoKJ39LOIl3CRArbXp 2rxZBL3KU01c/xFbLyCe5EVp8N4UPLa9epOJZRsfOo9JTrgTV1OPWkFQOajFGlpDa/M4= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Stefan Agner Use the video PLL as clock source to assure proper pixel clock generation. Signed-off-by: Stefan Agner Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/imx7-colibri.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index 074ebb0f8001..3c1cfd766645 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -441,6 +441,8 @@ atmel_mxt_ts: touchscreen@4a { }; &lcdif { + assigned-clocks = <&clks IMX7D_LCDIF_PIXEL_ROOT_SRC>; + assigned-clock-parents = <&clks IMX7D_PLL_VIDEO_POST_DIV>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lcdif_dat &pinctrl_lcdif_ctrl>; From patchwork Fri May 6 15:27:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 570293 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D7FDEC433EF for ; Fri, 6 May 2022 15:28:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1442850AbiEFPck (ORCPT ); Fri, 6 May 2022 11:32:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53060 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1442848AbiEFPci (ORCPT ); Fri, 6 May 2022 11:32:38 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C80816D1BE; Fri, 6 May 2022 08:28:49 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus004 [74.208.5.2]) with ESMTPSA (Nemesis) id 1Mg7F4-1oJY9T0fra-00hala; Fri, 06 May 2022 17:28:37 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Philippe Schenker , Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 04/24] ARM: dts: imx7-colibri: add usb dual-role switching using extcon Date: Fri, 6 May 2022 17:27:49 +0200 Message-Id: <20220506152809.295409-5-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506152809.295409-1-marcel@ziswiler.com> References: <20220506152809.295409-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:ouHQzRwJkADa37gIZTedAOIRP/KOUmtL6FIHFiTLITHSiruKzHp gCTBHW6Pr/1DeGWUi34pNgsgTXUcWF1p/zB3wFU3eHAtel3UAOJjxoLizzUqHvmLjVvoexG Qzvc4Y8NWIjDhiMhzy8eQXenTxe8QPTsHHLuViFaZSWmXENEf5K4d4b4YmIu6HErY1dBnQ1 z9i6ZnUts1fsMd4U6WiPg== X-UI-Out-Filterresults: notjunk:1;V03:K0:VaMEYnA2Ji4=:ZFdPvu0XcwNrcqcThr2p70 hRGJyLLRlxErPTzJW9Yl1mUHJR0J/Sx0nqslU0WxOa06y171U0j+XmS/4cg23K69SkArSFvGd vsO7d4uccf5/PdVcd8L3z6bQFzLyoXgNbj68o8dLKVVayS/B/PIklxjhZaZ/7Pxi6ZQkCP62U aBTPRVBrH2UojfRGWPrWxThvXaYCY+R2k1IkYByjXAoB6a2Qc1ZS05Ayt9iApoFf3TKA//dkY 9jIqtmmzgWAxGT+9heZ+ak2iXqbrsNCE9PI0K9QAlfL8W1+x9LM5Bo0y4sqe1xD59Rz3HSSDQ WG1nZZ736WabhYOpfXZjmVb9YzsQp+AQE9eAaM7wwERDQdbCcSR9hTMTIgRFCJ2qkFuDVoM3u oF9orFTS+azEx+VeiC+U7rV3+l+LrFca+PU5SkkZbkpadH9zWljJ7jQsASl8y/bPoQ0KDiipj MAkgA4aeY4+FnDPHAInxJUwufcAJlKqx2WnaokODaJUkq1HpY5i70Wh4FqbTpUueWlUOXUJ4E ZP7w6uSjjE4ecEFBEDnHDDzpGCLTQRamt7SBqK344/dRpj4udk54JsN2QfcuOb6dKSZrlLh42 gvbs++Q54Ux1PVwOFNmq10rRxlPSO2JVtmknQhuaEG0Hp2C9+hRgiSSfhlaqoRulOeDAVx84N WOneyYtog1WqKaU7tR/mhGAB43/tFpVI4zAg6wmZ8QNRzhfMelsubCGD7i8DnSHmQzyI= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Philippe Schenker Add USB dual-role switching using extcon. Signed-off-by: Philippe Schenker Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 8 ++++++++ arch/arm/boot/dts/imx7-colibri.dtsi | 5 ++--- 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index d6fa74222960..17ad9065646d 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -20,6 +20,13 @@ clk16m: clk16m { clock-frequency = <16000000>; }; + extcon_usbc_det: usbc-det { + compatible = "linux,extcon-usb-gpio"; + id-gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbc_det>; + }; + gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; @@ -141,6 +148,7 @@ &uart3 { }; &usbotg1 { + extcon = <0>, <&extcon_usbc_det>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index 3c1cfd766645..6df82a67953a 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -512,7 +512,7 @@ &uart3 { }; &usbotg1 { - dr_mode = "host"; + dr_mode = "otg"; }; &usdhc1 { @@ -540,8 +540,7 @@ &usdhc3 { &iomuxc { pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 &pinctrl_gpio4 - &pinctrl_usbc_det>; + pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 &pinctrl_gpio4>; /* * Atmel MXT touchsceen + Capacitive Touch Adapter From patchwork Fri May 6 15:27:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 570292 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1B340C433F5 for ; Fri, 6 May 2022 15:29:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1442859AbiEFPcm (ORCPT ); Fri, 6 May 2022 11:32:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53074 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1442852AbiEFPci (ORCPT ); Fri, 6 May 2022 11:32:38 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F33DA6D382; Fri, 6 May 2022 08:28:52 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus004 [74.208.5.2]) with ESMTPSA (Nemesis) id 1MQ5CG-1nR3Bf3amu-00M4no; Fri, 06 May 2022 17:28:40 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Oleksandr Suvorov , Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 05/24] ARM: dts: imx7-colibri: improve licensing and compatible strings Date: Fri, 6 May 2022 17:27:50 +0200 Message-Id: <20220506152809.295409-6-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506152809.295409-1-marcel@ziswiler.com> References: <20220506152809.295409-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:d5LpR8ixDO+rUCo7GZh4qB7+vstRQ8G8dMfLVMbpf3bPC7a2P0E dDSsVenzGfrc4nnDgFQbLTHytjWBP0mHAZ2s/b8cZUNMbw9t262Bx/Z6M8FFD6+dWel7D96 AKzYOFymZ8i9qcxNCPZDvgx8QqkYUUwtbAiSxmA3xUfcIX3Wo89WqZ3C7tuno9J1EVdJ5jT Ls2++XGdRJUev/G19VRjg== X-UI-Out-Filterresults: notjunk:1;V03:K0:AvrW69UeUFw=:j7/XNAVkDcqqvAGo8vEdRR fIvh6j90dfuvNoeHeyV5s3DD1Yj56xsLr/aNdPo2EAhhEmWIybWZPFJ3RPy+DihSFhdR7Oii3 Yq/mrRWYLiUJJGUOLp0DuZlIhA4tZcuMcS3wAEtXwEIvAPhkrGJHgo+OvEh4ussQFmJTJHDGS GZYpC39Qa0wGiPz9Cv0TY1b5IREcsTDIW1CfoTAyYXg2tzhFkNzBXn0tSm4yq4t3B0nT8zhgK e03AyMXFwG1lAXV3XeytUERofkShaGQ8iF2wXqeUh32s3e9WlptYGFDd7gxZzt58K2eO7shsn N1p6j2TE+DpG5fwytHbBv1g0JfnO98z6LOh70G8PuU0bVAPihyj6bGKJWhdlPGnss1Jzyx1Pp 3Jc5Cg6d2JKB3EEW1QotI6vAXs5+peKn8sOKCSCxkb6noqy51SeAPVUzwBRi5CBAYU0MrRTgU XvAuRd4A0NA3f5YB6jYRDO1B+Aavp2i5WczWrxHSXH4XZbl99zilhcYFs6722ATX+Knan+ojG jbCim5PkuFuFE2RH0AMTJFh+0ZNFLX53aSIqLymjm6xt9CcstnVL+TP5/8qlLoFdcYatQ4Uqp kZ0iIGtiH/IFLyP2za5MWURjRVBJboPzFGP8FF6RO7yGkjG1O/f6H7sG9RgZqsFvUHzBPi3QU D5EH9069r013MkuAYFI6PX+IlYVgbtHv1wl3SUP/lGvi3wcrAQkvqQrgmAqe33Ie9/64= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Oleksandr Suvorov Migrate to the latest SPDX license identifier, update copyright period and improve compatible strings. Signed-off-by: Oleksandr Suvorov Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/imx7-colibri-aster.dtsi | 5 ++--- arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 4 ++-- arch/arm/boot/dts/imx7-colibri.dtsi | 4 ++-- arch/arm/boot/dts/imx7d-colibri-aster.dts | 7 ++++--- arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts | 8 +++++--- arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts | 8 +++++--- arch/arm/boot/dts/imx7d-colibri-emmc.dtsi | 4 ++-- arch/arm/boot/dts/imx7d-colibri-eval-v3.dts | 7 ++++--- arch/arm/boot/dts/imx7d-colibri.dtsi | 4 ++-- arch/arm/boot/dts/imx7s-colibri-aster.dts | 7 ++++--- arch/arm/boot/dts/imx7s-colibri-eval-v3.dts | 7 ++++--- arch/arm/boot/dts/imx7s-colibri.dtsi | 4 ++-- 12 files changed, 38 insertions(+), 31 deletions(-) diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi index 950b4e5f6cf4..bfadb3a3124a 100644 --- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi @@ -1,7 +1,6 @@ -// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2017-2020 Toradex AG - * + * Copyright 2017-2022 Toradex */ / { diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index 17ad9065646d..074c96f09191 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2016-2020 Toradex + * Copyright 2016-2022 Toradex */ / { diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index 6df82a67953a..fa615379a117 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2016-2020 Toradex + * Copyright 2016-2022 Toradex */ #include diff --git a/arch/arm/boot/dts/imx7d-colibri-aster.dts b/arch/arm/boot/dts/imx7d-colibri-aster.dts index ce0e6bb7db37..2ed1823c4805 100644 --- a/arch/arm/boot/dts/imx7d-colibri-aster.dts +++ b/arch/arm/boot/dts/imx7d-colibri-aster.dts @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2017-2020 Toradex AG + * Copyright 2017-2022 Toradex * */ @@ -10,7 +10,8 @@ / { model = "Toradex Colibri iMX7D on Aster Carrier Board"; - compatible = "toradex,colibri-imx7d-aster", "toradex,colibri-imx7d", + compatible = "toradex,colibri-imx7d-aster", + "toradex,colibri-imx7d", "fsl,imx7d"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts index 20480276cb0e..33e1034b75a4 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts +++ b/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2017-2020 Toradex AG + * Copyright 2017-2022 Toradex * */ @@ -11,7 +11,9 @@ / { model = "Toradex Colibri iMX7D 1GB (eMMC) on Aster Carrier Board"; compatible = "toradex,colibri-imx7d-emmc-aster", - "toradex,colibri-imx7d-emmc", "fsl,imx7d"; + "toradex,colibri-imx7d-emmc", + "toradex,colibri-imx7d", + "fsl,imx7d"; }; &usbotg2 { diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts index 8ee73c870b12..25d8d4583289 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts +++ b/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2017 Toradex AG + * Copyright 2017-2022 Toradex */ /dts-v1/; @@ -10,7 +10,9 @@ / { model = "Toradex Colibri iMX7D 1GB (eMMC) on Colibri Evaluation Board V3"; compatible = "toradex,colibri-imx7d-emmc-eval-v3", - "toradex,colibri-imx7d-emmc", "fsl,imx7d"; + "toradex,colibri-imx7d-emmc", + "toradex,colibri-imx7d", + "fsl,imx7d"; }; &usbotg2 { diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi index af39e5370fa1..198e08409d59 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi +++ b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2017 Toradex AG + * Copyright 2017-2022 Toradex */ #include "imx7d.dtsi" diff --git a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts index c610c50c003a..51561388fac5 100644 --- a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2016-2020 Toradex + * Copyright 2016-2022 Toradex */ /dts-v1/; @@ -9,7 +9,8 @@ / { model = "Toradex Colibri iMX7D on Colibri Evaluation Board V3"; - compatible = "toradex,colibri-imx7d-eval-v3", "toradex,colibri-imx7d", + compatible = "toradex,colibri-imx7d-eval-v3", + "toradex,colibri-imx7d", "fsl,imx7d"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri.dtsi b/arch/arm/boot/dts/imx7d-colibri.dtsi index 219a0404a058..90d25c604de2 100644 --- a/arch/arm/boot/dts/imx7d-colibri.dtsi +++ b/arch/arm/boot/dts/imx7d-colibri.dtsi @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2016-2020 Toradex + * Copyright 2016-2022 Toradex */ #include "imx7d.dtsi" diff --git a/arch/arm/boot/dts/imx7s-colibri-aster.dts b/arch/arm/boot/dts/imx7s-colibri-aster.dts index 87f9e0e079a8..58ebb02d948a 100644 --- a/arch/arm/boot/dts/imx7s-colibri-aster.dts +++ b/arch/arm/boot/dts/imx7s-colibri-aster.dts @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2017-2020 Toradex AG + * Copyright 2017-2022 Toradex * */ @@ -10,7 +10,8 @@ / { model = "Toradex Colibri iMX7S on Aster Carrier Board"; - compatible = "toradex,colibri-imx7s-aster", "toradex,colibri-imx7s", + compatible = "toradex,colibri-imx7s-aster", + "toradex,colibri-imx7s", "fsl,imx7s"; }; diff --git a/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts b/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts index 81956c16b95b..6589c4179177 100644 --- a/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2016-2020 Toradex + * Copyright 2016-2022 Toradex */ /dts-v1/; @@ -9,7 +9,8 @@ / { model = "Toradex Colibri iMX7S on Colibri Evaluation Board V3"; - compatible = "toradex,colibri-imx7s-eval-v3", "toradex,colibri-imx7s", + compatible = "toradex,colibri-imx7s-eval-v3", + "toradex,colibri-imx7s", "fsl,imx7s"; }; diff --git a/arch/arm/boot/dts/imx7s-colibri.dtsi b/arch/arm/boot/dts/imx7s-colibri.dtsi index 94de220a5965..2ce102b7f5d4 100644 --- a/arch/arm/boot/dts/imx7s-colibri.dtsi +++ b/arch/arm/boot/dts/imx7s-colibri.dtsi @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2016-2020 Toradex + * Copyright 2016-2022 Toradex */ #include "imx7s.dtsi" From patchwork Fri May 6 15:27:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 570581 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C3FB6C43217 for ; Fri, 6 May 2022 15:29:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1442851AbiEFPcn (ORCPT ); Fri, 6 May 2022 11:32:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53060 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1442847AbiEFPcj (ORCPT ); Fri, 6 May 2022 11:32:39 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B71796D1AC; Fri, 6 May 2022 08:28:56 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus004 [74.208.5.2]) with ESMTPSA (Nemesis) id 1N0naj-1nz0Up2Ju9-00wn49; Fri, 06 May 2022 17:28:43 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Oleksandr Suvorov , Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 06/24] ARM: dts: imx7-colibri: improve wake-up with gpio key Date: Fri, 6 May 2022 17:27:51 +0200 Message-Id: <20220506152809.295409-7-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506152809.295409-1-marcel@ziswiler.com> References: <20220506152809.295409-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:OUON0wBayrK4VSZPx38avOTfrnSMy+YAaQ9kRRRaPgRJlXPV14O /dr2Bgs0C8AxcsVEn3LWmnl5qiOlY9rMUd9VWbggzybDuDCrVrsf1BrT9AnbPbK89wSVY6U HHZVylsjutGIBE410hDpXEF6lHzNtcSo0IfHBGhrmN2QT/w2kDfRES9PVx5u9DW8JvtrIC4 aMTxpJ8tZw+lVQZa2lCCw== X-UI-Out-Filterresults: notjunk:1;V03:K0:WUg0/6t8/6o=:o6s7DxZtPKm3AeNXIJbkth 1JBmx9ce+4RfsCEYFxoUJyAirnQ2xVVLHT0Sh9kiYQONVma7E6wjRLyiBLNTNUTL9FpgOapCG +VBSYfL53RrI/gUunuldU9hMXIfwBISLtG7/0UN1zmMdCLl3PKmh3tZxlbVsz0ktNRKFHWjDL e4zBn5f1q2TAEm/Nj5t3Nvfyh5oePJBha3k5BMXzXrgZGZ5sFuS/KyG/Pbp4juQF8K+LMBSEz DJ+UnAXcpKkcHeSOJBQR5vhTNwTmr9sYCO74YfHri+C3xRM9+hvS9fBgbJGpFsR8rxZFlfBxn huNyKgKqEWc9miD7YsP8wpkNfExQnyRULgoZcQpXPTo9zY5ECkMw6DEfhsixm3g6zIP9uURCS GvMNsOS/j/LXpodVvAEIjZIJyon0IywD047BV7YtT/alN1DH/FSEVkJVttMmZqFZBoyuQeQyA hm/h5cxU03+X74rao3vfc9xYgPDkKH/rdzaI27wDzg/pYlKI+3/8F+p1PiAIRpeV02hNvkSK6 JrVkSCSOk00+lrRxw/MW9GKddNykqZDHtr6XANG0WrYAdel+qrfxUz75SQdVGEUkzftRaHw0F +O8AVk8gpJKpetRqzgBoLFMpeeji4JH7i+N0c9ksARbBmYg5aENMto98n01wexCCAkBlIv4X6 FqHgKpNF2fRen3EcLHKbwuOVh63OcPly8Z3ACiH/mrev9Scn9MR/CV3zLh/6ny7R7efXR9EIq Us0kHHOrGUw2rGg1 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Oleksandr Suvorov The pin GPIO1_IO01 externally pulls down, it is required to sequentially connect this pin (signal WAKE_MICO#) to +3v3 and then disconnect it to trigger a wakeup interrupt. Adding the flag GPIO_PULL_DOWN allows the system to be woken up just connecting the pin GPIO1_IO01 to +3v3. Signed-off-by: Oleksandr Suvorov Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/imx7-colibri-aster.dtsi | 2 +- arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi index bfadb3a3124a..9148c54403f3 100644 --- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi @@ -15,7 +15,7 @@ gpio-keys { power { label = "Wake-Up"; - gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; + gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; linux,code = ; debounce-interval = <10>; wakeup-source; diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index 074c96f09191..4a7e593e9ac6 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -34,7 +34,7 @@ gpio-keys { power { label = "Wake-Up"; - gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; + gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; linux,code = ; debounce-interval = <10>; wakeup-source; From patchwork Fri May 6 15:27:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 570291 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A155DC4321E for ; Fri, 6 May 2022 15:29:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1442869AbiEFPco (ORCPT ); Fri, 6 May 2022 11:32:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53150 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1442856AbiEFPcm (ORCPT ); Fri, 6 May 2022 11:32:42 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8F7386D1AC; Fri, 6 May 2022 08:28:58 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus004 [74.208.5.2]) with ESMTPSA (Nemesis) id 1M6mQM-1nkDOl0XAk-008Fws; Fri, 06 May 2022 17:28:45 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 07/24] ARM: dts: imx7-colibri: move aliases, chosen, extcon and gpio-keys Date: Fri, 6 May 2022 17:27:52 +0200 Message-Id: <20220506152809.295409-8-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506152809.295409-1-marcel@ziswiler.com> References: <20220506152809.295409-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:QpzcMql6/IF9Ghd25BqVELfMBiROsYBtZvrZcCggmh/Z/3Y/UHT qdnG/5xR91+LxeEhPXtZHuUvejGPASBJTUVkKlCYw8rcNij6EYqttQQGQFkGz/oYwTecXob MOkwCd9pS+UcT2oz+je6IftzTZM5wMED4vhWEuOjh3gggy7TFFra2uTu4qQxNgDIri+uMRi 0rV7CX7dcMYLD1XtGADxg== X-UI-Out-Filterresults: notjunk:1;V03:K0:vzG8wR6IQIs=:/afAHazV92YtBBW/gmEwHN t42ghNMTK/oNR1cc19ra4/kjN0voZ1LA53OgYUoo6LhgX+4cPe15vWTZw8RRbrMukzIMEPaTK KQrkGdP56k8UvhHqncUm8fBw1uasu886LHKb9ZEsmEixcDlaS5dZQWTgP85eUPDlvW2A1pQ9D sjUOM/GawU4Z3t5Aha1sm9NjgcZ7oSW21WQvmUGUGWcwtX/32aDKe5I0+SLzt0czsxsyCMyJO uNhzQuQ7yIV1tr5I+Ko7sITiAkm2qkR9Kggn/i5dHFbleFm6b5iwYGu4jGolllg//uMh2me5Q QpyygG4ZxDiIoX6E8k7gWR7b1FKMWtZyI5l923Kjsxbs9/WyNICP/vjYIXTJM9F0doiTxAinc HJfwN/7bMVz3fe1A7t+itbUwYMwv65AYRF8cM7M4Ek3e2TNY8qqnGKcOfRDL/TSh3w01XqrLv qVYAyh8wyfJbiIuYaoGxL2igTA5THkaCPy2jCSvflv06jND82ArkXd1hadozQIGfs7NI5pj9t 9MrH59Lj7NFtpCIEAaJ/VQMtTuJFr3vvlew6aWuysh1T/fQchDG8p6NdsPbXYdoNnb6EmA8Pj QNlRQ5duu0332StWz2buBJl5Nohi0jb38uES4PTL/59ImOs2Bjjaousc4rbJBumsGAHwMMEzJ 35FYnK0b7bdxR0rkc2ilToWwfgx9nF3eGwUx9rv7EMVNelVOxyDI/cdtsT/AaT58AmWufkIWI wsgw4aDQfykREBnR Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Move aliases, chosen, extcon and gpio-keys to module-level device tree given they are standard Colibri functionalities. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/imx7-colibri-aster.dtsi | 18 ------------ arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 31 -------------------- arch/arm/boot/dts/imx7-colibri.dtsi | 32 +++++++++++++++++++++ 3 files changed, 32 insertions(+), 49 deletions(-) diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi index 9148c54403f3..c12de1861c05 100644 --- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi @@ -4,24 +4,6 @@ */ / { - chosen { - stdout-path = "serial0:115200n8"; - }; - - gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpiokeys>; - - power { - label = "Wake-Up"; - gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; - linux,code = ; - debounce-interval = <10>; - wakeup-source; - }; - }; - reg_3v3: regulator-3v3 { compatible = "regulator-fixed"; regulator-name = "3.3V"; diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index 4a7e593e9ac6..2e6678f81af6 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -4,15 +4,6 @@ */ / { - aliases { - rtc0 = &rtc; - rtc1 = &snvs_rtc; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - /* fixed crystal dedicated to mpc258x */ clk16m: clk16m { compatible = "fixed-clock"; @@ -20,27 +11,6 @@ clk16m: clk16m { clock-frequency = <16000000>; }; - extcon_usbc_det: usbc-det { - compatible = "linux,extcon-usb-gpio"; - id-gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbc_det>; - }; - - gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpiokeys>; - - power { - label = "Wake-Up"; - gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; - linux,code = ; - debounce-interval = <10>; - wakeup-source; - }; - }; - reg_3v3: regulator-3v3 { compatible = "regulator-fixed"; regulator-name = "3.3V"; @@ -148,7 +118,6 @@ &uart3 { }; &usbotg1 { - extcon = <0>, <&extcon_usbc_det>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index fa615379a117..c5a58949d664 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -6,6 +6,11 @@ #include / { + aliases { + rtc0 = &rtc; + rtc1 = &snvs_rtc; + }; + backlight: backlight { brightness-levels = <0 45 63 88 119 158 203 255>; compatible = "pwm-backlight"; @@ -18,6 +23,32 @@ backlight: backlight { status = "disabled"; }; + chosen { + stdout-path = "serial0:115200n8"; + }; + + extcon_usbc_det: usbc-det { + compatible = "linux,extcon-usb-gpio"; + debounce = <25>; + id-gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>; /* SODIMM 137 / USBC_DET */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbc_det>; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpiokeys>; + + wakeup { + debounce-interval = <10>; + gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* SODIMM 45 */ + label = "Wake-Up"; + linux,code = ; + wakeup-source; + }; + }; + panel_dpi: panel-dpi { backlight = <&backlight>; compatible = "edt,et057090dhu"; @@ -513,6 +544,7 @@ &uart3 { &usbotg1 { dr_mode = "otg"; + extcon = <0>, <&extcon_usbc_det>; }; &usdhc1 { From patchwork Fri May 6 15:27:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 570580 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 51903C4321E for ; Fri, 6 May 2022 15:29:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1442861AbiEFPcr (ORCPT ); Fri, 6 May 2022 11:32:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53056 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1442862AbiEFPcn (ORCPT ); Fri, 6 May 2022 11:32:43 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1A5E96D1AD; Fri, 6 May 2022 08:29:00 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus004 [74.208.5.2]) with ESMTPSA (Nemesis) id 1MdMsu-1oMKdT3TH6-00ZMUS; Fri, 06 May 2022 17:28:48 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Max Krummenacher , Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 08/24] ARM: dts: imx7-colibri: add ethernet aliases Date: Fri, 6 May 2022 17:27:53 +0200 Message-Id: <20220506152809.295409-9-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506152809.295409-1-marcel@ziswiler.com> References: <20220506152809.295409-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:PralARl5o4qQHPIuqbUqwDauOLVU7LfUChvAPJiv78F3TE5M6AJ iH3efrItR/7j5GfWNCE+DjCfjLjwv1LlpamPC6WvXxQ55NpkZ2zdorM2K8pC7bPn3Hsb7y4 uNjNpMHtoZWQKB61LbzaVMN3kk+WSBNPK+pyDu9PvbplL+kDAD/SD8OYfVVFjSaGr3AnxZS eNCFsHpDiuFDOOXfCi3uQ== X-UI-Out-Filterresults: notjunk:1;V03:K0:z0WLNH5mE6s=:7RzR7BRhToveoPCVX69iR9 Y9RjGxTNZhQnkOfBf1uY9liEwpIJBo3jnhPxLMinIEdP4P6+EIGf1RzEg/QR6diPl7d5WWFeJ EbAg9mVEWEMpcjF8o8SSoUEMZQUCSHUnemosKcv2PWmjgn0U8TrlXQrAxHI9Q+tNAg6MFgGLg 2tBaoAH/REKPVvXwnAOJh13YuUaiAFmn4BBECWVj+bFKc0ROMPTEtWAheiH0AdIU/AIMz1WXf sI84jOqrsIdtf/dprAs0DAFFgWG/Tec0Ko5BWaqBx35oAxVLZnFxR4nlt2I9qJlQhhVneCPGD +S2a9rPnFabUiW+uKVineMU4XC+BiUeE8e8fhCKGNU23Er61Bs3ASZMRmMsJ8ttg8iyYj8dmw iM/d6RtjWTy30L1H6Bf6vmnqrr2RYTE+ZbJ4gdMr0XH9ctYMAy+mWjNujZN6v32udhPvsyjkE KZ+0XY4qwBxU2SPzwVSjSEUFppGM1Zik/vDqeQ3N7M3wtWIICRkSQ6T57ApUAl8N/kNaYXUYd 8AHIZgsM2I/8kRNbO8IUhIzHGPRw4XQAYRLff90X6M3pmYkd17kcTf0L9pSVraUn764N9t4D9 RMy6LRCsDDSdfMmN2Bn8JAJ8TVbKSDRs+V8xjDbdBK74GWDtLJFQBUqFwpmXlUeMbgagobuDZ +6gwtduYtG3pAXBZOp422S2gX5j0yvlm5beWam9kjGFc1b7DpdeDty9dlMbpvekhc/4EREE1T liH/N/sjqYPs8k5m Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Max Krummenacher Add Ethernet aliases which is required to properly pass MAC address from bootloader. Signed-off-by: Max Krummenacher Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/imx7d-colibri-emmc.dtsi | 6 ++++++ arch/arm/boot/dts/imx7d-colibri.dtsi | 6 ++++++ 2 files changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi index 198e08409d59..e77f0b26b6fb 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi +++ b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi @@ -7,6 +7,12 @@ #include "imx7-colibri.dtsi" / { + aliases { + /* Required to properly pass MAC addresses from bootloader. */ + ethernet0 = &fec1; + ethernet1 = &fec2; + }; + memory@80000000 { device_type = "memory"; reg = <0x80000000 0x40000000>; diff --git a/arch/arm/boot/dts/imx7d-colibri.dtsi b/arch/arm/boot/dts/imx7d-colibri.dtsi index 90d25c604de2..48993abacae4 100644 --- a/arch/arm/boot/dts/imx7d-colibri.dtsi +++ b/arch/arm/boot/dts/imx7d-colibri.dtsi @@ -7,6 +7,12 @@ #include "imx7-colibri.dtsi" / { + aliases { + /* Required to properly pass MAC addresses from bootloader. */ + ethernet0 = &fec1; + ethernet1 = &fec2; + }; + memory@80000000 { device_type = "memory"; reg = <0x80000000 0x20000000>; From patchwork Fri May 6 15:27:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 570579 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AE2F1C433EF for ; Fri, 6 May 2022 15:29:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1442896AbiEFPc4 (ORCPT ); Fri, 6 May 2022 11:32:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53332 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1442875AbiEFPct (ORCPT ); Fri, 6 May 2022 11:32:49 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.196]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2CAB96D1AD; Fri, 6 May 2022 08:29:04 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus004 [74.208.5.2]) with ESMTPSA (Nemesis) id 1MF3cC-1nbwBm1Ya0-00FQwS; Fri, 06 May 2022 17:28:50 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 09/24] ARM: dts: imx7-colibri: move regulators Date: Fri, 6 May 2022 17:27:54 +0200 Message-Id: <20220506152809.295409-10-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506152809.295409-1-marcel@ziswiler.com> References: <20220506152809.295409-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:5laOCdj7QHxL+ag8jGrQaVaxkK5KF20XC64EkXjcWbZlGnr+K9J GL6QOlEpfBCSkuI3GyfdmV9Uh9DcqzDGio5R7ruk9VlkZBeO887PUs2MH8ds2eg2VcK5oQ1 snRw/WcsTX3G2RvhRxFNn68MPjEyirOZiES4XTsDW/4XZFIrWb3gDPM3uA4AkVpfd8pjE7n 5J8L1aKk7nrOTrd9Udkaw== X-UI-Out-Filterresults: notjunk:1;V03:K0:gZUJV1BPv4I=:SCAn7S3vQKoYbpZRn5DP2t AStc4ecKAfgLT6ZGMrAXlOykwMA4sQCeImbmNuB73MpbxlCsFC3/mpzVWczrabu9CO6o/uSL5 iGDn01CnSxL/r2JFnYiUwUeVCpPnisFwnZjqAzx2tv74Cg5zKueLwz5VZGerFjxtA1qyoWhZi 7aRsJaIlFqz+NV11ZmRdzjeLpQnX2emUK42rqADTo0wwILEv0ws7qTr5V504kHbjOH4lBfcn4 tAUxlSMIl9zVyTfY5wMjbdTzoZjxZv/a9dR7+QNiieW1+HSpeSwiSrP6W24TcSiCFcAxRqynW zTBS7IkY061dU6d4hyv15y9022Bzxl+U9ZDACKUUGnCRr0RVZd9NvwRi7ffJlkfPqViQMMCBN HVZImTaSBTMVWtKyDVWtKLm2JQKVpzsIptE722jX3wlVfEpbKrzofBduOj53ES60uergJ3+UE 3VCGaL7X9JFewjbHoCasC6EKFmqddXSbeXu9uKXdF/Z9zYe3xK3V6HjWEqcVCjHz7M1uDBaT3 bhyNo2FgEFncNwR1c9BmEX1E1Re2scVJvY11g1uaXD8UXGmzJUNiAwNJEYBxHdON/OCTjX8iW DrDTfS8pSoG7ZurPOZ/maJ8hIPuL4ruxUUCXCYIwR3aibdatqsCblPIYd39wH55neumQJRKUx PNBQkHyW0O3U6/4PLUbKZHzD+U7qmEWf6QH+2xR5bZlxYmcntcDidbD2hIOH/M2zcQY8EaZQk 2378PLdagwJOXDAB Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Move regulators to module-level device tree given they are standard Colibri functionalities. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/imx7-colibri-aster.dtsi | 27 ------------- arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 25 ------------ arch/arm/boot/dts/imx7-colibri.dtsi | 39 ++++++++++++++++--- arch/arm/boot/dts/imx7d-colibri-aster.dts | 1 - .../arm/boot/dts/imx7d-colibri-emmc-aster.dts | 1 - .../boot/dts/imx7d-colibri-emmc-eval-v3.dts | 1 - arch/arm/boot/dts/imx7d-colibri-emmc.dtsi | 1 + arch/arm/boot/dts/imx7d-colibri-eval-v3.dts | 1 - arch/arm/boot/dts/imx7d-colibri.dtsi | 1 + 9 files changed, 35 insertions(+), 62 deletions(-) diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi index c12de1861c05..440f98dc323d 100644 --- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi @@ -3,33 +3,6 @@ * Copyright 2017-2022 Toradex */ -/ { - reg_3v3: regulator-3v3 { - compatible = "regulator-fixed"; - regulator-name = "3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - reg_5v0: regulator-5v0 { - compatible = "regulator-fixed"; - regulator-name = "5V"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - reg_usbh_vbus: regulator-usbh-vbus { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbh_reg>; - regulator-name = "VCC_USB[1-4]"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio4 7 GPIO_ACTIVE_LOW>; - vin-supply = <®_5v0>; - }; -}; - &adc1 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index 2e6678f81af6..33a9cbbca0d2 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -10,31 +10,6 @@ clk16m: clk16m { #clock-cells = <0>; clock-frequency = <16000000>; }; - - reg_3v3: regulator-3v3 { - compatible = "regulator-fixed"; - regulator-name = "3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - reg_5v0: regulator-5v0 { - compatible = "regulator-fixed"; - regulator-name = "5V"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - reg_usbh_vbus: regulator-usbh-vbus { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbh_reg>; - regulator-name = "VCC_USB[1-4]"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio4 7 GPIO_ACTIVE_LOW>; - vin-supply = <®_5v0>; - }; }; &adc1 { diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index c5a58949d664..329638985db6 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -62,20 +62,47 @@ lcd_panel_in: endpoint { }; }; - reg_module_3v3: regulator-module-3v3 { + reg_3v3: regulator-3v3 { compatible = "regulator-fixed"; - regulator-name = "+V3.3"; - regulator-min-microvolt = <3300000>; + regulator-always-on; regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "3.3V"; + }; + + reg_5v0: regulator-5v0 { + compatible = "regulator-fixed"; regulator-always-on; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "5V"; }; - reg_module_3v3_avdd: regulator-module-3v3-avdd { + reg_module_3v3: regulator-module-3v3 { compatible = "regulator-fixed"; - regulator-name = "+V3.3_AVDD_AUDIO"; - regulator-min-microvolt = <3300000>; + regulator-always-on; regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "+V3.3"; + }; + + reg_module_3v3_avdd: regulator-module-3v3-avdd { + compatible = "regulator-fixed"; regulator-always-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "+V3.3_AVDD_AUDIO"; + }; + + reg_usbh_vbus: regulator-usbh-vbus { + compatible = "regulator-fixed"; + gpio = <&gpio4 7 GPIO_ACTIVE_LOW>; /* SODIMM 129 / USBH_PEN */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh_reg>; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "VCC_USB[1-4]"; + vin-supply = <®_5v0>; }; sound { diff --git a/arch/arm/boot/dts/imx7d-colibri-aster.dts b/arch/arm/boot/dts/imx7d-colibri-aster.dts index 2ed1823c4805..cfd75e3424fa 100644 --- a/arch/arm/boot/dts/imx7d-colibri-aster.dts +++ b/arch/arm/boot/dts/imx7d-colibri-aster.dts @@ -36,6 +36,5 @@ &panel_dpi { }; &usbotg2 { - vbus-supply = <®_usbh_vbus>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts index 33e1034b75a4..7b4451699478 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts +++ b/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts @@ -17,6 +17,5 @@ / { }; &usbotg2 { - vbus-supply = <®_usbh_vbus>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts index 25d8d4583289..3e84018392ee 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts +++ b/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts @@ -16,6 +16,5 @@ / { }; &usbotg2 { - vbus-supply = <®_usbh_vbus>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi index e77f0b26b6fb..45b12b0d8710 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi +++ b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi @@ -47,6 +47,7 @@ &gpio6 { &usbotg2 { dr_mode = "host"; + vbus-supply = <®_usbh_vbus>; }; &usdhc3 { diff --git a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts index 51561388fac5..7aabe5691459 100644 --- a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts @@ -47,6 +47,5 @@ &pwm3 { }; &usbotg2 { - vbus-supply = <®_usbh_vbus>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri.dtsi b/arch/arm/boot/dts/imx7d-colibri.dtsi index 48993abacae4..d1469aa8b025 100644 --- a/arch/arm/boot/dts/imx7d-colibri.dtsi +++ b/arch/arm/boot/dts/imx7d-colibri.dtsi @@ -29,4 +29,5 @@ &gpmi { &usbotg2 { dr_mode = "host"; + vbus-supply = <®_usbh_vbus>; }; From patchwork Fri May 6 15:27:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 570288 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 78BA2C433FE for ; Fri, 6 May 2022 15:29:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1442957AbiEFPdK (ORCPT ); Fri, 6 May 2022 11:33:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53294 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1442865AbiEFPcz (ORCPT ); Fri, 6 May 2022 11:32:55 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.196]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 73BA46D3B5; Fri, 6 May 2022 08:29:10 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus004 [74.208.5.2]) with ESMTPSA (Nemesis) id 1M1IF4-1npjiB0NZq-002llS; Fri, 06 May 2022 17:28:53 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Oleksandr Suvorov , Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 10/24] ARM: dts: imx7-colibri: add delay for on-module phy supply Date: Fri, 6 May 2022 17:27:55 +0200 Message-Id: <20220506152809.295409-11-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506152809.295409-1-marcel@ziswiler.com> References: <20220506152809.295409-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:prmmGjODMASiwQejOwpv0+0U+9fTCcyS5sPOIBvSBXEiafxEZ7b r+JpfOV9IvW0/ap3plhwe4q3Up2MHeEAGG8QJZ3oUw6HDc6kbn/PPgkTbI6smr3BlrhN95r i7maoZADPFMHcOWslw+8toWzBv1Q4z1tpVG4mBdNgWdUyMnenmC917ojFMWyrcPbPtkeSWE JgdvgE+PWlRzk4AwMzpcQ== X-UI-Out-Filterresults: notjunk:1;V03:K0:QgdhHhQYsaU=:YquTNlcSgdxRp4GmRwPkBJ +v2rhl1QYWfndIu4pexiXn7kP+QNGjW5GfGDb4xNfBnN8EeYFaER6oiB3ySNH6K8kaBvXeNu6 68NINcI2s1CzU9/koc1OZoboGg32SaqZtPmnfwxBdpSZnOGAXSqb0vstkDpj69W6zQLU+czOp 8XFlkzOLLbCiZ0whYoLXTaVugZUWrpSgPUvCPgPogyx5S8kWtoPOF9sIcqR13g/xmlTD8Athr Vl1OH9xbQwA/Y1FZjhgegoHvikrEOgp7r2yjz/5v3qCUo5LI3WjymWOdhwI8qTCOKx0lb/vcu 5mmBX1BZ2XSo4ZlNElv3LmBl7ludFj7OjGXWqAoZMtM2IF4HHubhlRomChYI4LN+7quwmTrGa yOOLxqTSFRYQVbwrY4hhyv0Ctia8S2yu3MbNnRoC0WQmLBj9RKsN3hN06SCpoFMRScIGwsDq5 hRrle0Wh7Vzqv9ajlAusonZOh4eoH0Ri8L/gauv5p9YysKjvEdQW/efznVy0Nvlequalcc+9J LJbS6rZgnfViX9WSKUiqvzm7iwUz4ZPY5TYimCVE7Gcfgofx6l+Gf00ohSDwSltO6E86VkQaP 7DzWlzREGRqAcl2IBRXoBGMx9dzfAsO1CRcErcy9zzvBrv1JcUQCeRGxieY46uYh00yUTlgtf BZ3eSJh6IBArnBfSXqFyMk8JIZWQ7ChL7nP6ZGksN/deoybXSeY4KlPJNc58FeZnn0UA= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Oleksandr Suvorov There is a significant time required for PHY Micrel KSZ8041 to power up. Add a delay on start-up/wake-up before the FEC starts communicating with the PHY. LDO1 takes 6 ms, R39 + C44 takes ~100ms, the KSZ8041 datasheet asks for ~11 ms before starting any programming on the MIIM. Counting that, add a 200 ms delay to be sure the PHY is ready for programming. Also, add the same off delay time to give the capacitor time to discharge in order to properly reset. Signed-off-by: Oleksandr Suvorov Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/imx7-colibri.dtsi | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index 329638985db6..09dbd262dad1 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -94,6 +94,17 @@ reg_module_3v3_avdd: regulator-module-3v3-avdd { regulator-name = "+V3.3_AVDD_AUDIO"; }; + reg_module_3v3_eth: regulator-module-3v3-eth { + compatible = "regulator-fixed"; + off-on-delay-us = <200000>; + regulator-name = "+V3.3_ETH"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + startup-delay-us = <200000>; + vin-supply = <®_LDO1>; + }; + reg_usbh_vbus: regulator-usbh-vbus { compatible = "regulator-fixed"; gpio = <&gpio4 7 GPIO_ACTIVE_LOW>; /* SODIMM 129 / USBH_PEN */ @@ -153,7 +164,7 @@ &fec1 { fsl,magic-packet; phy-handle = <ðphy0>; phy-mode = "rmii"; - phy-supply = <®_LDO1>; + phy-supply = <®_module_3v3_eth>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&pinctrl_enet1>; pinctrl-1 = <&pinctrl_enet1_sleep>; @@ -440,7 +451,7 @@ reg_DCDC4: DCDC4 { /* V1.35_DRAM */ }; reg_LDO1: LDO1 { /* PWR_EN_+V3.3_ETH */ - regulator-min-microvolt = <1800000>; + regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-boot-on; }; From patchwork Fri May 6 15:27:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 570289 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CC264C433F5 for ; Fri, 6 May 2022 15:29:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1442899AbiEFPc4 (ORCPT ); Fri, 6 May 2022 11:32:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53294 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1442895AbiEFPcy (ORCPT ); Fri, 6 May 2022 11:32:54 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E05226D39C; Fri, 6 May 2022 08:29:07 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus004 [74.208.5.2]) with ESMTPSA (Nemesis) id 1MpUtU-1oAATj2bTo-00psDs; Fri, 06 May 2022 17:28:56 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 11/24] ARM: dts: imx7-colibri: clean-up usdhc1 and add sleep config Date: Fri, 6 May 2022 17:27:56 +0200 Message-Id: <20220506152809.295409-12-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506152809.295409-1-marcel@ziswiler.com> References: <20220506152809.295409-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:gOHANZqjzdFZYYWGf09oaG8BUvlJRsrHFx6QTTGyi3s6+jn3yo6 e32qePfo8a2qzr51g4yVTYJTBDw9qbDaAlZTnvJYxSOuhLwrrAjBK2QES+bFcxVBhQlOMsb 9XUbtolv31pIGuBIx+2vIDBHMn+jgcwcFTpiJAZb/j7rabW+o3e/I/v+0vEOeWC7bf0Qo7N cM4DprsCXH+R6OCLuIItw== X-UI-Out-Filterresults: notjunk:1;V03:K0:6lPkD2sBw4w=:BRk7CmH5OU2tPhm8hXYdEw YlWpnSU2jPfY9itDpQ9b+K+j3025k9CuBL99Bj3zgvWUcknxLT50fUz7hjIbrdcIFcYSZL/2o 09qLo1ch7MABtla6fRVLpVsqgmuoww68tZqC/pbqvBZGsTaGgs4+PhePA5wgD8PwJqOScWTaO Tsc7TmxDvOCeJZ+Hi75YxOV0pmD8I5qhJ2mrWotDYBgL2jkexnSv3ssIjDxVjVehXKJEEJXfq vZJJU8KoUgffX1i6ro816kZc05hSG33t0HAd42broNhxFQPIrdccjJldLOOG2Vw+X+uf7dJSH wIephftosGp+hWbptceGq0TTfmbiN+rX9cNIXs3ARTlHpgSiNlz28V0mMy4A/oAnVU3GSoRyl NjGyYhLYtAaEaneY17C/f7FM4QKTaz3gyvlyb++seEce099zdcaGnr6tiBWkWaaiZo2bkI07g QXUxPGfFbEayOw/an3OmmU1mo2ZDMZ72O3k+HmiSrdLmS/Nxa7H/ouhEXMgyZSdxXwUsWqTEa VlKF39C7wRK3zA+WTf+2OX1pHaRP8jMmIt0xezPQksHkA862WkzUEm45TmbClMhlZQ9dpIMD1 AOdcJJ5HPQPXq2Ab76AXtu0qUfYqEHZvEp+7NyC0gwYAYztuw+euhgA8v6b6LhppZLGLhlF1W t8DKuB/3V9fO3g9i+D+2/tYyE+ERtt33Kq+7oR65bVblmJWDsAbqmk/mm9qJo9iTd/J6JgtJq Upwr8WXDSai1t8HV Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Adding no-1-8-v property to usdhc1 to disable +1.8V signaling (UHS-I) mode on SoM dtsi level. Clean up no-1-8-v from Aster carrier board dtsi, which is using defaults from SoM dtsi and is not UHS-I capable. A carrier board may have a MMC/SD card slot with a switchable power supply. Add a pinctrl sleep used when the card power is off to avoid backfeeding to the card and add the "sleep" pinctrl to the usdhc1 controller. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/imx7-colibri-aster.dtsi | 5 +- arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 3 - arch/arm/boot/dts/imx7-colibri.dtsi | 75 ++++++++++++++------- 3 files changed, 51 insertions(+), 32 deletions(-) diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi index 440f98dc323d..f3a5cb7d6a0c 100644 --- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi @@ -61,10 +61,7 @@ &usbotg1 { status = "okay"; }; +/* Colibri MMC/SD */ &usdhc1 { - keep-power-in-suspend; - no-1-8-v; - wakeup-source; - vmmc-supply = <®_3v3>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index 33a9cbbca0d2..618831e89ce8 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -97,8 +97,5 @@ &usbotg1 { }; &usdhc1 { - keep-power-in-suspend; - wakeup-source; - vmmc-supply = <®_3v3>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index 09dbd262dad1..3da9ddc06aae 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -585,12 +585,19 @@ &usbotg1 { extcon = <0>, <&extcon_usbc_det>; }; +/* Colibri MMC/SD */ &usdhc1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_cd_usdhc1>; cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; disable-wp; + no-1-8-v; + pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; + pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_cd_usdhc1>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_cd_usdhc1>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_cd_usdhc1>; + pinctrl-3 = <&pinctrl_usdhc1_sleep &pinctrl_cd_usdhc1_sleep>; + vmmc-supply = <®_3v3>; vqmmc-supply = <®_LDO2>; + wakeup-source; }; &usdhc3 { @@ -949,36 +956,48 @@ MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14 /* SODIMM 129 USBH PEN */ >; }; - pinctrl_usdhc1: usdhc1-grp { + pinctrl_usdhc1: usdhc1grp { fsl,pins = < - MX7D_PAD_SD1_CMD__SD1_CMD 0x59 - MX7D_PAD_SD1_CLK__SD1_CLK 0x19 - MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59 - MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59 - MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59 - MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59 + MX7D_PAD_SD1_CLK__SD1_CLK 0x19 /* SODIMM 47 */ + MX7D_PAD_SD1_CMD__SD1_CMD 0x59 /* SODIMM 190 */ + MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59 /* SODIMM 192 */ + MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59 /* SODIMM 49 */ + MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59 /* SODIMM 51 */ + MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59 /* SODIMM 53 */ >; }; - pinctrl_usdhc1_100mhz: usdhc1grp_100mhz { + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { fsl,pins = < - MX7D_PAD_SD1_CMD__SD1_CMD 0x5a - MX7D_PAD_SD1_CLK__SD1_CLK 0x1a - MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a - MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a - MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a - MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a + MX7D_PAD_SD1_CLK__SD1_CLK 0x1a + MX7D_PAD_SD1_CMD__SD1_CMD 0x5a + MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a + MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a + MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a + MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a >; }; - pinctrl_usdhc1_200mhz: usdhc1grp_200mhz { + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { fsl,pins = < - MX7D_PAD_SD1_CMD__SD1_CMD 0x5b - MX7D_PAD_SD1_CLK__SD1_CLK 0x1b - MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5b - MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5b - MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5b - MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5b + MX7D_PAD_SD1_CLK__SD1_CLK 0x1b + MX7D_PAD_SD1_CMD__SD1_CMD 0x5b + MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5b + MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5b + MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5b + MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5b + >; + }; + + /* Avoid backfeeding with removed card power. */ + pinctrl_usdhc1_sleep: usdhc1-slpgrp { + fsl,pins = < + MX7D_PAD_SD1_CMD__SD1_CMD 0x10 + MX7D_PAD_SD1_CLK__SD1_CLK 0x10 + MX7D_PAD_SD1_DATA0__SD1_DATA0 0x10 + MX7D_PAD_SD1_DATA1__SD1_DATA1 0x10 + MX7D_PAD_SD1_DATA2__SD1_DATA2 0x10 + MX7D_PAD_SD1_DATA3__SD1_DATA3 0x10 >; }; @@ -1077,9 +1096,15 @@ MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x4000007f >; }; - pinctrl_cd_usdhc1: usdhc1-cd-grp { + pinctrl_cd_usdhc1: cdusdhc1grp { + fsl,pins = < + MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x59 /* SODIMM 43 / MMC_CD */ + >; + }; + + pinctrl_cd_usdhc1_sleep: cdusdhc1-slpgrp { fsl,pins = < - MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x59 /* CD */ + MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x0 >; }; From patchwork Fri May 6 15:27:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 570578 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9E1E1C433F5 for ; Fri, 6 May 2022 15:29:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1442932AbiEFPdH (ORCPT ); Fri, 6 May 2022 11:33:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53576 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1442911AbiEFPcz (ORCPT ); Fri, 6 May 2022 11:32:55 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 369C16D3AD; Fri, 6 May 2022 08:29:10 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus004 [74.208.5.2]) with ESMTPSA (Nemesis) id 1MRSm1-1nPfjz0fmH-00NSFR; Fri, 06 May 2022 17:28:58 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 12/24] ARM: dts: imx7-colibri: move rtc node Date: Fri, 6 May 2022 17:27:57 +0200 Message-Id: <20220506152809.295409-13-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506152809.295409-1-marcel@ziswiler.com> References: <20220506152809.295409-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:xjSlamvLAi6Uw+RHd6U7taVRuhpg5MGJ0CqVYOoEcJK0tG/8mnh dlWDNmWtpbQG/hrJb5pTWgqDuSVfUHy7QJgUNI1tYBukX6ON0WmhTWqCqTkjK3vxEoXT2Z+ 1qeSl82wRRlZ5up5aIJgWoOqoTJ5FprcmbUcuEUmqT/zgJTDn04ii9HbAwys3quN9/nUEju VJeorvkTZIkz0dCw0WJsg== X-UI-Out-Filterresults: notjunk:1;V03:K0:A5chbVZ63TA=:RUoK36KABzWuVZd1KXUPNH 4AvDavS2YQ75WjH3nkYKEGrxhzcle/FYYKlC05Hv52oGxFALJYaUyhwL5MXlmueP+hzpXoxQd oDRiJ1y/MdFXjpsd+dpmNAA3A/zc2Vp/FIXOSPd/TJ8drV8IApfWnUQcGKntm5iPV5RVtzEXv RkkEn7SEbPr92g1pFEPySGQ92Di8NShlzukAZGO/jwW3z2wdxxT0W5yr51Poyho5umO+AD4y3 fNZR9fEJz1qL1Masl6X9uo1WYgpVqXMvlaBnRHaeVAJzAZ78ZZpqvQsnRhY7H15gL5o+I7pLb PMe6Ht9s3AHgbIBiNRACtI+nRvW3EWrtB5zIPRLbz5qwdW2ebJ0cuOZHBUP9b2i3Kag0OYd/u Pm4IxtF4BRYVqoDCf8SaahrsU6I/f1864moQlQvEysTOqp4vF16V9LZ9ncXj/ob4roNtbv8ZF l1lsCms64q4YuXIaCVSzTfPfXOqkEntw1ir8xyR6LtQDZ/B3Ke8MOLz6FZ3mPJYQ22vGUZjfG tGSDeSxjxt16bawhL+0ounImbvi85L8yjDmM7ZOaeB9CIaIbtN0440/8QgWrTo32Xl26GsK1y jnU/mxTE3aUvd7XOwAj8XfECLiWgirk1HqDqoJTfOLTOUPcA+lECPt3WB8CdNh3tfc+wPVBv1 Gbb1BqN76oQUszATbIZuMNiSkZT4W7pez8sPqxgmWhx0wmtMzglAsuzwhu8ociQZGpzrWf2BB rIBWvo47wOKV03Ra Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Move I2C RTC to module-level to be enabled on carrier board-level. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/imx7-colibri-aster.dtsi | 11 +++++------ arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 11 +++++------ arch/arm/boot/dts/imx7-colibri.dtsi | 7 +++++++ 3 files changed, 17 insertions(+), 12 deletions(-) diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi index f3a5cb7d6a0c..9796bfabe241 100644 --- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi @@ -21,12 +21,6 @@ &fec1 { &i2c4 { status = "okay"; - - /* M41T0M6 real time clock on carrier board */ - rtc: rtc@68 { - compatible = "st,m41t0"; - reg = <0x68>; - }; }; &pwm1 { @@ -45,6 +39,11 @@ &pwm4 { status = "okay"; }; +/* M41T0M6 real time clock */ +&rtc { + status = "okay"; +}; + &uart1 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index 618831e89ce8..e3aac56aece8 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -56,12 +56,6 @@ &fec1 { &i2c4 { status = "okay"; - - /* M41T0M6 real time clock on carrier board */ - rtc: rtc@68 { - compatible = "st,m41t0"; - reg = <0x68>; - }; }; &pwm1 { @@ -80,6 +74,11 @@ &pwm4 { status = "okay"; }; +/* M41T0M6 real time clock */ +&rtc { + status = "okay"; +}; + &uart1 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index 3da9ddc06aae..da3df00c7d67 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -507,6 +507,13 @@ atmel_mxt_ts: touchscreen@4a { reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* SODIMM 106 / RST */ status = "disabled"; }; + + /* M41T0M6 real time clock on carrier board */ + rtc: rtc@68 { + compatible = "st,m41t0"; + reg = <0x68>; + status = "disabled"; + }; }; &lcdif { From patchwork Fri May 6 15:27:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 570576 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1C0C9C433EF for ; Fri, 6 May 2022 15:29:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1442866AbiEFPdQ (ORCPT ); Fri, 6 May 2022 11:33:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53506 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1442893AbiEFPcz (ORCPT ); Fri, 6 May 2022 11:32:55 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3E70F6D380; Fri, 6 May 2022 08:29:12 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus004 [74.208.5.2]) with ESMTPSA (Nemesis) id 1MPXEU-1nRb9K2qZO-00Md2A; Fri, 06 May 2022 17:29:01 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 13/24] ARM: dts: imx7d-colibri-emmc: add cpu1 supply Date: Fri, 6 May 2022 17:27:58 +0200 Message-Id: <20220506152809.295409-14-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506152809.295409-1-marcel@ziswiler.com> References: <20220506152809.295409-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:ZtdpBUcyBrED0IOtOgVJiS9oS5aSbP7SDlhYFVsFE6DikhNiP6E 0g6OAwT5E7pnEAhOLvXzZyBZMgZDGZmUmVnKvWYrr4XSSIMLT005AxRdPcCanq7PLxd6UZV mqQGvwQ0kHsnmqGPTFaQC16tfiuGux/OiwrPwBxpp2r8COEXrvURs6D7Ucqy72BcSY1R1xZ 9ZkekBrxs5zON/5wLXN0g== X-UI-Out-Filterresults: notjunk:1;V03:K0:iIYxQciHq+4=:fwqSBlTFa1RWexWqZLkYfX BH0ry8N0A+rKuZWxib6dGjbsdWoMwsWcASs05j0WMiPG2KWDogUce8zZNXuW9V8A2UGwLImUA w0i5V1OilbUGPJkSzfigUtm5693NIHgakp84WUZ7EsCl8mBnICmKJqj1F24ZYEBfrMvq1vYqR YfrT8RLMc3rBEmCRukA65jkzYeXSuevsb84LdYdzctlliZbNnIT1PBvZ1F05OzveG1wz051Wg XGWv4pWjHI2QQsUk3MwajiFAjdoPRtiA59b8faUCXwaeAZNBG9fK9tiW3+2//OsICmZOIl2H0 HRGfwFCCs7fMCkm6jPEtcwYLhItaWyD/V6gvcsnA52ODbMq7x2xOwZgoJr3MdHK5iEm6pEKxS SB68UysYvs2DfGdkWRPI/F8YOvLzPfEirGt2vSd0LC+q+wvDDRNi+rDxZdEMphhI2UgojqmrY cxwNfDdLFq3owVq2bG3xQ3YuDmImUHXRmgDuoiyc51w3f0DbY7C6+QXOGoGecQlxczB8SuHPF xv/TTumANgOsvciqflDONz1hkH6cEoImw6vL3dJrF6LPmO81fc6Pf8pVFqIsG6WW5UsQaE3GO os3OW25R1ZARyXwvoxl67xQ4FohhlJtEbt/IvDbrKOtWWQKdhqVxwMJ5qWsjGA2r3wywmTQtH inWzDzfBRoFm3LaneZH3411YFXALNkYb5ExawKIaNmBupO0cXRHeq8emPJHLphn4WT6UWwBQ6 /YYtqiv5qNrl9PMS Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Each cpu-core is supposed to list its supply separately, add supply for cpu1. Fixes: 2d7401f8632f ("ARM: dts: imx7d: Add cpu1 supply") Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/imx7d-colibri-emmc.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi index 45b12b0d8710..2b4be7646631 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi +++ b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi @@ -19,6 +19,10 @@ memory@80000000 { }; }; +&cpu1 { + cpu-supply = <®_DCDC2>; +}; + &gpio6 { gpio-line-names = "", "", From patchwork Fri May 6 15:27:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 570577 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 54B66C4332F for ; Fri, 6 May 2022 15:29:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234396AbiEFPdM (ORCPT ); Fri, 6 May 2022 11:33:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53696 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1442907AbiEFPdA (ORCPT ); Fri, 6 May 2022 11:33:00 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 651FA6D39E; Fri, 6 May 2022 08:29:17 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus004 [74.208.5.2]) with ESMTPSA (Nemesis) id 1ML9Vm-1nW1091bRi-00IFJS; Fri, 06 May 2022 17:29:03 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , Stefan Agner , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 14/24] ARM: dts: imx7-colibri-eval-v3: correct can controller comment Date: Fri, 6 May 2022 17:27:59 +0200 Message-Id: <20220506152809.295409-15-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506152809.295409-1-marcel@ziswiler.com> References: <20220506152809.295409-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:HjVpzv18CqPVJ4aMjIVVHHK3h48UGA9kXxLReZwKTQoX6WbZnsK 3mJVFQOR7300Rx1BHUsgvEwKQmC/SL8/mZZrE+om+hsu9jrRNLx1x1Zlcm3lwP9x8aKkTpR P0WWNkGW+uj2PwwFKyAB59pMVqpkAzakWgInQCeq9yKeWkEOppREUArR0PginUg7IQ/Nd9s 9yz1Zr8JtlkZLVLpAoUeA== X-UI-Out-Filterresults: notjunk:1;V03:K0:xufg7RiBuno=:ePETjlbIGCO4yiZRz6HZrN QpGXCyn0jAM2pYF874g+XNO68eF/YCs1OBZFRKpByrmibvBZ/8eyYJt8XZEUQUFk1AzTY6UQN h16zR8T0isA3dXA4kxbg7P6R1ypbWAaW737cTXvgE/M3ShA6SqhiqEnQthiSXQDHKW/Xncb3F H0Cc2zVh+g1b28beaYJXsFsyx4rjWT2K3Tj798+yXx1VNFYa+KOTNLVPIRJ3q+TgYjMxQ2uZo 0jj/e9pX2k/FvHJlya92hmw63AsEIXrrMXWmjYgl5KV9qen055ohtZ/XutMajiUrgACbgsLkQ bwMgmWDKe/xIY3QMnJn7WSl8k/j4zlH+2S/PAn3EOhNiI/xKWXG53tseKnPhUqjDIuPnp9pRN DI9zCh9pc1BDSNXyT22TXdIrGoBpweiCY7YOoLYZL2w8MnKlwcI2i1XXIusKCkDm6ZgL7dbvx L7bS0GKNeTJWJYPUvfpou/N0IYOMiv0LmYaHrULmUPjHFNGXMat319iWaTfLHangXSwu5TEFf qNAT0pb6j4Yp12XfQXFhWjUzH92xWJlVOUhidAsbkgQ5RzrOQ6iCkPRhkDFZ19h4YkfuDfxYU yChr885wghguSAXBuzyarMiROI+1vth7e6f5uFDHnQ6FZZCYlZapyCUBnexGuF7RC/FgKdKJQ WxZSAZdYmsl+qWe0I4yocSeFcyaDqzN1hIIWzOzVM679zRs05b+L3FCBmCXRYXoe0//JQKS/k kA/7xaKtFMbczu9+ Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Correct CAN controller comment. It is a MCP2515 rather than a mpc258x. Fixes: 66d59b678a87 ("ARM: dts: imx7-colibri: add MCP2515 CAN controller") Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index e3aac56aece8..069f56272546 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -4,7 +4,7 @@ */ / { - /* fixed crystal dedicated to mpc258x */ + /* Fixed crystal dedicated to MCP2515. */ clk16m: clk16m { compatible = "fixed-clock"; #clock-cells = <0>; From patchwork Fri May 6 15:28:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 570286 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EB115C433FE for ; Fri, 6 May 2022 15:29:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1442954AbiEFPdc (ORCPT ); Fri, 6 May 2022 11:33:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53556 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1442947AbiEFPdI (ORCPT ); Fri, 6 May 2022 11:33:08 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3E4BE6D4CF; Fri, 6 May 2022 08:29:23 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus004 [74.208.5.2]) with ESMTPSA (Nemesis) id 1Mde05-1oM3eq45Mv-00ZdTN; Fri, 06 May 2022 17:29:06 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 15/24] ARM: dts: imx7-colibri: disable adc2 Date: Fri, 6 May 2022 17:28:00 +0200 Message-Id: <20220506152809.295409-16-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506152809.295409-1-marcel@ziswiler.com> References: <20220506152809.295409-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:Gs+o33e0av+49MlbiGdcvNvTMn81YyAmf9sqr1EWHP0Ruqe9G8V n3qpKkkri+qmw+ImwaCGKqOvK7SzZ1VhM5dBvfvekAd+hwnTJiN87j3Wz2J9IqrgTbYKegf tuIwUWJOCyjXgBBdATA6vKXBH9FZtihaxRxbaK64/uo3AhA+FRqSrT/t2mtJ1HWdnkJvsAh q4cF+OOLQmTwlJTlsNs/g== X-UI-Out-Filterresults: notjunk:1;V03:K0:fYbCvDuXquo=:PAHMVa0aikw0+D748eFZ4m IF3fNqWYNs+jvmoYNs4FpC3XnXbJdect5hOaPGlxiqPY+atvX7cf4SHNMB12PfHVXAXWbhsy5 NXO3GIqDnT0m0alj5Rn4azZBuGeF0zA571SviorjHqXp30THuqYo0RDIVqukUg00a8X0z6OfZ aDYSeVuP9IM8Fm5psA87LzQAPdtSh+SisHFUXPFf7nuJYA3j7G1ef9zQL5OD/hlUyLifmV4F5 fVcjvfdsM3vKDH2YMNBwaEX1Hma4eG/cKrb6zQT2UI0kbVISaD+YFb7jouSpq0Ie4Nf+oFAfG j6f/uJCplCC5HeWfwoqmDRZUmvRxaXgoyZaF3asyPSMGWRSYIjbzo7u9xHnr7cybEYuoWXSmV LYHDAjw/QtB3VQBF1dppQ6jyY+wqEgqR3vrMFXZNlOTWv6ywRbTbn2E4Xs8jBiwsWN5aZG04r Gs53yYvtcM9Te852CeSMECvaAOHlBLMlrVbUVtPAKCZ8/VlE4aSb3cDqXqrQk0K9pWXJyefsN qSoLhgDfwjaAXZuyvFT6FxGf9AR/49K+I1TXpJFt1LE+sH3FxRmHu3ATLaoo95m9vno74QCPO Bgd+hNZA4DkMsAMNoFFRFo93tBob7NUznUJLxP99nYXvTZGw+ipmuqYzfzwpFKskIGTz+Cmjr vUgamscyOfAfLollV/+Wam0Ijol+0r7/HCov1ON5CbFH64n3kYEVDw2jkCGQAH+SpbiI= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler ADC2 is not available as it conflicts with the AD7879 resistive touchscreen. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/imx7-colibri-aster.dtsi | 8 -------- arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 4 ---- arch/arm/boot/dts/imx7-colibri.dtsi | 3 ++- 3 files changed, 2 insertions(+), 13 deletions(-) diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi index 9796bfabe241..a89c868ff3ed 100644 --- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi @@ -7,14 +7,6 @@ &adc1 { status = "okay"; }; -/* - * ADC2 is not available on the Aster board and - * conflicts with AD7879 resistive touchscreen. - */ -&adc2 { - status = "disabled"; -}; - &fec1 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index 069f56272546..6ae38c1f38d4 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -16,10 +16,6 @@ &adc1 { status = "okay"; }; -&adc2 { - status = "okay"; -}; - /* * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM, PWM, aka pwm2, pwm3. * So if you enable following capacitive touch controller, disable pwm2/pwm3 first. diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index da3df00c7d67..0fc4b33d97be 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -137,8 +137,9 @@ &adc1 { vref-supply = <®_DCDC3>; }; +/* ADC2 is not available as it conflicts with AD7879 resistive touchscreen. */ &adc2 { - vref-supply = <®_DCDC3>; + status = "disabled"; }; &cpu0 { From patchwork Fri May 6 15:28:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 570285 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B47F0C433EF for ; Fri, 6 May 2022 15:29:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1442884AbiEFPdf (ORCPT ); Fri, 6 May 2022 11:33:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53544 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1442959AbiEFPdK (ORCPT ); Fri, 6 May 2022 11:33:10 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8C6406D4DC; Fri, 6 May 2022 08:29:24 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus004 [74.208.5.2]) with ESMTPSA (Nemesis) id 1MDhMp-1ndKip2Dnb-00An2N; Fri, 06 May 2022 17:29:08 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 16/24] ARM: dts: imx7-colibri-aster: add ssp aka spi cs aka ss pins Date: Fri, 6 May 2022 17:28:01 +0200 Message-Id: <20220506152809.295409-17-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506152809.295409-1-marcel@ziswiler.com> References: <20220506152809.295409-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:nKqrTlnfyoophG4uqmO0F2g5aXMs/Js2LGRBUXnKXeCXMAKtzq8 mamz0+Ayc0+Aef/a6lvIGEZgGGz7mU+ITzn78a9nRoxhuSRVdxvFoDLNjvK1ehR4zZVOcIS NIkVTf/4I8lQbHbjes6dJtmgjZM/k7b/CBEu19BXjdPU87dJzS2KWzTYiMN0NsqCKFyFCrU aSluKyaoJwiEybdthze2Q== X-UI-Out-Filterresults: notjunk:1;V03:K0:KiCqJKnr4q4=:SrQmKfmYytYdWHT5H/0jEl 83O3ynn8vXvgId4fC+d1fmftMcg4VlO3TR6sRIumtgqtBsNQjWMaUTQc0ov4CqgUn2ZOETkL6 WvZhx8suLNDXEGNDe2366Eg+xBHF8d24EKJuDueJjqNbcjv3XkSYUDQu8Wl3pzXKN6jMst9eG I0BfkhkKOMCiEMZiedLn9OhMmoOCM6l4Fg9mILwiofnVYH/AV8i8xQZKoqgpPWInxHU416yz6 +5M8BQPSiYzLruCXZl0KMA7ndUq8+ctf5QQe/v7ndec6AZDRA51FSA5WeiI8odbQiCs/ge7wn gbHOuAW39OfnxLPEmhwF5qVg/JYWqwKCuX0Ph+atLQanXyhFZg3pvTCKXjfhA3Zbijo/dXULN feGXPE8pUJ6Bi9JI3qafqH05EZj/nOrBjdZ1TbgvwUIyzH21RRV7zibIrsbIO6NA0weiCf+oe NXrU2nXRqkrogyHte450ntUDQ2C1fJszv7pWYbNqcH5uK09XLl2V89Fo1ei0Vk/csDKZzzoL/ ymvQG2mwIhPvt6BZr0ZuJFKJefRJ/fprLYTaQstuhZfR0qILo79pBjImvIZaujRcHXmrdTncc ABSBkYr26NDtE3m+iLsyi/iMsHjERxFe2G4XOs4jsotq9GCJMDNpMr9Pa0pn1BBFCuS5nyVL8 FpbpyRlqkcT7toiQXGiTAQ6BiMx+SzQA4lL3K3NWQcPcPjo3O9EUYcMxHRPogmPjhkRzxFgtz LbPvNijsX+Yvo/Km Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Add Colibri SSP aka SPI chip select (CS) aka slave select (SS) pins as either used on Arduino UNO compatible header X18 or Raspberry Pi compatible header X20. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/imx7-colibri-aster.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi index a89c868ff3ed..117965705814 100644 --- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi @@ -7,6 +7,16 @@ &adc1 { status = "okay"; }; +/* Colibri SSP */ +&ecspi3 { + cs-gpios = < + &gpio4 11 GPIO_ACTIVE_LOW /* SODIMM 86 / regular SSPFRM as UNO_SPI_CS or */ + &gpio4 23 GPIO_ACTIVE_LOW /* SODIMM 65 / already muxed pinctrl_gpio2 as SPI_CE0_N */ + &gpio4 22 GPIO_ACTIVE_LOW /* SODIMM 85 / already muxed pinctrl_gpio2 as SPI_CE1_N */ + >; + status = "okay"; +}; + &fec1 { status = "okay"; }; From patchwork Fri May 6 15:28:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 570575 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1513FC433EF for ; Fri, 6 May 2022 15:29:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349481AbiEFPde (ORCPT ); Fri, 6 May 2022 11:33:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54142 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1442908AbiEFPdO (ORCPT ); Fri, 6 May 2022 11:33:14 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A76CA6D1B6; Fri, 6 May 2022 08:29:26 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus004 [74.208.5.2]) with ESMTPSA (Nemesis) id 1Mc0dX-1oNh1M0MgB-00dU1n; Fri, 06 May 2022 17:29:11 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 17/24] ARM: dts: imx7-colibri: add clarifying comments Date: Fri, 6 May 2022 17:28:02 +0200 Message-Id: <20220506152809.295409-18-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506152809.295409-1-marcel@ziswiler.com> References: <20220506152809.295409-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:1HCPmdGqSs6rGhRGR9OakpepVSuzx7HvpLWfPom5YiDMDLQBuk6 8WMHlEwGO/W4qn0dqtwl872EMO9vlAyEGIikXzAEelLqEOeiHYWeQoJWAcBJhfmqWEaQfst 2hymCtQiZHfT3XdLxtA2o9S1YjxvKvEmAwHV6zJ0bhvsqZyGfrKga1qZzl7wMTxGNL5zzVJ XwqBTTDl5O0ZftLEDOsdQ== X-UI-Out-Filterresults: notjunk:1;V03:K0:9IkhNRrJrgA=:R/70OoCkbUtq7EZ+OMVEcp dEAuv7DH1CRQCuhNV0A3Zr8RQ1fUim3qBJmOoHf/+MOYZew3BvIo5hOaun52dxjuI0m5cILoy JoMKpTCVrYmTk2ewO7NlEjYkaj0qSKf0VeIAdGMUYP0ADDKFSDhPNNJ4mdIx+aliEbpnVAVhX GiPp6t6nzNWZKz+KTZ7d5rAoDTRHqGUsFerRUZhxtlp6Q8+fearH5OAVyo8ldaIPeoL3PRW5A baKPYP/KMPEaM9Rd6wDG5bGmUC38QVEFZ2BjDK5YCfSFUnhE+C60/rOqY5yO1dIAi+gAzUkbB t9HXdwhS5LESohKlpW9o9Jb2xlR6wFTBHS4y6mFTVlmbPEcft7kkm2kB0+k3mQW7IMfnmxwGp aAtinK93HWBnhXqGu0QFc4365bs/GP5U6Hej4JtSu3NSPeBxNRUWqQu0kKK6+XkcghfFPq1Ai E9EDUpvIb1NjyzTifYEIx4Go3h83EGfn7erDL1x5RXzryu4J0AjJOiLtNC5qIkvuXigLupLt/ WU0sfl/P5fS5EWuhrWGCEUE2Wn5iXYIjBllBSjMnddxHsSq151fg4jNhMDd2cobvNDFpObfv8 0TNNRFPRjDLfe2vIlXyAkd8Gu0q7uK4vNt3rhCfqRpmbeFdonCRQmTv13Z0jluZx7OphQafJv xdemVGxAwUi2S18zDx4mTuDzUNp7osxizkPzMA+PFKiiL13WQQ3vTBZT1at/xNcQE4tKumZ1R t3/upsY+DnJIU6E0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler - Add clarifying comments. - Remove spurious new line. - Add required new line. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/imx7-colibri-aster.dtsi | 11 ++ arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 15 ++ arch/arm/boot/dts/imx7-colibri.dtsi | 140 ++++++++++-------- arch/arm/boot/dts/imx7d-colibri-aster.dts | 2 +- .../arm/boot/dts/imx7d-colibri-emmc-aster.dts | 1 + .../boot/dts/imx7d-colibri-emmc-eval-v3.dts | 1 + arch/arm/boot/dts/imx7d-colibri-emmc.dtsi | 2 + arch/arm/boot/dts/imx7d-colibri-eval-v3.dts | 5 + arch/arm/boot/dts/imx7d-colibri.dtsi | 2 + arch/arm/boot/dts/imx7s-colibri-eval-v3.dts | 4 + arch/arm/boot/dts/imx7s-colibri.dtsi | 1 + 11 files changed, 121 insertions(+), 63 deletions(-) diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi index 117965705814..fa488a6de0d4 100644 --- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi @@ -3,6 +3,7 @@ * Copyright 2017-2022 Toradex */ +/* Colibri AD0 to AD3 */ &adc1 { status = "okay"; }; @@ -17,26 +18,32 @@ &gpio4 22 GPIO_ACTIVE_LOW /* SODIMM 85 / already muxed pinctrl_gpio2 as SPI_CE1_ status = "okay"; }; +/* Colibri Fast Ethernet */ &fec1 { status = "okay"; }; +/* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */ &i2c4 { status = "okay"; }; +/* Colibri PWM */ &pwm1 { status = "okay"; }; +/* Colibri PWM */ &pwm2 { status = "okay"; }; +/* Colibri PWM */ &pwm3 { status = "okay"; }; +/* Colibri PWM */ &pwm4 { status = "okay"; }; @@ -46,18 +53,22 @@ &rtc { status = "okay"; }; +/* Colibri UART_A */ &uart1 { status = "okay"; }; +/* Colibri UART_B */ &uart2 { status = "okay"; }; +/* Colibri UART_C */ &uart3 { status = "okay"; }; +/* Colibri USBC */ &usbotg1 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index 6ae38c1f38d4..441331b09fb4 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -12,6 +12,7 @@ clk16m: clk16m { }; }; +/* Colibri AD0 to AD3 */ &adc1 { status = "okay"; }; @@ -28,6 +29,7 @@ &atmel_mxt_ts { status = "disabled"; }; +/* Colibri SSP */ &ecspi3 { status = "okay"; @@ -46,26 +48,34 @@ mcp2515: can@0 { }; }; +/* Colibri Fast Ethernet */ &fec1 { status = "okay"; }; +/* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */ &i2c4 { status = "okay"; }; +/* Colibri PWM */ &pwm1 { status = "okay"; }; +/* Colibri PWM */ &pwm2 { + /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ status = "okay"; }; +/* Colibri PWM */ &pwm3 { + /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ status = "okay"; }; +/* Colibri PWM */ &pwm4 { status = "okay"; }; @@ -75,22 +85,27 @@ &rtc { status = "okay"; }; +/* Colibri UART_A */ &uart1 { status = "okay"; }; +/* Colibri UART_B */ &uart2 { status = "okay"; }; +/* Colibri UART_C */ &uart3 { status = "okay"; }; +/* Colibri USBC */ &usbotg1 { status = "okay"; }; +/* Colibri MMC/SD */ &usdhc1 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index 0fc4b33d97be..4416b7befbfe 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -122,6 +122,7 @@ sound { simple-audio-card,format = "i2s"; simple-audio-card,bitclock-master = <&dailink_master>; simple-audio-card,frame-master = <&dailink_master>; + simple-audio-card,cpu { sound-dai = <&sai1>; }; @@ -133,6 +134,7 @@ dailink_master: simple-audio-card,codec { }; }; +/* Colibri AD0 to AD3 */ &adc1 { vref-supply = <®_DCDC3>; }; @@ -146,12 +148,14 @@ &cpu0 { cpu-supply = <®_DCDC2>; }; +/* Colibri SSP */ &ecspi3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs>; - cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; + cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; /* SODIMM 86 / SSPFRM */ }; +/* Colibri Fast Ethernet */ &fec1 { assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; assigned-clock-rates = <0>, <100000000>; @@ -174,6 +178,7 @@ mdio { #address-cells = <1>; #size-cells = <0>; + /* Micrel KSZ8041RNL */ ethphy0: ethernet-phy@0 { compatible = "ethernet-phy-ieee802.3-c22"; max-speed = <100>; @@ -373,6 +378,7 @@ &gpio7 { "SODIMM_137"; }; +/* NAND on such SKUs */ &gpmi { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpmi_nand>; @@ -381,6 +387,7 @@ &gpmi { nand-ecc-mode = "hw"; }; +/* On-module Power I2C */ &i2c1 { clock-frequency = <100000>; pinctrl-names = "default", "gpio"; @@ -388,7 +395,6 @@ &i2c1 { pinctrl-1 = <&pinctrl_i2c1_recovery &pinctrl_i2c1_int>; scl-gpios = <&gpio1 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; sda-gpios = <&gpio1 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - status = "okay"; codec: sgtl5000@a { @@ -488,6 +494,7 @@ reg_LDO5: LDO5 { /* PWR_EN_+V3.3 */ }; }; +/* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */ &i2c4 { clock-frequency = <100000>; pinctrl-names = "default", "gpio"; @@ -532,28 +539,32 @@ lcdif_out: endpoint { }; }; +/* Colibri PWM */ &pwm1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; }; +/* Colibri PWM */ &pwm2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm2>; }; +/* Colibri PWM */ &pwm3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm3>; }; +/* Colibri PWM */ &pwm4 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm4>; }; ®_1p0d { - vin-supply = <®_DCDC3>; + vin-supply = <®_DCDC3>; /* VDDA_1P8_IN */ }; &sai1 { @@ -562,6 +573,7 @@ &sai1 { status = "okay"; }; +/* Colibri UART_A */ &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1 &pinctrl_uart1_ctrl2>; @@ -571,6 +583,7 @@ &uart1 { fsl,dte-mode; }; +/* Colibri UART_B */ &uart2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; @@ -580,6 +593,7 @@ &uart2 { fsl,dte-mode; }; +/* Colibri UART_C */ &uart3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; @@ -588,6 +602,7 @@ &uart3 { fsl,dte-mode; }; +/* Colibri USBC */ &usbotg1 { dr_mode = "otg"; extcon = <0>, <&extcon_usbc_det>; @@ -608,6 +623,7 @@ &usdhc1 { wakeup-source; }; +/* eMMC on 1GB (eMMC) SKUs */ &usdhc3 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc3>; @@ -778,15 +794,15 @@ MX7D_PAD_SD2_WP__GPIO5_IO10 0x0 pinctrl_ecspi3_cs: ecspi3-cs-grp { fsl,pins = < - MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x14 + MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x14 /* SODIMM 86 */ >; }; pinctrl_ecspi3: ecspi3-grp { fsl,pins = < - MX7D_PAD_I2C1_SCL__ECSPI3_MISO 0x2 - MX7D_PAD_I2C1_SDA__ECSPI3_MOSI 0x2 - MX7D_PAD_I2C2_SCL__ECSPI3_SCLK 0x2 + MX7D_PAD_I2C1_SCL__ECSPI3_MISO 0x2 /* SODIMM 90 */ + MX7D_PAD_I2C1_SDA__ECSPI3_MOSI 0x2 /* SODIMM 92 */ + MX7D_PAD_I2C2_SCL__ECSPI3_SCLK 0x2 /* SODIMM 88 */ >; }; @@ -831,8 +847,8 @@ MX7D_PAD_SD3_DATA7__NAND_DATA07 0x71 pinctrl_i2c4: i2c4-grp { fsl,pins = < - MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA 0x4000007f - MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL 0x4000007f + MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA 0x4000007f /* SODIMM 194 */ + MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL 0x4000007f /* SODIMM 196 */ >; }; @@ -845,44 +861,44 @@ MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9 0x4000007f pinctrl_lcdif_dat: lcdif-dat-grp { fsl,pins = < - MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79 - MX7D_PAD_LCD_DATA01__LCD_DATA1 0x79 - MX7D_PAD_LCD_DATA02__LCD_DATA2 0x79 - MX7D_PAD_LCD_DATA03__LCD_DATA3 0x79 - MX7D_PAD_LCD_DATA04__LCD_DATA4 0x79 - MX7D_PAD_LCD_DATA05__LCD_DATA5 0x79 - MX7D_PAD_LCD_DATA06__LCD_DATA6 0x79 - MX7D_PAD_LCD_DATA07__LCD_DATA7 0x79 - MX7D_PAD_LCD_DATA08__LCD_DATA8 0x79 - MX7D_PAD_LCD_DATA09__LCD_DATA9 0x79 - MX7D_PAD_LCD_DATA10__LCD_DATA10 0x79 - MX7D_PAD_LCD_DATA11__LCD_DATA11 0x79 - MX7D_PAD_LCD_DATA12__LCD_DATA12 0x79 - MX7D_PAD_LCD_DATA13__LCD_DATA13 0x79 - MX7D_PAD_LCD_DATA14__LCD_DATA14 0x79 - MX7D_PAD_LCD_DATA15__LCD_DATA15 0x79 - MX7D_PAD_LCD_DATA16__LCD_DATA16 0x79 - MX7D_PAD_LCD_DATA17__LCD_DATA17 0x79 + MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79 /* SODIMM 76 */ + MX7D_PAD_LCD_DATA01__LCD_DATA1 0x79 /* SODIMM 70 */ + MX7D_PAD_LCD_DATA02__LCD_DATA2 0x79 /* SODIMM 60 */ + MX7D_PAD_LCD_DATA03__LCD_DATA3 0x79 /* SODIMM 58 */ + MX7D_PAD_LCD_DATA04__LCD_DATA4 0x79 /* SODIMM 78 */ + MX7D_PAD_LCD_DATA05__LCD_DATA5 0x79 /* SODIMM 72 */ + MX7D_PAD_LCD_DATA06__LCD_DATA6 0x79 /* SODIMM 80 */ + MX7D_PAD_LCD_DATA07__LCD_DATA7 0x79 /* SODIMM 46 */ + MX7D_PAD_LCD_DATA08__LCD_DATA8 0x79 /* SODIMM 62 */ + MX7D_PAD_LCD_DATA09__LCD_DATA9 0x79 /* SODIMM 48 */ + MX7D_PAD_LCD_DATA10__LCD_DATA10 0x79 /* SODIMM 74 */ + MX7D_PAD_LCD_DATA11__LCD_DATA11 0x79 /* SODIMM 50 */ + MX7D_PAD_LCD_DATA12__LCD_DATA12 0x79 /* SODIMM 52 */ + MX7D_PAD_LCD_DATA13__LCD_DATA13 0x79 /* SODIMM 54 */ + MX7D_PAD_LCD_DATA14__LCD_DATA14 0x79 /* SODIMM 66 */ + MX7D_PAD_LCD_DATA15__LCD_DATA15 0x79 /* SODIMM 64 */ + MX7D_PAD_LCD_DATA16__LCD_DATA16 0x79 /* SODIMM 57 */ + MX7D_PAD_LCD_DATA17__LCD_DATA17 0x79 /* SODIMM 61 */ >; }; pinctrl_lcdif_dat_24: lcdif-dat-24-grp { fsl,pins = < - MX7D_PAD_LCD_DATA18__LCD_DATA18 0x79 - MX7D_PAD_LCD_DATA19__LCD_DATA19 0x79 - MX7D_PAD_LCD_DATA20__LCD_DATA20 0x79 - MX7D_PAD_LCD_DATA21__LCD_DATA21 0x79 - MX7D_PAD_LCD_DATA22__LCD_DATA22 0x79 - MX7D_PAD_LCD_DATA23__LCD_DATA23 0x79 + MX7D_PAD_LCD_DATA18__LCD_DATA18 0x79 /* SODIMM 136 */ + MX7D_PAD_LCD_DATA19__LCD_DATA19 0x79 /* SODIMM 138 */ + MX7D_PAD_LCD_DATA20__LCD_DATA20 0x79 /* SODIMM 140 */ + MX7D_PAD_LCD_DATA21__LCD_DATA21 0x79 /* SODIMM 142 */ + MX7D_PAD_LCD_DATA22__LCD_DATA22 0x79 /* SODIMM 144 */ + MX7D_PAD_LCD_DATA23__LCD_DATA23 0x79 /* SODIMM 146 */ >; }; pinctrl_lcdif_ctrl: lcdif-ctrl-grp { fsl,pins = < - MX7D_PAD_LCD_CLK__LCD_CLK 0x79 - MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x79 - MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x79 - MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79 + MX7D_PAD_LCD_CLK__LCD_CLK 0x79 /* SODIMM 56 */ + MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x79 /* SODIMM 44 */ + MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x79 /* SODIMM 82 */ + MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79 /* SODIMM 68 */ >; }; @@ -897,70 +913,70 @@ MX7D_PAD_EPDC_DATA13__GPIO2_IO13 0x14 /* SODIMM 95 */ pinctrl_pwm1: pwm1-grp { fsl,pins = < - MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79 - MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x4 + MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79 /* SODIMM 59 */ + MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x4 /* SODIMM 59 */ >; }; pinctrl_pwm2: pwm2-grp { fsl,pins = < - MX7D_PAD_GPIO1_IO09__PWM2_OUT 0x79 + MX7D_PAD_GPIO1_IO09__PWM2_OUT 0x79 /* SODIMM 28 */ >; }; pinctrl_pwm3: pwm3-grp { fsl,pins = < - MX7D_PAD_GPIO1_IO10__PWM3_OUT 0x79 + MX7D_PAD_GPIO1_IO10__PWM3_OUT 0x79 /* SODIMM 30 */ >; }; pinctrl_pwm4: pwm4-grp { fsl,pins = < - MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x79 - MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20 0x4 + MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x79 /* SODIMM 67 */ + MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20 0x4 /* SODIMM 67 */ >; }; pinctrl_uart1: uart1-grp { fsl,pins = < - MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX 0x79 - MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX 0x79 - MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS 0x79 - MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS 0x79 + MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX 0x79 /* SODIMM 33 */ + MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX 0x79 /* SODIMM 35 */ + MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS 0x79 /* SODIMM 25 */ + MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS 0x79 /* SODIMM 27 */ >; }; pinctrl_uart1_ctrl1: uart1-ctrl1-grp { fsl,pins = < - MX7D_PAD_SD2_DATA1__GPIO5_IO15 0x14 /* DCD */ - MX7D_PAD_SD2_DATA0__GPIO5_IO14 0x14 /* DTR */ + MX7D_PAD_SD2_DATA1__GPIO5_IO15 0x14 /* SODIMM 31 / DCD */ + MX7D_PAD_SD2_DATA0__GPIO5_IO14 0x14 /* SODIMM 23 / DTR */ >; }; pinctrl_uart2: uart2-grp { fsl,pins = < - MX7D_PAD_UART2_TX_DATA__UART2_DTE_RX 0x79 - MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX 0x79 - MX7D_PAD_SAI2_RX_DATA__UART2_DTE_RTS 0x79 - MX7D_PAD_SAI2_TX_DATA__UART2_DTE_CTS 0x79 + MX7D_PAD_UART2_TX_DATA__UART2_DTE_RX 0x79 /* SODIMM 36 */ + MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX 0x79 /* SODIMM 38 */ + MX7D_PAD_SAI2_RX_DATA__UART2_DTE_RTS 0x79 /* SODIMM 32 / CTS */ + MX7D_PAD_SAI2_TX_DATA__UART2_DTE_CTS 0x79 /* SODIMM 34 / RTS */ >; }; pinctrl_uart3: uart3-grp { fsl,pins = < - MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX 0x79 - MX7D_PAD_UART3_RX_DATA__UART3_DTE_TX 0x79 + MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX 0x79 /* SODIMM 19 */ + MX7D_PAD_UART3_RX_DATA__UART3_DTE_TX 0x79 /* SODIMM 21 */ >; }; pinctrl_usbc_det: gpio-usbc-det { fsl,pins = < - MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x14 + MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x14 /* SODIMM 137 / USBC_DET */ >; }; pinctrl_usbh_reg: gpio-usbh-vbus { fsl,pins = < - MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14 /* SODIMM 129 USBH PEN */ + MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14 /* SODIMM 129 / USBH_PEN */ >; }; @@ -1079,14 +1095,14 @@ &iomuxc_lpsr { pinctrl_gpio_lpsr: gpio1-grp { fsl,pins = < - MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x59 - MX7D_PAD_LPSR_GPIO1_IO03__GPIO1_IO3 0x59 + MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x59 /* SODIMM 135 */ + MX7D_PAD_LPSR_GPIO1_IO03__GPIO1_IO3 0x59 /* SODIMM 22 */ >; }; pinctrl_gpiokeys: gpiokeysgrp { fsl,pins = < - MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x19 + MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x19 /* SODIMM 45 / WAKE_UP */ >; }; @@ -1118,8 +1134,8 @@ MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x0 pinctrl_uart1_ctrl2: uart1-ctrl2-grp { fsl,pins = < - MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14 /* DSR */ - MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x14 /* RI */ + MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14 /* SODIMM 29 / DSR */ + MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x14 /* SODIMM 37 / RI */ >; }; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-aster.dts b/arch/arm/boot/dts/imx7d-colibri-aster.dts index cfd75e3424fa..90aaeddfb4f6 100644 --- a/arch/arm/boot/dts/imx7d-colibri-aster.dts +++ b/arch/arm/boot/dts/imx7d-colibri-aster.dts @@ -1,7 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* * Copyright 2017-2022 Toradex - * */ /dts-v1/; @@ -35,6 +34,7 @@ &panel_dpi { status = "okay"; }; +/* Colibri USBH */ &usbotg2 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts index 7b4451699478..3ec9ef6baaa4 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts +++ b/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts @@ -16,6 +16,7 @@ / { "fsl,imx7d"; }; +/* Colibri USBH */ &usbotg2 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts index 3e84018392ee..6d505cb02aad 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts +++ b/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts @@ -15,6 +15,7 @@ / { "fsl,imx7d"; }; +/* Colibri USBH */ &usbotg2 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi index 2b4be7646631..2fb4d2133a1b 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi +++ b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi @@ -49,11 +49,13 @@ &gpio6 { "SODIMM_34"; }; +/* Colibri USBH */ &usbotg2 { dr_mode = "host"; vbus-supply = <®_usbh_vbus>; }; +/* eMMC */ &usdhc3 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts index 7aabe5691459..c7a8b5aa2408 100644 --- a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts @@ -38,14 +38,19 @@ &panel_dpi { status = "okay"; }; +/* Colibri PWM */ &pwm2 { + /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ status = "okay"; }; +/* Colibri PWM */ &pwm3 { + /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ status = "okay"; }; +/* Colibri USBH */ &usbotg2 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri.dtsi b/arch/arm/boot/dts/imx7d-colibri.dtsi index d1469aa8b025..531a45b176a1 100644 --- a/arch/arm/boot/dts/imx7d-colibri.dtsi +++ b/arch/arm/boot/dts/imx7d-colibri.dtsi @@ -23,10 +23,12 @@ &cpu1 { cpu-supply = <®_DCDC2>; }; +/* NAND */ &gpmi { status = "okay"; }; +/* Colibri USBH */ &usbotg2 { dr_mode = "host"; vbus-supply = <®_usbh_vbus>; diff --git a/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts b/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts index 6589c4179177..38de76630d6a 100644 --- a/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts @@ -38,10 +38,14 @@ &panel_dpi { status = "okay"; }; +/* Colibri PWM */ &pwm2 { + /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ status = "okay"; }; +/* Colibri PWM */ &pwm3 { + /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7s-colibri.dtsi b/arch/arm/boot/dts/imx7s-colibri.dtsi index 2ce102b7f5d4..ef51395d3537 100644 --- a/arch/arm/boot/dts/imx7s-colibri.dtsi +++ b/arch/arm/boot/dts/imx7s-colibri.dtsi @@ -13,6 +13,7 @@ memory@80000000 { }; }; +/* NAND */ &gpmi { status = "okay"; }; From patchwork Fri May 6 15:28:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 570284 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C5BB4C433EF for ; Fri, 6 May 2022 15:30:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238391AbiEFPeX (ORCPT ); Fri, 6 May 2022 11:34:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54590 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1442547AbiEFPd1 (ORCPT ); Fri, 6 May 2022 11:33:27 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5A43E6D1AD; Fri, 6 May 2022 08:29:30 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus004 [74.208.5.2]) with ESMTPSA (Nemesis) id 1MNtKu-1nTF1F391E-00OGfA; Fri, 06 May 2022 17:29:14 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 18/24] ARM: dts: imx7-colibri: alphabetical re-order Date: Fri, 6 May 2022 17:28:03 +0200 Message-Id: <20220506152809.295409-19-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506152809.295409-1-marcel@ziswiler.com> References: <20220506152809.295409-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:pDN+Smn+plQ2FEByQaxdaDiT/tddhUUz6+Y8wyD+mavy1k/rfND vBYrdhfz3eXqb1FpwCvnGc5YxI38B6GX9nJ4hyLepP5frgqCVomg2utVxqEkrq8GY/Zdx/7 B0AfghlTWKR5tyr5Lzg4MKcx13uSle+mm9+GkP0JsPGhUeqe/2XxU8W8g9mircN/HRFGx1O 0Vs0bRlF/pdhpunCGRD/A== X-UI-Out-Filterresults: notjunk:1;V03:K0:9K1X2iLXRrE=:QckJyxLLRXeHBFUYkxjpdy lvvew7YDXQNpybcEbYjAsp8iCxAMOKRP3/8X8GTaLjwYMCLo4VHXch0+DNn9XVNhhvuRHoWXQ 0D6dvSfVdLZwHSXr6iYCzOkbBrwP0a77CqsvkxgVmuDEbQsc6LJPF2PNDqui2ye8u8ZZvdHov YPzLQXopqVmhQiFJA9j81TilmyMBy0Z09rFhx20k4zaRDWhn4drhRt020Njeuyq8odyQX89ue Zc+TWsS1X/R5LgX15DFtizLwUwZRIVkKJ1LRYUVtW5+8/BZTCfKmv1MmrkdvLYYhLKe8H/OSN vlAEjxYwmZIEpiRWEL8BfgGuHcaPZHx1t1zA9Z+Uy5Ku6sM3TNjfbWMpuRTn227PvmE3/AU4C HH8aN6DVFORj7vvI53Cv2KWVEG5UwnCSj2/4PMWzUkibi86SE2EqUA93Rwfsij1VPxWCrEBPf hEC3FbWQ2yKX+ewtqjuz2U5Ks9MLNJgMYVw8nVSd8RNEv1f6QoFkmTRHSNxv/0XWcKhuQnole PIPbmbBx/14TMTttpRJoVethyZ3Pad0bAmpfz9Xm+kz0EQnKXQgW4eqjI9N7TH2x0hkSQOpj4 deQ8APSVyIkySjytOohCKWoCYyBdnr1iGe2Gl0+j/ZbjDcpBne8X5KtEUzwD3PNhH2ZOi/VqG fHkGQCE0fVxXSmm08CMNkEHkLaOQZdiOSEkf+oo6mKxt9NSUzHAWnlRxjsRZszaQEYjzGo+Bl MollXJxrHMdtCk1n Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Alphabetically re-order device tree iomuxc pinctrl pads, nodes and properties. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 6 +- arch/arm/boot/dts/imx7-colibri.dtsi | 368 ++++++++++---------- 2 files changed, 186 insertions(+), 188 deletions(-) diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index 441331b09fb4..fea6e4c0d4d6 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -34,13 +34,13 @@ &ecspi3 { status = "okay"; mcp2515: can@0 { + clocks = <&clk16m>; compatible = "microchip,mcp2515"; + interrupt-parent = <&gpio5>; + interrupts = <2 IRQ_TYPE_EDGE_FALLING>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can_int>; reg = <0>; - clocks = <&clk16m>; - interrupt-parent = <&gpio5>; - interrupts = <2 IRQ_TYPE_EDGE_FALLING>; spi-max-frequency = <10000000>; vdd-supply = <®_3v3>; xceiver-supply = <®_5v0>; diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index 4416b7befbfe..f29096fca54d 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -118,18 +118,18 @@ reg_usbh_vbus: regulator-usbh-vbus { sound { compatible = "simple-audio-card"; - simple-audio-card,name = "imx7-sgtl5000"; - simple-audio-card,format = "i2s"; simple-audio-card,bitclock-master = <&dailink_master>; + simple-audio-card,format = "i2s"; simple-audio-card,frame-master = <&dailink_master>; + simple-audio-card,name = "imx7-sgtl5000"; simple-audio-card,cpu { sound-dai = <&sai1>; }; dailink_master: simple-audio-card,codec { - sound-dai = <&codec>; clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; + sound-dai = <&codec>; }; }; }; @@ -150,9 +150,9 @@ &cpu0 { /* Colibri SSP */ &ecspi3 { + cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; /* SODIMM 86 / SSPFRM */ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs>; - cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; /* SODIMM 86 / SSPFRM */ }; /* Colibri Fast Ethernet */ @@ -380,11 +380,11 @@ &gpio7 { /* NAND on such SKUs */ &gpmi { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpmi_nand>; fsl,use-minimum-ecc; - nand-on-flash-bbt; nand-ecc-mode = "hw"; + nand-on-flash-bbt; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpmi_nand>; }; /* On-module Power I2C */ @@ -398,15 +398,15 @@ &i2c1 { status = "okay"; codec: sgtl5000@a { - compatible = "fsl,sgtl5000"; #sound-dai-cells = <0>; - reg = <0x0a>; clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; + compatible = "fsl,sgtl5000"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sai1_mclk>; + reg = <0x0a>; VDDA-supply = <®_module_3v3_avdd>; - VDDIO-supply = <®_module_3v3>; VDDD-supply = <®_DCDC3>; + VDDIO-supply = <®_module_3v3>; }; ad7879_ts: touchscreen@2c { @@ -430,65 +430,65 @@ pmic@33 { regulators { reg_DCDC1: DCDC1 { /* V1.0_SOC */ - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1100000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1100000>; + regulator-min-microvolt = <1000000>; }; reg_DCDC2: DCDC2 { /* V1.1_ARM */ - regulator-min-microvolt = <975000>; - regulator-max-microvolt = <1100000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1100000>; + regulator-min-microvolt = <975000>; }; reg_DCDC3: DCDC3 { /* V1.8 */ - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; }; reg_DCDC4: DCDC4 { /* V1.35_DRAM */ - regulator-min-microvolt = <1350000>; - regulator-max-microvolt = <1350000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1350000>; + regulator-min-microvolt = <1350000>; }; reg_LDO1: LDO1 { /* PWR_EN_+V3.3_ETH */ - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; }; reg_LDO2: LDO2 { /* +V1.8_SD */ - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <1800000>; }; reg_LDO3: LDO3 { /* PWR_EN_+V3.3_LPSR */ - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; }; reg_LDO4: LDO4 { /* V1.8_LPSR */ - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; }; reg_LDO5: LDO5 { /* PWR_EN_+V3.3 */ - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; }; }; }; @@ -575,31 +575,31 @@ &sai1 { /* Colibri UART_A */ &uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1 &pinctrl_uart1_ctrl2>; assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>; assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>; - uart-has-rtscts; fsl,dte-mode; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1 &pinctrl_uart1_ctrl2>; + uart-has-rtscts; }; /* Colibri UART_B */ &uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; assigned-clocks = <&clks IMX7D_UART2_ROOT_SRC>; assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>; - uart-has-rtscts; fsl,dte-mode; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + uart-has-rtscts; }; /* Colibri UART_C */ &uart3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart3>; assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>; assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>; fsl,dte-mode; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; }; /* Colibri USBC */ @@ -625,18 +625,18 @@ &usdhc1 { /* eMMC on 1GB (eMMC) SKUs */ &usdhc3 { - pinctrl-names = "default", "state_100mhz", "state_200mhz"; - pinctrl-0 = <&pinctrl_usdhc3>; - pinctrl-1 = <&pinctrl_usdhc3_100mhz>; - pinctrl-2 = <&pinctrl_usdhc3_200mhz>; assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>; assigned-clock-rates = <400000000>; bus-width = <8>; fsl,tuning-step = <2>; - vmmc-supply = <®_module_3v3>; - vqmmc-supply = <®_DCDC3>; non-removable; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; sdhci-caps-mask = <0x80000000 0x0>; + vmmc-supply = <®_module_3v3>; + vqmmc-supply = <®_DCDC3>; }; &iomuxc { @@ -663,13 +663,73 @@ MX7D_PAD_EPDC_DATA15__GPIO2_IO15 0x74 /* SODIMM 107 / INT */ >; }; + pinctrl_can_int: can-int-grp { + fsl,pins = < + MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0X14 /* SODIMM 73 */ + >; + }; + + pinctrl_ecspi3: ecspi3-grp { + fsl,pins = < + MX7D_PAD_I2C1_SCL__ECSPI3_MISO 0x2 /* SODIMM 90 */ + MX7D_PAD_I2C1_SDA__ECSPI3_MOSI 0x2 /* SODIMM 92 */ + MX7D_PAD_I2C2_SCL__ECSPI3_SCLK 0x2 /* SODIMM 88 */ + >; + }; + + pinctrl_ecspi3_cs: ecspi3-cs-grp { + fsl,pins = < + MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x14 /* SODIMM 86 */ + >; + }; + + pinctrl_enet1: enet1grp { + fsl,pins = < + MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x73 + MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x73 + MX7D_PAD_ENET1_RGMII_RXC__ENET1_RX_ER 0x73 + MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x73 + MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x73 + MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x73 + MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x73 + MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1 0x73 + MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x3 + MX7D_PAD_SD2_WP__ENET1_MDC 0x3 + >; + }; + + pinctrl_enet1_sleep: enet1sleepgrp { + fsl,pins = < + MX7D_PAD_ENET1_RGMII_RD0__GPIO7_IO0 0x0 + MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1 0x0 + MX7D_PAD_ENET1_RGMII_RXC__GPIO7_IO5 0x0 + MX7D_PAD_ENET1_RGMII_RX_CTL__GPIO7_IO4 0x0 + MX7D_PAD_ENET1_RGMII_TD0__GPIO7_IO6 0x0 + MX7D_PAD_ENET1_RGMII_TD1__GPIO7_IO7 0x0 + MX7D_PAD_ENET1_RGMII_TX_CTL__GPIO7_IO10 0x0 + MX7D_PAD_GPIO1_IO12__GPIO1_IO12 0x0 + MX7D_PAD_SD2_CD_B__GPIO5_IO9 0x0 + MX7D_PAD_SD2_WP__GPIO5_IO10 0x0 + >; + }; + + pinctrl_flexcan1: flexcan1-grp { + fsl,pins = < + MX7D_PAD_ENET1_RGMII_RD2__FLEXCAN1_RX 0x79 /* SODIMM 63 */ + MX7D_PAD_ENET1_RGMII_RD3__FLEXCAN1_TX 0x79 /* SODIMM 55 */ + >; + }; + + pinctrl_flexcan2: flexcan2-grp { + fsl,pins = < + MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x79 /* SODIMM 188 */ + MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x79 /* SODIMM 178 */ + >; + }; + pinctrl_gpio1: gpio1-grp { fsl,pins = < - MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 0x14 /* SODIMM 77 */ - MX7D_PAD_EPDC_DATA09__GPIO2_IO9 0x14 /* SODIMM 89 */ - MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x74 /* SODIMM 91 */ - MX7D_PAD_LCD_RESET__GPIO3_IO4 0x14 /* SODIMM 93 */ - MX7D_PAD_EPDC_DATA10__GPIO2_IO10 0x74 /* SODIMM 105 */ + MX7D_PAD_EPDC_BDR1__GPIO2_IO29 0x14 /* SODIMM 110 */ MX7D_PAD_EPDC_DATA00__GPIO2_IO0 0x14 /* SODIMM 111 */ MX7D_PAD_EPDC_DATA01__GPIO2_IO1 0x14 /* SODIMM 113 */ MX7D_PAD_EPDC_DATA02__GPIO2_IO2 0x14 /* SODIMM 115 */ @@ -678,47 +738,51 @@ MX7D_PAD_EPDC_DATA04__GPIO2_IO4 0x14 /* SODIMM 119 */ MX7D_PAD_EPDC_DATA05__GPIO2_IO5 0x14 /* SODIMM 121 */ MX7D_PAD_EPDC_DATA06__GPIO2_IO6 0x14 /* SODIMM 123 */ MX7D_PAD_EPDC_DATA07__GPIO2_IO7 0x14 /* SODIMM 125 */ - MX7D_PAD_EPDC_SDCE2__GPIO2_IO22 0x14 /* SODIMM 127 */ - MX7D_PAD_UART3_RTS_B__GPIO4_IO6 0x14 /* SODIMM 131 */ + MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x74 /* SODIMM 91 */ + MX7D_PAD_EPDC_DATA09__GPIO2_IO9 0x14 /* SODIMM 89 */ + MX7D_PAD_EPDC_DATA10__GPIO2_IO10 0x74 /* SODIMM 105 */ + MX7D_PAD_EPDC_DATA11__GPIO2_IO11 0x14 /* SODIMM 152 */ + MX7D_PAD_EPDC_DATA12__GPIO2_IO12 0x14 /* SODIMM 150 */ + MX7D_PAD_EPDC_DATA14__GPIO2_IO14 0x14 /* SODIMM 126 */ + MX7D_PAD_EPDC_GDCLK__GPIO2_IO24 0x14 /* SODIMM 132 */ + MX7D_PAD_EPDC_GDOE__GPIO2_IO25 0x14 /* SODIMM 134 */ MX7D_PAD_EPDC_GDRL__GPIO2_IO26 0x14 /* SODIMM 133 */ - MX7D_PAD_SAI1_RX_DATA__GPIO6_IO12 0x14 /* SODIMM 169 */ - MX7D_PAD_SAI1_RX_BCLK__GPIO6_IO17 0x14 /* SODIMM 24 */ - MX7D_PAD_SD2_DATA2__GPIO5_IO16 0x14 /* SODIMM 100 */ - MX7D_PAD_SD2_DATA3__GPIO5_IO17 0x14 /* SODIMM 102 */ MX7D_PAD_EPDC_GDSP__GPIO2_IO27 0x14 /* SODIMM 104 */ - MX7D_PAD_EPDC_BDR1__GPIO2_IO29 0x14 /* SODIMM 110 */ MX7D_PAD_EPDC_PWR_COM__GPIO2_IO30 0x14 /* SODIMM 112 */ + MX7D_PAD_EPDC_PWR_STAT__GPIO2_IO31 0x14 /* SODIMM 128 */ + MX7D_PAD_EPDC_SDCE0__GPIO2_IO20 0x14 /* SODIMM 122 */ + MX7D_PAD_EPDC_SDCE1__GPIO2_IO21 0x14 /* SODIMM 124 */ + MX7D_PAD_EPDC_SDCE2__GPIO2_IO22 0x14 /* SODIMM 127 */ + MX7D_PAD_EPDC_SDCE3__GPIO2_IO23 0x14 /* SODIMM 130 */ MX7D_PAD_EPDC_SDCLK__GPIO2_IO16 0x14 /* SODIMM 114 */ MX7D_PAD_EPDC_SDLE__GPIO2_IO17 0x14 /* SODIMM 116 */ MX7D_PAD_EPDC_SDOE__GPIO2_IO18 0x14 /* SODIMM 118 */ MX7D_PAD_EPDC_SDSHR__GPIO2_IO19 0x14 /* SODIMM 120 */ - MX7D_PAD_EPDC_SDCE0__GPIO2_IO20 0x14 /* SODIMM 122 */ - MX7D_PAD_EPDC_SDCE1__GPIO2_IO21 0x14 /* SODIMM 124 */ - MX7D_PAD_EPDC_DATA14__GPIO2_IO14 0x14 /* SODIMM 126 */ - MX7D_PAD_EPDC_PWR_STAT__GPIO2_IO31 0x14 /* SODIMM 128 */ - MX7D_PAD_EPDC_SDCE3__GPIO2_IO23 0x14 /* SODIMM 130 */ - MX7D_PAD_EPDC_GDCLK__GPIO2_IO24 0x14 /* SODIMM 132 */ - MX7D_PAD_EPDC_GDOE__GPIO2_IO25 0x14 /* SODIMM 134 */ - MX7D_PAD_EPDC_DATA12__GPIO2_IO12 0x14 /* SODIMM 150 */ - MX7D_PAD_EPDC_DATA11__GPIO2_IO11 0x14 /* SODIMM 152 */ + MX7D_PAD_LCD_RESET__GPIO3_IO4 0x14 /* SODIMM 93 */ + MX7D_PAD_SAI1_RX_BCLK__GPIO6_IO17 0x14 /* SODIMM 24 */ + MX7D_PAD_SAI1_RX_DATA__GPIO6_IO12 0x14 /* SODIMM 169 */ + MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 0x14 /* SODIMM 77 */ MX7D_PAD_SD2_CLK__GPIO5_IO12 0x14 /* SODIMM 184 */ MX7D_PAD_SD2_CMD__GPIO5_IO13 0x14 /* SODIMM 186 */ + MX7D_PAD_SD2_DATA2__GPIO5_IO16 0x14 /* SODIMM 100 */ + MX7D_PAD_SD2_DATA3__GPIO5_IO17 0x14 /* SODIMM 102 */ + MX7D_PAD_UART3_RTS_B__GPIO4_IO6 0x14 /* SODIMM 131 */ >; }; pinctrl_gpio2: gpio2-grp { /* On X22 Camera interface */ fsl,pins = < - MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x14 /* SODIMM 65 */ - MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x74 /* SODIMM 69 */ - MX7D_PAD_I2C4_SDA__GPIO4_IO15 0x14 /* SODIMM 75 */ MX7D_PAD_ECSPI1_MISO__GPIO4_IO18 0x14 /* SODIMM 79 */ - MX7D_PAD_I2C3_SCL__GPIO4_IO12 0x14 /* SODIMM 81 */ - MX7D_PAD_ECSPI2_MISO__GPIO4_IO22 0x14 /* SODIMM 85 */ - MX7D_PAD_ECSPI1_SS0__GPIO4_IO19 0x14 /* SODIMM 97 */ - MX7D_PAD_ECSPI1_SCLK__GPIO4_IO16 0x14 /* SODIMM 101 */ MX7D_PAD_ECSPI1_MOSI__GPIO4_IO17 0x14 /* SODIMM 103 */ + MX7D_PAD_ECSPI1_SCLK__GPIO4_IO16 0x14 /* SODIMM 101 */ + MX7D_PAD_ECSPI1_SS0__GPIO4_IO19 0x14 /* SODIMM 97 */ + MX7D_PAD_ECSPI2_MISO__GPIO4_IO22 0x14 /* SODIMM 85 */ + MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x14 /* SODIMM 65 */ + MX7D_PAD_I2C3_SCL__GPIO4_IO12 0x14 /* SODIMM 81 */ MX7D_PAD_I2C3_SDA__GPIO4_IO13 0x14 /* SODIMM 94 */ MX7D_PAD_I2C4_SCL__GPIO4_IO14 0x14 /* SODIMM 96 */ + MX7D_PAD_I2C4_SDA__GPIO4_IO15 0x14 /* SODIMM 75 */ + MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x74 /* SODIMM 69 */ MX7D_PAD_SD2_RESET_B__GPIO5_IO11 0x14 /* SODIMM 98 */ >; }; @@ -736,87 +800,15 @@ MX7D_PAD_LCD_DATA23__GPIO3_IO28 0x74 /* SODIMM 146 */ pinctrl_gpio4: gpio4-grp { /* Alternatively CAN2 */ fsl,pins = < - MX7D_PAD_GPIO1_IO15__GPIO1_IO15 0x14 /* SODIMM 178 */ MX7D_PAD_GPIO1_IO14__GPIO1_IO14 0x14 /* SODIMM 188 */ + MX7D_PAD_GPIO1_IO15__GPIO1_IO15 0x14 /* SODIMM 178 */ >; }; pinctrl_gpio7: gpio7-grp { /* Alternatively CAN1 */ fsl,pins = < - MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x14 /* SODIMM 55 */ MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 0x14 /* SODIMM 63 */ - >; - }; - - pinctrl_i2c1_int: i2c1-int-grp { /* PMIC / TOUCH */ - fsl,pins = < - MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x79 - >; - }; - - pinctrl_can_int: can-int-grp { - fsl,pins = < - MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0X14 /* SODIMM 73 */ - >; - }; - - pinctrl_enet1: enet1grp { - fsl,pins = < - MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x73 - MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x73 - MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x73 - MX7D_PAD_ENET1_RGMII_RXC__ENET1_RX_ER 0x73 - - MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x73 - MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x73 - MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x73 - MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1 0x73 - MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x3 - MX7D_PAD_SD2_WP__ENET1_MDC 0x3 - >; - }; - - pinctrl_enet1_sleep: enet1sleepgrp { - fsl,pins = < - MX7D_PAD_ENET1_RGMII_RX_CTL__GPIO7_IO4 0x0 - MX7D_PAD_ENET1_RGMII_RD0__GPIO7_IO0 0x0 - MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1 0x0 - MX7D_PAD_ENET1_RGMII_RXC__GPIO7_IO5 0x0 - - MX7D_PAD_ENET1_RGMII_TX_CTL__GPIO7_IO10 0x0 - MX7D_PAD_ENET1_RGMII_TD0__GPIO7_IO6 0x0 - MX7D_PAD_ENET1_RGMII_TD1__GPIO7_IO7 0x0 - MX7D_PAD_GPIO1_IO12__GPIO1_IO12 0x0 - MX7D_PAD_SD2_CD_B__GPIO5_IO9 0x0 - MX7D_PAD_SD2_WP__GPIO5_IO10 0x0 - >; - }; - - pinctrl_ecspi3_cs: ecspi3-cs-grp { - fsl,pins = < - MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x14 /* SODIMM 86 */ - >; - }; - - pinctrl_ecspi3: ecspi3-grp { - fsl,pins = < - MX7D_PAD_I2C1_SCL__ECSPI3_MISO 0x2 /* SODIMM 90 */ - MX7D_PAD_I2C1_SDA__ECSPI3_MOSI 0x2 /* SODIMM 92 */ - MX7D_PAD_I2C2_SCL__ECSPI3_SCLK 0x2 /* SODIMM 88 */ - >; - }; - - pinctrl_flexcan1: flexcan1-grp { - fsl,pins = < - MX7D_PAD_ENET1_RGMII_RD3__FLEXCAN1_TX 0x79 /* SODIMM 55 */ - MX7D_PAD_ENET1_RGMII_RD2__FLEXCAN1_RX 0x79 /* SODIMM 63 */ - >; - }; - - pinctrl_flexcan2: flexcan2-grp { - fsl,pins = < - MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x79 /* SODIMM 188 */ - MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x79 /* SODIMM 178 */ + MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x14 /* SODIMM 55 */ >; }; @@ -828,12 +820,10 @@ MX7D_PAD_SD1_WP__GPIO5_IO1 0x14 /* SODIMM 71 */ pinctrl_gpmi_nand: gpmi-nand-grp { fsl,pins = < - MX7D_PAD_SD3_CLK__NAND_CLE 0x71 - MX7D_PAD_SD3_CMD__NAND_ALE 0x71 MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B 0x71 MX7D_PAD_SAI1_TX_DATA__NAND_READY_B 0x74 - MX7D_PAD_SD3_STROBE__NAND_RE_B 0x71 - MX7D_PAD_SD3_RESET_B__NAND_WE_B 0x71 + MX7D_PAD_SD3_CLK__NAND_CLE 0x71 + MX7D_PAD_SD3_CMD__NAND_ALE 0x71 MX7D_PAD_SD3_DATA0__NAND_DATA00 0x71 MX7D_PAD_SD3_DATA1__NAND_DATA01 0x71 MX7D_PAD_SD3_DATA2__NAND_DATA02 0x71 @@ -842,13 +832,21 @@ MX7D_PAD_SD3_DATA4__NAND_DATA04 0x71 MX7D_PAD_SD3_DATA5__NAND_DATA05 0x71 MX7D_PAD_SD3_DATA6__NAND_DATA06 0x71 MX7D_PAD_SD3_DATA7__NAND_DATA07 0x71 + MX7D_PAD_SD3_RESET_B__NAND_WE_B 0x71 + MX7D_PAD_SD3_STROBE__NAND_RE_B 0x71 + >; + }; + + pinctrl_i2c1_int: i2c1-int-grp { /* PMIC / TOUCH */ + fsl,pins = < + MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x79 >; }; pinctrl_i2c4: i2c4-grp { fsl,pins = < - MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA 0x4000007f /* SODIMM 194 */ MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL 0x4000007f /* SODIMM 196 */ + MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA 0x4000007f /* SODIMM 194 */ >; }; @@ -897,8 +895,8 @@ pinctrl_lcdif_ctrl: lcdif-ctrl-grp { fsl,pins = < MX7D_PAD_LCD_CLK__LCD_CLK 0x79 /* SODIMM 56 */ MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x79 /* SODIMM 44 */ - MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x79 /* SODIMM 82 */ MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79 /* SODIMM 68 */ + MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x79 /* SODIMM 82 */ >; }; @@ -913,8 +911,8 @@ MX7D_PAD_EPDC_DATA13__GPIO2_IO13 0x14 /* SODIMM 95 */ pinctrl_pwm1: pwm1-grp { fsl,pins = < - MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79 /* SODIMM 59 */ MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x4 /* SODIMM 59 */ + MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79 /* SODIMM 59 */ >; }; @@ -932,39 +930,39 @@ MX7D_PAD_GPIO1_IO10__PWM3_OUT 0x79 /* SODIMM 30 */ pinctrl_pwm4: pwm4-grp { fsl,pins = < - MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x79 /* SODIMM 67 */ MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20 0x4 /* SODIMM 67 */ + MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x79 /* SODIMM 67 */ >; }; pinctrl_uart1: uart1-grp { fsl,pins = < - MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX 0x79 /* SODIMM 33 */ - MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX 0x79 /* SODIMM 35 */ MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS 0x79 /* SODIMM 25 */ MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS 0x79 /* SODIMM 27 */ + MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX 0x79 /* SODIMM 35 */ + MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX 0x79 /* SODIMM 33 */ >; }; pinctrl_uart1_ctrl1: uart1-ctrl1-grp { fsl,pins = < - MX7D_PAD_SD2_DATA1__GPIO5_IO15 0x14 /* SODIMM 31 / DCD */ MX7D_PAD_SD2_DATA0__GPIO5_IO14 0x14 /* SODIMM 23 / DTR */ + MX7D_PAD_SD2_DATA1__GPIO5_IO15 0x14 /* SODIMM 31 / DCD */ >; }; pinctrl_uart2: uart2-grp { fsl,pins = < - MX7D_PAD_UART2_TX_DATA__UART2_DTE_RX 0x79 /* SODIMM 36 */ - MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX 0x79 /* SODIMM 38 */ MX7D_PAD_SAI2_RX_DATA__UART2_DTE_RTS 0x79 /* SODIMM 32 / CTS */ MX7D_PAD_SAI2_TX_DATA__UART2_DTE_CTS 0x79 /* SODIMM 34 / RTS */ + MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX 0x79 /* SODIMM 38 */ + MX7D_PAD_UART2_TX_DATA__UART2_DTE_RX 0x79 /* SODIMM 36 */ >; }; pinctrl_uart3: uart3-grp { fsl,pins = < - MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX 0x79 /* SODIMM 19 */ MX7D_PAD_UART3_RX_DATA__UART3_DTE_TX 0x79 /* SODIMM 21 */ + MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX 0x79 /* SODIMM 19 */ >; }; @@ -1027,8 +1025,8 @@ MX7D_PAD_SD1_DATA3__SD1_DATA3 0x10 pinctrl_usdhc3: usdhc3grp { fsl,pins = < - MX7D_PAD_SD3_CMD__SD3_CMD 0x59 MX7D_PAD_SD3_CLK__SD3_CLK 0x19 + MX7D_PAD_SD3_CMD__SD3_CMD 0x59 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59 @@ -1043,8 +1041,8 @@ MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19 pinctrl_usdhc3_100mhz: usdhc3grp_100mhz { fsl,pins = < - MX7D_PAD_SD3_CMD__SD3_CMD 0x5a MX7D_PAD_SD3_CLK__SD3_CLK 0x1a + MX7D_PAD_SD3_CMD__SD3_CMD 0x5a MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a @@ -1059,8 +1057,8 @@ MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a pinctrl_usdhc3_200mhz: usdhc3grp_200mhz { fsl,pins = < - MX7D_PAD_SD3_CMD__SD3_CMD 0x5b MX7D_PAD_SD3_CLK__SD3_CLK 0x1b + MX7D_PAD_SD3_CMD__SD3_CMD 0x5b MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b @@ -1075,10 +1073,10 @@ MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b pinctrl_sai1: sai1-grp { fsl,pins = < - MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK 0x1f - MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC 0x1f MX7D_PAD_ENET1_COL__SAI1_TX_DATA0 0x30 + MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK 0x1f MX7D_PAD_ENET1_TX_CLK__SAI1_RX_DATA0 0x1f + MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC 0x1f >; }; @@ -1093,6 +1091,18 @@ &iomuxc_lpsr { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_lpsr>; + pinctrl_cd_usdhc1: cdusdhc1grp { + fsl,pins = < + MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x59 /* SODIMM 43 / MMC_CD */ + >; + }; + + pinctrl_cd_usdhc1_sleep: cdusdhc1-slpgrp { + fsl,pins = < + MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x0 + >; + }; + pinctrl_gpio_lpsr: gpio1-grp { fsl,pins = < MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x59 /* SODIMM 135 */ @@ -1108,8 +1118,8 @@ MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x19 /* SODIMM 45 / WAKE_UP */ pinctrl_i2c1: i2c1-grp { fsl,pins = < - MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA 0x4000007f MX7D_PAD_LPSR_GPIO1_IO04__I2C1_SCL 0x4000007f + MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA 0x4000007f >; }; @@ -1120,22 +1130,10 @@ MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x4000007f >; }; - pinctrl_cd_usdhc1: cdusdhc1grp { - fsl,pins = < - MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x59 /* SODIMM 43 / MMC_CD */ - >; - }; - - pinctrl_cd_usdhc1_sleep: cdusdhc1-slpgrp { - fsl,pins = < - MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x0 - >; - }; - pinctrl_uart1_ctrl2: uart1-ctrl2-grp { fsl,pins = < - MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14 /* SODIMM 29 / DSR */ MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x14 /* SODIMM 37 / RI */ + MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14 /* SODIMM 29 / DSR */ >; }; }; From patchwork Fri May 6 15:46:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 570281 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D4C3C433F5 for ; Fri, 6 May 2022 15:47:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1443138AbiEFPvE (ORCPT ); Fri, 6 May 2022 11:51:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49206 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1443144AbiEFPu6 (ORCPT ); Fri, 6 May 2022 11:50:58 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BE6EC6D869; Fri, 6 May 2022 08:47:14 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus004 [74.208.5.2]) with ESMTPSA (Nemesis) id 1MulRf-1o4wUg07NL-00rrBI; Fri, 06 May 2022 17:47:01 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 19/24] ARM: dts: imx7-colibri: clean-up device enabling/disabling Date: Fri, 6 May 2022 17:46:43 +0200 Message-Id: <20220506154643.297078-1-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506152809.295409-1-marcel@ziswiler.com> References: <20220506152809.295409-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:ZalQCdbDt6il2RNQAglTtkGkXNwrkD/G8sAe4D+gev6ffBr0JrT TaOkmK/ZfIEnl5hDlNrO+Bg6bKGr3CRgkJFS7BfGECFJk0xHOpcTKhVcQuhXihbXL+DydqF zkylbfFKpsc4LEN+/vZ0wdeK5LHyPQNDpiWAkBJMJwrbAjGmsmkH2DWzHSZKhviNOlv1eOq 6si89bIBR+lVzw1czepDA== X-UI-Out-Filterresults: notjunk:1;V03:K0:IG8Pk1MUVD0=:mu7e9d1ol3kW0ZvNzQo+L3 hybNhWHpNHKum7FT82zoIHdNcVuQK7iDwP5IHqnAdW64PfwolI4ytHtQgC49gekyWHyxD11cB aCrFicYW8jKIAIyRf3Kx/IvFtSilCtnkU2YdBBuWBvkHE1QOLIg46uEXOoOgXUM1ywnRxma9A g1b3G4vpH9IeU7kH/71b1i5/05V9BPtIAuBZil9SoJwbBXwylIGN8lwacKYTbpgJNMwlomhYp Vlfe9cbIK6iwIsdk2oQJ1WRYJ916NkDTJO7aHdicmciC11uO1JsH+yyfNeL+l8jD5m65H+NPF Lj/K6EJYkCL6heU1eCbnokqBzkRfQziu/xhGVyJOTP+iz8wAixcQk8GjHzfi5C+WYDMLnMH0A G9rNroJpk+RmmdKwzzfOp1KSgOiU2SiJ6lInO+m54mqw1C+7+DeC3nve7yqcaORNpDKwBcPNl Iurza3U1xj2rcyNChDGvL5r4n5A9INxy6U8BGeF3ZQtqz+Pk30rgr/ntYvC3od3A4yOkP7Ct0 FSufrb/UCbBkOW9LCD5IjjSw3xxZBzdGMBABAC+MxAfxecNWfmXNb2vjmM26XreI6HFNNcVUM nZ0iGUfvX2Tnlm3+CfLdGQ3Lw+eYG7G2mctthIVMg6gQ62FIBjqKtfpVqrFdzpDx0u/EA4MgP 26ytQZSMGVviTD3ZoYomUmIrfQyWkSIppVq8oBzAatPSeEhH/iYiOWi7qLhxNAfs3bfmNKlqr dBKxpyBrxDJ9Ypw9QX7MTvFmCuLuAPdPOPm0B1QnUf6giybYacl1pm0CBVjp8IxBeSxbmWxFY ztAFw5fr3uGBQmdDV2bXyWcG0ReIQ== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Disable most nodes on module-level to be enabled on carrier board-level. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 1 - arch/arm/boot/dts/imx7-colibri.dtsi | 5 ----- 2 files changed, 6 deletions(-) diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index fea6e4c0d4d6..826f13da5b81 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -44,7 +44,6 @@ mcp2515: can@0 { spi-max-frequency = <10000000>; vdd-supply = <®_3v3>; xceiver-supply = <®_5v0>; - status = "okay"; }; }; diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index f29096fca54d..065d8f55f326 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -140,9 +140,6 @@ &adc1 { }; /* ADC2 is not available as it conflicts with AD7879 resistive touchscreen. */ -&adc2 { - status = "disabled"; -}; &cpu0 { cpu-supply = <®_DCDC2>; @@ -191,13 +188,11 @@ ethphy0: ethernet-phy@0 { &flexcan1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flexcan1>; - status = "disabled"; }; &flexcan2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flexcan2>; - status = "disabled"; }; &gpio1 { From patchwork Fri May 6 15:47:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 570571 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2CC5FC433F5 for ; Fri, 6 May 2022 15:48:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243362AbiEFPvo (ORCPT ); Fri, 6 May 2022 11:51:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50016 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237300AbiEFPvn (ORCPT ); Fri, 6 May 2022 11:51:43 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 674526D86D; Fri, 6 May 2022 08:48:00 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0LvUd3-1nwB1t1moF-010brg; Fri, 06 May 2022 17:47:46 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 20/24] ARM: dts: imx7-colibri: remove leading zero from reg address Date: Fri, 6 May 2022 17:47:41 +0200 Message-Id: <20220506154741.297113-1-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506152809.295409-1-marcel@ziswiler.com> References: <20220506152809.295409-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:r+HKnxhRpsInSg3nRXiugG23Sm6B9ONWuaxBCPuz+UDLtQpvVFA dx4kUurDF+VCEM0vykmCX9NdkNIebnA66QB+Vt0J7NofBZilonxWdYfi0n39/7iiT0VntQb 1MSEjEyKPV1YYSUZh8a7N5MaSfC/blUJDetaH99vJkaCFQ1QG9Y4kOY77UD82KkhE3+dzMW JjAXLbntLIyD/Ul4Eg/CQ== X-UI-Out-Filterresults: notjunk:1;V03:K0:EKLp9383S7g=:egXWD78DDq/pcMTSdKGqG/ DUe1VKZkEgd4iEQcFuoFZi+RWBWe8o/0Ncx2WXm3zx2LqXxCEXAbbPjpeIKCkW1E9nfwRbENg 405wn8dqNFUkFZlOG6+hxnmiDvf5eq4Uy8RPB6o+CxR5LB+FEfpBJ1sLAOrl1A5WJySXIbXf/ xdEtv8EHq5XcDa0tB1q/yQaG7ptBQtRUARi0EPb6Whli/gUCNVVq2Aa36tAuCktdApc7oESrC zLW6dFFxaczClsiALR+K1NJ9O8sU90uPaiM3Qz0c1q/Ep8Oh8mP9q/fJsnH1RvXbIuoHAs3JJ ErL/dbYD8tlgXje0gfMHk/C2gm2lda8HbU+cgbfv1XGqWnZm+71IOFB19zAfbeZ8weV/hPqYu eQYCr/XR8i8ad9+TJDpRdzi9edoK4K5e3sJLwqCt3MOCVO2kN/DnbYvZ4+4EcaI/LqfYBYdHl T+86MQKdJGtbbSHDjTt7zcNKuK0YSRtDcDcy+RosevzKc7mNXmg8Fw6IthfMGM8fMYkRpy41i HSw3EsJ0Pj8gHdtBQNo96WbotojzN7EgifOoWZJh+GeSTmjJNjqUQwUb4aBsxUdOLqAsQJ703 sjY9bE8/u5/mOBub2XLyaL0LvHuH8IS15XbZxupMmq+rXO3L0gJKuozvqv3Y82lb8sePWQ7Bi SwzngtbGuOrk4XAZYpPv7Hi90CwjpPfoA4qwbLABf60qWxEfkBdj2pVuENt6VlyfghFc= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Remove the unnecessary leading zero from the reg address. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/imx7-colibri.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index 065d8f55f326..cbe4f072d4ef 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -398,7 +398,7 @@ codec: sgtl5000@a { compatible = "fsl,sgtl5000"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sai1_mclk>; - reg = <0x0a>; + reg = <0xa>; VDDA-supply = <®_module_3v3_avdd>; VDDD-supply = <®_DCDC3>; VDDIO-supply = <®_module_3v3>; From patchwork Fri May 6 15:48:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 570280 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2B059C433EF for ; Fri, 6 May 2022 15:48:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354160AbiEFPwL (ORCPT ); Fri, 6 May 2022 11:52:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50412 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237300AbiEFPwK (ORCPT ); Fri, 6 May 2022 11:52:10 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8F0686D86D; Fri, 6 May 2022 08:48:27 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0Md2do-1nVsmD3lq6-00IA2M; Fri, 06 May 2022 17:48:16 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 21/24] ARM: dts: imx7-colibri: set regulator-name properties Date: Fri, 6 May 2022 17:48:11 +0200 Message-Id: <20220506154811.297154-1-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506152809.295409-1-marcel@ziswiler.com> References: <20220506152809.295409-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:0jwSyYr+0a++mhcIj3Eoxc18Lwqu5hmPI2LpI56tec77kLwpoX/ IDM49M+YA+l7JzQiCPj4nQfxaZOy/kYjnXjqkuAO3R6+xtswla580LYFEl6wPOKhHk6sLKN kbHBIPDN5EUSQBZlm5WTaDkn0NHa7mLTNMoUoljTtvp8OoMuIgviud148gylfZocehEyivY 7lOiNQsFSksaKXHgsY1bQ== X-UI-Out-Filterresults: notjunk:1;V03:K0:Pmiq4htKZwY=:gnR1yjyMQnO7isHNz5uO/7 xd526W0kJncjLqnmJrxSUcxUeeCenuiMsvICxUyzcxDBM2TLa52hg909Yk3Z+XyM6ZwDlG5F8 z+ebpgm2VoXVwBdoyz27arf1YmwW2hG91/vrdPbloqXGNtvvzrDqEoy2hK+h8OoufYLwROhE3 j4hFCa2hZRzfsSUUTyWn4kJm3bc0xs1O0Y85xaPe9lWMTKwSRzjuNfrgCZ0SBEk89n4TUNpAx jOSUCvV5vAEMfvjbzHIh5G0AUKfJREnEj9d7ssnmRWG3mqlqjFHI9yskuspSKFy1NBPouMU+C P/zkPegp0VJVBGJq5+CfXJSWXtK0hcq/RqvSRKrigOyGIZDSRFW/cO6MqD0AacBl6jVTnXWTl K9t3jv1bkklEoB/julhEM7fUA5aqrmqrwncCafuVWswEE2uU4Go3Gkrm5IAB1SPJdLLaYxt/j IlU80n3raovFu1uF1ZF9RjIYiqEnAQTQbvwG+V8iRQvfX116kyf9TNAKL6l1BMUv7qLljENOV TfsVPFa3369VgvyXbw64x3LRDN7x1Vq22jzWrqIGJT6du28l8Rhk9cyP1f6fIRgswylQdBac5 /ALpUVQcHAavJenoX+4UVq7mLnKroI/3Jj6wJOkzdX2TvFiKMZyf9N+5zXjU0LZObrw/AgCGC EUjqrRlbPeUUiaRGfcLgqkOrMEoqwB2DJD1NrPkT5imfHn0f/XKLc3EpD2lfb7bnKdTZ6odj8 05hX1xhCk8+m43xk Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Migrate comments to proper regulator-name properties. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/imx7-colibri.dtsi | 27 ++++++++++++++++++--------- 1 file changed, 18 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index cbe4f072d4ef..27706a2bc3c4 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -424,66 +424,75 @@ pmic@33 { reg = <0x33>; regulators { - reg_DCDC1: DCDC1 { /* V1.0_SOC */ + reg_DCDC1: DCDC1 { regulator-always-on; regulator-boot-on; regulator-max-microvolt = <1100000>; regulator-min-microvolt = <1000000>; + regulator-name = "+V1.0_SOC"; }; - reg_DCDC2: DCDC2 { /* V1.1_ARM */ + reg_DCDC2: DCDC2 { regulator-always-on; regulator-boot-on; regulator-max-microvolt = <1100000>; regulator-min-microvolt = <975000>; + regulator-name = "+V1.1_ARM"; }; - reg_DCDC3: DCDC3 { /* V1.8 */ + reg_DCDC3: DCDC3 { regulator-always-on; regulator-boot-on; regulator-max-microvolt = <1800000>; regulator-min-microvolt = <1800000>; + regulator-name = "+V1.8"; }; - reg_DCDC4: DCDC4 { /* V1.35_DRAM */ + reg_DCDC4: DCDC4 { regulator-always-on; regulator-boot-on; regulator-max-microvolt = <1350000>; regulator-min-microvolt = <1350000>; + regulator-name = "+V1.35_DRAM"; }; - reg_LDO1: LDO1 { /* PWR_EN_+V3.3_ETH */ + reg_LDO1: LDO1 { regulator-boot-on; regulator-max-microvolt = <3300000>; regulator-min-microvolt = <3300000>; + regulator-name = "PWR_EN_+V3.3_ETH"; }; - reg_LDO2: LDO2 { /* +V1.8_SD */ + reg_LDO2: LDO2 { regulator-always-on; regulator-boot-on; regulator-max-microvolt = <3300000>; regulator-min-microvolt = <1800000>; + regulator-name = "+V1.8_SD"; }; - reg_LDO3: LDO3 { /* PWR_EN_+V3.3_LPSR */ + reg_LDO3: LDO3 { regulator-always-on; regulator-boot-on; regulator-max-microvolt = <3300000>; regulator-min-microvolt = <3300000>; + regulator-name = "PWR_EN_+V3.3_LPSR"; }; - reg_LDO4: LDO4 { /* V1.8_LPSR */ + reg_LDO4: LDO4 { regulator-always-on; regulator-boot-on; regulator-max-microvolt = <1800000>; regulator-min-microvolt = <1800000>; + regulator-name = "+V1.8_LPSR"; }; - reg_LDO5: LDO5 { /* PWR_EN_+V3.3 */ + reg_LDO5: LDO5 { regulator-always-on; regulator-boot-on; regulator-max-microvolt = <3300000>; regulator-min-microvolt = <3300000>; + regulator-name = "PWR_EN_+V3.3"; }; }; }; From patchwork Fri May 6 15:48:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 570570 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A3CE8C433EF for ; Fri, 6 May 2022 15:48:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237300AbiEFPwi (ORCPT ); Fri, 6 May 2022 11:52:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50772 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1443168AbiEFPwh (ORCPT ); Fri, 6 May 2022 11:52:37 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.196]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C27236D879; Fri, 6 May 2022 08:48:53 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus004 [74.208.5.2]) with ESMTPSA (Nemesis) id 1MI55X-1nZ1yB2Hrj-00FA4f; Fri, 06 May 2022 17:48:40 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 22/24] ARM: dts: imx7-colibri: clean-up iomuxc pinctrl group naming Date: Fri, 6 May 2022 17:48:36 +0200 Message-Id: <20220506154836.297190-1-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506152809.295409-1-marcel@ziswiler.com> References: <20220506152809.295409-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:Lxr25iwrTJEb11BTTqDEuztu9haEBdrtiokllEChmGSpMxHEilV FgU+94TnzauGkgeFocZCvtvrsyBGd65g/FQy/zCektCISrsp2c5H5gJVl3gs+Y8qiUMv5VL IMR6IOrEt5NL6CrPoSyaJQuJeVGZrN5w/TDP+E9wXtOOQ+sJqGphXWpH6m5O6uErorKbAPU lbM/BEoL7Ck4JXNIewfng== X-UI-Out-Filterresults: notjunk:1;V03:K0:l4SffBwTJZI=:AgNqvdj1qIReT3bD6tttG6 8tv1aM9AyMNEhd6TCBE2UB020vTbdaISiw77yOhdk4cUPGbP+UGUUwk2xgPpYYHTZlpDssrFj Qom3bJj5oVutHBm2C57qHoHJ1gt9KeMrqrn0NUKHTxWUOFbCgk501bBEIoeSSP14CtWHzJ2jF A24ebGMYWy4yZc3fXbKXRsId4nmrPV+nuuiMfOwdFjSi2tIm6efMQhWRWF6fHvK9RGXGzIVB3 rlxIjMLuUzWFqO+RDkEV8mlNF48jRvNM9N6A7tPeThUbTBrEh07G2WVjAnVH8/h/z6oq80lgZ ZbtTsU1QKwFdTDRQra84TaRlfRf/4D2fRvIu+1quAcHQa9IvBajE3zanaz+Y09vXSgtos5oaV cTktf0k0YhNWnXWQHRGdMMWpCQvTxBqfiCexG2TeNQRY6LzznFKkrWG2gXGACnOimyW3GmkJc vUFD8T8kK4GW/rSGJtkO0Mfm2AxjLaeXx+x2r/kHOBafiIgfkNnTfYTDCPwCo02QKJAFTkswA dE9vDOUFFeBE2eJM4Neoy5mRWlMP/ZTToROxiI7UGDIcJQeZlDQfymOgc6WMhXDtE8xvttci9 d4sBOTfOF3Ha6FlPsp6q+EijMFgnMPq8J756UCpProFpolujQzxabOZZegQPqg2vo5o0BFTfb 2fzflzfNm2NvRVMNcwO14clk+z+HUz9IHFYpXZQG2ettg8tKTXN9u171vqbVDMl7KXO7V7OLL pjcKWuMByo1kR2vA Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Clean-up iomuxc pinctrl group naming. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/imx7-colibri.dtsi | 70 ++++++++++++++--------------- 1 file changed, 35 insertions(+), 35 deletions(-) diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index 27706a2bc3c4..a8c31ee65623 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -667,13 +667,13 @@ MX7D_PAD_EPDC_DATA15__GPIO2_IO15 0x74 /* SODIMM 107 / INT */ >; }; - pinctrl_can_int: can-int-grp { + pinctrl_can_int: canintgrp { fsl,pins = < MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0X14 /* SODIMM 73 */ >; }; - pinctrl_ecspi3: ecspi3-grp { + pinctrl_ecspi3: ecspi3grp { fsl,pins = < MX7D_PAD_I2C1_SCL__ECSPI3_MISO 0x2 /* SODIMM 90 */ MX7D_PAD_I2C1_SDA__ECSPI3_MOSI 0x2 /* SODIMM 92 */ @@ -681,7 +681,7 @@ MX7D_PAD_I2C2_SCL__ECSPI3_SCLK 0x2 /* SODIMM 88 */ >; }; - pinctrl_ecspi3_cs: ecspi3-cs-grp { + pinctrl_ecspi3_cs: ecspi3csgrp { fsl,pins = < MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x14 /* SODIMM 86 */ >; @@ -702,7 +702,7 @@ MX7D_PAD_SD2_WP__ENET1_MDC 0x3 >; }; - pinctrl_enet1_sleep: enet1sleepgrp { + pinctrl_enet1_sleep: enet1-sleepgrp { fsl,pins = < MX7D_PAD_ENET1_RGMII_RD0__GPIO7_IO0 0x0 MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1 0x0 @@ -717,21 +717,21 @@ MX7D_PAD_SD2_WP__GPIO5_IO10 0x0 >; }; - pinctrl_flexcan1: flexcan1-grp { + pinctrl_flexcan1: flexcan1grp { fsl,pins = < MX7D_PAD_ENET1_RGMII_RD2__FLEXCAN1_RX 0x79 /* SODIMM 63 */ MX7D_PAD_ENET1_RGMII_RD3__FLEXCAN1_TX 0x79 /* SODIMM 55 */ >; }; - pinctrl_flexcan2: flexcan2-grp { + pinctrl_flexcan2: flexcan2grp { fsl,pins = < MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x79 /* SODIMM 188 */ MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x79 /* SODIMM 178 */ >; }; - pinctrl_gpio1: gpio1-grp { + pinctrl_gpio1: gpio1grp { fsl,pins = < MX7D_PAD_EPDC_BDR1__GPIO2_IO29 0x14 /* SODIMM 110 */ MX7D_PAD_EPDC_DATA00__GPIO2_IO0 0x14 /* SODIMM 111 */ @@ -774,7 +774,7 @@ MX7D_PAD_UART3_RTS_B__GPIO4_IO6 0x14 /* SODIMM 131 */ >; }; - pinctrl_gpio2: gpio2-grp { /* On X22 Camera interface */ + pinctrl_gpio2: gpio2grp { /* On X22 Camera interface */ fsl,pins = < MX7D_PAD_ECSPI1_MISO__GPIO4_IO18 0x14 /* SODIMM 79 */ MX7D_PAD_ECSPI1_MOSI__GPIO4_IO17 0x14 /* SODIMM 103 */ @@ -791,7 +791,7 @@ MX7D_PAD_SD2_RESET_B__GPIO5_IO11 0x14 /* SODIMM 98 */ >; }; - pinctrl_gpio3: gpio3-grp { /* LCD 18-23 */ + pinctrl_gpio3: gpio3grp { /* LCD 18-23 */ fsl,pins = < MX7D_PAD_LCD_DATA18__GPIO3_IO23 0x14 /* SODIMM 136 */ MX7D_PAD_LCD_DATA19__GPIO3_IO24 0x14 /* SODIMM 138 */ @@ -802,27 +802,27 @@ MX7D_PAD_LCD_DATA23__GPIO3_IO28 0x74 /* SODIMM 146 */ >; }; - pinctrl_gpio4: gpio4-grp { /* Alternatively CAN2 */ + pinctrl_gpio4: gpio4grp { /* Alternatively CAN2 */ fsl,pins = < MX7D_PAD_GPIO1_IO14__GPIO1_IO14 0x14 /* SODIMM 188 */ MX7D_PAD_GPIO1_IO15__GPIO1_IO15 0x14 /* SODIMM 178 */ >; }; - pinctrl_gpio7: gpio7-grp { /* Alternatively CAN1 */ + pinctrl_gpio7: gpio7grp { /* Alternatively CAN1 */ fsl,pins = < MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 0x14 /* SODIMM 63 */ MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x14 /* SODIMM 55 */ >; }; - pinctrl_gpio_bl_on: gpio-bl-on { + pinctrl_gpio_bl_on: gpioblongrp { fsl,pins = < MX7D_PAD_SD1_WP__GPIO5_IO1 0x14 /* SODIMM 71 */ >; }; - pinctrl_gpmi_nand: gpmi-nand-grp { + pinctrl_gpmi_nand: gpminandgrp { fsl,pins = < MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B 0x71 MX7D_PAD_SAI1_TX_DATA__NAND_READY_B 0x74 @@ -841,13 +841,13 @@ MX7D_PAD_SD3_STROBE__NAND_RE_B 0x71 >; }; - pinctrl_i2c1_int: i2c1-int-grp { /* PMIC / TOUCH */ + pinctrl_i2c1_int: i2c1intgrp { /* PMIC / TOUCH */ fsl,pins = < MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x79 >; }; - pinctrl_i2c4: i2c4-grp { + pinctrl_i2c4: i2c4grp { fsl,pins = < MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL 0x4000007f /* SODIMM 196 */ MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA 0x4000007f /* SODIMM 194 */ @@ -861,7 +861,7 @@ MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9 0x4000007f >; }; - pinctrl_lcdif_dat: lcdif-dat-grp { + pinctrl_lcdif_dat: lcdifdatgrp { fsl,pins = < MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79 /* SODIMM 76 */ MX7D_PAD_LCD_DATA01__LCD_DATA1 0x79 /* SODIMM 70 */ @@ -884,7 +884,7 @@ MX7D_PAD_LCD_DATA17__LCD_DATA17 0x79 /* SODIMM 61 */ >; }; - pinctrl_lcdif_dat_24: lcdif-dat-24-grp { + pinctrl_lcdif_dat_24: lcdifdat24grp { fsl,pins = < MX7D_PAD_LCD_DATA18__LCD_DATA18 0x79 /* SODIMM 136 */ MX7D_PAD_LCD_DATA19__LCD_DATA19 0x79 /* SODIMM 138 */ @@ -895,7 +895,7 @@ MX7D_PAD_LCD_DATA23__LCD_DATA23 0x79 /* SODIMM 146 */ >; }; - pinctrl_lcdif_ctrl: lcdif-ctrl-grp { + pinctrl_lcdif_ctrl: lcdifctrlgrp { fsl,pins = < MX7D_PAD_LCD_CLK__LCD_CLK 0x79 /* SODIMM 56 */ MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x79 /* SODIMM 44 */ @@ -913,33 +913,33 @@ MX7D_PAD_EPDC_DATA13__GPIO2_IO13 0x14 /* SODIMM 95 */ >; }; - pinctrl_pwm1: pwm1-grp { + pinctrl_pwm1: pwm1grp { fsl,pins = < MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x4 /* SODIMM 59 */ MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79 /* SODIMM 59 */ >; }; - pinctrl_pwm2: pwm2-grp { + pinctrl_pwm2: pwm2grp { fsl,pins = < MX7D_PAD_GPIO1_IO09__PWM2_OUT 0x79 /* SODIMM 28 */ >; }; - pinctrl_pwm3: pwm3-grp { + pinctrl_pwm3: pwm3grp { fsl,pins = < MX7D_PAD_GPIO1_IO10__PWM3_OUT 0x79 /* SODIMM 30 */ >; }; - pinctrl_pwm4: pwm4-grp { + pinctrl_pwm4: pwm4grp { fsl,pins = < MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20 0x4 /* SODIMM 67 */ MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x79 /* SODIMM 67 */ >; }; - pinctrl_uart1: uart1-grp { + pinctrl_uart1: uart1grp { fsl,pins = < MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS 0x79 /* SODIMM 25 */ MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS 0x79 /* SODIMM 27 */ @@ -948,14 +948,14 @@ MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX 0x79 /* SODIMM 33 */ >; }; - pinctrl_uart1_ctrl1: uart1-ctrl1-grp { + pinctrl_uart1_ctrl1: uart1ctrl1grp { fsl,pins = < MX7D_PAD_SD2_DATA0__GPIO5_IO14 0x14 /* SODIMM 23 / DTR */ MX7D_PAD_SD2_DATA1__GPIO5_IO15 0x14 /* SODIMM 31 / DCD */ >; }; - pinctrl_uart2: uart2-grp { + pinctrl_uart2: uart2grp { fsl,pins = < MX7D_PAD_SAI2_RX_DATA__UART2_DTE_RTS 0x79 /* SODIMM 32 / CTS */ MX7D_PAD_SAI2_TX_DATA__UART2_DTE_CTS 0x79 /* SODIMM 34 / RTS */ @@ -963,20 +963,20 @@ MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX 0x79 /* SODIMM 38 */ MX7D_PAD_UART2_TX_DATA__UART2_DTE_RX 0x79 /* SODIMM 36 */ >; }; - pinctrl_uart3: uart3-grp { + pinctrl_uart3: uart3grp { fsl,pins = < MX7D_PAD_UART3_RX_DATA__UART3_DTE_TX 0x79 /* SODIMM 21 */ MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX 0x79 /* SODIMM 19 */ >; }; - pinctrl_usbc_det: gpio-usbc-det { + pinctrl_usbc_det: usbcdetgrp { fsl,pins = < MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x14 /* SODIMM 137 / USBC_DET */ >; }; - pinctrl_usbh_reg: gpio-usbh-vbus { + pinctrl_usbh_reg: usbhreggrp { fsl,pins = < MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14 /* SODIMM 129 / USBH_PEN */ >; @@ -1043,7 +1043,7 @@ MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19 >; }; - pinctrl_usdhc3_100mhz: usdhc3grp_100mhz { + pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { fsl,pins = < MX7D_PAD_SD3_CLK__SD3_CLK 0x1a MX7D_PAD_SD3_CMD__SD3_CMD 0x5a @@ -1059,7 +1059,7 @@ MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a >; }; - pinctrl_usdhc3_200mhz: usdhc3grp_200mhz { + pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { fsl,pins = < MX7D_PAD_SD3_CLK__SD3_CLK 0x1b MX7D_PAD_SD3_CMD__SD3_CMD 0x5b @@ -1075,7 +1075,7 @@ MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b >; }; - pinctrl_sai1: sai1-grp { + pinctrl_sai1: sai1grp { fsl,pins = < MX7D_PAD_ENET1_COL__SAI1_TX_DATA0 0x30 MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK 0x1f @@ -1084,7 +1084,7 @@ MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC 0x1f >; }; - pinctrl_sai1_mclk: sai1grp_mclk { + pinctrl_sai1_mclk: sai1mclkgrp { fsl,pins = < MX7D_PAD_SAI1_MCLK__SAI1_MCLK 0x1f >; @@ -1107,7 +1107,7 @@ MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x0 >; }; - pinctrl_gpio_lpsr: gpio1-grp { + pinctrl_gpio_lpsr: gpiolpsrgrp { fsl,pins = < MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x59 /* SODIMM 135 */ MX7D_PAD_LPSR_GPIO1_IO03__GPIO1_IO3 0x59 /* SODIMM 22 */ @@ -1120,7 +1120,7 @@ MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x19 /* SODIMM 45 / WAKE_UP */ >; }; - pinctrl_i2c1: i2c1-grp { + pinctrl_i2c1: i2c1grp { fsl,pins = < MX7D_PAD_LPSR_GPIO1_IO04__I2C1_SCL 0x4000007f MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA 0x4000007f @@ -1134,7 +1134,7 @@ MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x4000007f >; }; - pinctrl_uart1_ctrl2: uart1-ctrl2-grp { + pinctrl_uart1_ctrl2: uart1ctrl2grp { fsl,pins = < MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x14 /* SODIMM 37 / RI */ MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14 /* SODIMM 29 / DSR */ From patchwork Fri May 6 15:56:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 570569 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 566AEC433EF for ; Fri, 6 May 2022 15:57:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1443225AbiEFQA5 (ORCPT ); Fri, 6 May 2022 12:00:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60020 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242211AbiEFQA4 (ORCPT ); Fri, 6 May 2022 12:00:56 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8AB596A41C; Fri, 6 May 2022 08:57:13 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MLeLd-1nnHR63tLf-000ujU; Fri, 06 May 2022 17:56:48 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Alexander Stein , Ariel D'Alessandro , Christoph Niedermaier , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , Li Yang , Lucas Stach , Marcel Ziswiler , Matthias Schiffer , Rob Herring , Russell King , Sascha Hauer , Sebastian Reichel , Shawn Guo , Tim Harvey , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 23/24] dt-bindings: arm: fsl: add toradex,colibri-imx7s/d/d-emmc-iris/-v2 Date: Fri, 6 May 2022 17:56:41 +0200 Message-Id: <20220506155641.297635-1-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506152809.295409-1-marcel@ziswiler.com> References: <20220506152809.295409-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:MIBq7VmBWdumJlhEmmFZ9pFOrRTLHXH6JSSHx3/t+CQEcsT2SnQ VILaYSB4teWeca3P1jB4iw/Wq+2IjELA/IqUEGprZDEDD8HXXrMV26wW6hx73/XJqF6pOyc N4hc/J+u7pLenRGlEs1+Hfcu+PAXpBqrRakwLYJzZKXj8Bd9PUvTg70giQaXmYMJ2c+NkqA t4zpPWQC20CVcrSGXaNlA== X-UI-Out-Filterresults: notjunk:1;V03:K0:dCfLu27PQ+Y=:c7NneQq96GlxozMB52Zibj b0E4VroDzijPwuwg7esJtIeUG/h0e/S4uEkG36WwMkGZizz7utrRrFtoNr2vBqqWZ8CR1YXXx qjXBtEJl2Qa6IRO7HwjhOH7mwLHidudzErR8vBrZI3DQ/rMzZZYpLzcQMNXp7icJMvp4z4kT3 KFoIWuUtLCLuZvAc4PYzQOFHT7z4g0xHFUC33eD2bPqU5aR0RZ+/iuThwDhnXHIju+hL1oSxX pUYoa3ur1qfUZhni4rU9wpxIhnOyEC8t188zGWHOrltJQflCuYTNPlbY8iLW7cWKUtEpNPoyE cVyF4TdibVweo+8p5hzrFRJMtzLxupN0+1yi0Q0mH1gD1igPfehyp57nzzd/Oz/Ie8WXaf10F JvcinSFMzKAb3DbVXAYe6HgTdAIPecEy8WyUkj9H9RyK3CIPlnzjxVngFrXGgB3PNjKG0XlnQ 1vn3jqdY5CTm2E2ogXWPIEQnpIRhfP2DvCc8Z299FdH5OeToutXISHqLiay2IbkIiVWSCodQK 6knnGD9acTy8vt0AYEWG7tje3hf4/vWqAeSaM6S21l5Gy3VfQNtKEbaBUtb2FAFchYh60PvDd ZSvEodxgpqIZwN/I3EBLU2ehdOx3wDYe2EAkQ04bLba1tNd2QJjxW52SDctvMSnj/W5jbF/V5 rnTn/vaz3F32HFiRh9oESn8z6RGIsVt8y/YC3rAg9otGGiotCglVE9MKB/UOdfIE6OWsgEhAl l+Wf+f3R+g6H9B3CXRUCA1K7/uEcZnu4JN0b6HETnX8MeuTcxGYH7sAyL+q4yzA5I7awE+WI5 3GuDA96HmBmHUiPDFSPvnqshOSD/Q== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Based on toradex,colibri-imx7s, toradex,colibri-imx7d and toradex,colibri-imx7d-emmc module device trees add iris and iris-v2 for carrier board dts. Signed-off-by: Marcel Ziswiler --- Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 08bdd30e511c..3494a3f2a587 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -687,6 +687,8 @@ properties: - enum: - toradex,colibri-imx7s-aster # Module on Aster Carrier Board - toradex,colibri-imx7s-eval-v3 # Module on Colibri Evaluation Board V3 + - toradex,colibri-imx7s-iris # Module on Iris Carrier Board + - toradex,colibri-imx7s-iris-v2 # Module on Iris Carrier Board V2 - const: toradex,colibri-imx7s - const: fsl,imx7s @@ -739,6 +741,8 @@ properties: - enum: - toradex,colibri-imx7d-aster # Colibri iMX7D Module on Aster Carrier Board - toradex,colibri-imx7d-eval-v3 # Colibri iMX7D Module on Colibri Evaluation Board V3 + - toradex,colibri-imx7d-iris # Colibri iMX7D Module on Iris Carrier Board + - toradex,colibri-imx7d-iris-v2 # Colibri iMX7D Module on Iris Carrier Board V2 - const: toradex,colibri-imx7d - const: fsl,imx7d @@ -747,6 +751,8 @@ properties: - enum: - toradex,colibri-imx7d-emmc-aster # Module on Aster Carrier Board - toradex,colibri-imx7d-emmc-eval-v3 # Module on Colibri Evaluation Board V3 + - toradex,colibri-imx7d-emmc-iris # Module on Iris Carrier Board + - toradex,colibri-imx7d-emmc-iris-v2 # Module on Iris Carrier Board V2 - const: toradex,colibri-imx7d-emmc - const: fsl,imx7d From patchwork Fri May 6 15:58:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 570279 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B369DC433EF for ; Fri, 6 May 2022 15:58:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1443244AbiEFQCa (ORCPT ); Fri, 6 May 2022 12:02:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33050 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236869AbiEFQC3 (ORCPT ); Fri, 6 May 2022 12:02:29 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BBAD16D1B6; Fri, 6 May 2022 08:58:45 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MDiSu-1nbVt62E8c-00HAUO; Fri, 06 May 2022 17:58:27 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Arnd Bergmann , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , Marcel Ziswiler , NXP Linux Team , Olof Johansson , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, soc@kernel.org Subject: [PATCH v1 24/24] ARM: dts: imx7-colibri: add support for Toradex Iris carrier boards Date: Fri, 6 May 2022 17:58:21 +0200 Message-Id: <20220506155821.297686-1-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506152809.295409-1-marcel@ziswiler.com> References: <20220506152809.295409-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:yRWcy8MKdSGDIQxT6vwlwChUUwElSPtTpT4etGI8iGfj48gnvBD 3J4hAC/Gmyp3Kv3zDU3bV418EvSV7n0ppwkYH5BryxaL/b9J9PvTEnjQE22v2j2KrnsyhB3 HpafVq1kSnBZHDxFStBub7EJA8p6fARFGBPkzdsBG4gyM1eZIth//Oo0W4RoGTV2xVHq3YZ l6hFoi8+878cFZSkLeV6A== X-UI-Out-Filterresults: notjunk:1;V03:K0:iFSraCP1FAQ=:jR+L9QJeM9i5ZQyaSAYlo2 vQvmfhemrQp10ZpNKiXxN6X/QAs42+oEHRB2ezu8bR5fK/gH/lWeOqxnuHdOOt8Dvfhaov4AE x2QHP/PzDU2NsOuR9kGz8jJYxSvv+eVLCH4VZFgLEgYPGvQx5w+A5kBCBljaL6RqHxr325ZSp IhZL9EhVc17ob0XVpymu8wbYorcReLVzQOkFg8ATzWwqQli6qPFPCpPGU1OC1bstQmp6X0TwA tiXaJBHPtGWaE8OUqmlMo3S6c/T3rU8XgnO9v01nzqtewKqbNkfhjus+u04olOwKXssHP3Aaj XzAJBr1PnRCLw/MuKl5KDa1FtlrcU6L8yanuXQsUng0uDf+OIHr5DCqbFgklZQsCth3nmQtNO 2aaHLCUMpyioDNbqk/XsrtliT5fie0gnCBj4tSEp9ZPQP6YDRTDCfzMpHCAeIdDaZnkbDGwPR khdyp8h/OOkPQ8+k5xA9+F0U0kDOJCu0MEQLDtK0Hr70aTlX4S9ivcZwNi1hxFOvBBsnUH7z2 Utkk1/tcgatHtOij/H8k3iVrDn5ZruikqBzS8EYK4+XHQz5AY9OAnnIgv5oIjbe0sylZt40nW 9zTMhhpso7Vp39/PRSMlx6uCqGRrwWOmLa72FbNMLaRw3mKMn6DUa43h+iXXmp4dYMsiIjJxi O877SdftN51Eh8PoFtnfxPfeoNS6o2nRAaRiqocv14vCja/sEQRJr3mU4X6NB8fQsCD4AIGSk 4EWZ6UPoUfbZ0rLfI6PWQfcL1nv0WA0ZwPfdFniUNXCJJHU6ZNVmklYcs9k= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Add support for Toradex Iris, small form-factor Pico-ITX Colibri Arm Computer Module family Carrier Board. Additional details available at https://www.toradex.com/products/carrier-board/iris-carrier-board Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/Makefile | 6 + arch/arm/boot/dts/imx6dl-colibri-iris.dts | 9 +- arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi | 112 ++++++++++++++++++ arch/arm/boot/dts/imx7-colibri-iris.dtsi | 108 +++++++++++++++++ .../boot/dts/imx7d-colibri-emmc-iris-v2.dts | 21 ++++ arch/arm/boot/dts/imx7d-colibri-emmc-iris.dts | 21 ++++ arch/arm/boot/dts/imx7d-colibri-iris-v2.dts | 83 +++++++++++++ arch/arm/boot/dts/imx7d-colibri-iris.dts | 56 +++++++++ arch/arm/boot/dts/imx7s-colibri-iris-v2.dts | 78 ++++++++++++ arch/arm/boot/dts/imx7s-colibri-iris.dts | 51 ++++++++ 10 files changed, 540 insertions(+), 5 deletions(-) create mode 100644 arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi create mode 100644 arch/arm/boot/dts/imx7-colibri-iris.dtsi create mode 100644 arch/arm/boot/dts/imx7d-colibri-emmc-iris-v2.dts create mode 100644 arch/arm/boot/dts/imx7d-colibri-emmc-iris.dts create mode 100644 arch/arm/boot/dts/imx7d-colibri-iris-v2.dts create mode 100644 arch/arm/boot/dts/imx7d-colibri-iris.dts create mode 100644 arch/arm/boot/dts/imx7s-colibri-iris-v2.dts create mode 100644 arch/arm/boot/dts/imx7s-colibri-iris.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index b711d4423b42..5a9c805dbc84 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -726,8 +726,12 @@ dtb-$(CONFIG_SOC_IMX7D) += \ imx7d-cl-som-imx7.dtb \ imx7d-colibri-aster.dtb \ imx7d-colibri-emmc-aster.dtb \ + imx7d-colibri-emmc-iris.dtb \ + imx7d-colibri-emmc-iris-v2.dtb \ imx7d-colibri-emmc-eval-v3.dtb \ imx7d-colibri-eval-v3.dtb \ + imx7d-colibri-iris.dtb \ + imx7d-colibri-iris-v2.dtb \ imx7d-flex-concentrator.dtb \ imx7d-flex-concentrator-mfg.dtb \ imx7d-mba7.dtb \ @@ -747,6 +751,8 @@ dtb-$(CONFIG_SOC_IMX7D) += \ imx7d-zii-rpu2.dtb \ imx7s-colibri-aster.dtb \ imx7s-colibri-eval-v3.dtb \ + imx7s-colibri-iris.dtb \ + imx7s-colibri-iris-v2.dtb \ imx7s-mba7.dtb \ imx7s-warp.dtb dtb-$(CONFIG_SOC_IMX7ULP) += \ diff --git a/arch/arm/boot/dts/imx6dl-colibri-iris.dts b/arch/arm/boot/dts/imx6dl-colibri-iris.dts index cf77d894f6d7..6e048d696c77 100644 --- a/arch/arm/boot/dts/imx6dl-colibri-iris.dts +++ b/arch/arm/boot/dts/imx6dl-colibri-iris.dts @@ -40,11 +40,10 @@ &gpio2 { pinctrl-0 = <&pinctrl_uart1_forceoff &pinctrl_uart23_forceoff>; /* - * uart-a-on-x13-enable turns the UART transceiver for UART_A on. If one - * wants to turn the transceiver off, that property has to be deleted - * and the gpio handled in userspace. - * The same applies to uart-b-c-on-x14-enable where the UART_B and - * UART_C transceiver is turned on. + * uart-a-on-x13-enable-hog turns the UART transceiver for UART_A on. If one wants to turn + * the transceiver off, that property has to be deleted and the gpio handled in userspace. + * The same applies to uart-b-c-on-x14-enable-hog where the UART_B and UART_C transceiver is + * turned on. */ uart-a-on-x13-enable-hog { gpio-hog; diff --git a/arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi b/arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi new file mode 100644 index 000000000000..6e199613583c --- /dev/null +++ b/arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi @@ -0,0 +1,112 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/ { + reg_3v3_vmmc: regulator-3v3-vmmc { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio5 16 GPIO_ACTIVE_HIGH>; /* SODIMM 100 */ + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "3v3_vmmc"; + startup-delay-us = <100>; + }; +}; + +/* Colibri AD0 to AD3 */ +&adc1 { + status = "okay"; +}; + +/* Colibri SSP */ +&ecspi3 { + status = "okay"; +}; + +/* Colibri Fast Ethernet */ +&fec1 { + status = "okay"; +}; + +&gpio2 { + /* + * uart_b_c_on_x14_enable turns the UART transceiver for UART2 and 5 on. If one wants to + * turn the transceiver off, that property has to be deleted and the gpio handled in + * userspace. + * The same applies to uart_a_on_x13_enable where the UART_A transceiver is turned on. + */ + uart-b-c-on-x14-enable-hog { + gpio-hog; + gpios = <27 GPIO_ACTIVE_HIGH>; /* SODIMM 104 */ + output-high; + }; +}; + +&gpio5 { + uart-a-on-x13-enable-hog { + gpio-hog; + gpios = <17 GPIO_ACTIVE_HIGH>; /* SODIMM 102 */ + output-high; + }; +}; + +/* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */ +&i2c4 { + status = "okay"; +}; + +/* Colibri PWM */ +&pwm1 { + status = "okay"; +}; + +/* Colibri PWM */ +&pwm2 { + status = "okay"; +}; + +/* Colibri PWM */ +&pwm3 { + status = "okay"; +}; + +/* Colibri PWM */ +&pwm4 { + status = "okay"; +}; + +/* M41T0M6 real time clock */ +&rtc { + status = "okay"; +}; + +/* Colibri UART_A */ +&uart1 { + status = "okay"; +}; + +/* Colibri UART_B */ +&uart2 { + status = "okay"; +}; + +/* Colibri UART_C */ +&uart3 { + status = "okay"; +}; + +/* Colibri USBC */ +&usbotg1 { + status = "okay"; +}; + +/* Colibri MMC/SD, UHS-I capable uSD slot */ +&usdhc1 { + cap-power-off-card; + /delete-property/ keep-power-in-suspend; + /delete-property/ no-1-8-v; + vmmc-supply = <®_3v3_vmmc>; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx7-colibri-iris.dtsi b/arch/arm/boot/dts/imx7-colibri-iris.dtsi new file mode 100644 index 000000000000..175c5d478d2e --- /dev/null +++ b/arch/arm/boot/dts/imx7-colibri-iris.dtsi @@ -0,0 +1,108 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/* Colibri AD0 to AD3 */ +&adc1 { + status = "okay"; +}; + +/* + * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM, PWM, aka pwm2, pwm3. + * So if you enable following capacitive touch controller, disable pwm2/pwm3 first. + */ +&atmel_mxt_ts { + interrupt-parent = <&gpio1>; + interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28 / INT */ + pinctrl-0 = <&pinctrl_atmel_adapter>; + reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; /* SODIMM 30 / RST */ +}; + +/* Colibri SSP */ +&ecspi3 { + status = "okay"; +}; + +/* Colibri Fast Ethernet */ +&fec1 { + status = "okay"; +}; + +&gpio2 { + /* + * uart25 turns the UART transceiver for UART2 and 5 on. If one wants to turn the + * transceiver off, that property has to be deleted and the gpio handled in userspace. + * The same applies to uart1_tx_on where the UART1 transceiver is turned on. + */ + uart25-tx-on-hog { + gpio-hog; + gpios = <27 GPIO_ACTIVE_HIGH>; /* SODIMM 104 */ + output-high; + }; +}; + +&gpio5 { + uart1-tx-on-hog { + gpio-hog; + gpios = <17 GPIO_ACTIVE_HIGH>; /* SODIMM 102 */ + output-high; + }; +}; + +/* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */ +&i2c4 { + status = "okay"; +}; + +/* Colibri PWM */ +&pwm1 { + status = "okay"; +}; + +/* Colibri PWM */ +&pwm2 { + /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ + status = "okay"; +}; + +/* Colibri PWM */ +&pwm3 { + /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ + status = "okay"; +}; + +/* Colibri PWM */ +&pwm4 { + status = "okay"; +}; + +/* M41T0M6 real time clock */ +&rtc { + status = "okay"; +}; + +/* Colibri UART_A */ +&uart1 { + status = "okay"; +}; + +/* Colibri UART_B */ +&uart2 { + status = "okay"; +}; + +/* Colibri UART_C */ +&uart3 { + status = "okay"; +}; + +/* Colibri USBC */ +&usbotg1 { + status = "okay"; +}; + +/* Colibri MMC/SD */ +&usdhc1 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-iris-v2.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-iris-v2.dts new file mode 100644 index 000000000000..7347659557f3 --- /dev/null +++ b/arch/arm/boot/dts/imx7d-colibri-emmc-iris-v2.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; +#include "imx7d-colibri-emmc.dtsi" +#include "imx7-colibri-iris-v2.dtsi" + +/ { + model = "Toradex Colibri iMX7D 1GB on Iris V2 Carrier Board"; + compatible = "toradex,colibri-imx7d-emmc-iris-v2", + "toradex,colibri-imx7d-emmc", + "toradex,colibri-imx7d", + "fsl,imx7d"; +}; + +/* Colibri USBH */ +&usbotg2 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-iris.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-iris.dts new file mode 100644 index 000000000000..5324c92e368d --- /dev/null +++ b/arch/arm/boot/dts/imx7d-colibri-emmc-iris.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; +#include "imx7d-colibri-emmc.dtsi" +#include "imx7-colibri-iris.dtsi" + +/ { + model = "Toradex Colibri iMX7D 1GB on Iris Carrier Board"; + compatible = "toradex,colibri-imx7d-emmc-iris", + "toradex,colibri-imx7d-emmc", + "toradex,colibri-imx7d", + "fsl,imx7d"; +}; + +/* Colibri USBH */ +&usbotg2 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx7d-colibri-iris-v2.dts b/arch/arm/boot/dts/imx7d-colibri-iris-v2.dts new file mode 100644 index 000000000000..5762f51d5f0f --- /dev/null +++ b/arch/arm/boot/dts/imx7d-colibri-iris-v2.dts @@ -0,0 +1,83 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; +#include "imx7d-colibri.dtsi" +#include "imx7-colibri-iris-v2.dtsi" + +/ { + model = "Toradex Colibri iMX7D on Iris V2 Carrier Board"; + compatible = "toradex,colibri-imx7d-iris-v2", + "toradex,colibri-imx7d", + "fsl,imx7d"; +}; + +&ad7879_ts { + status = "okay"; +}; + +&atmel_mxt_ts { + status = "okay"; +}; + +&backlight { + status = "okay"; +}; + +&gpio2 { + /* + * This switches the LVDS transceiver to VESA color mapping mode. + */ + lvds-color-map-hog { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; /* SODIMM 95 */ + line-name = "LVDS_COLOR_MAP"; + output-low; + }; +}; + +&gpio7 { + /* + * This switches the LVDS transceiver to the 24-bit RGB mode. + */ + lvds-rgb-mode-hog { + gpio-hog; + gpios = <2 GPIO_ACTIVE_HIGH>; /* SODIMM 63 */ + line-name = "LVDS_RGB_MODE"; + output-low; + }; + + /* + * This switches the LVDS transceiver to the single-channel + * output mode. + */ + lvds-ch-mode-hog { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; /* SODIMM 55 */ + line-name = "LVDS_CH_MODE"; + output-high; + }; + + /* This turns the LVDS transceiver on */ + lvds-power-on-hog { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; /* SODIMM 99 */ + line-name = "LVDS_POWER_ON"; + output-high; + }; +}; + +&lcdif { + status = "okay"; +}; + +&panel_dpi { + status = "okay"; +}; + +/* Colibri USBH */ +&usbotg2 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx7d-colibri-iris.dts b/arch/arm/boot/dts/imx7d-colibri-iris.dts new file mode 100644 index 000000000000..9c63cb9d9a64 --- /dev/null +++ b/arch/arm/boot/dts/imx7d-colibri-iris.dts @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; +#include "imx7d-colibri.dtsi" +#include "imx7-colibri-iris.dtsi" + +/ { + model = "Toradex Colibri iMX7D on Iris Carrier Board"; + compatible = "toradex,colibri-imx7d-iris", + "toradex,colibri-imx7d", + "fsl,imx7d"; +}; + +&ad7879_ts { + status = "okay"; +}; + +/* + * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM, PWM, aka pwm2, pwm3. + * So if you enable following capacitive touch controller, disable pwm2/pwm3 first. + */ +&atmel_mxt_ts { + status = "disabled"; +}; + +&backlight { + status = "okay"; +}; + +&lcdif { + status = "okay"; +}; + +&panel_dpi { + status = "okay"; +}; + +/* Colibri PWM */ +&pwm2 { + /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ + status = "okay"; +}; + +/* Colibri PWM */ +&pwm3 { + /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ + status = "okay"; +}; + +/* Colibri USBH */ +&usbotg2 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx7s-colibri-iris-v2.dts b/arch/arm/boot/dts/imx7s-colibri-iris-v2.dts new file mode 100644 index 000000000000..72b5c17ab1ab --- /dev/null +++ b/arch/arm/boot/dts/imx7s-colibri-iris-v2.dts @@ -0,0 +1,78 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; +#include "imx7s-colibri.dtsi" +#include "imx7-colibri-iris-v2.dtsi" + +/ { + model = "Toradex Colibri iMX7S on Iris V2 Carrier Board"; + compatible = "toradex,colibri-imx7s-iris-v2", + "toradex,colibri-imx7s", + "fsl,imx7s"; +}; + +&ad7879_ts { + status = "okay"; +}; + +&atmel_mxt_ts { + status = "okay"; +}; + +&backlight { + status = "okay"; +}; + +&gpio2 { + /* + * This switches the LVDS transceiver to VESA color mapping mode. + */ + lvds-color-map-hog { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; /* SODIMM 95 */ + line-name = "LVDS_COLOR_MAP"; + output-low; + }; +}; + +&gpio7 { + /* + * This switches the LVDS transceiver to the 24-bit RGB mode. + */ + lvds-rgb-mode-hog { + gpio-hog; + gpios = <2 GPIO_ACTIVE_HIGH>; /* SODIMM 63 */ + line-name = "LVDS_RGB_MODE"; + output-low; + }; + + /* + * This switches the LVDS transceiver to the single-channel + * output mode. + */ + lvds-ch-mode-hog { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; /* SODIMM 55 */ + line-name = "LVDS_CH_MODE"; + output-high; + }; + + /* This turns the LVDS transceiver on */ + lvds-power-on-hog { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; /* SODIMM 99 */ + line-name = "LVDS_POWER_ON"; + output-high; + }; +}; + +&lcdif { + status = "okay"; +}; + +&panel_dpi { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx7s-colibri-iris.dts b/arch/arm/boot/dts/imx7s-colibri-iris.dts new file mode 100644 index 000000000000..26ba72c17feb --- /dev/null +++ b/arch/arm/boot/dts/imx7s-colibri-iris.dts @@ -0,0 +1,51 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; +#include "imx7s-colibri.dtsi" +#include "imx7-colibri-iris.dtsi" + +/ { + model = "Toradex Colibri iMX7S on Iris Carrier Board"; + compatible = "toradex,colibri-imx7s-iris", + "toradex,colibri-imx7s", + "fsl,imx7s"; +}; + +&ad7879_ts { + status = "okay"; +}; + +/* + * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM, PWM, aka pwm2, pwm3. + * So if you enable following capacitive touch controller, disable pwm2/pwm3 first. + */ +&atmel_mxt_ts { + status = "disabled"; +}; + +&backlight { + status = "okay"; +}; + +&lcdif { + status = "okay"; +}; + +&panel_dpi { + status = "okay"; +}; + +/* Colibri PWM */ +&pwm2 { + /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ + status = "okay"; +}; + +/* Colibri PWM */ +&pwm3 { + /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ + status = "okay"; +};