From patchwork Sun May 8 13:59:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 570733 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8260DC433EF for ; Sun, 8 May 2022 13:59:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233601AbiEHODd (ORCPT ); Sun, 8 May 2022 10:03:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39846 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233677AbiEHODc (ORCPT ); Sun, 8 May 2022 10:03:32 -0400 Received: from mail-ed1-x52d.google.com (mail-ed1-x52d.google.com [IPv6:2a00:1450:4864:20::52d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9D0CDDFB5 for ; Sun, 8 May 2022 06:59:41 -0700 (PDT) Received: by mail-ed1-x52d.google.com with SMTP id y21so13528931edo.2 for ; Sun, 08 May 2022 06:59:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cGkttDqvYsUUsrUXY9BC2Fg/b2UvTJ5Tzg5qvRI7Pfg=; b=R9RyiZXiRXv6vcGsngJu755jCUvGkw6ljd7grwWqoZNb/ssw/4hYNB5vB9lRa55bZ+ taUSkVPQIZbHizX2MevwOf9pxOeWARKNOcvLsL3wASS5hSf8+GEUa+n6Bl6AKf3y3wcc rEEKdlRNJca0M3bR3PHM1Zp0TcWxL2JpDLZMwCbxIfDrhw9eAAYfFjEUy1zzxTXJOZrX 3zaQ/dQ9jVXAeXhJl+SL9anhqZ0++VX63p5al1ryHuAblo5bRr160degilyoxjjxmGQJ 3XI3s5/6YDoHJiN57u8g+89+TYMme/PCTMy17UpzOjSNKTVbrUWMqc4doydRxVY3pGns qjeQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cGkttDqvYsUUsrUXY9BC2Fg/b2UvTJ5Tzg5qvRI7Pfg=; b=WEZfmz++rg82xYffWabCoXDGX9uZ6fKR8N6vtNNDU7mu8yxHo0YDAMlUgJ4l5PQfnE SjRTuJqU+YhfVfWT4yzAX6DAJph9ccTFf8YiWyN8FXrCF4KId7wng85e1XUGeCbqlDsI AWu2ePPUEXMkIGfUdPy73q/j4MrUzZXGF2zL/dRx4+4omjOVenyvyIOScNKMZEDuDY1h r7wJvWfDJyfFmdGqmHr7MU2pFj200yujw4YsZSbKJKLN6Q0BrhJqwVJhszdNdOZALIRc vnTlp7SmyNr3/C4YgJjErPWHgR1agDhGxnoIVs3Yip+UO85CVgb6Aa0gS2EzG/vBiS5a 1SSg== X-Gm-Message-State: AOAM532y3HfBudBzaNzoyYVphwJb7tWtQKZM0FJplr2DPODSiN53PmoK qBX89c2sIjoHu2m9f+Bz5YGYlA== X-Google-Smtp-Source: ABdhPJyyEyxl9FMGJJ4ozYTfSy5BfZGk1porbFMbi0rxnxZtLnTydeSDWYl5p3+oGop5WsR4vS68JA== X-Received: by 2002:a50:ce19:0:b0:425:d85c:90e3 with SMTP id y25-20020a50ce19000000b00425d85c90e3mr12866432edi.350.1652018380092; Sun, 08 May 2022 06:59:40 -0700 (PDT) Received: from localhost.localdomain (xdsl-188-155-176-92.adslplus.ch. [188.155.176.92]) by smtp.gmail.com with ESMTPSA id qz24-20020a170907681800b006f3ef214dc6sm4075524ejc.44.2022.05.08.06.59.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 May 2022 06:59:39 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Linus Walleij , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Luca Weiss , David Heidelberg , Konrad Dybcio , Krzysztof Kozlowski Subject: [PATCH 1/4] dt-bindings: pinctrl: qcom,pmic-gpio: add 'gpio-reserved-ranges' Date: Sun, 8 May 2022 15:59:29 +0200 Message-Id: <20220508135932.132378-2-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220508135932.132378-1-krzysztof.kozlowski@linaro.org> References: <20220508135932.132378-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org 'gpio-reserved-ranges' property is already used and supported by common pinctrl bindings, so add it also here to fix warnings like: qrb5165-rb5.dtb: gpio@c000: 'gpio-reserved-ranges' does not match any of the regexes: '-state$', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring Reviewed-by: Bjorn Andersson --- .../bindings/pinctrl/qcom,pmic-gpio.yaml | 53 +++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml index 7e74a87ccc39..69195660ee2a 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml @@ -78,6 +78,12 @@ properties: minItems: 2 maxItems: 44 + gpio-reserved-ranges: + minItems: 1 + # maxItems as half of total number of GPIOs, as there has to be at + # least one usable GPIO between each reserved range. + maxItems: 22 + '#gpio-cells': const: 2 description: @@ -107,6 +113,8 @@ allOf: gpio-line-names: minItems: 2 maxItems: 2 + gpio-reserved-ranges: + maxItems: 1 - if: properties: @@ -124,6 +132,9 @@ allOf: gpio-line-names: minItems: 4 maxItems: 4 + gpio-reserved-ranges: + minItems: 1 + maxItems: 2 - if: properties: @@ -137,6 +148,9 @@ allOf: gpio-line-names: minItems: 6 maxItems: 6 + gpio-reserved-ranges: + minItems: 1 + maxItems: 3 - if: properties: @@ -150,6 +164,9 @@ allOf: gpio-line-names: minItems: 8 maxItems: 8 + gpio-reserved-ranges: + minItems: 1 + maxItems: 4 - if: properties: @@ -163,6 +180,9 @@ allOf: gpio-line-names: minItems: 9 maxItems: 9 + gpio-reserved-ranges: + minItems: 1 + maxItems: 5 - if: properties: @@ -182,6 +202,9 @@ allOf: gpio-line-names: minItems: 10 maxItems: 10 + gpio-reserved-ranges: + minItems: 1 + maxItems: 5 - if: properties: @@ -194,6 +217,9 @@ allOf: gpio-line-names: minItems: 11 maxItems: 11 + gpio-reserved-ranges: + minItems: 1 + maxItems: 6 - if: properties: @@ -212,6 +238,9 @@ allOf: gpio-line-names: minItems: 12 maxItems: 12 + gpio-reserved-ranges: + minItems: 1 + maxItems: 6 - if: properties: @@ -224,6 +253,9 @@ allOf: gpio-line-names: minItems: 13 maxItems: 13 + gpio-reserved-ranges: + minItems: 1 + maxItems: 7 - if: properties: @@ -236,6 +268,9 @@ allOf: gpio-line-names: minItems: 14 maxItems: 14 + gpio-reserved-ranges: + minItems: 1 + maxItems: 7 - if: properties: @@ -248,6 +283,9 @@ allOf: gpio-line-names: minItems: 16 maxItems: 16 + gpio-reserved-ranges: + minItems: 1 + maxItems: 8 - if: properties: @@ -261,6 +299,9 @@ allOf: gpio-line-names: minItems: 22 maxItems: 22 + gpio-reserved-ranges: + minItems: 1 + maxItems: 11 - if: properties: @@ -273,6 +314,9 @@ allOf: gpio-line-names: minItems: 26 maxItems: 26 + gpio-reserved-ranges: + minItems: 1 + maxItems: 13 - if: properties: @@ -285,6 +329,9 @@ allOf: gpio-line-names: minItems: 36 maxItems: 36 + gpio-reserved-ranges: + minItems: 1 + maxItems: 18 - if: properties: @@ -297,6 +344,9 @@ allOf: gpio-line-names: minItems: 38 maxItems: 38 + gpio-reserved-ranges: + minItems: 1 + maxItems: 19 - if: properties: @@ -310,6 +360,9 @@ allOf: gpio-line-names: minItems: 44 maxItems: 44 + gpio-reserved-ranges: + minItems: 1 + maxItems: 22 patternProperties: '-state$': From patchwork Sun May 8 13:59:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 571291 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 60A17C433F5 for ; Sun, 8 May 2022 13:59:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233724AbiEHODg (ORCPT ); Sun, 8 May 2022 10:03:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39880 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233698AbiEHODd (ORCPT ); Sun, 8 May 2022 10:03:33 -0400 Received: from mail-ed1-x531.google.com (mail-ed1-x531.google.com [IPv6:2a00:1450:4864:20::531]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 27289DFB9 for ; Sun, 8 May 2022 06:59:43 -0700 (PDT) Received: by mail-ed1-x531.google.com with SMTP id ba17so13521068edb.5 for ; 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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id qz24-20020a170907681800b006f3ef214dc6sm4075524ejc.44.2022.05.08.06.59.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 May 2022 06:59:41 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Linus Walleij , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Luca Weiss , David Heidelberg , Konrad Dybcio , Krzysztof Kozlowski Subject: [PATCH 2/4] arm64: dts: qcom: add missing gpio-ranges in PMIC GPIOs Date: Sun, 8 May 2022 15:59:30 +0200 Message-Id: <20220508135932.132378-3-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220508135932.132378-1-krzysztof.kozlowski@linaro.org> References: <20220508135932.132378-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The new Qualcomm PMIC GPIO bindings require gpio-ranges property: sm8250-sony-xperia-edo-pdx203.dtb: gpio@c000: 'gpio-ranges' is a required property Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/pm6350.dtsi | 1 + arch/arm64/boot/dts/qcom/pm8009.dtsi | 1 + arch/arm64/boot/dts/qcom/pm8150.dtsi | 1 + arch/arm64/boot/dts/qcom/pm8150b.dtsi | 1 + arch/arm64/boot/dts/qcom/pm8150l.dtsi | 1 + arch/arm64/boot/dts/qcom/pm8350.dtsi | 1 + arch/arm64/boot/dts/qcom/pm8350b.dtsi | 1 + arch/arm64/boot/dts/qcom/pm8916.dtsi | 1 + arch/arm64/boot/dts/qcom/pmr735b.dtsi | 1 + arch/arm64/boot/dts/qcom/pms405.dtsi | 1 + 10 files changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/pm6350.dtsi b/arch/arm64/boot/dts/qcom/pm6350.dtsi index f3056845e65f..ecf9b9919182 100644 --- a/arch/arm64/boot/dts/qcom/pm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/pm6350.dtsi @@ -39,6 +39,7 @@ pm6350_gpios: gpios@c000 { compatible = "qcom,pm6350-gpio", "qcom,spmi-gpio"; reg = <0xc000>; gpio-controller; + gpio-ranges = <&pm6350_gpios 0 0 9>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; diff --git a/arch/arm64/boot/dts/qcom/pm8009.dtsi b/arch/arm64/boot/dts/qcom/pm8009.dtsi index d451922d2b95..0c2c424be0ea 100644 --- a/arch/arm64/boot/dts/qcom/pm8009.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8009.dtsi @@ -22,6 +22,7 @@ pm8009_gpios: gpio@c000 { compatible = "qcom,pm8005-gpio", "qcom,spmi-gpio"; reg = <0xc000>; gpio-controller; + gpio-ranges = <&pm8009_gpios 0 0 4>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; diff --git a/arch/arm64/boot/dts/qcom/pm8150.dtsi b/arch/arm64/boot/dts/qcom/pm8150.dtsi index 72cd93ced4c5..fd8434215924 100644 --- a/arch/arm64/boot/dts/qcom/pm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8150.dtsi @@ -130,6 +130,7 @@ pm8150_gpios: gpio@c000 { compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio"; reg = <0xc000>; gpio-controller; + gpio-ranges = <&pm8150_gpios 0 0 10>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; diff --git a/arch/arm64/boot/dts/qcom/pm8150b.dtsi b/arch/arm64/boot/dts/qcom/pm8150b.dtsi index 28162f6fb61d..d0d8890f087c 100644 --- a/arch/arm64/boot/dts/qcom/pm8150b.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8150b.dtsi @@ -115,6 +115,7 @@ pm8150b_gpios: gpio@c000 { compatible = "qcom,pm8150b-gpio", "qcom,spmi-gpio"; reg = <0xc000>; gpio-controller; + gpio-ranges = <&pm8150b_gpios 0 0 12>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; diff --git a/arch/arm64/boot/dts/qcom/pm8150l.dtsi b/arch/arm64/boot/dts/qcom/pm8150l.dtsi index 0642e7d5be35..2b273c219fd8 100644 --- a/arch/arm64/boot/dts/qcom/pm8150l.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8150l.dtsi @@ -103,6 +103,7 @@ pm8150l_gpios: gpio@c000 { compatible = "qcom,pm8150l-gpio", "qcom,spmi-gpio"; reg = <0xc000>; gpio-controller; + gpio-ranges = <&pm8150l_gpios 0 0 12>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; diff --git a/arch/arm64/boot/dts/qcom/pm8350.dtsi b/arch/arm64/boot/dts/qcom/pm8350.dtsi index 6e91dd7a48b3..2dfeb99300d7 100644 --- a/arch/arm64/boot/dts/qcom/pm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8350.dtsi @@ -48,6 +48,7 @@ pm8350_gpios: gpio@8800 { compatible = "qcom,pm8350-gpio", "qcom,spmi-gpio"; reg = <0x8800>; gpio-controller; + gpio-ranges = <&pm8350_gpios 0 0 10>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; diff --git a/arch/arm64/boot/dts/qcom/pm8350b.dtsi b/arch/arm64/boot/dts/qcom/pm8350b.dtsi index d9512f01ed1e..f1c7bd9d079c 100644 --- a/arch/arm64/boot/dts/qcom/pm8350b.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8350b.dtsi @@ -48,6 +48,7 @@ pm8350b_gpios: gpio@8800 { compatible = "qcom,pm8350b-gpio", "qcom,spmi-gpio"; reg = <0x8800>; gpio-controller; + gpio-ranges = <&pm8350b_gpios 0 0 8>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; diff --git a/arch/arm64/boot/dts/qcom/pm8916.dtsi b/arch/arm64/boot/dts/qcom/pm8916.dtsi index aedc0aa5602f..d52919a8c0b0 100644 --- a/arch/arm64/boot/dts/qcom/pm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8916.dtsi @@ -111,6 +111,7 @@ pm8916_gpios: gpios@c000 { compatible = "qcom,pm8916-gpio", "qcom,spmi-gpio"; reg = <0xc000>; gpio-controller; + gpio-ranges = <&pm8916_gpios 0 0 4>; #gpio-cells = <2>; interrupts = <0 0xc0 0 IRQ_TYPE_NONE>, <0 0xc1 0 IRQ_TYPE_NONE>, diff --git a/arch/arm64/boot/dts/qcom/pmr735b.dtsi b/arch/arm64/boot/dts/qcom/pmr735b.dtsi index 93a658eb4cdd..ec24c4478005 100644 --- a/arch/arm64/boot/dts/qcom/pmr735b.dtsi +++ b/arch/arm64/boot/dts/qcom/pmr735b.dtsi @@ -48,6 +48,7 @@ pmr735b_gpios: gpio@8800 { compatible = "qcom,pmr735b-gpio", "qcom,spmi-gpio"; reg = <0x8800>; gpio-controller; + gpio-ranges = <&pmr735b_gpios 0 0 4>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; diff --git a/arch/arm64/boot/dts/qcom/pms405.dtsi b/arch/arm64/boot/dts/qcom/pms405.dtsi index 43190a5cfe33..26f1e8cc9c6c 100644 --- a/arch/arm64/boot/dts/qcom/pms405.dtsi +++ b/arch/arm64/boot/dts/qcom/pms405.dtsi @@ -41,6 +41,7 @@ pms405_gpios: gpio@c000 { compatible = "qcom,pms405-gpio", "qcom,spmi-gpio"; reg = <0xc000>; gpio-controller; + gpio-ranges = <&pms405_gpios 0 0 12>; #gpio-cells = <2>; interrupts = <0 0xc0 0 IRQ_TYPE_NONE>, <0 0xc1 0 IRQ_TYPE_NONE>, From patchwork Sun May 8 13:59:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 571290 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EC68AC4167B for ; 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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id qz24-20020a170907681800b006f3ef214dc6sm4075524ejc.44.2022.05.08.06.59.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 May 2022 06:59:42 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Linus Walleij , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Luca Weiss , David Heidelberg , Konrad Dybcio , Krzysztof Kozlowski Subject: [RFT 3/4] arm64: dts: qcom: correct interrupt controller on PM8916 and PMS405 Date: Sun, 8 May 2022 15:59:31 +0200 Message-Id: <20220508135932.132378-4-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220508135932.132378-1-krzysztof.kozlowski@linaro.org> References: <20220508135932.132378-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The PM8916 and PMS405 PMIC GPIOs are interrupt controllers, as described in the bindings and used by the driver. Drop the interrupts (apparently copied from downstream tree), just like in commit 61d2ca503d0b ("arm64: dts: qcom: fix pm8150 gpio interrupts"): qcs404-evb-4000.dtb: gpio@c000: 'interrupts' does not match any of the regexes: '-state$', 'pinctrl-[0-9]+' qcs404-evb-4000.dtb: gpio@c000: 'interrupt-controller' is a required property Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/pm8916.dtsi | 6 ++---- arch/arm64/boot/dts/qcom/pms405.dtsi | 14 ++------------ 2 files changed, 4 insertions(+), 16 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/pm8916.dtsi b/arch/arm64/boot/dts/qcom/pm8916.dtsi index d52919a8c0b0..0b6e8ad7fa50 100644 --- a/arch/arm64/boot/dts/qcom/pm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8916.dtsi @@ -113,10 +113,8 @@ pm8916_gpios: gpios@c000 { gpio-controller; gpio-ranges = <&pm8916_gpios 0 0 4>; #gpio-cells = <2>; - interrupts = <0 0xc0 0 IRQ_TYPE_NONE>, - <0 0xc1 0 IRQ_TYPE_NONE>, - <0 0xc2 0 IRQ_TYPE_NONE>, - <0 0xc3 0 IRQ_TYPE_NONE>; + interrupt-controller; + #interrupt-cells = <2>; }; }; diff --git a/arch/arm64/boot/dts/qcom/pms405.dtsi b/arch/arm64/boot/dts/qcom/pms405.dtsi index 26f1e8cc9c6c..634b0681d04c 100644 --- a/arch/arm64/boot/dts/qcom/pms405.dtsi +++ b/arch/arm64/boot/dts/qcom/pms405.dtsi @@ -43,18 +43,8 @@ pms405_gpios: gpio@c000 { gpio-controller; gpio-ranges = <&pms405_gpios 0 0 12>; #gpio-cells = <2>; - interrupts = <0 0xc0 0 IRQ_TYPE_NONE>, - <0 0xc1 0 IRQ_TYPE_NONE>, - <0 0xc2 0 IRQ_TYPE_NONE>, - <0 0xc3 0 IRQ_TYPE_NONE>, - <0 0xc4 0 IRQ_TYPE_NONE>, - <0 0xc5 0 IRQ_TYPE_NONE>, - <0 0xc6 0 IRQ_TYPE_NONE>, - <0 0xc7 0 IRQ_TYPE_NONE>, - <0 0xc8 0 IRQ_TYPE_NONE>, - <0 0xc9 0 IRQ_TYPE_NONE>, - <0 0xca 0 IRQ_TYPE_NONE>, - <0 0xcb 0 IRQ_TYPE_NONE>; + interrupt-controller; + #interrupt-cells = <2>; }; pon@800 { From patchwork Sun May 8 13:59:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 570732 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1986CC4321E for ; Sun, 8 May 2022 13:59:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233677AbiEHODj (ORCPT ); Sun, 8 May 2022 10:03:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39958 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233718AbiEHODg (ORCPT ); Sun, 8 May 2022 10:03:36 -0400 Received: from mail-ed1-x52b.google.com (mail-ed1-x52b.google.com [IPv6:2a00:1450:4864:20::52b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E0287DFBA for ; Sun, 8 May 2022 06:59:45 -0700 (PDT) Received: by mail-ed1-x52b.google.com with SMTP id a21so13529497edb.1 for ; Sun, 08 May 2022 06:59:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xCzqSaVgkigfovczvrR26PQosAlqdYSj2cgF8HeNqSw=; b=w6Arzao2UqIYuh3UFze5/E62F9WJsxirQ0QNVWDAi6xLONvtHzbQJvn2drnPVJj6W6 UuGm+Y/XAlU7VXOhJRH2G0uCr4oUrGqI5wZccuvW7Tirj5FX7u1wu1R3QTOlyrfLxPJt rxIeUSm48KEwLX4njqIEe8jjBVOX2FeajRhjIV1XcdAModpmmE1UtskKq7smBX66gBg/ XpGC921JykCasRWQSkGZYPBLf+sMg5zP+Lne9v1ZkT7FhIxWv6A8NPTvn9C6kpGLfmyn j1kHeG4MdpMmxLJvSo9MW+Px6Y/t5FRujVD8Y6jycxf+g+a3vj0O8kcsnfAfGRsZDYnw lGJg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xCzqSaVgkigfovczvrR26PQosAlqdYSj2cgF8HeNqSw=; b=S+44+Pw5ArarO5kx8Uuclh+XT8qbeWoX/B5cbw7EHq2E+9OOsrh/WHwjJpWmpaexap BtLND0GkJNA+0//7CQyqe1vVPEvCt8lXIXEg6XURriD69o0YLbwPzF56ht8g6xdA9VQQ ZVuVQ9LUMTgNenOeJ7fM7czNQrVhKZf+Xro/pOqzvrB7Z5HZRGMqREnjsPm6ZHOnPiy9 sOwvuSiwc5HehrhYvWHoMwkTx6nUd+8WkIC4s0w99Z8EKyjHBal9jSbuVjB7p/82MJxN FoOl4GtPR8c/R9M1bg6+3Xate1yic1R5BDSp3KX9OPlMnJbLZUQJXqcKv8IAqxB+SZCY B0QQ== X-Gm-Message-State: AOAM5311T7/Mwi/5Pp5i5m2G8zsVpmeptWHkKniGeZLvPb6qJ1Spoqe3 H976q5hF4WFTznkBK6mWSKJbOw== X-Google-Smtp-Source: ABdhPJxmiYnecxtNEGNXUDweujoI2ZZSy2gRZeRG/yN39SLC53d4+BLrPYYQj3i4leRZPXvd1pc6JQ== X-Received: by 2002:a05:6402:2214:b0:425:d6ed:de5d with SMTP id cq20-20020a056402221400b00425d6edde5dmr12614920edb.383.1652018384303; Sun, 08 May 2022 06:59:44 -0700 (PDT) Received: from localhost.localdomain (xdsl-188-155-176-92.adslplus.ch. [188.155.176.92]) by smtp.gmail.com with ESMTPSA id qz24-20020a170907681800b006f3ef214dc6sm4075524ejc.44.2022.05.08.06.59.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 May 2022 06:59:43 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Linus Walleij , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Luca Weiss , David Heidelberg , Konrad Dybcio , Krzysztof Kozlowski Subject: [PATCH 4/4] ARM: dts: qcom: add missing gpio-ranges in PMIC GPIOs Date: Sun, 8 May 2022 15:59:32 +0200 Message-Id: <20220508135932.132378-5-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220508135932.132378-1-krzysztof.kozlowski@linaro.org> References: <20220508135932.132378-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The new Qualcomm PMIC GPIO bindings require gpio-ranges property: qcom-sdx55-telit-fn980-tlb.dtb: gpio@c000: 'gpio-ranges' is a required property Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/qcom-pmx55.dtsi | 1 + arch/arm/boot/dts/qcom-pmx65.dtsi | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/qcom-pmx55.dtsi b/arch/arm/boot/dts/qcom-pmx55.dtsi index 6571b88d018a..9de7578a4c5f 100644 --- a/arch/arm/boot/dts/qcom-pmx55.dtsi +++ b/arch/arm/boot/dts/qcom-pmx55.dtsi @@ -69,6 +69,7 @@ pmx55_gpios: gpio@c000 { compatible = "qcom,pmx55-gpio", "qcom,spmi-gpio"; reg = <0xc000>; gpio-controller; + gpio-ranges = <&pmx55_gpios 0 0 11>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; diff --git a/arch/arm/boot/dts/qcom-pmx65.dtsi b/arch/arm/boot/dts/qcom-pmx65.dtsi index 8701396fe1f2..abf229a8b75a 100644 --- a/arch/arm/boot/dts/qcom-pmx65.dtsi +++ b/arch/arm/boot/dts/qcom-pmx65.dtsi @@ -24,6 +24,7 @@ pmx65_gpios: pinctrl@8800 { compatible = "qcom,pmx65-gpio", "qcom,spmi-gpio"; reg = <0x8800>; gpio-controller; + gpio-ranges = <&pmx65_gpios 0 0 16>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>;