From patchwork Mon May 16 13:47:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 573096 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3BD10C433EF for ; Mon, 16 May 2022 13:48:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243231AbiEPNsa (ORCPT ); Mon, 16 May 2022 09:48:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33184 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238921AbiEPNsU (ORCPT ); Mon, 16 May 2022 09:48:20 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.196]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E43583914C; Mon, 16 May 2022 06:48:18 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0Ma0RF-1oB9hD1rpf-00LkqK; Mon, 16 May 2022 15:47:56 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 01/24] ARM: dts: imx7-colibri: overhaul display/touch functionality Date: Mon, 16 May 2022 15:47:11 +0200 Message-Id: <20220516134734.493065-2-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220516134734.493065-1-marcel@ziswiler.com> References: <20220516134734.493065-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:8Vffgn0gvuo0Y2iGBzQL5HDk20a0zfzYqewWKVzBol1XfCOnMzz QMB3HzAal6c1om2qr6l4tDGq5F0Rdfhpshvob6sRQhB4TMuz6Tnmc9keBu+yhQGzHR7zLOR mP/tBX9Rc4dvIyd/W9pYEvXaWeAkiyZ7yv7+JPrx73T3baavgX7p8JSPXl3WGWO/S2pBAUd QhQy7UPoHLxvBg0owaVkw== X-UI-Out-Filterresults: notjunk:1;V03:K0:ht2Ul2ZWN+U=:AVMIffxrkRtxCL0p7rheJj eKZp5QMvvjkKnH6z+lyCjVocScWvD8ZWEtAR5gFsouz/14vFM1xHaTG8ML115Y56VDiky25wk +h8GMGYi6sf59cvA8LAKfTQZnoqTA/rmB1aMg6rwq1e/EuRXQv4Xr8DVXhjkicP9YWQYJxdKA LosVkfaVYWX0U7F+XglCHMvKIdEhgs1AMQVmwNHyUM8c5NLVLJRmOXsOqBYdWR5qOaEJncfU2 8eMSWSaEPe4J2yezFLPTXVNnNlyvjrUem016QxoSMjFQpOj43cr0pDVG+UHDlzCQQDsIxTCAS CabrGw5fwRPaPejbRvgOJLAPgOFfRf1wXgQq+E9K7OjIszCOYakIHJNbLgoEdkKtEi/g9Qgbi f5c7V4iij2Pn4GwE/5tVH37p4Ee5UcSImQVyGR7jPh6V+RCJWS4XQjuh7n9redqUCkJN4BgrC PNbF0fRy1aihxpPWnE77ID9m83sHmvI1xhOCyLB0GiD7HY0rB/y2GgilPn1NiKVtBlrYQwnzO NerCLH+BqQp/gMLSUDfACMkjHe9E9wI8IbilaJGscceiseWY6tWdFul2SDZ7HbyXioU2hTA5m EXfNppYkZt0BCaZeyAf7NsdhWev3JthBcDyaL6IEzSdprWhQYaWunFkmYU3d5RUZgd80Nm7Zh TCgr/y61eC7K94PPO5y9pl8LYPLdVON267MND8ICYM8XKUyablbq0UCBIejN1EgeBbCrgn1c+ zHNt1lkmICdcPtz7 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Rename display interface to match other modules to make it easier to use device tree overlays. The parallel RGB interface (lcdif) and all related stuff turn on in a device tree overlay. Keep them disabled in the main devicetree. As these subsystems are provided by module and not a part of boards, move their definitions into the module-level devicetree. Disable ad7879 touchscreen which turns on in a devic tree overlay. Remains it disabled in the main devicetree. Move Atmel MXT capacitive touch controller device tree nodes from carrier board to module level and add iomux pinctl groups for both the Capacitive Touch Adapter (using SODIMM 28/30) and the capacitive touch connector as found on later carrier boards (using SODIMM 106/107). Keep touchscreen and display nodes enabled for NAND based i.MX 7 modules, since device tree overlays are not yet supported. For the Colibri Evaluation Board keep the Capacitive Touch Adapter node disabled and PWM2, PWM3 enabled instead. For eMMC based modules keep nodes disabled to work in conjunction with device tree overlays. Add the iomuxc pinctrl group for the LVDS transceiver related signals to use it in a device tree overlay. While at it also alphabetically re=order them properties. Signed-off-by: Marcel Ziswiler --- (no changes since v1) arch/arm/boot/dts/imx7-colibri-aster.dtsi | 53 ------------ arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 66 +++----------- arch/arm/boot/dts/imx7-colibri.dtsi | 95 ++++++++++++++++++--- arch/arm/boot/dts/imx7d-colibri-aster.dts | 20 +++++ arch/arm/boot/dts/imx7d-colibri-eval-v3.dts | 32 +++++++ arch/arm/boot/dts/imx7s-colibri-aster.dts | 20 +++++ arch/arm/boot/dts/imx7s-colibri-eval-v3.dts | 32 +++++++ 7 files changed, 197 insertions(+), 121 deletions(-) diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi index b770fc937970..950b4e5f6cf4 100644 --- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi @@ -4,10 +4,6 @@ * */ - -#include -#include - / { chosen { stdout-path = "serial0:115200n8"; @@ -27,18 +23,6 @@ power { }; }; - panel: panel { - compatible = "edt,et057090dhu"; - backlight = <&bl>; - power-supply = <®_3v3>; - - port { - panel_in: endpoint { - remote-endpoint = <&lcdif_out>; - }; - }; - }; - reg_3v3: regulator-3v3 { compatible = "regulator-fixed"; regulator-name = "3.3V"; @@ -77,13 +61,6 @@ &adc2 { status = "disabled"; }; -&bl { - brightness-levels = <0 4 8 16 32 64 128 255>; - default-brightness-level = <6>; - power-supply = <®_3v3>; - status = "okay"; -}; - &fec1 { status = "okay"; }; @@ -91,17 +68,6 @@ &fec1 { &i2c4 { status = "okay"; - /* Microchip/Atmel maxtouch controller */ - touchscreen@4a { - compatible = "atmel,maxtouch"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpiotouch>; - reg = <0x4a>; - interrupt-parent = <&gpio2>; - interrupts = <15 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 107 */ - reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* SODIMM 106 */ - }; - /* M41T0M6 real time clock on carrier board */ rtc: rtc@68 { compatible = "st,m41t0"; @@ -109,25 +75,6 @@ rtc: rtc@68 { }; }; -&iomuxc { - pinctrl_gpiotouch: touchgpios { - fsl,pins = < - MX7D_PAD_EPDC_DATA15__GPIO2_IO15 0x74 - MX7D_PAD_EPDC_BDR0__GPIO2_IO28 0x14 - >; - }; -}; - -&lcdif { - status = "okay"; - - port { - lcdif_out: endpoint { - remote-endpoint = <&panel_in>; - }; - }; -}; - &pwm1 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index 3b9df8c82ae3..d6fa74222960 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -34,18 +34,6 @@ power { }; }; - panel: panel { - compatible = "edt,et057090dhu"; - backlight = <&bl>; - power-supply = <®_3v3>; - - port { - panel_in: endpoint { - remote-endpoint = <&lcdif_out>; - }; - }; - }; - reg_3v3: regulator-3v3 { compatible = "regulator-fixed"; regulator-name = "3.3V"; @@ -72,14 +60,6 @@ reg_usbh_vbus: regulator-usbh-vbus { }; }; -&bl { - brightness-levels = <0 4 8 16 32 64 128 255>; - default-brightness-level = <6>; - power-supply = <®_3v3>; - - status = "okay"; -}; - &adc1 { status = "okay"; }; @@ -88,6 +68,18 @@ &adc2 { status = "okay"; }; +/* + * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM, PWM, aka pwm2, pwm3. + * So if you enable following capacitive touch controller, disable pwm2/pwm3 first. + */ +&atmel_mxt_ts { + interrupt-parent = <&gpio1>; + interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28 / INT */ + pinctrl-0 = <&pinctrl_atmel_adapter>; + reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; /* SODIMM 30 / RST */ + status = "disabled"; +}; + &ecspi3 { status = "okay"; @@ -113,21 +105,6 @@ &fec1 { &i2c4 { status = "okay"; - /* - * Touchscreen is using SODIMM 28/30, also used for PWM, PWM, - * aka pwm2, pwm3. so if you enable touchscreen, disable the pwms - */ - touchscreen@4a { - compatible = "atmel,maxtouch"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpiotouch>; - reg = <0x4a>; - interrupt-parent = <&gpio1>; - interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28 */ - reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; /* SODIMM 30 */ - status = "disabled"; - }; - /* M41T0M6 real time clock on carrier board */ rtc: rtc@68 { compatible = "st,m41t0"; @@ -135,16 +112,6 @@ rtc: rtc@68 { }; }; -&lcdif { - status = "okay"; - - port { - lcdif_out: endpoint { - remote-endpoint = <&panel_in>; - }; - }; -}; - &pwm1 { status = "okay"; }; @@ -183,12 +150,3 @@ &usdhc1 { vmmc-supply = <®_3v3>; status = "okay"; }; - -&iomuxc { - pinctrl_gpiotouch: touchgpios { - fsl,pins = < - MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x74 - MX7D_PAD_GPIO1_IO10__GPIO1_IO10 0x14 - >; - }; -}; diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index f1c60b0cb143..e20b0977f38f 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -3,13 +3,32 @@ * Copyright 2016-2020 Toradex */ +#include + / { - bl: backlight { + backlight: backlight { + brightness-levels = <0 45 63 88 119 158 203 255>; compatible = "pwm-backlight"; + default-brightness-level = <4>; + enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_bl_on>; - pwms = <&pwm1 0 5000000 0>; - enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; + power-supply = <®_module_3v3>; + pwms = <&pwm1 0 6666667 PWM_POLARITY_INVERTED>; + status = "disabled"; + }; + + panel_dpi: panel-dpi { + backlight = <&backlight>; + compatible = "edt,et057090dhu"; + power-supply = <®_3v3>; + status = "disabled"; + + port { + lcd_panel_in: endpoint { + remote-endpoint = <&lcdif_out>; + }; + }; }; reg_module_3v3: regulator-module-3v3 { @@ -301,18 +320,19 @@ codec: sgtl5000@a { VDDD-supply = <®_DCDC3>; }; - ad7879@2c { + ad7879_ts: touchscreen@2c { + adi,acquisition-time = /bits/ 8 <1>; + adi,averaging = /bits/ 8 <1>; + adi,conversion-interval = /bits/ 8 <255>; + adi,first-conversion-delay = /bits/ 8 <3>; + adi,median-filter-size = /bits/ 8 <2>; + adi,resistance-plate-x = <120>; compatible = "adi,ad7879-1"; - reg = <0x2c>; interrupt-parent = <&gpio1>; interrupts = <13 IRQ_TYPE_EDGE_FALLING>; + reg = <0x2c>; touchscreen-max-pressure = <4096>; - adi,resistance-plate-x = <120>; - adi,first-conversion-delay = /bits/ 8 <3>; - adi,acquisition-time = /bits/ 8 <1>; - adi,median-filter-size = /bits/ 8 <2>; - adi,averaging = /bits/ 8 <1>; - adi,conversion-interval = /bits/ 8 <255>; + status = "disabled"; }; pmic@33 { @@ -392,12 +412,32 @@ &i2c4 { pinctrl-1 = <&pinctrl_i2c4_recovery>; scl-gpios = <&gpio7 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; sda-gpios = <&gpio7 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status = "disabled"; + + /* Atmel maxtouch controller */ + atmel_mxt_ts: touchscreen@4a { + compatible = "atmel,maxtouch"; + interrupt-parent = <&gpio2>; + interrupts = <15 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 107 / INT */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_atmel_connector>; + reg = <0x4a>; + reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* SODIMM 106 / RST */ + status = "disabled"; + }; }; &lcdif { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lcdif_dat &pinctrl_lcdif_ctrl>; + status = "disabled"; + + port { + lcdif_out: endpoint { + remote-endpoint = <&lcd_panel_in>; + }; + }; }; &pwm1 { @@ -486,7 +526,27 @@ &usdhc3 { &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 &pinctrl_gpio4 - &pinctrl_gpio7 &pinctrl_usbc_det>; + &pinctrl_usbc_det>; + + /* + * Atmel MXT touchsceen + Capacitive Touch Adapter + * NOTE: This pin group conflicts with pin groups pinctrl_pwm2/pinctrl_pwm3. + * Don't use them simultaneously. + */ + pinctrl_atmel_adapter: atmelconnectorgrp { + fsl,pins = < + MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x74 /* SODIMM 28 / INT */ + MX7D_PAD_GPIO1_IO10__GPIO1_IO10 0x14 /* SODIMM 30 / RST */ + >; + }; + + /* Atmel MXT touchsceen + boards with built-in Capacitive Touch Connector */ + pinctrl_atmel_connector: atmeladaptergrp { + fsl,pins = < + MX7D_PAD_EPDC_BDR0__GPIO2_IO28 0x14 /* SODIMM 106 / RST */ + MX7D_PAD_EPDC_DATA15__GPIO2_IO15 0x74 /* SODIMM 107 / INT */ + >; + }; pinctrl_gpio1: gpio1-grp { fsl,pins = < @@ -494,8 +554,6 @@ MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 0x14 /* SODIMM 77 */ MX7D_PAD_EPDC_DATA09__GPIO2_IO9 0x14 /* SODIMM 89 */ MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x74 /* SODIMM 91 */ MX7D_PAD_LCD_RESET__GPIO3_IO4 0x14 /* SODIMM 93 */ - MX7D_PAD_EPDC_DATA13__GPIO2_IO13 0x14 /* SODIMM 95 */ - MX7D_PAD_ENET1_RGMII_TXC__GPIO7_IO11 0x14 /* SODIMM 99 */ MX7D_PAD_EPDC_DATA10__GPIO2_IO10 0x74 /* SODIMM 105 */ MX7D_PAD_EPDC_DATA00__GPIO2_IO0 0x14 /* SODIMM 111 */ MX7D_PAD_EPDC_DATA01__GPIO2_IO1 0x14 /* SODIMM 113 */ @@ -729,6 +787,15 @@ MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79 >; }; + pinctrl_lvds_transceiver: lvdstx { + fsl,pins = < + MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 0x14 /* SODIMM 63 */ + MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x74 /* SODIMM 55 */ + MX7D_PAD_ENET1_RGMII_TXC__GPIO7_IO11 0x14 /* SODIMM 99 */ + MX7D_PAD_EPDC_DATA13__GPIO2_IO13 0x14 /* SODIMM 95 */ + >; + }; + pinctrl_pwm1: pwm1-grp { fsl,pins = < MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79 diff --git a/arch/arm/boot/dts/imx7d-colibri-aster.dts b/arch/arm/boot/dts/imx7d-colibri-aster.dts index f3f0537d5a37..ce0e6bb7db37 100644 --- a/arch/arm/boot/dts/imx7d-colibri-aster.dts +++ b/arch/arm/boot/dts/imx7d-colibri-aster.dts @@ -14,6 +14,26 @@ / { "fsl,imx7d"; }; +&ad7879_ts { + status = "okay"; +}; + +&atmel_mxt_ts { + status = "okay"; +}; + +&backlight { + status = "okay"; +}; + +&lcdif { + status = "okay"; +}; + +&panel_dpi { + status = "okay"; +}; + &usbotg2 { vbus-supply = <®_usbh_vbus>; status = "okay"; diff --git a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts index 87b132bcd272..c610c50c003a 100644 --- a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts @@ -13,6 +13,38 @@ / { "fsl,imx7d"; }; +&ad7879_ts { + status = "okay"; +}; + +/* + * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM, PWM, aka pwm2, pwm3. + * So if you enable following capacitive touch controller, disable pwm2/pwm3 first. + */ +&atmel_mxt_ts { + status = "disabled"; +}; + +&backlight { + status = "okay"; +}; + +&lcdif { + status = "okay"; +}; + +&panel_dpi { + status = "okay"; +}; + +&pwm2 { + status = "okay"; +}; + +&pwm3 { + status = "okay"; +}; + &usbotg2 { vbus-supply = <®_usbh_vbus>; status = "okay"; diff --git a/arch/arm/boot/dts/imx7s-colibri-aster.dts b/arch/arm/boot/dts/imx7s-colibri-aster.dts index fca4e0a95c1b..87f9e0e079a8 100644 --- a/arch/arm/boot/dts/imx7s-colibri-aster.dts +++ b/arch/arm/boot/dts/imx7s-colibri-aster.dts @@ -13,3 +13,23 @@ / { compatible = "toradex,colibri-imx7s-aster", "toradex,colibri-imx7s", "fsl,imx7s"; }; + +&ad7879_ts { + status = "okay"; +}; + +&atmel_mxt_ts { + status = "okay"; +}; + +&backlight { + status = "okay"; +}; + +&lcdif { + status = "okay"; +}; + +&panel_dpi { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts b/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts index aa70d3f2e2e2..81956c16b95b 100644 --- a/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts @@ -12,3 +12,35 @@ / { compatible = "toradex,colibri-imx7s-eval-v3", "toradex,colibri-imx7s", "fsl,imx7s"; }; + +&ad7879_ts { + status = "okay"; +}; + +/* + * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM, PWM, aka pwm2, pwm3. + * So if you enable following capacitive touch controller, disable pwm2/pwm3 first. + */ +&atmel_mxt_ts { + status = "disabled"; +}; + +&backlight { + status = "okay"; +}; + +&lcdif { + status = "okay"; +}; + +&panel_dpi { + status = "okay"; +}; + +&pwm2 { + status = "okay"; +}; + +&pwm3 { + status = "okay"; +}; From patchwork Mon May 16 13:47:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 573097 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 269D3C433F5 for ; Mon, 16 May 2022 13:48:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239892AbiEPNsZ (ORCPT ); Mon, 16 May 2022 09:48:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33116 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239914AbiEPNsU (ORCPT ); Mon, 16 May 2022 09:48:20 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 09D0139151; Mon, 16 May 2022 06:48:17 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0LlDCS-1nI54g2uZy-00b4hZ; Mon, 16 May 2022 15:48:01 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 02/24] ARM: dts: imx7-colibri: add mdio phy node Date: Mon, 16 May 2022 15:47:12 +0200 Message-Id: <20220516134734.493065-3-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220516134734.493065-1-marcel@ziswiler.com> References: <20220516134734.493065-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:EiKg6GdRQXCI7+hpaiYbx3hOVFUyGIVPqTcXaERUXQ+xtiShetm DXtcaLGwYB8YcFjYLlFgKLC3CFKQ2ykja0a0hv4eu1mdhRNU7g5RoFeYuxoCjD4N8h8dxKN GjjrqNItnSsvS1t+Oenxgu+iy6d9PP0jnXm+ijLcCfqiFdiPwX/5dkXkbCs/CSjHTKAwKTh H5vXgiwtvmJdYeveJ+/HA== X-UI-Out-Filterresults: notjunk:1;V03:K0:ykcNnNnrMaM=:zNiM0tdeGuQynexErFVSWs +HoTlAhzM+vMPPT7ECRy+MMZ92doFs8SHFJsk2jaOg4rhM9XOGPZZ1hiZpeCq0yzsSDczqcSn Jj8hGGryhH/JAnrCte/DmjBg+phHQmZT1nC2n/Bsdrbz7LNdATQoWb6pmAmkf1m///6Bxketh KXJ//nhk7BcnFE7dlhMTxdfq4478Rtr38sipuzQb0rLytAUDqPr5KnIzngdXas9mReHbdUsKs 3JPFrp9xlt7+SsyC6uwhyLzSueVmvatmGYiuSz2FVkNu++KzoyEkiT/1kzukqQiMy9omPPmWe wwZ7DICVP+jXyc6J7LX8sUzL8ROqutpke2dnkNErZ9kyLGJdxwcqswvA4m4x3Ev6kmDAw+z2L Mwz3iNw2SA5SPX2qxVnGZltH3rBwQXfHv1EIqzVsoy1v3Y3I+ZWA7qAsluQBtgtqosW3QjEIB J4ueNeNeNMPLXgie5Q/xEL5z5QmoB0YUmcQF6zHi/6cLfQVMJX0kOWvm0hWar/dvHC3i15UbO EQP2ml+KPuHBfrkRDPuQixbf42jUMwS/MNTlemg8pm4urfbE9l+kL2nk+z1PLFHIzxaQbL0AH G0QSOQDljBwyAESvEZm/WuW5M/XIA4hBh9cCsgYqkPkzLenq98irLYd6YeUc7x5WDYUqhMrq2 arSTs4iPogxglWECtG4ydEiFppP6cb9ahA707Vs/CYOqnXRsyv/QTbf5TxjeNsuhiTCU= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Add the MDIO bus with the respective PHY to allow for making changes to that easier. While at it also alphabetically re-order properties and improve indentation. Signed-off-by: Marcel Ziswiler --- (no changes since v1) arch/arm/boot/dts/imx7-colibri.dtsi | 35 ++++++++++++++++++++--------- 1 file changed, 24 insertions(+), 11 deletions(-) diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index e20b0977f38f..074ebb0f8001 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -83,21 +83,34 @@ &ecspi3 { }; &fec1 { - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&pinctrl_enet1>; - pinctrl-1 = <&pinctrl_enet1_sleep>; - clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>, - <&clks IMX7D_ENET_AXI_ROOT_CLK>, - <&clks IMX7D_ENET1_TIME_ROOT_CLK>, - <&clks IMX7D_PLL_ENET_MAIN_50M_CLK>; - clock-names = "ipg", "ahb", "ptp", "enet_clk_ref"; - assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>, - <&clks IMX7D_ENET1_TIME_ROOT_CLK>; assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; assigned-clock-rates = <0>, <100000000>; + assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>, + <&clks IMX7D_ENET1_TIME_ROOT_CLK>; + clock-names = "ipg", "ahb", "ptp", "enet_clk_ref"; + clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>, + <&clks IMX7D_ENET_AXI_ROOT_CLK>, + <&clks IMX7D_ENET1_TIME_ROOT_CLK>, + <&clks IMX7D_PLL_ENET_MAIN_50M_CLK>; + fsl,magic-packet; + phy-handle = <ðphy0>; phy-mode = "rmii"; phy-supply = <®_LDO1>; - fsl,magic-packet; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&pinctrl_enet1>; + pinctrl-1 = <&pinctrl_enet1_sleep>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + max-speed = <100>; + micrel,led-mode = <0>; + reg = <0>; + }; + }; }; &flexcan1 { From patchwork Mon May 16 13:47:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 573095 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 94CC2C433F5 for ; Mon, 16 May 2022 13:48:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243933AbiEPNsk (ORCPT ); Mon, 16 May 2022 09:48:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33548 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241782AbiEPNsY (ORCPT ); Mon, 16 May 2022 09:48:24 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3883B39157; Mon, 16 May 2022 06:48:19 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MVw6g-1oNYIr1L0i-00X2hX; Mon, 16 May 2022 15:48:09 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Philippe Schenker , Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 04/24] ARM: dts: imx7-colibri: add usb dual-role switching using extcon Date: Mon, 16 May 2022 15:47:14 +0200 Message-Id: <20220516134734.493065-5-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220516134734.493065-1-marcel@ziswiler.com> References: <20220516134734.493065-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:ZIvTcuCtSM5HSzwuVxCC2PUV43++zzjqATon98hwIfegN9JAj5u hUq7mlURCpsPXeFo1z+mictulBbxvgAV4sThOo9MjrUFgQeTdxsIJXH4HU7m9iOUUrLF3iV hgm9pW1bUXeL/GbsqP5FnEblzSFK9Z5V4wvq3hLTMcAwSwe8k5fMmaaWSBUyH+Ne+Yp3bAZ xhYYytZzSREs1U3Nna50w== X-UI-Out-Filterresults: notjunk:1;V03:K0:7gprov4bjz0=:7syDZPKY2GnRYE1Bf/Vgfz 3xw3sqjFon0irniMHDB56sDmNmtkvVFU+y+FGbA0J37yUmsxqZ3QOg+ZbAtmDYm6iEptBgmMO qPLYWk+u8dGTleDp2AGmMf4UCstkD5lht5CHvSTo5j5JgkbbjMTEFQj3NOTTcjEKvJHUmh0Rj EaNQDrxzJvrZhHto65OauSbRNLgBiT1qWUw630V37jY8u7S16qH/PMebL+LGFbLqub8dIuXTL F0heOJS642eHzNHwapNMkxmcAU9L2t8qx/wGNumpvAXLRhnyviomsPjzR/QAslOIWZyqLKQa3 Xqvs7ol4+a7zUYQpaWkPyHl7rdEqjvYBSeBfN/ReJJL9Ia6N7JWWBKFNAdyj6p7krr251/ccK 3utDmqQSKPaQ4/nDuFk8jMR1I4D0GB1K7aBnSsyBzlTePWS80WV1IZ4CHlRx0tHUPHdjFbTCg Zm9TDwAPbouhbamvvrVwpFp6p8hNw7HkauoHMobdPcRsfpjbnBXUyHAgW648JteU1ng6waR5k n7R/TEVMQe7HRgydQN8zwlo0T33gQzRYgirXY5iw0SP4s39eZqWZMdE5pgZHFgjXLX00aP6uS EdpmpHsHkhD43JlGhvXrUNwiHffSehNdM5XNNA6sUOT7+HotijeRDjbu3PDp8w7rmc1GxA6SJ a7xey/allrgzBmGaWQTfjR9vcHJ7PWEQuihamRnOjK9Un+1i04M9bof7z7M20OLQgrDA= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Philippe Schenker Add USB dual-role switching using extcon. Signed-off-by: Philippe Schenker Signed-off-by: Marcel Ziswiler --- (no changes since v1) arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 8 ++++++++ arch/arm/boot/dts/imx7-colibri.dtsi | 5 ++--- 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index d6fa74222960..17ad9065646d 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -20,6 +20,13 @@ clk16m: clk16m { clock-frequency = <16000000>; }; + extcon_usbc_det: usbc-det { + compatible = "linux,extcon-usb-gpio"; + id-gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbc_det>; + }; + gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; @@ -141,6 +148,7 @@ &uart3 { }; &usbotg1 { + extcon = <0>, <&extcon_usbc_det>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index 3c1cfd766645..6df82a67953a 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -512,7 +512,7 @@ &uart3 { }; &usbotg1 { - dr_mode = "host"; + dr_mode = "otg"; }; &usdhc1 { @@ -540,8 +540,7 @@ &usdhc3 { &iomuxc { pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 &pinctrl_gpio4 - &pinctrl_usbc_det>; + pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 &pinctrl_gpio4>; /* * Atmel MXT touchsceen + Capacitive Touch Adapter From patchwork Mon May 16 13:47:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 573094 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A2AADC433FE for ; Mon, 16 May 2022 13:48:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241665AbiEPNso (ORCPT ); Mon, 16 May 2022 09:48:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34702 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243858AbiEPNsi (ORCPT ); Mon, 16 May 2022 09:48:38 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.196]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 957F63917D; Mon, 16 May 2022 06:48:27 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0Lb44F-1nSr6m1rWT-00kk0I; Mon, 16 May 2022 15:48:17 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Oleksandr Suvorov , Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 06/24] ARM: dts: imx7-colibri: improve wake-up with gpio key Date: Mon, 16 May 2022 15:47:16 +0200 Message-Id: <20220516134734.493065-7-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220516134734.493065-1-marcel@ziswiler.com> References: <20220516134734.493065-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:/ponqe1H3vjWt2YFBxn3029qEl7K0GNOHiM0G3kQYKbz8vORuas vNCrh8JPHZ/po0uB1H2UhjIayfrRD8thP/SvG4HQYeO3NPIqgL6guVInHsIR7QM9A93A+EH tjOzBOips5ct+XLosB9wBd3b/DO+uzPETN+oGZ1otJLAqtRjfIxrW5drSW+iYmm8Nj98ca9 Jg7Y/QlMhMcJYmPheW90g== X-UI-Out-Filterresults: notjunk:1;V03:K0:W6RXeQ9k9M8=:s2u3Y6s22Dh8v2+pj97wU9 b8RT5XGKR0yDuLGGAtBaTsqicUwhl5fbYFkNvZSmegSnqF3eq5wclmhvhicuDYUhhEefnPbg8 9LJw0d9tPFjcTOcHWD/bK/2jGV62Xl0Km24m3++L/WVgPS2BpextPxiB0EZCKRnhyuoM1z1xP VgH5A3MsaSZuJ68G7P6MN/BlsSAKJdGPdxaONcaH2NabbomQN1ZFvTuz5gqtuvsBA4HDZSuP9 nvzpSFeShokPTvB+9BA1NqsZ67rDayvWtVfx1R76+lo46WA/JMcVPK67t231GDkw695llMKua tDVdd8n/vhSB9oAvyHu+SqzduxkzMyJlMaypnNwV6V7G3ZbyU5He0x+WEQatLTuGy2lAdhxUH anLac2pj4M30BS89CO7zJhasWNjH1OlB2KK0qmrzLqCfrgcVRJ8qq3TOvn0sl1Qat4Hl+7x2X R/NsFVMcaQIPNyV0ofd56ZH28oJRnbtfLle3CZleBnO+dhdjtcZz8Nv3d5y2mNHhK6L4MH32w iKZO+fpyBoJLwahzmdUrnLC573TwhA+0/0MeyEN0fyFntbEB9dChUMfVckct9W5inc0Cq0yBs u7J0EwjiVvY4aROIusVm0/bnDdBY3geM/UG7L5WNL27ZTibs6dknuVXlzxLqqjG5OJb6Cc4BD wRMJPa+JpotSsCPeN2C2Tb+jE6OJwJKKhUiZxWqDVpdm2VGqdlQPHnnhgXLzk1z+M87/vAVZK K7DkVbvrPmyeuJvx Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Oleksandr Suvorov The pin GPIO1_IO01 externally pulls down, it is required to sequentially connect this pin (signal WAKE_MICO#) to +3v3 and then disconnect it to trigger a wakeup interrupt. Adding the flag GPIO_PULL_DOWN allows the system to be woken up just connecting the pin GPIO1_IO01 to +3v3. Signed-off-by: Oleksandr Suvorov Signed-off-by: Marcel Ziswiler --- (no changes since v1) arch/arm/boot/dts/imx7-colibri-aster.dtsi | 2 +- arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi index bfadb3a3124a..9148c54403f3 100644 --- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi @@ -15,7 +15,7 @@ gpio-keys { power { label = "Wake-Up"; - gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; + gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; linux,code = ; debounce-interval = <10>; wakeup-source; diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index 074c96f09191..4a7e593e9ac6 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -34,7 +34,7 @@ gpio-keys { power { label = "Wake-Up"; - gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; + gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; linux,code = ; debounce-interval = <10>; wakeup-source; From patchwork Mon May 16 13:47:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 573093 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EF05FC433EF for ; Mon, 16 May 2022 13:49:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243952AbiEPNtk (ORCPT ); Mon, 16 May 2022 09:49:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33548 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243953AbiEPNtD (ORCPT ); Mon, 16 May 2022 09:49:03 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 036153A198; Mon, 16 May 2022 06:48:36 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0M5ukJ-1nfw1Y1Kpt-00xosc; Mon, 16 May 2022 15:48:25 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Max Krummenacher , Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 08/24] ARM: dts: imx7-colibri: add ethernet aliases Date: Mon, 16 May 2022 15:47:18 +0200 Message-Id: <20220516134734.493065-9-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220516134734.493065-1-marcel@ziswiler.com> References: <20220516134734.493065-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:06s0GLfGsN4wSHAFVUljIbyxlOAiw6HaWWbYqR+39cEKSNe34Be gZcUEh62acuDbWmkKiW4qxbP9+YRWf2BNVykJksEFp/gWEJ+NCEUtoJOuJb1fwgXKCM+Dwg 3LWI1VtEcnCnHS7MTf4gmJV4qsDYD+wwSQrmeM/hIKpqewWTnILOSieRm3AWpDZz9Ec+RfK eIPrN1+9wwhwN9umlnnag== X-UI-Out-Filterresults: notjunk:1;V03:K0:kas3Xe1GRJ0=:zBPXG2E4kc1dWsy5SN+38P zLSqfi3h6mFDcFq1+nleUcCbmd4fLTJI7/w/yaQaJ3jsib3r67ojN0mUWiugAdEXNMF0kGPQD JveF0BW1DOwZRE13dQ/PQ4z4+ps8q1YVJoX2+YZwspKlpBwe9bj77ZXxXzV0BV0zjpCiA5h9E GMP40zFt0TWxOhU0Z8FFzYTZCKd4K/ozDGZg+Y2RTcP4UkvrAC8m9MJp6vzCY8A1Rp1lXtRmB sOEHMDQHfj4K4yQ8ST/B36tpUymercbdsgIDPghqnbaNjGUbDBYjdei7rqddA08tgo53lEBgo l1ae+XOUYFDPfVDuHyt/BCepp+SBTazk6zUd4NxwMMH6meD51Q5ALVXkf7KrOM1kunAON+oL3 Ckv6/OLXDjMrakeja/Vv6p7mwIZy3HvHiXPUFXz1WYujliVvBm0HqWtnGtKvG+WkHtDdvkFkA 3ioqPuCO54XKtuI1/2/neE2ARa6FNht3/iPw5IoRHQupWANObB3rO3EWQmOnVbsKLo1v9v7Qm eq9BVTkTY5HYfFEaAFMdKOGUuuw4ssyuopQ2HcCKltRAQu8u5K8THyAY21HeYcY74pWVXlKlt Q44VzYUn5o4MRs4J48YPYlK1nfv2KZ1a88kS03ccb+SL+TVGei7Dlfcf1m8Q7J8fJsUqZEQM4 l/W4q7rTYWGCvx2vDtWnvd3uVnQ8DyZ8sx/TcqU2eSJebqksNZNLgue/lXJ7qPsLvDzHOUX1U KsqtH166pS7MP8Kj Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Max Krummenacher Add Ethernet aliases which is required to properly pass MAC address from bootloader. Signed-off-by: Max Krummenacher Signed-off-by: Marcel Ziswiler --- (no changes since v1) arch/arm/boot/dts/imx7d-colibri-emmc.dtsi | 6 ++++++ arch/arm/boot/dts/imx7d-colibri.dtsi | 6 ++++++ 2 files changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi index 198e08409d59..e77f0b26b6fb 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi +++ b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi @@ -7,6 +7,12 @@ #include "imx7-colibri.dtsi" / { + aliases { + /* Required to properly pass MAC addresses from bootloader. */ + ethernet0 = &fec1; + ethernet1 = &fec2; + }; + memory@80000000 { device_type = "memory"; reg = <0x80000000 0x40000000>; diff --git a/arch/arm/boot/dts/imx7d-colibri.dtsi b/arch/arm/boot/dts/imx7d-colibri.dtsi index 90d25c604de2..48993abacae4 100644 --- a/arch/arm/boot/dts/imx7d-colibri.dtsi +++ b/arch/arm/boot/dts/imx7d-colibri.dtsi @@ -7,6 +7,12 @@ #include "imx7-colibri.dtsi" / { + aliases { + /* Required to properly pass MAC addresses from bootloader. */ + ethernet0 = &fec1; + ethernet1 = &fec2; + }; + memory@80000000 { device_type = "memory"; reg = <0x80000000 0x20000000>; From patchwork Mon May 16 13:47:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 573092 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6DFEFC433EF for ; Mon, 16 May 2022 13:49:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243915AbiEPNtu (ORCPT ); Mon, 16 May 2022 09:49:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36836 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243906AbiEPNtD (ORCPT ); Mon, 16 May 2022 09:49:03 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4B89539164; Mon, 16 May 2022 06:48:39 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MC3mA-1nzQlx06Ou-008vD9; Mon, 16 May 2022 15:48:29 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 09/24] ARM: dts: imx7-colibri: move regulators Date: Mon, 16 May 2022 15:47:19 +0200 Message-Id: <20220516134734.493065-10-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220516134734.493065-1-marcel@ziswiler.com> References: <20220516134734.493065-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:lBw1IeizW6AgwCUPS6nx9JlnKp3vgP7F/P4cN+FnSAtAoUHeJuZ CwLG1uAoFss21ZmQw1+i5lI/+KnDGnvASst1x+HI8SwrwuisO73VbrkhzuSWjf7/6utGACw PcoXzTa19wytXrDY6Rx7zZjwOWmAeyWNczDsiKzEpnvif4rLepwrY/NDz49SFaojMalS9w3 Q+MPITw09LmYruXON2FOA== X-UI-Out-Filterresults: notjunk:1;V03:K0:bybzdPiEJmM=:xZKOhaMXgJaZwdgTHspzpG lT5EV996CezuugJC4ekcSZ991Zvgz+ZlGxjW8VEpDuUVrsc2S0zJajDy4jgIvWlQKbIYYMiCr yCX6OhwxxD/YxRiNN81GWcPEYioIBfOlCaUvMa1+DWLNiNsqFxHbbjPTvPcYywliS0SC59N+7 tVXyTAzQn3YPc3iFNM3r+LBLaY9rebV0GqMwGbDhtjTmMz5PTXVZ4UNvtuNQ79g1eC2q5Exft pkW/mwIHRJw99R5xs4T25x7pKQjFOAp3ZVu9kO3Z4OcMiXFl6WuS4lX/7LJc1tw4uLAErEbzT vmZrJCVIqh8ZWHuAHgDneoY2058H8yNS41NE6aC/BE91G0apkIoSC6thZPUH/Q4mSXI1/mI0l LfVkinY9yPQreeIR43nMdGGVdsOSC7VHE+QkP7s7yO7eRukNDcTr88EO/TltdkEek3UwI/INz CiCum+ynFe9DJOwaiQ4UMnPs1SjbRbCJ6gKlLnLypL4eXs9DE3a+gSrieozAFmtVfvBXEPB3l RB2aK/QG1mN9M/5UGROg2Rwo3VpH3S+w5nmQR+MtXu4jsjBiMvF2qgLjXYr0wLmDYu/aXd+Dj 4wqQVtx/QdCRQX1AvvfoO9KBS/OUZX8NO74nfeGEvZYQ1CjEVBuxm1FE0AUkAQ6pEoo7xylKk 3EahrCzJa27Tvk7UAJgXQ9AVBCnoCVEc3C51nurPkB9G0jbsC5wRYdU/6/aG5HxLl/MXpKwyK e4LVXgTaQ9SxvhaQ Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Move regulators to module-level device tree given they are standard Colibri functionalities. Signed-off-by: Marcel Ziswiler --- (no changes since v1) arch/arm/boot/dts/imx7-colibri-aster.dtsi | 27 ------------- arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 25 ------------ arch/arm/boot/dts/imx7-colibri.dtsi | 39 ++++++++++++++++--- arch/arm/boot/dts/imx7d-colibri-aster.dts | 1 - .../arm/boot/dts/imx7d-colibri-emmc-aster.dts | 1 - .../boot/dts/imx7d-colibri-emmc-eval-v3.dts | 1 - arch/arm/boot/dts/imx7d-colibri-emmc.dtsi | 1 + arch/arm/boot/dts/imx7d-colibri-eval-v3.dts | 1 - arch/arm/boot/dts/imx7d-colibri.dtsi | 1 + 9 files changed, 35 insertions(+), 62 deletions(-) diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi index c12de1861c05..440f98dc323d 100644 --- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi @@ -3,33 +3,6 @@ * Copyright 2017-2022 Toradex */ -/ { - reg_3v3: regulator-3v3 { - compatible = "regulator-fixed"; - regulator-name = "3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - reg_5v0: regulator-5v0 { - compatible = "regulator-fixed"; - regulator-name = "5V"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - reg_usbh_vbus: regulator-usbh-vbus { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbh_reg>; - regulator-name = "VCC_USB[1-4]"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio4 7 GPIO_ACTIVE_LOW>; - vin-supply = <®_5v0>; - }; -}; - &adc1 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index 2e6678f81af6..33a9cbbca0d2 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -10,31 +10,6 @@ clk16m: clk16m { #clock-cells = <0>; clock-frequency = <16000000>; }; - - reg_3v3: regulator-3v3 { - compatible = "regulator-fixed"; - regulator-name = "3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - reg_5v0: regulator-5v0 { - compatible = "regulator-fixed"; - regulator-name = "5V"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - reg_usbh_vbus: regulator-usbh-vbus { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbh_reg>; - regulator-name = "VCC_USB[1-4]"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio4 7 GPIO_ACTIVE_LOW>; - vin-supply = <®_5v0>; - }; }; &adc1 { diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index c5a58949d664..329638985db6 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -62,20 +62,47 @@ lcd_panel_in: endpoint { }; }; - reg_module_3v3: regulator-module-3v3 { + reg_3v3: regulator-3v3 { compatible = "regulator-fixed"; - regulator-name = "+V3.3"; - regulator-min-microvolt = <3300000>; + regulator-always-on; regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "3.3V"; + }; + + reg_5v0: regulator-5v0 { + compatible = "regulator-fixed"; regulator-always-on; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "5V"; }; - reg_module_3v3_avdd: regulator-module-3v3-avdd { + reg_module_3v3: regulator-module-3v3 { compatible = "regulator-fixed"; - regulator-name = "+V3.3_AVDD_AUDIO"; - regulator-min-microvolt = <3300000>; + regulator-always-on; regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "+V3.3"; + }; + + reg_module_3v3_avdd: regulator-module-3v3-avdd { + compatible = "regulator-fixed"; regulator-always-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "+V3.3_AVDD_AUDIO"; + }; + + reg_usbh_vbus: regulator-usbh-vbus { + compatible = "regulator-fixed"; + gpio = <&gpio4 7 GPIO_ACTIVE_LOW>; /* SODIMM 129 / USBH_PEN */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh_reg>; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "VCC_USB[1-4]"; + vin-supply = <®_5v0>; }; sound { diff --git a/arch/arm/boot/dts/imx7d-colibri-aster.dts b/arch/arm/boot/dts/imx7d-colibri-aster.dts index 2ed1823c4805..cfd75e3424fa 100644 --- a/arch/arm/boot/dts/imx7d-colibri-aster.dts +++ b/arch/arm/boot/dts/imx7d-colibri-aster.dts @@ -36,6 +36,5 @@ &panel_dpi { }; &usbotg2 { - vbus-supply = <®_usbh_vbus>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts index 33e1034b75a4..7b4451699478 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts +++ b/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts @@ -17,6 +17,5 @@ / { }; &usbotg2 { - vbus-supply = <®_usbh_vbus>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts index 25d8d4583289..3e84018392ee 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts +++ b/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts @@ -16,6 +16,5 @@ / { }; &usbotg2 { - vbus-supply = <®_usbh_vbus>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi index e77f0b26b6fb..45b12b0d8710 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi +++ b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi @@ -47,6 +47,7 @@ &gpio6 { &usbotg2 { dr_mode = "host"; + vbus-supply = <®_usbh_vbus>; }; &usdhc3 { diff --git a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts index 51561388fac5..7aabe5691459 100644 --- a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts @@ -47,6 +47,5 @@ &pwm3 { }; &usbotg2 { - vbus-supply = <®_usbh_vbus>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri.dtsi b/arch/arm/boot/dts/imx7d-colibri.dtsi index 48993abacae4..d1469aa8b025 100644 --- a/arch/arm/boot/dts/imx7d-colibri.dtsi +++ b/arch/arm/boot/dts/imx7d-colibri.dtsi @@ -29,4 +29,5 @@ &gpmi { &usbotg2 { dr_mode = "host"; + vbus-supply = <®_usbh_vbus>; }; From patchwork Mon May 16 13:47:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 573091 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 22A3FC433F5 for ; Mon, 16 May 2022 13:50:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244109AbiEPNuE (ORCPT ); Mon, 16 May 2022 09:50:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33548 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244042AbiEPNtj (ORCPT ); Mon, 16 May 2022 09:49:39 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 383EC3AA53; Mon, 16 May 2022 06:48:50 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0Ma0RF-1oB9i331MF-00LkqK; Mon, 16 May 2022 15:48:41 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 12/24] ARM: dts: imx7-colibri: move rtc node Date: Mon, 16 May 2022 15:47:22 +0200 Message-Id: <20220516134734.493065-13-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220516134734.493065-1-marcel@ziswiler.com> References: <20220516134734.493065-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:X0WEQjkhmnZwbNEDAiGqW4mG5C2Sp/jTOe0UlIDwurNkfKLWyLB A4/gutYfgES/ZG/argspC2+/tJSv8QuhgyroL0rEfGN6GttAGMsHWpDi75RDPH/+Z9JfRii QVDnOfPwbVRuzAHns0f8ux8jZ+cvLU0XUfz4OPFG/Nhwi8+eHATcf7F0HS+o1dHvNr/ItCz H9Tifvl1KDOKQpA5oPdeQ== X-UI-Out-Filterresults: notjunk:1;V03:K0:tp2euVNqiFk=:/jFsraWQBx/mtQ3s7ZIfKu I+Ql7llu/RZe2Sgmso43NSjlmzMYJ7uFYUFAfcLEUL2ZVaLA7ugJXs3YYwPOhacBd5EVRw1ho j5xrWCiqP7oehvLob3ARdx6dG3wc9TY/dCOrtbRQX+zMxidGLaVLhDl285IfQeiPxhOWrxVmo towuv5vJx9p9OGqavdfe1VqtCOyP38NOswq/teU9pCwBzq/QpoID0LuHax6PCDUb3mQvbh+Rq 1BbPM+FfSIe27oDmyfP2J1TbAsGtLouCTLV5RWTcTGsf4kT8cipiWwNklNyr4GF3KXJqF1GBj kCyC9MUK3/Ssgdh4/tJJA6cnVJMq+oLSiCXZXInyuv1xsw1zp8eg+59nqn6zeTzMto+6q5umt FhpForC3JZHI9tlqQapy9cC8ZbjZ8OfuySKYQMwY813uVB4gbXNBpc4nnJDWNL9KMuFSG0QKv Hfu5TYp015+wnLzmGBov3nmHd0dCyuEBKGr2NetDNd1dVk9zUDfyc8Vz8BrzP9xFoaFTm8KrU qY+o1s47RJrmmYp+613UXtu3rj6rUsQ6Qu3WP0lbR3xlB4r3moT+oXk3xvk3OVwlb7hvK1Mr9 euAaKk3lfDpgNrP5szRl5/LVUnQqXtCSlveoMzBD8TjnusihYOpljvQDVHj5cb8F0B7/RSnbU eYuab79M3AZfSYPm76Y4bYOklk08piPdGACRu4wblI+QLxXsdJcgn6RFmucdsXNTGvI7fDWIj wJV030xeStTuJeoZ Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Move I2C RTC to module-level to be enabled on carrier board-level. Signed-off-by: Marcel Ziswiler --- (no changes since v1) arch/arm/boot/dts/imx7-colibri-aster.dtsi | 11 +++++------ arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 11 +++++------ arch/arm/boot/dts/imx7-colibri.dtsi | 7 +++++++ 3 files changed, 17 insertions(+), 12 deletions(-) diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi index f3a5cb7d6a0c..9796bfabe241 100644 --- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi @@ -21,12 +21,6 @@ &fec1 { &i2c4 { status = "okay"; - - /* M41T0M6 real time clock on carrier board */ - rtc: rtc@68 { - compatible = "st,m41t0"; - reg = <0x68>; - }; }; &pwm1 { @@ -45,6 +39,11 @@ &pwm4 { status = "okay"; }; +/* M41T0M6 real time clock */ +&rtc { + status = "okay"; +}; + &uart1 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index 618831e89ce8..e3aac56aece8 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -56,12 +56,6 @@ &fec1 { &i2c4 { status = "okay"; - - /* M41T0M6 real time clock on carrier board */ - rtc: rtc@68 { - compatible = "st,m41t0"; - reg = <0x68>; - }; }; &pwm1 { @@ -80,6 +74,11 @@ &pwm4 { status = "okay"; }; +/* M41T0M6 real time clock */ +&rtc { + status = "okay"; +}; + &uart1 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index 3da9ddc06aae..da3df00c7d67 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -507,6 +507,13 @@ atmel_mxt_ts: touchscreen@4a { reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* SODIMM 106 / RST */ status = "disabled"; }; + + /* M41T0M6 real time clock on carrier board */ + rtc: rtc@68 { + compatible = "st,m41t0"; + reg = <0x68>; + status = "disabled"; + }; }; &lcdif { From patchwork Mon May 16 13:47:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 573090 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE5B0C433F5 for ; Mon, 16 May 2022 13:50:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243911AbiEPNuS (ORCPT ); Mon, 16 May 2022 09:50:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37410 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243989AbiEPNuA (ORCPT ); Mon, 16 May 2022 09:50:00 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6185039159; Mon, 16 May 2022 06:49:02 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0M7IS8-1ndzew0dgE-00wzGX; Mon, 16 May 2022 15:48:48 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , Stefan Agner , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 14/24] ARM: dts: imx7-colibri-eval-v3: correct can controller comment Date: Mon, 16 May 2022 15:47:24 +0200 Message-Id: <20220516134734.493065-15-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220516134734.493065-1-marcel@ziswiler.com> References: <20220516134734.493065-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:P4e6qvQslx7pVS0Qs8hQ9quZzDy3Tei43dyFK/9Jm1jOBrKg4q/ klY/gsz4l82GNkm4N0xp8Mpp+8SFLprdBFjrdBqlgdDaPCf80rdwrLmKZh60+cF85dxbWWJ fnrFhrLPXjrGQuIVW63DB0eQSgcBI8K0deNRg0Tal7TNnTWkf3Wso5ksutZ/BU9SAdbt4xT QAlXv6KT5dRSkxB6RLjQw== X-UI-Out-Filterresults: notjunk:1;V03:K0:s4+VPOFXeeQ=:cgocLZpI4cEgfhoNGuZWZl pdmicKXwZm+hfJsTZa6mxkbslE+gnjWxtgflLhGsvfNMjkgmzmFKdaPYHylOwss4+7vV8czQP q5N8FNRAlj9WnBib6dX6Kn4xb+tp5vDXde0SGJnCiQxvjzVTfgHcgQj8FvxlS90fwaGxI5DXc dsFF81NYtWucF2WCqsmI2B4Ai5YzRqc5k4oEOFKb8/8L89Y3xXaQqYA2QS0HsFB7JvMnqDLnU gll5bfxV325P5U873BkPUQ5SoF5luZqVGGy3IDo+XGIHvZYCVQm+wz062VqO0bYGI3akvxtcl LOwsQs9gWWEmoyqeDpyVSSoH+AxXDJPAL1xI/nUT8ZrLVuwxcSfZwfvc/+egz4TkaY2LaAjaF 2j51nJAVT7l0pYC+gAg3SWPn7DI1AHxC++dinl+ZdJG0xYYcZPMF11YVDhYT1ZkfnfSYpd1/l lHPV3llQgQ+LHETgofXxJkn772iJ+IC/r/jY2e51iFbv2tbT4F32QlJ8c3oK2iLBnr1cXOrSJ 6ZXqvZ+H6RcCb5TloI8ItsU7CuWPkWqGyrYa1fZX16yeoc6Eo1WSdxkDEwp6oQRQO22TCpeHC 7ItQWYVARVK1swrzQO7ZRyTj5eC7nf2h/xlV3w/VAqM0kJQmemYwYVCbT7DtoA32flZccD48p 3zA0TBqpoH02QukFLWz5ivQe4A8jG8gdb35M43jA6nMAcpuYINP6kMH7913L8/GuMcco= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Correct CAN controller comment. It is a MCP2515 rather than a mpc258x. Fixes: 66d59b678a87 ("ARM: dts: imx7-colibri: add MCP2515 CAN controller") Signed-off-by: Marcel Ziswiler --- (no changes since v1) arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index e3aac56aece8..069f56272546 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -4,7 +4,7 @@ */ / { - /* fixed crystal dedicated to mpc258x */ + /* Fixed crystal dedicated to MCP2515. */ clk16m: clk16m { compatible = "fixed-clock"; #clock-cells = <0>; From patchwork Mon May 16 13:47:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 573089 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5F7BFC433FE for ; Mon, 16 May 2022 13:50:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243969AbiEPNui (ORCPT ); Mon, 16 May 2022 09:50:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33974 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229457AbiEPNuH (ORCPT ); Mon, 16 May 2022 09:50:07 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.196]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0119F3B280; Mon, 16 May 2022 06:49:09 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MTAx6-1oHVLN0eJi-00S6UP; Mon, 16 May 2022 15:48:55 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 16/24] ARM: dts: imx7-colibri-aster: add ssp aka spi cs aka ss pins Date: Mon, 16 May 2022 15:47:26 +0200 Message-Id: <20220516134734.493065-17-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220516134734.493065-1-marcel@ziswiler.com> References: <20220516134734.493065-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:QK7WzCsXyZdHOHmT34mhC9fW3aW39xdObJh1k8i/5c4hOgjpUfW tQ2yar+vS8NADTdUo7F1rqyruo5CuXxKlkLvmjsPHyAkGsgm4cj1YT9qIGLxju8NpR8Ivis dFF65N7wT/viURxUX2R8ARWak7ytZlWWmRjTQAjlH36fv3mdfk5jbbwoqSvjLrLE157SdnV jkxLvydAhwKhdXUN7OBYQ== X-UI-Out-Filterresults: notjunk:1;V03:K0:I60MfpkClAo=:d7pSxpTvgKw6OFRrvsMX67 NfAcorH8YPBGVpHWOqCBvi4cBpX4ETafgOGHSnEET23WZYNe9nCeSVhsEX7XEnJws3YmNVoHq LDcxKr/rRiMeptSm5WQTqaIDtoINqWzWSnIxJsoO8ifdHCde+reSn8g+hNjv44mHFRw/feiEF jmkhKOqLr/mzeaQSvXiDUw0iaNgQ7PRPB49D5XdK/8oFMhNPIlX76HfsEdW4x47ytY5wvD3PP ZV+fjZYX+XUL/F8zMZAlNPvKSNAd+4PE/EqSEBpGvwHb+oUmbLdIP/OSm8IiDdG6LXeAVfffy upm9BKtc6cX2QDy9auycHeZWPkRZqF4os9Db+v2DZZy9m17nd8Y9oLSi8lpyuglRPi4HO4FC6 ln7pOBQqguqYPpAtfKzvJcwt0jHa2DGR/Z4Q4fkuSzCxAPKDH5Lrq2PFBKjbj215rj5aufMAE YTwigTilgeXgSdZEQ3z3462TJQhEsbIDzAXRuMedjX7Sbp3bEcRJ5gFM9SIIgbEvgTUdjDBRr 7MV+kvaonGRUt5kqKKLZIzNkhFGjGUYNZAImnJEJA064QXZtesXOpgSXHwJ2RqEt0bhgkjipH 2OKP8m5SC8Pvd8vTwoWFN0TxwN8GqnRjA85ASMKauI+l+hya9Yp/hRzO/ygoQF9u/0gem4Ozr DLEhGBmbuiIKmQlCPkKkppM/RDNej/02YqFON0tuXxD26tem2ApUePcPhy4WdVeY7XKoHaFIw x5DGaKozCzUD/Ago Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Add Colibri SSP aka SPI chip select (CS) aka slave select (SS) pins as either used on Arduino UNO compatible header X18 or Raspberry Pi compatible header X20. Signed-off-by: Marcel Ziswiler --- (no changes since v1) arch/arm/boot/dts/imx7-colibri-aster.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi index a89c868ff3ed..117965705814 100644 --- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi @@ -7,6 +7,16 @@ &adc1 { status = "okay"; }; +/* Colibri SSP */ +&ecspi3 { + cs-gpios = < + &gpio4 11 GPIO_ACTIVE_LOW /* SODIMM 86 / regular SSPFRM as UNO_SPI_CS or */ + &gpio4 23 GPIO_ACTIVE_LOW /* SODIMM 65 / already muxed pinctrl_gpio2 as SPI_CE0_N */ + &gpio4 22 GPIO_ACTIVE_LOW /* SODIMM 85 / already muxed pinctrl_gpio2 as SPI_CE1_N */ + >; + status = "okay"; +}; + &fec1 { status = "okay"; }; From patchwork Mon May 16 13:47:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 573088 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E5DF9C433EF for ; Mon, 16 May 2022 13:50:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231777AbiEPNuq (ORCPT ); Mon, 16 May 2022 09:50:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34764 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244071AbiEPNuJ (ORCPT ); Mon, 16 May 2022 09:50:09 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 47D4B3B298; Mon, 16 May 2022 06:49:14 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0M7ZR3-1neGmD2tfT-00xGNg; Mon, 16 May 2022 15:48:59 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 17/24] ARM: dts: imx7-colibri: add clarifying comments Date: Mon, 16 May 2022 15:47:27 +0200 Message-Id: <20220516134734.493065-18-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220516134734.493065-1-marcel@ziswiler.com> References: <20220516134734.493065-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:neDi+m+pTaHKB2Q8oXHn1HXiJ2Sh1YhU4lBwqzZfvhta0xeodEb 95h9Yn7W0GcTF26H8zfeYD+273pnS5QUajhlHMNmyVbuTbTUQyd0M1tHp2fzdDEFThBaMPN C2V8FqJuBWO3u4XNzz9jle+ZIrGp4kHCwztvtkCWcq+n6DIYKKhz5kRWtUi0uPXWOER9NZ/ gAN+V4WCxeTeuGOTe7IlA== X-UI-Out-Filterresults: notjunk:1;V03:K0:NQTn592N0wA=:LdOamR4YUaMo6/1hrlFhAR MaJN3dGDxNBsGlg0SmcOckzn8/R1Nz3RXtFThDwk+ImyD0xcwLHUpoZzqOmizzzKfLMrfJr2a R28wY8kzxAVkxC3UX37Ei5BYTB3dbD73PpHQ8Y4Dz4o9LPE+xc4NAi8tzNdG4j7W9uhSkH8hd Swdk8qw5yeuXHDSVQtP8u6z/7nCERLhtEhf2lqeTe8cGoVa4AuAVsOWKmUakFuXxzy4/EZeBz WqF3/0LDjsOh3tm9EhvZhyyM0zbTnCWfCz0sD0YYjj6fGj2uc+D7Muu6wTvOq8gEL68cpvQgS wVrd0y5f34vmVOVPV6QPYwPiKGI57oiEsCmuegjfg1dz7HW4gzv5A/SV3khqJcXPbse1PGszG vdnjvQ06D1/a3xqDT5tcMgyr6xH0iUdmRXaLYMewkrOnAdRj6PR4pRStT2WVbKW+3Qvn1X1y6 WRuoLz2B2Pugks9wADq691/atO+QF+ndZX2tFa81xuIeR4J8i3gam87u3KGBx42OemFGDQkN5 0cS6b6Adw4yyp5ebegowsnyFN45W4JVaFxsyG/uK69+eIAQb5pAFFJL3InIYrt8Pck9hNVkTp eqikEXH9rqb95E+f+r0+Rg973M/j/6QIn/xqNWR9Qd3fBH0ncTKfC5ukymtLXWPFOjoSBSMoB F17MISBk3LiQpKyBkWETvl8mFHr0S2TywNcVp3QmcRzu3VTixVX71jw9n2BBt8kziqlX0czk1 ad/qETEpqcihz0PH Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler - Add clarifying comments. - Remove spurious new line. - Add required new line. Signed-off-by: Marcel Ziswiler --- (no changes since v1) arch/arm/boot/dts/imx7-colibri-aster.dtsi | 11 ++ arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 15 ++ arch/arm/boot/dts/imx7-colibri.dtsi | 140 ++++++++++-------- arch/arm/boot/dts/imx7d-colibri-aster.dts | 2 +- .../arm/boot/dts/imx7d-colibri-emmc-aster.dts | 1 + .../boot/dts/imx7d-colibri-emmc-eval-v3.dts | 1 + arch/arm/boot/dts/imx7d-colibri-emmc.dtsi | 2 + arch/arm/boot/dts/imx7d-colibri-eval-v3.dts | 5 + arch/arm/boot/dts/imx7d-colibri.dtsi | 2 + arch/arm/boot/dts/imx7s-colibri-eval-v3.dts | 4 + arch/arm/boot/dts/imx7s-colibri.dtsi | 1 + 11 files changed, 121 insertions(+), 63 deletions(-) diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi index 117965705814..fa488a6de0d4 100644 --- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi @@ -3,6 +3,7 @@ * Copyright 2017-2022 Toradex */ +/* Colibri AD0 to AD3 */ &adc1 { status = "okay"; }; @@ -17,26 +18,32 @@ &gpio4 22 GPIO_ACTIVE_LOW /* SODIMM 85 / already muxed pinctrl_gpio2 as SPI_CE1_ status = "okay"; }; +/* Colibri Fast Ethernet */ &fec1 { status = "okay"; }; +/* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */ &i2c4 { status = "okay"; }; +/* Colibri PWM */ &pwm1 { status = "okay"; }; +/* Colibri PWM */ &pwm2 { status = "okay"; }; +/* Colibri PWM */ &pwm3 { status = "okay"; }; +/* Colibri PWM */ &pwm4 { status = "okay"; }; @@ -46,18 +53,22 @@ &rtc { status = "okay"; }; +/* Colibri UART_A */ &uart1 { status = "okay"; }; +/* Colibri UART_B */ &uart2 { status = "okay"; }; +/* Colibri UART_C */ &uart3 { status = "okay"; }; +/* Colibri USBC */ &usbotg1 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index 6ae38c1f38d4..441331b09fb4 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -12,6 +12,7 @@ clk16m: clk16m { }; }; +/* Colibri AD0 to AD3 */ &adc1 { status = "okay"; }; @@ -28,6 +29,7 @@ &atmel_mxt_ts { status = "disabled"; }; +/* Colibri SSP */ &ecspi3 { status = "okay"; @@ -46,26 +48,34 @@ mcp2515: can@0 { }; }; +/* Colibri Fast Ethernet */ &fec1 { status = "okay"; }; +/* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */ &i2c4 { status = "okay"; }; +/* Colibri PWM */ &pwm1 { status = "okay"; }; +/* Colibri PWM */ &pwm2 { + /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ status = "okay"; }; +/* Colibri PWM */ &pwm3 { + /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ status = "okay"; }; +/* Colibri PWM */ &pwm4 { status = "okay"; }; @@ -75,22 +85,27 @@ &rtc { status = "okay"; }; +/* Colibri UART_A */ &uart1 { status = "okay"; }; +/* Colibri UART_B */ &uart2 { status = "okay"; }; +/* Colibri UART_C */ &uart3 { status = "okay"; }; +/* Colibri USBC */ &usbotg1 { status = "okay"; }; +/* Colibri MMC/SD */ &usdhc1 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index 0fc4b33d97be..4416b7befbfe 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -122,6 +122,7 @@ sound { simple-audio-card,format = "i2s"; simple-audio-card,bitclock-master = <&dailink_master>; simple-audio-card,frame-master = <&dailink_master>; + simple-audio-card,cpu { sound-dai = <&sai1>; }; @@ -133,6 +134,7 @@ dailink_master: simple-audio-card,codec { }; }; +/* Colibri AD0 to AD3 */ &adc1 { vref-supply = <®_DCDC3>; }; @@ -146,12 +148,14 @@ &cpu0 { cpu-supply = <®_DCDC2>; }; +/* Colibri SSP */ &ecspi3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs>; - cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; + cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; /* SODIMM 86 / SSPFRM */ }; +/* Colibri Fast Ethernet */ &fec1 { assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; assigned-clock-rates = <0>, <100000000>; @@ -174,6 +178,7 @@ mdio { #address-cells = <1>; #size-cells = <0>; + /* Micrel KSZ8041RNL */ ethphy0: ethernet-phy@0 { compatible = "ethernet-phy-ieee802.3-c22"; max-speed = <100>; @@ -373,6 +378,7 @@ &gpio7 { "SODIMM_137"; }; +/* NAND on such SKUs */ &gpmi { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpmi_nand>; @@ -381,6 +387,7 @@ &gpmi { nand-ecc-mode = "hw"; }; +/* On-module Power I2C */ &i2c1 { clock-frequency = <100000>; pinctrl-names = "default", "gpio"; @@ -388,7 +395,6 @@ &i2c1 { pinctrl-1 = <&pinctrl_i2c1_recovery &pinctrl_i2c1_int>; scl-gpios = <&gpio1 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; sda-gpios = <&gpio1 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - status = "okay"; codec: sgtl5000@a { @@ -488,6 +494,7 @@ reg_LDO5: LDO5 { /* PWR_EN_+V3.3 */ }; }; +/* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */ &i2c4 { clock-frequency = <100000>; pinctrl-names = "default", "gpio"; @@ -532,28 +539,32 @@ lcdif_out: endpoint { }; }; +/* Colibri PWM */ &pwm1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; }; +/* Colibri PWM */ &pwm2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm2>; }; +/* Colibri PWM */ &pwm3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm3>; }; +/* Colibri PWM */ &pwm4 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm4>; }; ®_1p0d { - vin-supply = <®_DCDC3>; + vin-supply = <®_DCDC3>; /* VDDA_1P8_IN */ }; &sai1 { @@ -562,6 +573,7 @@ &sai1 { status = "okay"; }; +/* Colibri UART_A */ &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1 &pinctrl_uart1_ctrl2>; @@ -571,6 +583,7 @@ &uart1 { fsl,dte-mode; }; +/* Colibri UART_B */ &uart2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; @@ -580,6 +593,7 @@ &uart2 { fsl,dte-mode; }; +/* Colibri UART_C */ &uart3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; @@ -588,6 +602,7 @@ &uart3 { fsl,dte-mode; }; +/* Colibri USBC */ &usbotg1 { dr_mode = "otg"; extcon = <0>, <&extcon_usbc_det>; @@ -608,6 +623,7 @@ &usdhc1 { wakeup-source; }; +/* eMMC on 1GB (eMMC) SKUs */ &usdhc3 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc3>; @@ -778,15 +794,15 @@ MX7D_PAD_SD2_WP__GPIO5_IO10 0x0 pinctrl_ecspi3_cs: ecspi3-cs-grp { fsl,pins = < - MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x14 + MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x14 /* SODIMM 86 */ >; }; pinctrl_ecspi3: ecspi3-grp { fsl,pins = < - MX7D_PAD_I2C1_SCL__ECSPI3_MISO 0x2 - MX7D_PAD_I2C1_SDA__ECSPI3_MOSI 0x2 - MX7D_PAD_I2C2_SCL__ECSPI3_SCLK 0x2 + MX7D_PAD_I2C1_SCL__ECSPI3_MISO 0x2 /* SODIMM 90 */ + MX7D_PAD_I2C1_SDA__ECSPI3_MOSI 0x2 /* SODIMM 92 */ + MX7D_PAD_I2C2_SCL__ECSPI3_SCLK 0x2 /* SODIMM 88 */ >; }; @@ -831,8 +847,8 @@ MX7D_PAD_SD3_DATA7__NAND_DATA07 0x71 pinctrl_i2c4: i2c4-grp { fsl,pins = < - MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA 0x4000007f - MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL 0x4000007f + MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA 0x4000007f /* SODIMM 194 */ + MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL 0x4000007f /* SODIMM 196 */ >; }; @@ -845,44 +861,44 @@ MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9 0x4000007f pinctrl_lcdif_dat: lcdif-dat-grp { fsl,pins = < - MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79 - MX7D_PAD_LCD_DATA01__LCD_DATA1 0x79 - MX7D_PAD_LCD_DATA02__LCD_DATA2 0x79 - MX7D_PAD_LCD_DATA03__LCD_DATA3 0x79 - MX7D_PAD_LCD_DATA04__LCD_DATA4 0x79 - MX7D_PAD_LCD_DATA05__LCD_DATA5 0x79 - MX7D_PAD_LCD_DATA06__LCD_DATA6 0x79 - MX7D_PAD_LCD_DATA07__LCD_DATA7 0x79 - MX7D_PAD_LCD_DATA08__LCD_DATA8 0x79 - MX7D_PAD_LCD_DATA09__LCD_DATA9 0x79 - MX7D_PAD_LCD_DATA10__LCD_DATA10 0x79 - MX7D_PAD_LCD_DATA11__LCD_DATA11 0x79 - MX7D_PAD_LCD_DATA12__LCD_DATA12 0x79 - MX7D_PAD_LCD_DATA13__LCD_DATA13 0x79 - MX7D_PAD_LCD_DATA14__LCD_DATA14 0x79 - MX7D_PAD_LCD_DATA15__LCD_DATA15 0x79 - MX7D_PAD_LCD_DATA16__LCD_DATA16 0x79 - MX7D_PAD_LCD_DATA17__LCD_DATA17 0x79 + MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79 /* SODIMM 76 */ + MX7D_PAD_LCD_DATA01__LCD_DATA1 0x79 /* SODIMM 70 */ + MX7D_PAD_LCD_DATA02__LCD_DATA2 0x79 /* SODIMM 60 */ + MX7D_PAD_LCD_DATA03__LCD_DATA3 0x79 /* SODIMM 58 */ + MX7D_PAD_LCD_DATA04__LCD_DATA4 0x79 /* SODIMM 78 */ + MX7D_PAD_LCD_DATA05__LCD_DATA5 0x79 /* SODIMM 72 */ + MX7D_PAD_LCD_DATA06__LCD_DATA6 0x79 /* SODIMM 80 */ + MX7D_PAD_LCD_DATA07__LCD_DATA7 0x79 /* SODIMM 46 */ + MX7D_PAD_LCD_DATA08__LCD_DATA8 0x79 /* SODIMM 62 */ + MX7D_PAD_LCD_DATA09__LCD_DATA9 0x79 /* SODIMM 48 */ + MX7D_PAD_LCD_DATA10__LCD_DATA10 0x79 /* SODIMM 74 */ + MX7D_PAD_LCD_DATA11__LCD_DATA11 0x79 /* SODIMM 50 */ + MX7D_PAD_LCD_DATA12__LCD_DATA12 0x79 /* SODIMM 52 */ + MX7D_PAD_LCD_DATA13__LCD_DATA13 0x79 /* SODIMM 54 */ + MX7D_PAD_LCD_DATA14__LCD_DATA14 0x79 /* SODIMM 66 */ + MX7D_PAD_LCD_DATA15__LCD_DATA15 0x79 /* SODIMM 64 */ + MX7D_PAD_LCD_DATA16__LCD_DATA16 0x79 /* SODIMM 57 */ + MX7D_PAD_LCD_DATA17__LCD_DATA17 0x79 /* SODIMM 61 */ >; }; pinctrl_lcdif_dat_24: lcdif-dat-24-grp { fsl,pins = < - MX7D_PAD_LCD_DATA18__LCD_DATA18 0x79 - MX7D_PAD_LCD_DATA19__LCD_DATA19 0x79 - MX7D_PAD_LCD_DATA20__LCD_DATA20 0x79 - MX7D_PAD_LCD_DATA21__LCD_DATA21 0x79 - MX7D_PAD_LCD_DATA22__LCD_DATA22 0x79 - MX7D_PAD_LCD_DATA23__LCD_DATA23 0x79 + MX7D_PAD_LCD_DATA18__LCD_DATA18 0x79 /* SODIMM 136 */ + MX7D_PAD_LCD_DATA19__LCD_DATA19 0x79 /* SODIMM 138 */ + MX7D_PAD_LCD_DATA20__LCD_DATA20 0x79 /* SODIMM 140 */ + MX7D_PAD_LCD_DATA21__LCD_DATA21 0x79 /* SODIMM 142 */ + MX7D_PAD_LCD_DATA22__LCD_DATA22 0x79 /* SODIMM 144 */ + MX7D_PAD_LCD_DATA23__LCD_DATA23 0x79 /* SODIMM 146 */ >; }; pinctrl_lcdif_ctrl: lcdif-ctrl-grp { fsl,pins = < - MX7D_PAD_LCD_CLK__LCD_CLK 0x79 - MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x79 - MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x79 - MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79 + MX7D_PAD_LCD_CLK__LCD_CLK 0x79 /* SODIMM 56 */ + MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x79 /* SODIMM 44 */ + MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x79 /* SODIMM 82 */ + MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79 /* SODIMM 68 */ >; }; @@ -897,70 +913,70 @@ MX7D_PAD_EPDC_DATA13__GPIO2_IO13 0x14 /* SODIMM 95 */ pinctrl_pwm1: pwm1-grp { fsl,pins = < - MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79 - MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x4 + MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79 /* SODIMM 59 */ + MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x4 /* SODIMM 59 */ >; }; pinctrl_pwm2: pwm2-grp { fsl,pins = < - MX7D_PAD_GPIO1_IO09__PWM2_OUT 0x79 + MX7D_PAD_GPIO1_IO09__PWM2_OUT 0x79 /* SODIMM 28 */ >; }; pinctrl_pwm3: pwm3-grp { fsl,pins = < - MX7D_PAD_GPIO1_IO10__PWM3_OUT 0x79 + MX7D_PAD_GPIO1_IO10__PWM3_OUT 0x79 /* SODIMM 30 */ >; }; pinctrl_pwm4: pwm4-grp { fsl,pins = < - MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x79 - MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20 0x4 + MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x79 /* SODIMM 67 */ + MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20 0x4 /* SODIMM 67 */ >; }; pinctrl_uart1: uart1-grp { fsl,pins = < - MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX 0x79 - MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX 0x79 - MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS 0x79 - MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS 0x79 + MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX 0x79 /* SODIMM 33 */ + MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX 0x79 /* SODIMM 35 */ + MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS 0x79 /* SODIMM 25 */ + MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS 0x79 /* SODIMM 27 */ >; }; pinctrl_uart1_ctrl1: uart1-ctrl1-grp { fsl,pins = < - MX7D_PAD_SD2_DATA1__GPIO5_IO15 0x14 /* DCD */ - MX7D_PAD_SD2_DATA0__GPIO5_IO14 0x14 /* DTR */ + MX7D_PAD_SD2_DATA1__GPIO5_IO15 0x14 /* SODIMM 31 / DCD */ + MX7D_PAD_SD2_DATA0__GPIO5_IO14 0x14 /* SODIMM 23 / DTR */ >; }; pinctrl_uart2: uart2-grp { fsl,pins = < - MX7D_PAD_UART2_TX_DATA__UART2_DTE_RX 0x79 - MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX 0x79 - MX7D_PAD_SAI2_RX_DATA__UART2_DTE_RTS 0x79 - MX7D_PAD_SAI2_TX_DATA__UART2_DTE_CTS 0x79 + MX7D_PAD_UART2_TX_DATA__UART2_DTE_RX 0x79 /* SODIMM 36 */ + MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX 0x79 /* SODIMM 38 */ + MX7D_PAD_SAI2_RX_DATA__UART2_DTE_RTS 0x79 /* SODIMM 32 / CTS */ + MX7D_PAD_SAI2_TX_DATA__UART2_DTE_CTS 0x79 /* SODIMM 34 / RTS */ >; }; pinctrl_uart3: uart3-grp { fsl,pins = < - MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX 0x79 - MX7D_PAD_UART3_RX_DATA__UART3_DTE_TX 0x79 + MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX 0x79 /* SODIMM 19 */ + MX7D_PAD_UART3_RX_DATA__UART3_DTE_TX 0x79 /* SODIMM 21 */ >; }; pinctrl_usbc_det: gpio-usbc-det { fsl,pins = < - MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x14 + MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x14 /* SODIMM 137 / USBC_DET */ >; }; pinctrl_usbh_reg: gpio-usbh-vbus { fsl,pins = < - MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14 /* SODIMM 129 USBH PEN */ + MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14 /* SODIMM 129 / USBH_PEN */ >; }; @@ -1079,14 +1095,14 @@ &iomuxc_lpsr { pinctrl_gpio_lpsr: gpio1-grp { fsl,pins = < - MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x59 - MX7D_PAD_LPSR_GPIO1_IO03__GPIO1_IO3 0x59 + MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x59 /* SODIMM 135 */ + MX7D_PAD_LPSR_GPIO1_IO03__GPIO1_IO3 0x59 /* SODIMM 22 */ >; }; pinctrl_gpiokeys: gpiokeysgrp { fsl,pins = < - MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x19 + MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x19 /* SODIMM 45 / WAKE_UP */ >; }; @@ -1118,8 +1134,8 @@ MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x0 pinctrl_uart1_ctrl2: uart1-ctrl2-grp { fsl,pins = < - MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14 /* DSR */ - MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x14 /* RI */ + MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14 /* SODIMM 29 / DSR */ + MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x14 /* SODIMM 37 / RI */ >; }; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-aster.dts b/arch/arm/boot/dts/imx7d-colibri-aster.dts index cfd75e3424fa..90aaeddfb4f6 100644 --- a/arch/arm/boot/dts/imx7d-colibri-aster.dts +++ b/arch/arm/boot/dts/imx7d-colibri-aster.dts @@ -1,7 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* * Copyright 2017-2022 Toradex - * */ /dts-v1/; @@ -35,6 +34,7 @@ &panel_dpi { status = "okay"; }; +/* Colibri USBH */ &usbotg2 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts index 7b4451699478..3ec9ef6baaa4 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts +++ b/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts @@ -16,6 +16,7 @@ / { "fsl,imx7d"; }; +/* Colibri USBH */ &usbotg2 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts index 3e84018392ee..6d505cb02aad 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts +++ b/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts @@ -15,6 +15,7 @@ / { "fsl,imx7d"; }; +/* Colibri USBH */ &usbotg2 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi index 2b4be7646631..2fb4d2133a1b 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi +++ b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi @@ -49,11 +49,13 @@ &gpio6 { "SODIMM_34"; }; +/* Colibri USBH */ &usbotg2 { dr_mode = "host"; vbus-supply = <®_usbh_vbus>; }; +/* eMMC */ &usdhc3 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts index 7aabe5691459..c7a8b5aa2408 100644 --- a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts @@ -38,14 +38,19 @@ &panel_dpi { status = "okay"; }; +/* Colibri PWM */ &pwm2 { + /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ status = "okay"; }; +/* Colibri PWM */ &pwm3 { + /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ status = "okay"; }; +/* Colibri USBH */ &usbotg2 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri.dtsi b/arch/arm/boot/dts/imx7d-colibri.dtsi index d1469aa8b025..531a45b176a1 100644 --- a/arch/arm/boot/dts/imx7d-colibri.dtsi +++ b/arch/arm/boot/dts/imx7d-colibri.dtsi @@ -23,10 +23,12 @@ &cpu1 { cpu-supply = <®_DCDC2>; }; +/* NAND */ &gpmi { status = "okay"; }; +/* Colibri USBH */ &usbotg2 { dr_mode = "host"; vbus-supply = <®_usbh_vbus>; diff --git a/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts b/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts index 6589c4179177..38de76630d6a 100644 --- a/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts @@ -38,10 +38,14 @@ &panel_dpi { status = "okay"; }; +/* Colibri PWM */ &pwm2 { + /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ status = "okay"; }; +/* Colibri PWM */ &pwm3 { + /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7s-colibri.dtsi b/arch/arm/boot/dts/imx7s-colibri.dtsi index 2ce102b7f5d4..ef51395d3537 100644 --- a/arch/arm/boot/dts/imx7s-colibri.dtsi +++ b/arch/arm/boot/dts/imx7s-colibri.dtsi @@ -13,6 +13,7 @@ memory@80000000 { }; }; +/* NAND */ &gpmi { status = "okay"; }; From patchwork Mon May 16 14:09:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 573086 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 49CE0C433EF for ; Mon, 16 May 2022 14:10:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244372AbiEPOKh (ORCPT ); Mon, 16 May 2022 10:10:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57420 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244379AbiEPOK1 (ORCPT ); Mon, 16 May 2022 10:10:27 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A6B0F3AA48; Mon, 16 May 2022 07:10:26 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0Lj04u-1nKHo13zmI-00dIkY; Mon, 16 May 2022 16:10:08 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 19/24] ARM: dts: imx7-colibri: clean-up device enabling/disabling Date: Mon, 16 May 2022 16:09:38 +0200 Message-Id: <20220516140938.494289-1-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220516134734.493065-1-marcel@ziswiler.com> References: <20220516134734.493065-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:f4KTShYxaHiJIBPORmg1zxtwPgLmVUsBya8yEKgOKdtcDIxhrHA KK6p8q/Z424xAxuGhIMU1g98ApfBG+aGNb1NvvLThFnxXP7WoXrNCI1fw/EX0C88p9qsqqK 2aXrvEakbUayRIr87JvL01QuQB5UzyLtwjdUrLchAQXwOdz25ahFaX+nz8NuYNssRi1ybIY YQvvZ+am18mx6MTtitDAg== X-UI-Out-Filterresults: notjunk:1;V03:K0:c9RdkB/YBJ8=:qzurQjombKI4eec/3WsQS4 tMH0TXcoQjADBqPt+TqQc6lidlGS+uoUjqYx9mIVoEEfsrUTSjt7SXT9XjAkdOl+LRZNMst5N qzrqwoyyT3lHxqY9MkkZttxwQ2+fmwA2YSbvmt22s79z7YxTyV7IX5prOCYJQG6HIanoOLmQk uN0oJrrwB4VH8VDALYzvblki3lvuJfcxNpJAjaVoYaoXEsNywr+u8Un9/ryuzFxeE3Er+I007 8QtQzex8L+7uy0GYflL3GTD8li17ZxIsfXqfJmvsj42gmbnaL6qDX+5S2JkG0QvDs5nsBnUd2 vTDZDze7MBLv30gTawiGuTzGmVs2TkKu7KW/RFW3DqgN6WkU4bmixCkRI/YOdFfOi6fwjzD0R QLGmIWgeEoinr7OFtT4Pz9J02m32js0YIeHcXRU3R3G0uZXqaHs4IDP1VbTdq7yT9R3hOldon Rj4S1P1T5um5FQDrT8UePJpvvTAtivKY0+yPdNQBKrSEfHYi8uVX2xr5w81yUVKx3xyXz9Ye6 mDRyrziYHI6gZo3DJuT2MLMLERjWN7Kiyf0dAQ8HWS+5+yzZmnSXgREz0rHvrHlRgUI3NnIVj jSYrEvE+wbkSNgpBLTrLdmjaDIEzDv08x/5URvXMp9pblHfYawzNdWbeT9m9bcuOBmcQyN4KY QaHr75jPPNrRr/BD6xdv5gLYRi8KHSAWoPuBD8cODz/IcK6NvgeFyBeqdqcwWa8RHyhgNmEjh pNLm5BDnasCe1lI49b3TLTJL+KVWDS2dS37XZR/wlNU1unvxml0ei9JKvixV0ATUOyzrSohxa OQl8ilN/OinOjka/N6D5eUGw09DpqLIRS9ht7FQH3DEygTTEl2DK6tjpb2zXWc/4iMz1peX Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Disable most nodes on module-level to be enabled on carrier board-level. Signed-off-by: Marcel Ziswiler --- (no changes since v1) arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 1 - arch/arm/boot/dts/imx7-colibri.dtsi | 5 ----- 2 files changed, 6 deletions(-) diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index fea6e4c0d4d6..826f13da5b81 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -44,7 +44,6 @@ mcp2515: can@0 { spi-max-frequency = <10000000>; vdd-supply = <®_3v3>; xceiver-supply = <®_5v0>; - status = "okay"; }; }; diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index f29096fca54d..065d8f55f326 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -140,9 +140,6 @@ &adc1 { }; /* ADC2 is not available as it conflicts with AD7879 resistive touchscreen. */ -&adc2 { - status = "disabled"; -}; &cpu0 { cpu-supply = <®_DCDC2>; @@ -191,13 +188,11 @@ ethphy0: ethernet-phy@0 { &flexcan1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flexcan1>; - status = "disabled"; }; &flexcan2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flexcan2>; - status = "disabled"; }; &gpio1 { From patchwork Mon May 16 14:12:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 573084 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6B411C433F5 for ; Mon, 16 May 2022 14:12:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233000AbiEPOMb (ORCPT ); Mon, 16 May 2022 10:12:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36630 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231625AbiEPOM1 (ORCPT ); Mon, 16 May 2022 10:12:27 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.196]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1450732066; Mon, 16 May 2022 07:12:25 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus004 [74.208.5.2]) with ESMTPSA (Nemesis) id 1Mtg2t-1nc5dj41ex-00v9gb; Mon, 16 May 2022 16:12:13 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 22/24] ARM: dts: imx7-colibri: clean-up iomuxc pinctrl group naming Date: Mon, 16 May 2022 16:12:05 +0200 Message-Id: <20220516141205.494482-1-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220516134734.493065-1-marcel@ziswiler.com> References: <20220516134734.493065-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:7M0UbTfYsqjXQ9Op5gC6XigCTBlEngl5kIVxljWh17/90RkZrv2 EQujBqmwL3kwmhE9IVadcwobQk4YMqKUKCWWJwQnZP/RPawjkRzKTljsdeMgAbW6bYX3iI+ LIBPtVBFQoKydggqORoJFU3a+cXzW++z5r2X7hRkU9S+bT7rl/Lz7URNzQZjOccmgK97vB9 evGQHgYGHNpVpIVjS782g== X-UI-Out-Filterresults: notjunk:1;V03:K0:U9M4FY3HMFg=:7h8xGGxkHIF7kZ4I/CzY2B 7oW8ZpckdTx+Yg2JVtZqLey1Ujij/AURQ8G047oFrrvuMXkXcocAWUo6HbxZAcJgcuVxm1Rx4 ETxV16NFl8c1riEZ4TJoPpJ0QuDQ70ZJCi0T8vmxvKAWuQpcqgbB9u7TbJ2DfUrp+/kNRJmME vCBbOw6MaM3OhbjQ95thLxhVsblmmyorLhbPAEwejBocwrafGSU0g5d7R/8s/LriIZJguZKnR LhO8D5Pxc+G1dcufF28/5Yr3Y10QI0JSneRPdIH73WmH7jmXKwbbLRjLkj614R2tEjYXCalJl xPoACg565TGU9WYAib/PMrVKpSgXH65zU94K0P94qB0R5i14flCmUIiQ+0J6zlE7DxXNQOHjq esZWJZn9GDi7AJ9F4cIj3DBLskjDxt497rkUUHFEnhM1uiB2eg2UwMBhZ38P401j/YL1E6GN2 x67eshfRBAU/c4Gu3YZJtJ1YKkDUY6F7YfqfeIFr+md+b+3IYbWNkTVlk+d9r4iO9ANzS1vav CzDezPfKO8IlvfeT1BgAqTzT+4zOqh94SdfBoabPgnWghQNoMbBSmONV5jxXvKcEG3gEbjayS zrPn1JniLrrjb0pFYG/L2Dc9gRgPDF5cIvTDdllYpayraYAmLp0cW/F+BGgLy0vMWIyD7Nsix tSkrqD70C+++660FByBKGYEMwPVWz6fDHxkBFWcBww5QU7vYPEP6lic3crliQTyEPjS0a5tv3 8GzJvGUI1OYrIAI0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Clean-up iomuxc pinctrl group naming. Signed-off-by: Marcel Ziswiler --- (no changes since v1) arch/arm/boot/dts/imx7-colibri.dtsi | 70 ++++++++++++++--------------- 1 file changed, 35 insertions(+), 35 deletions(-) diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index 27706a2bc3c4..a8c31ee65623 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -667,13 +667,13 @@ MX7D_PAD_EPDC_DATA15__GPIO2_IO15 0x74 /* SODIMM 107 / INT */ >; }; - pinctrl_can_int: can-int-grp { + pinctrl_can_int: canintgrp { fsl,pins = < MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0X14 /* SODIMM 73 */ >; }; - pinctrl_ecspi3: ecspi3-grp { + pinctrl_ecspi3: ecspi3grp { fsl,pins = < MX7D_PAD_I2C1_SCL__ECSPI3_MISO 0x2 /* SODIMM 90 */ MX7D_PAD_I2C1_SDA__ECSPI3_MOSI 0x2 /* SODIMM 92 */ @@ -681,7 +681,7 @@ MX7D_PAD_I2C2_SCL__ECSPI3_SCLK 0x2 /* SODIMM 88 */ >; }; - pinctrl_ecspi3_cs: ecspi3-cs-grp { + pinctrl_ecspi3_cs: ecspi3csgrp { fsl,pins = < MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x14 /* SODIMM 86 */ >; @@ -702,7 +702,7 @@ MX7D_PAD_SD2_WP__ENET1_MDC 0x3 >; }; - pinctrl_enet1_sleep: enet1sleepgrp { + pinctrl_enet1_sleep: enet1-sleepgrp { fsl,pins = < MX7D_PAD_ENET1_RGMII_RD0__GPIO7_IO0 0x0 MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1 0x0 @@ -717,21 +717,21 @@ MX7D_PAD_SD2_WP__GPIO5_IO10 0x0 >; }; - pinctrl_flexcan1: flexcan1-grp { + pinctrl_flexcan1: flexcan1grp { fsl,pins = < MX7D_PAD_ENET1_RGMII_RD2__FLEXCAN1_RX 0x79 /* SODIMM 63 */ MX7D_PAD_ENET1_RGMII_RD3__FLEXCAN1_TX 0x79 /* SODIMM 55 */ >; }; - pinctrl_flexcan2: flexcan2-grp { + pinctrl_flexcan2: flexcan2grp { fsl,pins = < MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x79 /* SODIMM 188 */ MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x79 /* SODIMM 178 */ >; }; - pinctrl_gpio1: gpio1-grp { + pinctrl_gpio1: gpio1grp { fsl,pins = < MX7D_PAD_EPDC_BDR1__GPIO2_IO29 0x14 /* SODIMM 110 */ MX7D_PAD_EPDC_DATA00__GPIO2_IO0 0x14 /* SODIMM 111 */ @@ -774,7 +774,7 @@ MX7D_PAD_UART3_RTS_B__GPIO4_IO6 0x14 /* SODIMM 131 */ >; }; - pinctrl_gpio2: gpio2-grp { /* On X22 Camera interface */ + pinctrl_gpio2: gpio2grp { /* On X22 Camera interface */ fsl,pins = < MX7D_PAD_ECSPI1_MISO__GPIO4_IO18 0x14 /* SODIMM 79 */ MX7D_PAD_ECSPI1_MOSI__GPIO4_IO17 0x14 /* SODIMM 103 */ @@ -791,7 +791,7 @@ MX7D_PAD_SD2_RESET_B__GPIO5_IO11 0x14 /* SODIMM 98 */ >; }; - pinctrl_gpio3: gpio3-grp { /* LCD 18-23 */ + pinctrl_gpio3: gpio3grp { /* LCD 18-23 */ fsl,pins = < MX7D_PAD_LCD_DATA18__GPIO3_IO23 0x14 /* SODIMM 136 */ MX7D_PAD_LCD_DATA19__GPIO3_IO24 0x14 /* SODIMM 138 */ @@ -802,27 +802,27 @@ MX7D_PAD_LCD_DATA23__GPIO3_IO28 0x74 /* SODIMM 146 */ >; }; - pinctrl_gpio4: gpio4-grp { /* Alternatively CAN2 */ + pinctrl_gpio4: gpio4grp { /* Alternatively CAN2 */ fsl,pins = < MX7D_PAD_GPIO1_IO14__GPIO1_IO14 0x14 /* SODIMM 188 */ MX7D_PAD_GPIO1_IO15__GPIO1_IO15 0x14 /* SODIMM 178 */ >; }; - pinctrl_gpio7: gpio7-grp { /* Alternatively CAN1 */ + pinctrl_gpio7: gpio7grp { /* Alternatively CAN1 */ fsl,pins = < MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 0x14 /* SODIMM 63 */ MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x14 /* SODIMM 55 */ >; }; - pinctrl_gpio_bl_on: gpio-bl-on { + pinctrl_gpio_bl_on: gpioblongrp { fsl,pins = < MX7D_PAD_SD1_WP__GPIO5_IO1 0x14 /* SODIMM 71 */ >; }; - pinctrl_gpmi_nand: gpmi-nand-grp { + pinctrl_gpmi_nand: gpminandgrp { fsl,pins = < MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B 0x71 MX7D_PAD_SAI1_TX_DATA__NAND_READY_B 0x74 @@ -841,13 +841,13 @@ MX7D_PAD_SD3_STROBE__NAND_RE_B 0x71 >; }; - pinctrl_i2c1_int: i2c1-int-grp { /* PMIC / TOUCH */ + pinctrl_i2c1_int: i2c1intgrp { /* PMIC / TOUCH */ fsl,pins = < MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x79 >; }; - pinctrl_i2c4: i2c4-grp { + pinctrl_i2c4: i2c4grp { fsl,pins = < MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL 0x4000007f /* SODIMM 196 */ MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA 0x4000007f /* SODIMM 194 */ @@ -861,7 +861,7 @@ MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9 0x4000007f >; }; - pinctrl_lcdif_dat: lcdif-dat-grp { + pinctrl_lcdif_dat: lcdifdatgrp { fsl,pins = < MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79 /* SODIMM 76 */ MX7D_PAD_LCD_DATA01__LCD_DATA1 0x79 /* SODIMM 70 */ @@ -884,7 +884,7 @@ MX7D_PAD_LCD_DATA17__LCD_DATA17 0x79 /* SODIMM 61 */ >; }; - pinctrl_lcdif_dat_24: lcdif-dat-24-grp { + pinctrl_lcdif_dat_24: lcdifdat24grp { fsl,pins = < MX7D_PAD_LCD_DATA18__LCD_DATA18 0x79 /* SODIMM 136 */ MX7D_PAD_LCD_DATA19__LCD_DATA19 0x79 /* SODIMM 138 */ @@ -895,7 +895,7 @@ MX7D_PAD_LCD_DATA23__LCD_DATA23 0x79 /* SODIMM 146 */ >; }; - pinctrl_lcdif_ctrl: lcdif-ctrl-grp { + pinctrl_lcdif_ctrl: lcdifctrlgrp { fsl,pins = < MX7D_PAD_LCD_CLK__LCD_CLK 0x79 /* SODIMM 56 */ MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x79 /* SODIMM 44 */ @@ -913,33 +913,33 @@ MX7D_PAD_EPDC_DATA13__GPIO2_IO13 0x14 /* SODIMM 95 */ >; }; - pinctrl_pwm1: pwm1-grp { + pinctrl_pwm1: pwm1grp { fsl,pins = < MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x4 /* SODIMM 59 */ MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79 /* SODIMM 59 */ >; }; - pinctrl_pwm2: pwm2-grp { + pinctrl_pwm2: pwm2grp { fsl,pins = < MX7D_PAD_GPIO1_IO09__PWM2_OUT 0x79 /* SODIMM 28 */ >; }; - pinctrl_pwm3: pwm3-grp { + pinctrl_pwm3: pwm3grp { fsl,pins = < MX7D_PAD_GPIO1_IO10__PWM3_OUT 0x79 /* SODIMM 30 */ >; }; - pinctrl_pwm4: pwm4-grp { + pinctrl_pwm4: pwm4grp { fsl,pins = < MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20 0x4 /* SODIMM 67 */ MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x79 /* SODIMM 67 */ >; }; - pinctrl_uart1: uart1-grp { + pinctrl_uart1: uart1grp { fsl,pins = < MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS 0x79 /* SODIMM 25 */ MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS 0x79 /* SODIMM 27 */ @@ -948,14 +948,14 @@ MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX 0x79 /* SODIMM 33 */ >; }; - pinctrl_uart1_ctrl1: uart1-ctrl1-grp { + pinctrl_uart1_ctrl1: uart1ctrl1grp { fsl,pins = < MX7D_PAD_SD2_DATA0__GPIO5_IO14 0x14 /* SODIMM 23 / DTR */ MX7D_PAD_SD2_DATA1__GPIO5_IO15 0x14 /* SODIMM 31 / DCD */ >; }; - pinctrl_uart2: uart2-grp { + pinctrl_uart2: uart2grp { fsl,pins = < MX7D_PAD_SAI2_RX_DATA__UART2_DTE_RTS 0x79 /* SODIMM 32 / CTS */ MX7D_PAD_SAI2_TX_DATA__UART2_DTE_CTS 0x79 /* SODIMM 34 / RTS */ @@ -963,20 +963,20 @@ MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX 0x79 /* SODIMM 38 */ MX7D_PAD_UART2_TX_DATA__UART2_DTE_RX 0x79 /* SODIMM 36 */ >; }; - pinctrl_uart3: uart3-grp { + pinctrl_uart3: uart3grp { fsl,pins = < MX7D_PAD_UART3_RX_DATA__UART3_DTE_TX 0x79 /* SODIMM 21 */ MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX 0x79 /* SODIMM 19 */ >; }; - pinctrl_usbc_det: gpio-usbc-det { + pinctrl_usbc_det: usbcdetgrp { fsl,pins = < MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x14 /* SODIMM 137 / USBC_DET */ >; }; - pinctrl_usbh_reg: gpio-usbh-vbus { + pinctrl_usbh_reg: usbhreggrp { fsl,pins = < MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14 /* SODIMM 129 / USBH_PEN */ >; @@ -1043,7 +1043,7 @@ MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19 >; }; - pinctrl_usdhc3_100mhz: usdhc3grp_100mhz { + pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { fsl,pins = < MX7D_PAD_SD3_CLK__SD3_CLK 0x1a MX7D_PAD_SD3_CMD__SD3_CMD 0x5a @@ -1059,7 +1059,7 @@ MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a >; }; - pinctrl_usdhc3_200mhz: usdhc3grp_200mhz { + pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { fsl,pins = < MX7D_PAD_SD3_CLK__SD3_CLK 0x1b MX7D_PAD_SD3_CMD__SD3_CMD 0x5b @@ -1075,7 +1075,7 @@ MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b >; }; - pinctrl_sai1: sai1-grp { + pinctrl_sai1: sai1grp { fsl,pins = < MX7D_PAD_ENET1_COL__SAI1_TX_DATA0 0x30 MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK 0x1f @@ -1084,7 +1084,7 @@ MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC 0x1f >; }; - pinctrl_sai1_mclk: sai1grp_mclk { + pinctrl_sai1_mclk: sai1mclkgrp { fsl,pins = < MX7D_PAD_SAI1_MCLK__SAI1_MCLK 0x1f >; @@ -1107,7 +1107,7 @@ MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x0 >; }; - pinctrl_gpio_lpsr: gpio1-grp { + pinctrl_gpio_lpsr: gpiolpsrgrp { fsl,pins = < MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x59 /* SODIMM 135 */ MX7D_PAD_LPSR_GPIO1_IO03__GPIO1_IO3 0x59 /* SODIMM 22 */ @@ -1120,7 +1120,7 @@ MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x19 /* SODIMM 45 / WAKE_UP */ >; }; - pinctrl_i2c1: i2c1-grp { + pinctrl_i2c1: i2c1grp { fsl,pins = < MX7D_PAD_LPSR_GPIO1_IO04__I2C1_SCL 0x4000007f MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA 0x4000007f @@ -1134,7 +1134,7 @@ MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x4000007f >; }; - pinctrl_uart1_ctrl2: uart1-ctrl2-grp { + pinctrl_uart1_ctrl2: uart1ctrl2grp { fsl,pins = < MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x14 /* SODIMM 37 / RI */ MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14 /* SODIMM 29 / DSR */ From patchwork Mon May 16 14:13:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 573083 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5C933C433EF for ; Mon, 16 May 2022 14:13:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244409AbiEPONn (ORCPT ); Mon, 16 May 2022 10:13:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40836 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244408AbiEPONi (ORCPT ); Mon, 16 May 2022 10:13:38 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.196]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C26AA3B001; Mon, 16 May 2022 07:13:36 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MCc0S-1nysvc1IKA-009TOo; Mon, 16 May 2022 16:13:18 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Arnd Bergmann , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , Marcel Ziswiler , NXP Linux Team , Olof Johansson , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, soc@kernel.org Subject: [PATCH v2 24/24] ARM: dts: imx7-colibri: add support for Toradex Iris carrier boards Date: Mon, 16 May 2022 16:13:13 +0200 Message-Id: <20220516141313.494569-1-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220516134734.493065-1-marcel@ziswiler.com> References: <20220516134734.493065-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:gJ7wOm1eo5meT2vDVGz+o1rdcGL9zqiyzJHwYUg6lrRTERJmyGj fZEZ9dDjlUzt2LsTf+b/p9bjiIQqBQFkZ+Ry+nHeV6s3vqT5AOWM7J21oW2cvyEkjbOqcan y9cUan3dSji1oNNMWeJJbBUd2iKcshJ7pK30VJmQPDYJrA4Wu6C5WeT5aWITAvYIMGXl7UK 46BVcOpGkn6xpMVzMK/Bw== X-UI-Out-Filterresults: notjunk:1;V03:K0:SA1kIogk4Js=:Ou40Mej/z7gI1C6zRERqEZ qvE5s1FxULrtuB+La64QJ1xjLeMTVOEseD+Tii6Cnxk3SOsFu3hKQ2jLZOsD87E5mh5U7OIin 6ca472/Wmml3CpjEJwEiq+hS7grfW8SfMW19MrY5gGzPdqVXnsalO+6rjJsIsnXwclj4uqUOy K31L65EChVtnh67yovCg83s9rhMeRXh/Jwdoeuvyl5IAA5oR00S2xAXXuG9JaqNQQ1dkiOffB agDhiVOvCzgkAzW42tiq9V2US4QVo1s/DVBTjlQKPRtRBxuNtw1URUpszRJPJcaMnNox5GShw y35uxQgYjhF/S2qlmEVvUlj2fh+cNHN/6S1/LXp5cQyCiXLoDgOJB/fpS/jNKhPgrnhQYkjxH KOzsCdYeEGhxH+srRJOuACbKLCuhYcdBPip88W2PA/bJLbOlVDJTQOrm43DXFGB1lFHQTvxaa 1P/HfztiAAES6NC1ROIStOxs8xF443rqCPu3Ao99weSYuHP8KtjZnlyTzKV3Yd2gceUP6j49C R33Pe+bzKVDLbuTXSRMtpRv4TfVxpY5CrVTJIxHj5KkXO8H2PagrvYe0WJabz3zuNOcNd+JcM rJGMeVUKu0VE0WfHNUJkTHW2Do3mklBUcNy1fiNFagQsp01PgplqV/+QmX3MDoa41gM4f2sv7 8OgI4lErGYh8lCRZWAHvXfq8h1lXD4hE6vjYx36GNP7OioSz8oPaUb4eYG+vKD56FjG811pS6 qHvoZIYpFjd0kgeX Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Add support for Toradex Iris, small form-factor Pico-ITX Colibri Arm Computer Module family Carrier Board. Additional details available at https://www.toradex.com/products/carrier-board/iris-carrier-board Signed-off-by: Marcel Ziswiler --- Changes in v2: - Revert change on arch/arm/boot/dts/imx6dl-colibri-iris.dts which slipped into this patch set by error. - Re-based on top of Shawn's for-next. arch/arm/boot/dts/Makefile | 6 + arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi | 112 ++++++++++++++++++ arch/arm/boot/dts/imx7-colibri-iris.dtsi | 108 +++++++++++++++++ .../boot/dts/imx7d-colibri-emmc-iris-v2.dts | 21 ++++ arch/arm/boot/dts/imx7d-colibri-emmc-iris.dts | 21 ++++ arch/arm/boot/dts/imx7d-colibri-iris-v2.dts | 83 +++++++++++++ arch/arm/boot/dts/imx7d-colibri-iris.dts | 56 +++++++++ arch/arm/boot/dts/imx7s-colibri-iris-v2.dts | 78 ++++++++++++ arch/arm/boot/dts/imx7s-colibri-iris.dts | 51 ++++++++ 9 files changed, 536 insertions(+) create mode 100644 arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi create mode 100644 arch/arm/boot/dts/imx7-colibri-iris.dtsi create mode 100644 arch/arm/boot/dts/imx7d-colibri-emmc-iris-v2.dts create mode 100644 arch/arm/boot/dts/imx7d-colibri-emmc-iris.dts create mode 100644 arch/arm/boot/dts/imx7d-colibri-iris-v2.dts create mode 100644 arch/arm/boot/dts/imx7d-colibri-iris.dts create mode 100644 arch/arm/boot/dts/imx7s-colibri-iris-v2.dts create mode 100644 arch/arm/boot/dts/imx7s-colibri-iris.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index a496c4751c86..e8c109d5e3bd 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -735,8 +735,12 @@ dtb-$(CONFIG_SOC_IMX7D) += \ imx7d-cl-som-imx7.dtb \ imx7d-colibri-aster.dtb \ imx7d-colibri-emmc-aster.dtb \ + imx7d-colibri-emmc-iris.dtb \ + imx7d-colibri-emmc-iris-v2.dtb \ imx7d-colibri-emmc-eval-v3.dtb \ imx7d-colibri-eval-v3.dtb \ + imx7d-colibri-iris.dtb \ + imx7d-colibri-iris-v2.dtb \ imx7d-flex-concentrator.dtb \ imx7d-flex-concentrator-mfg.dtb \ imx7d-mba7.dtb \ @@ -756,6 +760,8 @@ dtb-$(CONFIG_SOC_IMX7D) += \ imx7d-zii-rpu2.dtb \ imx7s-colibri-aster.dtb \ imx7s-colibri-eval-v3.dtb \ + imx7s-colibri-iris.dtb \ + imx7s-colibri-iris-v2.dtb \ imx7s-mba7.dtb \ imx7s-warp.dtb dtb-$(CONFIG_SOC_IMX7ULP) += \ diff --git a/arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi b/arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi new file mode 100644 index 000000000000..6e199613583c --- /dev/null +++ b/arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi @@ -0,0 +1,112 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/ { + reg_3v3_vmmc: regulator-3v3-vmmc { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio5 16 GPIO_ACTIVE_HIGH>; /* SODIMM 100 */ + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "3v3_vmmc"; + startup-delay-us = <100>; + }; +}; + +/* Colibri AD0 to AD3 */ +&adc1 { + status = "okay"; +}; + +/* Colibri SSP */ +&ecspi3 { + status = "okay"; +}; + +/* Colibri Fast Ethernet */ +&fec1 { + status = "okay"; +}; + +&gpio2 { + /* + * uart_b_c_on_x14_enable turns the UART transceiver for UART2 and 5 on. If one wants to + * turn the transceiver off, that property has to be deleted and the gpio handled in + * userspace. + * The same applies to uart_a_on_x13_enable where the UART_A transceiver is turned on. + */ + uart-b-c-on-x14-enable-hog { + gpio-hog; + gpios = <27 GPIO_ACTIVE_HIGH>; /* SODIMM 104 */ + output-high; + }; +}; + +&gpio5 { + uart-a-on-x13-enable-hog { + gpio-hog; + gpios = <17 GPIO_ACTIVE_HIGH>; /* SODIMM 102 */ + output-high; + }; +}; + +/* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */ +&i2c4 { + status = "okay"; +}; + +/* Colibri PWM */ +&pwm1 { + status = "okay"; +}; + +/* Colibri PWM */ +&pwm2 { + status = "okay"; +}; + +/* Colibri PWM */ +&pwm3 { + status = "okay"; +}; + +/* Colibri PWM */ +&pwm4 { + status = "okay"; +}; + +/* M41T0M6 real time clock */ +&rtc { + status = "okay"; +}; + +/* Colibri UART_A */ +&uart1 { + status = "okay"; +}; + +/* Colibri UART_B */ +&uart2 { + status = "okay"; +}; + +/* Colibri UART_C */ +&uart3 { + status = "okay"; +}; + +/* Colibri USBC */ +&usbotg1 { + status = "okay"; +}; + +/* Colibri MMC/SD, UHS-I capable uSD slot */ +&usdhc1 { + cap-power-off-card; + /delete-property/ keep-power-in-suspend; + /delete-property/ no-1-8-v; + vmmc-supply = <®_3v3_vmmc>; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx7-colibri-iris.dtsi b/arch/arm/boot/dts/imx7-colibri-iris.dtsi new file mode 100644 index 000000000000..175c5d478d2e --- /dev/null +++ b/arch/arm/boot/dts/imx7-colibri-iris.dtsi @@ -0,0 +1,108 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/* Colibri AD0 to AD3 */ +&adc1 { + status = "okay"; +}; + +/* + * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM, PWM, aka pwm2, pwm3. + * So if you enable following capacitive touch controller, disable pwm2/pwm3 first. + */ +&atmel_mxt_ts { + interrupt-parent = <&gpio1>; + interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28 / INT */ + pinctrl-0 = <&pinctrl_atmel_adapter>; + reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; /* SODIMM 30 / RST */ +}; + +/* Colibri SSP */ +&ecspi3 { + status = "okay"; +}; + +/* Colibri Fast Ethernet */ +&fec1 { + status = "okay"; +}; + +&gpio2 { + /* + * uart25 turns the UART transceiver for UART2 and 5 on. If one wants to turn the + * transceiver off, that property has to be deleted and the gpio handled in userspace. + * The same applies to uart1_tx_on where the UART1 transceiver is turned on. + */ + uart25-tx-on-hog { + gpio-hog; + gpios = <27 GPIO_ACTIVE_HIGH>; /* SODIMM 104 */ + output-high; + }; +}; + +&gpio5 { + uart1-tx-on-hog { + gpio-hog; + gpios = <17 GPIO_ACTIVE_HIGH>; /* SODIMM 102 */ + output-high; + }; +}; + +/* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */ +&i2c4 { + status = "okay"; +}; + +/* Colibri PWM */ +&pwm1 { + status = "okay"; +}; + +/* Colibri PWM */ +&pwm2 { + /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ + status = "okay"; +}; + +/* Colibri PWM */ +&pwm3 { + /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ + status = "okay"; +}; + +/* Colibri PWM */ +&pwm4 { + status = "okay"; +}; + +/* M41T0M6 real time clock */ +&rtc { + status = "okay"; +}; + +/* Colibri UART_A */ +&uart1 { + status = "okay"; +}; + +/* Colibri UART_B */ +&uart2 { + status = "okay"; +}; + +/* Colibri UART_C */ +&uart3 { + status = "okay"; +}; + +/* Colibri USBC */ +&usbotg1 { + status = "okay"; +}; + +/* Colibri MMC/SD */ +&usdhc1 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-iris-v2.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-iris-v2.dts new file mode 100644 index 000000000000..7347659557f3 --- /dev/null +++ b/arch/arm/boot/dts/imx7d-colibri-emmc-iris-v2.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; +#include "imx7d-colibri-emmc.dtsi" +#include "imx7-colibri-iris-v2.dtsi" + +/ { + model = "Toradex Colibri iMX7D 1GB on Iris V2 Carrier Board"; + compatible = "toradex,colibri-imx7d-emmc-iris-v2", + "toradex,colibri-imx7d-emmc", + "toradex,colibri-imx7d", + "fsl,imx7d"; +}; + +/* Colibri USBH */ +&usbotg2 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-iris.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-iris.dts new file mode 100644 index 000000000000..5324c92e368d --- /dev/null +++ b/arch/arm/boot/dts/imx7d-colibri-emmc-iris.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; +#include "imx7d-colibri-emmc.dtsi" +#include "imx7-colibri-iris.dtsi" + +/ { + model = "Toradex Colibri iMX7D 1GB on Iris Carrier Board"; + compatible = "toradex,colibri-imx7d-emmc-iris", + "toradex,colibri-imx7d-emmc", + "toradex,colibri-imx7d", + "fsl,imx7d"; +}; + +/* Colibri USBH */ +&usbotg2 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx7d-colibri-iris-v2.dts b/arch/arm/boot/dts/imx7d-colibri-iris-v2.dts new file mode 100644 index 000000000000..5762f51d5f0f --- /dev/null +++ b/arch/arm/boot/dts/imx7d-colibri-iris-v2.dts @@ -0,0 +1,83 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; +#include "imx7d-colibri.dtsi" +#include "imx7-colibri-iris-v2.dtsi" + +/ { + model = "Toradex Colibri iMX7D on Iris V2 Carrier Board"; + compatible = "toradex,colibri-imx7d-iris-v2", + "toradex,colibri-imx7d", + "fsl,imx7d"; +}; + +&ad7879_ts { + status = "okay"; +}; + +&atmel_mxt_ts { + status = "okay"; +}; + +&backlight { + status = "okay"; +}; + +&gpio2 { + /* + * This switches the LVDS transceiver to VESA color mapping mode. + */ + lvds-color-map-hog { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; /* SODIMM 95 */ + line-name = "LVDS_COLOR_MAP"; + output-low; + }; +}; + +&gpio7 { + /* + * This switches the LVDS transceiver to the 24-bit RGB mode. + */ + lvds-rgb-mode-hog { + gpio-hog; + gpios = <2 GPIO_ACTIVE_HIGH>; /* SODIMM 63 */ + line-name = "LVDS_RGB_MODE"; + output-low; + }; + + /* + * This switches the LVDS transceiver to the single-channel + * output mode. + */ + lvds-ch-mode-hog { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; /* SODIMM 55 */ + line-name = "LVDS_CH_MODE"; + output-high; + }; + + /* This turns the LVDS transceiver on */ + lvds-power-on-hog { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; /* SODIMM 99 */ + line-name = "LVDS_POWER_ON"; + output-high; + }; +}; + +&lcdif { + status = "okay"; +}; + +&panel_dpi { + status = "okay"; +}; + +/* Colibri USBH */ +&usbotg2 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx7d-colibri-iris.dts b/arch/arm/boot/dts/imx7d-colibri-iris.dts new file mode 100644 index 000000000000..9c63cb9d9a64 --- /dev/null +++ b/arch/arm/boot/dts/imx7d-colibri-iris.dts @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; +#include "imx7d-colibri.dtsi" +#include "imx7-colibri-iris.dtsi" + +/ { + model = "Toradex Colibri iMX7D on Iris Carrier Board"; + compatible = "toradex,colibri-imx7d-iris", + "toradex,colibri-imx7d", + "fsl,imx7d"; +}; + +&ad7879_ts { + status = "okay"; +}; + +/* + * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM, PWM, aka pwm2, pwm3. + * So if you enable following capacitive touch controller, disable pwm2/pwm3 first. + */ +&atmel_mxt_ts { + status = "disabled"; +}; + +&backlight { + status = "okay"; +}; + +&lcdif { + status = "okay"; +}; + +&panel_dpi { + status = "okay"; +}; + +/* Colibri PWM */ +&pwm2 { + /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ + status = "okay"; +}; + +/* Colibri PWM */ +&pwm3 { + /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ + status = "okay"; +}; + +/* Colibri USBH */ +&usbotg2 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx7s-colibri-iris-v2.dts b/arch/arm/boot/dts/imx7s-colibri-iris-v2.dts new file mode 100644 index 000000000000..72b5c17ab1ab --- /dev/null +++ b/arch/arm/boot/dts/imx7s-colibri-iris-v2.dts @@ -0,0 +1,78 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; +#include "imx7s-colibri.dtsi" +#include "imx7-colibri-iris-v2.dtsi" + +/ { + model = "Toradex Colibri iMX7S on Iris V2 Carrier Board"; + compatible = "toradex,colibri-imx7s-iris-v2", + "toradex,colibri-imx7s", + "fsl,imx7s"; +}; + +&ad7879_ts { + status = "okay"; +}; + +&atmel_mxt_ts { + status = "okay"; +}; + +&backlight { + status = "okay"; +}; + +&gpio2 { + /* + * This switches the LVDS transceiver to VESA color mapping mode. + */ + lvds-color-map-hog { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; /* SODIMM 95 */ + line-name = "LVDS_COLOR_MAP"; + output-low; + }; +}; + +&gpio7 { + /* + * This switches the LVDS transceiver to the 24-bit RGB mode. + */ + lvds-rgb-mode-hog { + gpio-hog; + gpios = <2 GPIO_ACTIVE_HIGH>; /* SODIMM 63 */ + line-name = "LVDS_RGB_MODE"; + output-low; + }; + + /* + * This switches the LVDS transceiver to the single-channel + * output mode. + */ + lvds-ch-mode-hog { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; /* SODIMM 55 */ + line-name = "LVDS_CH_MODE"; + output-high; + }; + + /* This turns the LVDS transceiver on */ + lvds-power-on-hog { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; /* SODIMM 99 */ + line-name = "LVDS_POWER_ON"; + output-high; + }; +}; + +&lcdif { + status = "okay"; +}; + +&panel_dpi { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx7s-colibri-iris.dts b/arch/arm/boot/dts/imx7s-colibri-iris.dts new file mode 100644 index 000000000000..26ba72c17feb --- /dev/null +++ b/arch/arm/boot/dts/imx7s-colibri-iris.dts @@ -0,0 +1,51 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; +#include "imx7s-colibri.dtsi" +#include "imx7-colibri-iris.dtsi" + +/ { + model = "Toradex Colibri iMX7S on Iris Carrier Board"; + compatible = "toradex,colibri-imx7s-iris", + "toradex,colibri-imx7s", + "fsl,imx7s"; +}; + +&ad7879_ts { + status = "okay"; +}; + +/* + * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM, PWM, aka pwm2, pwm3. + * So if you enable following capacitive touch controller, disable pwm2/pwm3 first. + */ +&atmel_mxt_ts { + status = "disabled"; +}; + +&backlight { + status = "okay"; +}; + +&lcdif { + status = "okay"; +}; + +&panel_dpi { + status = "okay"; +}; + +/* Colibri PWM */ +&pwm2 { + /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ + status = "okay"; +}; + +/* Colibri PWM */ +&pwm3 { + /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ + status = "okay"; +};