From patchwork Tue May 17 20:53:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 573491 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9AB95C4332F for ; Tue, 17 May 2022 20:53:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353035AbiEQUxw (ORCPT ); Tue, 17 May 2022 16:53:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46634 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353027AbiEQUxt (ORCPT ); Tue, 17 May 2022 16:53:49 -0400 Received: from mail-ed1-x536.google.com (mail-ed1-x536.google.com [IPv6:2a00:1450:4864:20::536]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5BD025251C; Tue, 17 May 2022 13:53:47 -0700 (PDT) Received: by mail-ed1-x536.google.com with SMTP id er5so423689edb.12; Tue, 17 May 2022 13:53:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=xhrqAZKki9p8kfD4Aw0S/OFG/2I4dcqP1LgHwfrZxuc=; b=LQ+6xMv7KgxuTtYylKHTvgkLQsnhgx0E9rc9jm2gWRi//6p2ZwydW9H6kYbLq6S3cK Q6PVFLGch2t5azpG4yvNNqgyJKqsOEVP9hPBAdiZc19Bf00tAFQszb5/8Mci3UByepHR xYx92xQ7Xx0+Ae+bUQ9KMDSCBKTP1MMO8A0vdMyrKs+pCVMkt2qPiMcG5zwhRNS2zr9I hXaQhX0ujNi1lRUtP2/GKiVK738OaXdV4IOlPBBQpmPBzoEeXbatN3L67SUoOFl5VyCq Ws1hZQqvhFSZ4ih8OHQBh8yGKs49rzLxYaFaYmwBHSgOuGKUPpObsIyyBLW25TXS/F5C Ippg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=xhrqAZKki9p8kfD4Aw0S/OFG/2I4dcqP1LgHwfrZxuc=; b=QA58eFXfxSqGfrPB1cC8UcW7o9XUEHrYj1poraCy2oGHg/UZ4RHQ+cN77xyFouwX1O CRvjUrVt/6VeT6zP6f7nxqb3mE62rB1a7L9Q3m8HpfrTIdlmyJo6PiMehsHolcBiXLlL GFRPV39hfNKdWM7crdHjjgR4zKcHu39X6Sb9rvBqCqvrjvK+/OLpFxMBUJeK2VR8cfdG PWIjG3YMuSgTKm3WeVI+QC02eNAF8ZgcRungYN/nbuIOaNdl855JXdkYqptXEHBKRWnS /KWjzZTREJqSgeI04xGKSAtu8exxlfZg6mBXSF7PjJHnJNt6HErvs/HecFHliD+TJnp7 woDA== X-Gm-Message-State: AOAM530Udh4nFzmMBkDVSjE0XfgtC/mRpwLYUCcUNttlu4Y3SPUuZk/U t4CzQDou++ccoEGNIMjn1Bu8b78ZXXQojg== X-Google-Smtp-Source: ABdhPJxr94OsSk3vgP8X5sjhTKi8QVGU1mtZYIrnirEaGoP1vXVthmq/px+6OPzX+4EbUGtCEdodow== X-Received: by 2002:a05:6402:3322:b0:42a:d1d2:f76e with SMTP id e34-20020a056402332200b0042ad1d2f76emr2504259eda.353.1652820825649; Tue, 17 May 2022 13:53:45 -0700 (PDT) Received: from fedora.robimarko.hr ([188.252.220.143]) by smtp.googlemail.com with ESMTPSA id v22-20020a17090651d600b006f3ef214e10sm120907ejk.118.2022.05.17.13.53.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 May 2022 13:53:45 -0700 (PDT) From: Robert Marko To: agross@kernel.org, bjorn.andersson@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Robert Marko Subject: [PATCH v3 1/6] dt-bindings: regulator: qcom,spmi-regulator: Convert to dtschema Date: Tue, 17 May 2022 22:53:36 +0200 Message-Id: <20220517205341.536587-1-robimarko@gmail.com> X-Mailer: git-send-email 2.36.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Convert the bindings of Qualcomm SPMI regulators to DT schema. Signed-off-by: Robert Marko --- Changes in v3: * Remove quotes around refs * Use much stricter regex for regulator node matching * Add supply matching per compatible * Add blank interrupts and interrupt-names as generic properties Changes in v2: * Remove the forgotten text bindings * Move allOf after patternProperties * Use my private email as the maintainer email I am aware that syscon alone is not really acceptable, its converted directly from the old text bindings. There is also the issue of some MSM8994, MSM8996 and APQ8096 devices using '#address-cells', '#size-cells', some even defining reg property for regulators. Any advice on how to solve these issues is appreciated. --- .../regulator/qcom,spmi-regulator.txt | 347 ------------------ .../regulator/qcom,spmi-regulator.yaml | 341 +++++++++++++++++ 2 files changed, 341 insertions(+), 347 deletions(-) delete mode 100644 Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt create mode 100644 Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.yaml diff --git a/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt b/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt deleted file mode 100644 index c2a39b121b1b..000000000000 --- a/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt +++ /dev/null @@ -1,347 +0,0 @@ -Qualcomm SPMI Regulators - -- compatible: - Usage: required - Value type: - Definition: must be one of: - "qcom,pm8004-regulators" - "qcom,pm8005-regulators" - "qcom,pm8226-regulators" - "qcom,pm8841-regulators" - "qcom,pm8916-regulators" - "qcom,pm8941-regulators" - "qcom,pm8950-regulators" - "qcom,pm8994-regulators" - "qcom,pmi8994-regulators" - "qcom,pm660-regulators" - "qcom,pm660l-regulators" - "qcom,pms405-regulators" - -- interrupts: - Usage: optional - Value type: - Definition: List of OCP interrupts. - -- interrupt-names: - Usage: required if 'interrupts' property present - Value type: - Definition: List of strings defining the names of the - interrupts in the 'interrupts' property 1-to-1. - Supported values are "ocp-", where - corresponds to a voltage switch - type regulator. - -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_s4-supply: -- vdd_s5-supply: -- vdd_s6-supply: -- vdd_s7-supply: -- vdd_s8-supply: - Usage: optional (pm8841 only) - Value type: - Definition: Reference to regulator supplying the input pin, as - described in the data sheet. - -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_s4-supply: -- vdd_l1_l3-supply: -- vdd_l2-supply: -- vdd_l4_l5_l6-supply: -- vdd_l7-supply: -- vdd_l8_l11_l14_l15_l16-supply: -- vdd_l9_l10_l12_l13_l17_l18-supply: - Usage: optional (pm8916 only) - Value type: - Definition: Reference to regulator supplying the input pin, as - described in the data sheet. - -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_l1_l3-supply: -- vdd_l2_lvs_1_2_3-supply: -- vdd_l4_l11-supply: -- vdd_l5_l7-supply: -- vdd_l6_l12_l14_l15-supply: -- vdd_l8_l16_l18_19-supply: -- vdd_l9_l10_l17_l22-supply: -- vdd_l13_l20_l23_l24-supply: -- vdd_l21-supply: -- vin_5vs-supply: - Usage: optional (pm8941 only) - Value type: - Definition: Reference to regulator supplying the input pin, as - described in the data sheet. - -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_s4-supply: -- vdd_s4-supply: -- vdd_s5-supply: -- vdd_s6-supply: -- vdd_l1_l19-supply: -- vdd_l2_l23-supply: -- vdd_l3-supply: -- vdd_l4_l5_l6_l7_l16-supply: -- vdd_l8_l11_l12_l17_l22-supply: -- vdd_l9_l10_l13_l14_l15_l18-supply: -- vdd_l20-supply: -- vdd_l21-supply: - Usage: optional (pm8950 only) - Value type: - Definition: reference to regulator supplying the input pin, as - described in the data sheet - -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_s4-supply: -- vdd_s5-supply: -- vdd_s6-supply: -- vdd_s7-supply: -- vdd_s8-supply: -- vdd_s9-supply: -- vdd_s10-supply: -- vdd_s11-supply: -- vdd_s12-supply: -- vdd_l1-supply: -- vdd_l2_l26_l28-supply: -- vdd_l3_l11-supply: -- vdd_l4_l27_l31-supply: -- vdd_l5_l7-supply: -- vdd_l6_l12_l32-supply: -- vdd_l8_l16_l30-supply: -- vdd_l9_l10_l18_l22-supply: -- vdd_l13_l19_l23_l24-supply: -- vdd_l14_l15-supply: -- vdd_l17_l29-supply: -- vdd_l20_l21-supply: -- vdd_l25-supply: -- vdd_lvs_1_2-supply: - Usage: optional (pm8994 only) - Value type: - Definition: Reference to regulator supplying the input pin, as - described in the data sheet. - -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_l1-supply: - Usage: optional (pmi8994 only) - Value type: - Definition: Reference to regulator supplying the input pin, as - described in the data sheet. - -- vdd_l1_l6_l7-supply: -- vdd_l2_l3-supply: -- vdd_l5-supply: -- vdd_l8_l9_l10_l11_l12_l13_l14-supply: -- vdd_l15_l16_l17_l18_l19-supply: -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_s5-supply: -- vdd_s6-supply: - Usage: optional (pm660 only) - Value type: - Definition: Reference to regulator supplying the input pin, as - described in the data sheet. - -- vdd_l1_l9_l10-supply: -- vdd_l2-supply: -- vdd_l3_l5_l7_l8-supply: -- vdd_l4_l6-supply: -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_s4-supply: -- vdd_s5-supply: - Usage: optional (pm660l only) - Value type: - Definition: Reference to regulator supplying the input pin, as - described in the data sheet. - -- vdd_l1_l2-supply: -- vdd_l3_l8-supply: -- vdd_l4-supply: -- vdd_l5_l6-supply: -- vdd_l10_l11_l12_l13-supply: -- vdd_l7-supply: -- vdd_l9-supply: -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_s4-supply: -- vdd_s5-supply - Usage: optional (pms405 only) - Value type: - Definition: Reference to regulator supplying the input pin, as - described in the data sheet. - -- qcom,saw-reg: - Usage: optional - Value type: - Description: Reference to syscon node defining the SAW registers. - - -The regulator node houses sub-nodes for each regulator within the device. Each -sub-node is identified using the node's name, with valid values listed for each -of the PMICs below. - -pm8004: - s2, s5 - -pm8005: - s1, s2, s3, s4 - -pm8841: - s1, s2, s3, s4, s5, s6, s7, s8 - -pm8916: - s1, s2, s3, s4, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, - l14, l15, l16, l17, l18 - -pm8941: - s1, s2, s3, s4, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, - l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24, lvs1, lvs2, lvs3, - 5vs1, 5vs2 - -pm8994: - s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, l1, l2, l3, l4, l5, - l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19, l20, - l21, l22, l23, l24, l25, l26, l27, l28, l29, l30, l31, l32, lvs1, lvs2 - -pmi8994: - s1, s2, s3, l1 - -The content of each sub-node is defined by the standard binding for regulators - -see regulator.txt - with additional custom properties described below: - -- regulator-initial-mode: - Usage: optional - Value type: - Description: 2 = Set initial mode to auto mode (automatically select - between HPM and LPM); not available on boost type - regulators. - - 1 = Set initial mode to high power mode (HPM), also referred - to as NPM. HPM consumes more ground current than LPM, but - it can source significantly higher load current. HPM is not - available on boost type regulators. For voltage switch type - regulators, HPM implies that over current protection and - soft start are active all the time. - - 0 = Set initial mode to low power mode (LPM). - -- qcom,ocp-max-retries: - Usage: optional - Value type: - Description: Maximum number of times to try toggling a voltage switch - off and back on as a result of consecutive over current - events. - -- qcom,ocp-retry-delay: - Usage: optional - Value type: - Description: Time to delay in milliseconds between each voltage switch - toggle after an over current event takes place. - -- qcom,pin-ctrl-enable: - Usage: optional - Value type: - Description: Bit mask specifying which hardware pins should be used to - enable the regulator, if any; supported bits are: - 0 = ignore all hardware enable signals - BIT(0) = follow HW0_EN signal - BIT(1) = follow HW1_EN signal - BIT(2) = follow HW2_EN signal - BIT(3) = follow HW3_EN signal - -- qcom,pin-ctrl-hpm: - Usage: optional - Value type: - Description: Bit mask specifying which hardware pins should be used to - force the regulator into high power mode, if any; - supported bits are: - 0 = ignore all hardware enable signals - BIT(0) = follow HW0_EN signal - BIT(1) = follow HW1_EN signal - BIT(2) = follow HW2_EN signal - BIT(3) = follow HW3_EN signal - BIT(4) = follow PMIC awake state - -- qcom,vs-soft-start-strength: - Usage: optional - Value type: - Description: This property sets the soft start strength for voltage - switch type regulators; supported values are: - 0 = 0.05 uA - 1 = 0.25 uA - 2 = 0.55 uA - 3 = 0.75 uA - -- qcom,saw-slave: - Usage: optional - Value type: - Description: SAW controlled gang slave. Will not be configured. - -- qcom,saw-leader: - Usage: optional - Value type: - Description: SAW controlled gang leader. Will be configured as - SAW regulator. - -Example: - - regulators { - compatible = "qcom,pm8941-regulators"; - vdd_l1_l3-supply = <&s1>; - - s1: s1 { - regulator-min-microvolt = <1300000>; - regulator-max-microvolt = <1400000>; - }; - - ... - - l1: l1 { - regulator-min-microvolt = <1225000>; - regulator-max-microvolt = <1300000>; - }; - - .... - }; - -Example 2: - - saw3: syscon@9A10000 { - compatible = "syscon"; - reg = <0x9A10000 0x1000>; - }; - - ... - - spm-regulators { - compatible = "qcom,pm8994-regulators"; - qcom,saw-reg = <&saw3>; - s8 { - qcom,saw-slave; - }; - s9 { - qcom,saw-slave; - }; - s10 { - qcom,saw-slave; - }; - pm8994_s11_saw: s11 { - qcom,saw-leader; - regulator-always-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1140000>; - }; - }; diff --git a/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.yaml new file mode 100644 index 000000000000..7f51e305eaae --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.yaml @@ -0,0 +1,341 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/qcom,spmi-regulator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SPMI Regulators + +maintainers: + - Robert Marko + +properties: + compatible: + enum: + - qcom,pm660-regulators + - qcom,pm660l-regulators + - qcom,pm8004-regulators + - qcom,pm8005-regulators + - qcom,pm8226-regulators + - qcom,pm8841-regulators + - qcom,pm8916-regulators + - qcom,pm8941-regulators + - qcom,pm8950-regulators + - qcom,pm8994-regulators + - qcom,pmi8994-regulators + - qcom,pms405-regulators + + interrupts: true + + interrupt-names: true + + qcom,saw-reg: + description: Reference to syscon node defining the SAW registers + $ref: /schemas/types.yaml#/definitions/phandle + +patternProperties: + "^(5vs[1-2]|(l|s)[1-9][0-9]?|lvs[1-3])$": + description: List of regulators and its properties + type: object + $ref: regulator.yaml# + + properties: + qcom,ocp-max-retries: + description: + Maximum number of times to try toggling a voltage switch off and + back on as a result of consecutive over current events + $ref: /schemas/types.yaml#/definitions/uint32 + + qcom,ocp-retry-delay: + description: + Time to delay in milliseconds between each voltage switch toggle + after an over current event takes place + $ref: /schemas/types.yaml#/definitions/uint32 + + qcom,pin-ctrl-enable: + description: + Bit mask specifying which hardware pins should be used to enable the + regulator, if any. + Supported bits are + 0 = ignore all hardware enable signals + BIT(0) = follow HW0_EN signal + BIT(1) = follow HW1_EN signal + BIT(2) = follow HW2_EN signal + BIT(3) = follow HW3_EN signal + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 15 + + qcom,pin-ctrl-hpm: + description: + Bit mask specifying which hardware pins should be used to force the + regulator into high power mode, if any. + Supported bits are + 0 = ignore all hardware enable signals + BIT(0) = follow HW0_EN signal + BIT(1) = follow HW1_EN signal + BIT(2) = follow HW2_EN signal + BIT(3) = follow HW3_EN signal + BIT(4) = follow PMIC awake state + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 31 + + qcom,vs-soft-start-strength: + description: + This property sets the soft start strength for voltage switch type + regulators. + Supported values are + 0 = 0.05 uA + 1 = 0.25 uA + 2 = 0.55 uA + 3 = 0.75 uA + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 3 + + qcom,saw-slave: + description: SAW controlled gang slave. Will not be configured. + type: boolean + + qcom,saw-leader: + description: + SAW controlled gang leader. Will be configured as SAW regulator. + type: boolean + + unevaluatedProperties: false + +required: + - compatible + +allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,pm660-regulators + then: + properties: + vdd_l15_l16_l17_l18_l19-supply: true + vdd_l1_l6_l7-supply: true + vdd_l2_l3-supply: true + vdd_l5-supply: true + vdd_l8_l9_l10_l11_l12_l13_l14-supply: true + patternProperties: + "^vdd_s[1-6]-supply$": true + - if: + properties: + compatible: + contains: + enum: + - qcom,pm660l-regulators + then: + properties: + vdd_l1_l9_l10-supply: true + vdd_l2-supply: true + vdd_l3_l5_l7_l8-supply: true + vdd_l4_l6-supply: true + patternProperties: + "^vdd_s[1-5]-supply$": true + - if: + properties: + compatible: + contains: + enum: + - qcom,pm8004-regulators + then: + patternProperties: + "^vdd_s[25]-supply$": true + - if: + properties: + compatible: + contains: + enum: + - qcom,pm8005-regulators + then: + patternProperties: + "^vdd_s[1-4]-supply$": true + - if: + properties: + compatible: + contains: + enum: + - qcom,pm8226-regulators + then: + properties: + vdd_l10_l11_l13-supply: true + vdd_l12_l14-supply: true + vdd_l15_l16_l17_l18-supply: true + vdd_l19_l20_l21_l22_l23_l28-supply: true + vdd_l1_l2_l4_l5-supply: true + vdd_l25-supply: true + vdd_l3_l24_l26-supply: true + vdd_l6_l7_l8_l9_l27-supply: true + vdd_lvs1-supply: true + patternProperties: + "^vdd_s[1-5]-supply$": true + - if: + properties: + compatible: + contains: + enum: + - qcom,pm8841-regulators + then: + patternProperties: + "^vdd_s[1-8]-supply$": true + - if: + properties: + compatible: + contains: + enum: + - qcom,pm8916-regulators + then: + properties: + vdd_l1_l3-supply: true + vdd_l4_l5_l6-supply: true + vdd_l8_l11_l14_l15_l16-supply: true + vdd_l9_l10_l12_l13_l17_l18-supply: true + patternProperties: + "^vdd_l[27]-supply$": true + "^vdd_s[1-4]-supply$": true + - if: + properties: + compatible: + contains: + enum: + - qcom,pm8941-regulators + then: + properties: + interrupts: + items: + - description: Over-current protection interrupt for 5V S1 + - description: Over-current protection interrupt for 5V S2 + interrupt-names: + items: + - const: ocp-5vs1 + - const: ocp-5vs2 + vdd_l13_l20_l23_l24-supply: true + vdd_l1_l3-supply: true + vdd_l21-supply: true + vdd_l2_lvs_1_2_3-supply: true + vdd_l4_l11-supply: true + vdd_l5_l7-supply: true + vdd_l6_l12_l14_l15-supply: true + vdd_l8_l16_l18_19-supply: true + vdd_l9_l10_l17_l22-supply: true + vin_5vs-supply: true + patternProperties: + "^vdd_s[1-3]-supply$": true + - if: + properties: + compatible: + contains: + enum: + - qcom,pm8950-regulators + then: + properties: + vdd_l1_l19-supply: true + vdd_l20-supply: true + vdd_l21-supply: true + vdd_l2_l23-supply: true + vdd_l3-supply: true + vdd_l4_l5_l6_l7_l16-supply: true + vdd_l8_l11_l12_l17_l22-supply: true + vdd_l9_l10_l13_l14_l15_l18-supply: true + patternProperties: + "^vdd_s[1-6]-supply$": true + - if: + properties: + compatible: + contains: + enum: + - qcom,pm8994-regulators + then: + properties: + vdd_l1-supply: true + vdd_l13_l19_l23_l24-supply: true + vdd_l14_l15-supply: true + vdd_l17_l29-supply: true + vdd_l20_l21-supply: true + vdd_l25-supply: true + vdd_l2_l26_l28-supply: true + vdd_l3_l11-supply: true + vdd_l4_l27_l31-supply: true + vdd_l5_l7-supply: true + vdd_l6_l12_l32-supply: true + vdd_l8_l16_l30-supply: true + vdd_l9_l10_l18_l22-supply: true + vdd_lvs_1_2-supply: true + patternProperties: + "^vdd_s[1-9][0-2]?-supply$": true + - if: + properties: + compatible: + contains: + enum: + - qcom,pmi8994-regulators + then: + properties: + vdd_l1-supply: true + patternProperties: + "^vdd_s[1-3]-supply$": true + - if: + properties: + compatible: + contains: + enum: + - qcom,pms405-regulators + then: + properties: + vdd_s3-supply: true + +unevaluatedProperties: false + +examples: + - | + regulators { + compatible = "qcom,pm8941-regulators"; + vdd_l1_l3-supply = <&s1>; + + s1: s1 { + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <1400000>; + }; + + l1: l1 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1300000>; + }; + }; + + - | + saw3: syscon@9a10000 { + compatible = "syscon"; + reg = <0x9a10000 0x1000>; + }; + + regulators { + compatible = "qcom,pm8994-regulators"; + qcom,saw-reg = <&saw3>; + + s8 { + qcom,saw-slave; + }; + + s9 { + qcom,saw-slave; + }; + + s10 { + qcom,saw-slave; + }; + + pm8994_s11_saw: s11 { + qcom,saw-leader; + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1140000>; + }; + }; +... From patchwork Tue May 17 20:53:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 573492 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0732BC433EF for ; Tue, 17 May 2022 20:53:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353033AbiEQUxv (ORCPT ); Tue, 17 May 2022 16:53:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46636 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349048AbiEQUxt (ORCPT ); Tue, 17 May 2022 16:53:49 -0400 Received: from mail-ed1-x533.google.com (mail-ed1-x533.google.com [IPv6:2a00:1450:4864:20::533]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 649AA52525; Tue, 17 May 2022 13:53:48 -0700 (PDT) Received: by mail-ed1-x533.google.com with SMTP id en5so497547edb.1; Tue, 17 May 2022 13:53:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=oIDUTK5KnimKV7JPutWUmQpjQBhC0JH0W89/0KDYnjU=; b=dnfV2lEMAJvt9PTHFMClEM3ysANSw0wmI3otp5dX9UE6IDvmwVuL6Um0pomrixk9pu 4+Gpx09w7mj40CkxZzPgc4BSmJZOTxTIv24mO6DYDPMBN62BieOS6mAf2yUFxR/uz6HE kmUiOWDSEV7VrgGW+mjjkW1SRG/N3XuOZjRdoCjSxv0MuDl68XrOFm3ygBMz8XdV48vn sIZKvJ9kU71FbMO3t/SLYPkbvrzBbMH+raenZ2HFSj5ZD+u93oQXXQA5qYI5AusDg//B gz4oa+FzWJZ/CMFjBHf9wRG/Bp3BR4LN6i9DWyZr3zxrMgN9t8RYqlJPVthF+Sqf69jL qH4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=oIDUTK5KnimKV7JPutWUmQpjQBhC0JH0W89/0KDYnjU=; b=x5qlD/O3NF/bQrZp4SyNR5mozOk1KeNbwU5euWOMNw9Ldt/K+dE9f0um9YdzMRskAv sInEkJci2BoNAd8BKGwsB3oGVuGwyaRsVYDs8OlYypovShnaaVEjmA7s6VqXIWGtSDVD iE67Y1pOunLUVy8q7CMke/tSl7pK8AgpTmjwrgLbH3jfDTmHbFlhFyhA9v1zOK3IC19K Avb6eRKM0Y7wjF0pZwS7yHAOADVlGKzmAJiWBCmR5QcQXOiFJahJuU87dE5aQmAV1eY3 95vpl3L0GbU0Wl294RWVMIfKcETKzjfuaGVvEqgcrhdGYDPKfv3JXf/Xu39UXIjgTyG5 dAuA== X-Gm-Message-State: AOAM532t8a69o8ohEB1Wtt5j7JMw1/96888GsywpfkNJKp489/zIhOGI l+ysJfbjg5QtuFj0ztSxM54= X-Google-Smtp-Source: ABdhPJwSU25nMkZvKYNpJMBeL918OVrbpKUFyyYPBgHWoEGWrLBnTtQFq2fi7hyN1XwiX7Du2H02Tw== X-Received: by 2002:a05:6402:3291:b0:42a:aa4e:fd71 with SMTP id f17-20020a056402329100b0042aaa4efd71mr16276143eda.74.1652820826895; Tue, 17 May 2022 13:53:46 -0700 (PDT) Received: from fedora.robimarko.hr ([188.252.220.143]) by smtp.googlemail.com with ESMTPSA id v22-20020a17090651d600b006f3ef214e10sm120907ejk.118.2022.05.17.13.53.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 May 2022 13:53:46 -0700 (PDT) From: Robert Marko To: agross@kernel.org, bjorn.andersson@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Robert Marko Subject: [PATCH v3 2/6] regulator: qcom_spmi: add support for HT_P150 Date: Tue, 17 May 2022 22:53:37 +0200 Message-Id: <20220517205341.536587-2-robimarko@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220517205341.536587-1-robimarko@gmail.com> References: <20220517205341.536587-1-robimarko@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org HT_P150 is a LDO PMOS regulator based on LV P150 using HFS430 layout found in PMP8074 and PMS405 PMIC-s. Both PMP8074 and PMS405 define the programmable range as 1.616V to 3.304V but the actual MAX output voltage depends on the exact LDO in each of the PMIC-s. It has a max current of 150mA, voltage step of 8mV. Signed-off-by: Robert Marko --- drivers/regulator/qcom_spmi-regulator.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/regulator/qcom_spmi-regulator.c b/drivers/regulator/qcom_spmi-regulator.c index 02bfce981150..38bbc70241ae 100644 --- a/drivers/regulator/qcom_spmi-regulator.c +++ b/drivers/regulator/qcom_spmi-regulator.c @@ -164,6 +164,7 @@ enum spmi_regulator_subtype { SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL3 = 0x0f, SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL4 = 0x10, SPMI_REGULATOR_SUBTYPE_HFS430 = 0x0a, + SPMI_REGULATOR_SUBTYPE_HT_P150 = 0x35, }; enum spmi_common_regulator_registers { @@ -544,6 +545,10 @@ static struct spmi_voltage_range hfs430_ranges[] = { SPMI_VOLTAGE_RANGE(0, 320000, 320000, 2040000, 2040000, 8000), }; +static struct spmi_voltage_range ht_p150_ranges[] = { + SPMI_VOLTAGE_RANGE(0, 1616000, 1616000, 3304000, 3304000, 8000), +}; + static DEFINE_SPMI_SET_POINTS(pldo); static DEFINE_SPMI_SET_POINTS(nldo1); static DEFINE_SPMI_SET_POINTS(nldo2); @@ -564,6 +569,7 @@ static DEFINE_SPMI_SET_POINTS(nldo660); static DEFINE_SPMI_SET_POINTS(ht_lvpldo); static DEFINE_SPMI_SET_POINTS(ht_nldo); static DEFINE_SPMI_SET_POINTS(hfs430); +static DEFINE_SPMI_SET_POINTS(ht_p150); static inline int spmi_vreg_read(struct spmi_regulator *vreg, u16 addr, u8 *buf, int len) @@ -1458,6 +1464,7 @@ static const struct regulator_ops spmi_hfs430_ops = { static const struct spmi_regulator_mapping supported_regulators[] = { /* type subtype dig_min dig_max ltype ops setpoints hpm_min */ + SPMI_VREG(LDO, HT_P150, 0, INF, HFS430, hfs430, ht_p150, 10000), SPMI_VREG(BUCK, GP_CTL, 0, INF, SMPS, smps, smps, 100000), SPMI_VREG(BUCK, HFS430, 0, INF, HFS430, hfs430, hfs430, 10000), SPMI_VREG(LDO, N300, 0, INF, LDO, ldo, nldo1, 10000), From patchwork Tue May 17 20:53:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 573942 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0C1B3C43217 for ; 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Tue, 17 May 2022 13:53:47 -0700 (PDT) From: Robert Marko To: agross@kernel.org, bjorn.andersson@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Robert Marko Subject: [PATCH v3 3/6] dt-bindings: regulator: qcom,spmi-regulator: add PMP8074 PMIC Date: Tue, 17 May 2022 22:53:38 +0200 Message-Id: <20220517205341.536587-3-robimarko@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220517205341.536587-1-robimarko@gmail.com> References: <20220517205341.536587-1-robimarko@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Document the PMP8074 PMIC compatible. Signed-off-by: Robert Marko Reviewed-by: Krzysztof Kozlowski --- Changes in v3: * Add supply matching --- .../bindings/regulator/qcom,spmi-regulator.yaml | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.yaml index 7f51e305eaae..334ba9e5e177 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.yaml @@ -23,6 +23,7 @@ properties: - qcom,pm8950-regulators - qcom,pm8994-regulators - qcom,pmi8994-regulators + - qcom,pmp8074-regulators - qcom,pms405-regulators interrupts: true @@ -280,6 +281,17 @@ allOf: vdd_l1-supply: true patternProperties: "^vdd_s[1-3]-supply$": true + - if: + properties: + compatible: + contains: + enum: + - qcom,pmp8074-regulators + then: + properties: + vdd_l10_l11_l12_l13-supply: true + patternProperties: + "^vdd_s[3-4]-supply$": true - if: properties: compatible: From patchwork Tue May 17 20:53:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 573941 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 59BFBC4167B for ; Tue, 17 May 2022 20:53:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353047AbiEQUxz (ORCPT ); Tue, 17 May 2022 16:53:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46654 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353030AbiEQUxv (ORCPT ); Tue, 17 May 2022 16:53:51 -0400 Received: from mail-ej1-x62f.google.com (mail-ej1-x62f.google.com [IPv6:2a00:1450:4864:20::62f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 817FA5251E; Tue, 17 May 2022 13:53:50 -0700 (PDT) Received: by mail-ej1-x62f.google.com with SMTP id ks9so21109ejb.2; Tue, 17 May 2022 13:53:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DzxGK66oNP5EqUefEbuvx65uQZvfKjOjhE65FjoDOMc=; b=jFx+eOUrtBX0It6ajfqu1uIzRH3UnVFO/1Mnopjj/nUuZIoyOC9d5tFcb7gmx9dws5 Ctjx/imbEMf72FrjYAjplGZJvZ6p2tIK3+sZE+CxQ6/u2uWw+QvnWeybQYCvQzFw9+SE EVw4WrFfydipXPVJb2HOaGN+RI9CZ12Js2Y9kVWejXTlcwBWtXncJ27yCC7Nuwc6y1Cf cZb/foFxPVLGbYUNlkz9xrcTb67CXOw4MxGtRJbYiuJw8MWBzk5N3GwLI6wxT2xHhxrR TuMfDrgw3tjkaEvaGt/sFP4rsnJfzTBfRZoeS3eWyLErIyat/H4UxUqKp8WyMUqqwfV9 MxiQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DzxGK66oNP5EqUefEbuvx65uQZvfKjOjhE65FjoDOMc=; b=tg9d/C0xMTaUgNMy6ypVMPNYVszkvnGmo+X1HwUBL///YN+VdRvxm2ylDPC0csv35d jiZiUiX5qMOuqu2rvUy+yR4IdRSWLs59KKtw6RyS15cZ2um4SHi0upKs8Gi7wEtkOpud iD8TjcW6rSz+bekRpnAAA5fU1ArgvHcSAo2Q1QrAMPI9jxEbgx/tIsjl5hba9aHqTSy0 WV6+4LY6/K1QJsN9ihzU0+kyO9MA6T0bFAuzVJIXel7Pg+ovWapnGGhhyePcN+WBQv2t v3CHmttW8OirgnXPu1NjKRLS9kLiN8a5mfO8gYGPiWYrh0q6w9/3vvpqoZXVW/nAnsKI YERA== X-Gm-Message-State: AOAM533aoQxPn8mzZfcEFFBbw4VREPB/bPn65IaFMzyZx+wT9/49o1dX /KaQHxvsuxcumFDK3GgR3Ig= X-Google-Smtp-Source: ABdhPJzzAHznHiSVhGeGdTPNpnEvZ19PbgB4f+CXgV0iYW+IvTSMG4o35apslTEXyc93dsUMsVyXOQ== X-Received: by 2002:a17:907:d0a:b0:6f4:98fb:f407 with SMTP id gn10-20020a1709070d0a00b006f498fbf407mr20983877ejc.219.1652820829124; Tue, 17 May 2022 13:53:49 -0700 (PDT) Received: from fedora.robimarko.hr ([188.252.220.143]) by smtp.googlemail.com with ESMTPSA id v22-20020a17090651d600b006f3ef214e10sm120907ejk.118.2022.05.17.13.53.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 May 2022 13:53:48 -0700 (PDT) From: Robert Marko To: agross@kernel.org, bjorn.andersson@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Robert Marko Subject: [PATCH v3 4/6] regulator: qcom_spmi: Add support for PMP8074 regulators Date: Tue, 17 May 2022 22:53:39 +0200 Message-Id: <20220517205341.536587-4-robimarko@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220517205341.536587-1-robimarko@gmail.com> References: <20220517205341.536587-1-robimarko@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org PMP8074 is a companion PMIC for the Qualcomm IPQ8074 WiSoC-s. It features 5 HF-SMPS and 13 LDO regulators. This commit adds support for S3 and S4 HF-SMPS buck regulators of the HFS430 type and LDO11 of the HT_P150 type. S3 is the CPU cluster voltage supply, S4 supplies the UBI32 NPU cores and LDO11 is the SDIO/eMMC I/O voltage regulator required for high speeds. Signed-off-by: Robert Marko --- drivers/regulator/qcom_spmi-regulator.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/regulator/qcom_spmi-regulator.c b/drivers/regulator/qcom_spmi-regulator.c index 38bbc70241ae..696b088aae40 100644 --- a/drivers/regulator/qcom_spmi-regulator.c +++ b/drivers/regulator/qcom_spmi-regulator.c @@ -2137,6 +2137,13 @@ static const struct spmi_regulator_data pms405_regulators[] = { { } }; +static const struct spmi_regulator_data pmp8074_regulators[] = { + { "s3", 0x1a00, "vdd_s3"}, + { "s4", 0x1d00, "vdd_s4"}, + { "l11", 0x4a00, "vdd_l10_l11_l12_l13"}, + { } +}; + static const struct of_device_id qcom_spmi_regulator_match[] = { { .compatible = "qcom,pm8004-regulators", .data = &pm8004_regulators }, { .compatible = "qcom,pm8005-regulators", .data = &pm8005_regulators }, @@ -2150,6 +2157,7 @@ static const struct of_device_id qcom_spmi_regulator_match[] = { { .compatible = "qcom,pm660-regulators", .data = &pm660_regulators }, { .compatible = "qcom,pm660l-regulators", .data = &pm660l_regulators }, { .compatible = "qcom,pms405-regulators", .data = &pms405_regulators }, + { .compatible = "qcom,pmp8074-regulators", .data = &pmp8074_regulators }, { } }; MODULE_DEVICE_TABLE(of, qcom_spmi_regulator_match); From patchwork Tue May 17 20:53:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 573490 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A11D3C4167D for ; Tue, 17 May 2022 20:53:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353049AbiEQUx4 (ORCPT ); Tue, 17 May 2022 16:53:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46672 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353039AbiEQUxw (ORCPT ); Tue, 17 May 2022 16:53:52 -0400 Received: from mail-ej1-x631.google.com (mail-ej1-x631.google.com [IPv6:2a00:1450:4864:20::631]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A07BF5251C; Tue, 17 May 2022 13:53:51 -0700 (PDT) Received: by mail-ej1-x631.google.com with SMTP id z2so12855ejj.3; Tue, 17 May 2022 13:53:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=S1hlOjb+KKdy0/QG/BxO1k2JNdhSZM3UJOdwKv3T7/8=; b=O+g2EiFszka8Gyv4mBKpvWJcQksP96SoPGoXsMWBT1OpzZnGQfH/WciGdmQhHaS3Xp yOXcajZxS5Cyk78GDmgCzvVcJimedr0ZVIAuIN96TU9uJKlaT8GBJ9nvLiq7fQi4CxaB H1qBdB+zFjk3KU2dbj7ro9KD7JpxOBDjQLCxvcWYLnHbGWlL4JlCtyBxzoaJeJ6S+StA Ufi0s5LQelE/+vtwCjx58kanBUUsjURCa4U7J2GjdxskELO6YOX/KHP0EyRLf9NJy/wk oIXDcK9n7yri/MLC65pPR9kI7BLL3QmX+1TdVE1pwbwBznye5xtLQ22tzj3yGvp8uEad S1rQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=S1hlOjb+KKdy0/QG/BxO1k2JNdhSZM3UJOdwKv3T7/8=; b=btL5snrlarjQ8ihg/JA07Gp6YVvc99k4eAXRE4I5rg/wA8PfiRgMZjkT1IdltYT2L7 c2xON2Q/oZaaMsGO4ElewbxcDi6DrFOp+9+KnRCkHfyr4DeCTtLyyKDWUspjRoujLJlA a5rEIXXI3eaguM3QhEr4BoD/z53SUEFzcMnKvyC4d4+I+bkntj2vAv5CczKJFxE2ALvw gw/D7qYjd3ysOkK3Ox87a76FafKZ1Qg2/aIz1DhXv8Nwyr4e0QZR+3whlDjY45WG3Sbu hC0MWG2m6Qn97ri9/WiOIIrYpvnkBib29h1euLJu2pWByZnc3l3f4fwaS4ngqSTczE3F xxlA== X-Gm-Message-State: AOAM531ekFAubZOQ4msu678RwbJJV9BFnq2Ru/dzXnhoq95T4nZmZnVP veZeE2hc8ESNC7lfXCTE4vY= X-Google-Smtp-Source: ABdhPJx3V68VWfSWW6xJEt+valHr9O6njAez/YK7ILuhrOyetHlEXHTE1zxvW3zzUw1IKW3kp5HVmA== X-Received: by 2002:a17:906:8306:b0:6f3:da72:5ca1 with SMTP id j6-20020a170906830600b006f3da725ca1mr21543924ejx.606.1652820830197; Tue, 17 May 2022 13:53:50 -0700 (PDT) Received: from fedora.robimarko.hr ([188.252.220.143]) by smtp.googlemail.com with ESMTPSA id v22-20020a17090651d600b006f3ef214e10sm120907ejk.118.2022.05.17.13.53.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 May 2022 13:53:49 -0700 (PDT) From: Robert Marko To: agross@kernel.org, bjorn.andersson@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Robert Marko Subject: [PATCH v3 5/6] arm64: dts: ipq8074: add SPMI PMP8074 PMIC regulators Date: Tue, 17 May 2022 22:53:40 +0200 Message-Id: <20220517205341.536587-5-robimarko@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220517205341.536587-1-robimarko@gmail.com> References: <20220517205341.536587-1-robimarko@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org PMP8074 is used in IPQ8074 and provides S3 for cores, S4 for UBI core and LDO11 for SDIO/eMMC. So, lets add the nodes in preparation for DVFS later. Signed-off-by: Robert Marko --- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 34 +++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi index 789fec7c6aa4..d1a0b77c38a4 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -5,6 +5,7 @@ #include #include +#include / { model = "Qualcomm Technologies, Inc. IPQ8074"; @@ -421,6 +422,39 @@ spmi_bus: spmi@200f000 { interrupt-controller; #interrupt-cells = <4>; cell-index = <0>; + + pmic@1 { + compatible ="qcom,spmi-pmic"; + reg = <0x1 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + regulators { + compatible = "qcom,pmp8074-regulators"; + + s3: s3 { + regulator-name = "vdd_s3"; + regulator-min-microvolt = <592000>; + regulator-max-microvolt = <1064000>; + regulator-always-on; + regulator-boot-on; + }; + + s4: s4 { + regulator-name = "vdd_s4"; + regulator-min-microvolt = <712000>; + regulator-max-microvolt = <992000>; + regulator-always-on; + regulator-boot-on; + }; + + l11: l11 { + regulator-name = "l11"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + }; + }; }; sdhc_1: sdhci@7824900 { From patchwork Tue May 17 20:53:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 573940 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7FE64C35296 for ; Tue, 17 May 2022 20:53:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353053AbiEQUx4 (ORCPT ); Tue, 17 May 2022 16:53:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46674 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353043AbiEQUxy (ORCPT ); Tue, 17 May 2022 16:53:54 -0400 Received: from mail-ed1-x533.google.com (mail-ed1-x533.google.com [IPv6:2a00:1450:4864:20::533]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E6C6E52525; Tue, 17 May 2022 13:53:51 -0700 (PDT) Received: by mail-ed1-x533.google.com with SMTP id en5so497547edb.1; Tue, 17 May 2022 13:53:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=PAidMuA0ZfVLTFeYOY0jFETaKP5wFrL8y0MLkBWu2Mo=; b=f4MOu4Orlds854J3Sjm8sYUcUV6qSn/fZ3l9OYZ5K4F6E9Y+oC9AAPkLy1eqvHjE1x UuvM6w59Yo6rsmK78I+ZHrd/IztXVyb/mRdR4OH0jE2mytYs8Yd5ezAwobp/wQ1b3WeD RgwIR/h8ABXxMXdBQylEYsuJZORtjxui+R2NfAtNZGsDkZ21LCgCFvIMGzxJUBOEMfG5 pyN9n9jLL5Vctr/o3kXuIdl0xfyC2UXnNiXVUY9j7ZnTwPTh3bmMWEyPSeJVZxpzDFE5 NRZfhXtqNBvEKJzO/I48LMBCd17P38CmAO74EMEki0I0d0K2uiGnx1k78oKjx0/c79k0 4l8A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PAidMuA0ZfVLTFeYOY0jFETaKP5wFrL8y0MLkBWu2Mo=; b=SvylEEoHuclOLFxf1kLZI+4jQxDOjUQxlDPninok2g1TiTpsHqM2eNcnhtHOjPHFzn rhJxeokdKWSj7BuxYufI+z45xduItz8OKC74YAQTTN71A5niYvrsW0rpw5ZVYSEi+vOP kTfUtorQO1kMprnBD3b0iJVYpuEFTXmz/u3oUVvp9ZoXmrYKrUoWJhbvdRUc9kMwFUsy x4MWu3EAgNYE3zSb3w9xhX/yA3hwq3skKPhfGnyudtobUNwmrcYMAISA2eQJTuLcQu+y 05jKK0C2M0sM8vOarMwaiUvA+tBfJlng4JtX+znSaGunpHo1Lrn0aeDOK0qvaltZz76X 8UJQ== X-Gm-Message-State: AOAM5321dqhfZYDj9ScOv0pAHHGbRjxO9yb+Upk+TzuV2hY0ZnTYB7om fb4cq8bN8c3pv2FcVFCKtwc= X-Google-Smtp-Source: ABdhPJzHrBMHkcmpaUrEVq9M2mG0iY3Zq86tClH9XaiJXLfERoeVAlOjyc20MwK4KfGezBnTR1SIdQ== X-Received: by 2002:a50:fa8e:0:b0:42a:b1f4:91c7 with SMTP id w14-20020a50fa8e000000b0042ab1f491c7mr12779105edr.140.1652820831573; Tue, 17 May 2022 13:53:51 -0700 (PDT) Received: from fedora.robimarko.hr ([188.252.220.143]) by smtp.googlemail.com with ESMTPSA id v22-20020a17090651d600b006f3ef214e10sm120907ejk.118.2022.05.17.13.53.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 May 2022 13:53:51 -0700 (PDT) From: Robert Marko To: agross@kernel.org, bjorn.andersson@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Robert Marko Subject: [PATCH v3 6/6] arm64: dts: ipq8074: add VQMMC supply Date: Tue, 17 May 2022 22:53:41 +0200 Message-Id: <20220517205341.536587-6-robimarko@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220517205341.536587-1-robimarko@gmail.com> References: <20220517205341.536587-1-robimarko@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org SDHCI controller claims DDR, HS200 and HS400 1.8V support, however it cannot achieve those using the 2.95V I/O that is the default set by firmware. Since we know have access to the PMP8074 PMIC provided LDO that provides the I/O voltage set it as VQMMC supply so that higher speeds can actually be achieved. Signed-off-by: Robert Marko --- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi index d1a0b77c38a4..fea3c4ee3565 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -476,6 +476,8 @@ sdhc_1: sdhci@7824900 { mmc-hs400-1_8v; bus-width = <8>; + vqmmc-supply = <&l11>; + status = "disabled"; };