From patchwork Mon Jan 7 15:51:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 154891 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3630436ljp; Mon, 7 Jan 2019 07:56:44 -0800 (PST) X-Google-Smtp-Source: ALg8bN4rN5bKiqfig5yA+tZUebWLp8MdfHRt6FVrnItVgVhPB6LMlNAGrLM+4thJR6d5c4xYg6EO X-Received: by 2002:a17:902:161:: with SMTP id 88mr63226833plb.306.1546876604211; Mon, 07 Jan 2019 07:56:44 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1546876604; cv=none; d=google.com; s=arc-20160816; b=lmZRwaX5yCA4RXAVIrOOF9R/wChkxu1uhkBEJP9GLUguxHeBlogbu547a5V7gC+DIz Cw8d8b6X2MPip2X98Syj4xaXOcL5S51hFGggu91U1Scg66Oz8oellgovWU3gsCaW1SVF fOzbZWUkAPiOMljM8VsI2QuEdUEcAKyXZc3N4dBFJe9IIgC7yceUxWDpfo7Gx0egC4GZ nC9B8qGdIroBIBxqjYLl2rcUdpJEdqKddq66mzfqaeFeC3/IxXrouWSQma27pl9v35up rYKJXw7YdLhcO1EB9PAVL0TwQkf2IMNxF3D89hXZFaCI9BWS5a5mEPgwoo8Qhy0rvFuP ab1w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=329rMIw7dk8N5WV5b3QguRojP7Xyn99GAFQEKXGZQEs=; b=YhXWsTE9bFTRFe9NrJbTc3QIhIRcq+VZcC5L9nq2Fl2JTt3KRMI6nY7stppGnAJDqQ wT5lWYOrNlbqnyj4GwsGXH2whlZ8cq6mMvnYxXw6K/EJ+y3XB01/cA/WJpWFmGPjnlS6 AC0XNDF0U9FM/26ekWkXz1B1iS9BjEn8G5308dlxPyZZEQuZc4H7XvzroUQOmyFtzfnA J1NB9Ic/cYd5BK7TV2K+ab5oKcFPkPzoXnnsCJ4TCWqN1ZjEAz76nOow4xH6dG0T6ROD Pfrs9QVajcRqFwqstiFfK3otf8TnARl1O7MXrtZDNsZ+ROZjluxPTDdk5G9GroH2rsTR wrkw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gN+y+595; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[213.113.123.174]) by smtp.gmail.com with ESMTPSA id t22sm13269164lfb.0.2019.01.07.07.56.38 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 07 Jan 2019 07:56:38 -0800 (PST) From: Linus Walleij To: Mark Brown , linux-spi@vger.kernel.org Cc: linux-gpio@vger.kernel.org, Bartosz Golaszewski , linuxarm@huawei.com, Linus Walleij , Felix Fietkau , Alban Bedel Subject: [PATCH 2/7 v2] spi: ath79: Convert to use CS GPIO descriptors Date: Mon, 7 Jan 2019 16:51:51 +0100 Message-Id: <20190107155156.3738-3-linus.walleij@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20190107155156.3738-1-linus.walleij@linaro.org> References: <20190107155156.3738-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org This converts the ATH79 SPI master driver to use GPIO descriptors for chip select handling. The ATH79 driver was requesting the GPIO and driving it from the bitbang .chipselect callback. Do not request it anymore as the SPI core will request it, remove the line inversion semantics for the GPIO case (handled by gpiolib) and let the SPI core deal with requesting the GPIO line from the device tree node of the controller. This driver can be instantiated from a board file (no device tree) but the board files only use native CS (no GPIO lines) so we should be fine just letting the SPI core grab the GPIO from the device. The fact that the driver is actively driving the GPIO in the ath79_spi_chipselect() callback is confusing since the host does not set SPI_MASTER_GPIO_SS so this should not ever get called when using GPIO CS. I put in a comment about this. Cc: Felix Fietkau Cc: Alban Bedel Cc: Linuxarm Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Rebase on v5.0-rc1 --- drivers/spi/spi-ath79.c | 42 ++++++++++++++--------------------------- 1 file changed, 14 insertions(+), 28 deletions(-) -- 2.19.2 diff --git a/drivers/spi/spi-ath79.c b/drivers/spi/spi-ath79.c index 3f6b657394de..ed1068ac055f 100644 --- a/drivers/spi/spi-ath79.c +++ b/drivers/spi/spi-ath79.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include #include @@ -78,9 +78,16 @@ static void ath79_spi_chipselect(struct spi_device *spi, int is_active) ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); } - if (gpio_is_valid(spi->cs_gpio)) { - /* SPI is normally active-low */ - gpio_set_value_cansleep(spi->cs_gpio, cs_high); + if (spi->cs_gpiod) { + /* + * SPI chipselect is normally active-low, but + * inversion semantics are handled by gpiolib. + * + * FIXME: is this ever used? The driver doesn't + * set SPI_MASTER_GPIO_SS so this callback should not + * get called if a CS GPIO is found by the SPI core. + */ + gpiod_set_value_cansleep(spi->cs_gpiod, is_active); } else { u32 cs_bit = AR71XX_SPI_IOC_CS(spi->chip_select); @@ -118,21 +125,8 @@ static void ath79_spi_disable(struct ath79_spi *sp) static int ath79_spi_setup_cs(struct spi_device *spi) { struct ath79_spi *sp = ath79_spidev_to_sp(spi); - int status; - status = 0; - if (gpio_is_valid(spi->cs_gpio)) { - unsigned long flags; - - flags = GPIOF_DIR_OUT; - if (spi->mode & SPI_CS_HIGH) - flags |= GPIOF_INIT_LOW; - else - flags |= GPIOF_INIT_HIGH; - - status = gpio_request_one(spi->cs_gpio, flags, - dev_name(&spi->dev)); - } else { + if (!spi->cs_gpiod) { u32 cs_bit = AR71XX_SPI_IOC_CS(spi->chip_select); if (spi->mode & SPI_CS_HIGH) @@ -143,13 +137,7 @@ static int ath79_spi_setup_cs(struct spi_device *spi) ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); } - return status; -} - -static void ath79_spi_cleanup_cs(struct spi_device *spi) -{ - if (gpio_is_valid(spi->cs_gpio)) - gpio_free(spi->cs_gpio); + return 0; } static int ath79_spi_setup(struct spi_device *spi) @@ -163,15 +151,12 @@ static int ath79_spi_setup(struct spi_device *spi) } status = spi_bitbang_setup(spi); - if (status && !spi->controller_state) - ath79_spi_cleanup_cs(spi); return status; } static void ath79_spi_cleanup(struct spi_device *spi) { - ath79_spi_cleanup_cs(spi); spi_bitbang_cleanup(spi); } @@ -225,6 +210,7 @@ static int ath79_spi_probe(struct platform_device *pdev) pdata = dev_get_platdata(&pdev->dev); + master->use_gpio_descriptors = true; master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); master->setup = ath79_spi_setup; master->cleanup = ath79_spi_cleanup; From patchwork Mon Jan 7 15:51:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 154892 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3630501ljp; Mon, 7 Jan 2019 07:56:48 -0800 (PST) X-Google-Smtp-Source: ALg8bN5VUDYJw/cE3T2gJxlw7N7OuDKRFFopNndz2y3KRKsFsFfGN7jZqasdHHCRfOX5XPNn7fKG X-Received: by 2002:a63:4b60:: with SMTP id k32mr11323628pgl.186.1546876608117; Mon, 07 Jan 2019 07:56:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1546876608; cv=none; d=google.com; s=arc-20160816; b=UVX/zYpNpcdlfcTvRKIzEAX4mk1tlUOG5hOrMhE3PV9g5J9AvafOvd/e0w1TKggzkc YDiwJKMDKeW3vUkp6HcAi8ruqQd3M7xCyRXpCUBbvvCZKeyaklljvM5u8R/+c34WnFiR mgrKP2fMHEBO6CexaVIt7EM+rZ4L+iaN3wsX2YKEPEetpbT9IWKqpI6aQq1mBlXo6hiP JeL58Jsba9fidb1WwUWOoCs1/vY7xZ+pPu90t/AEm+BlcPr3mSI0VFM5VxsVwRATTGX6 vPvgnVnTMRntyO+tauWFoHcIaznwBK/a1yNd3HgtOnOPbtmtA772QxmEbu/7CCCiy6vP dgJQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=4QthtHvNQMLswNSpCzO3VdhVLwJQ3jKsqPb84qyLfbY=; b=GY5+bGWuFwDF5WUdozbeK1RIs8q12zLbquc0/UYAwJMg3YHqKidAj4gzMgU9fTxe/z lqfD7s3uxDdb5bAv3IZmWlJIcAVvyblzDKSDjjuBK0FhNiqa9vxJCcbU48/2p/02EFon jE8GTbq/a1dvZAeWKLY2C46+2H9AS2g9xUS72Wv6NTdfITxn6b7guCpIrKLAAK/RVzJl amOL4T2MCVHhsOBwnOBpRnFqwlbolHxgUvr+2Dg/NscWHLkaiBZ3RbQyhMokPWhhRLmH brYn1P3PuwLMan/dN4OIPUtzXC1uMHmWIVR2KgfXZp8cB0rTKNHlsAjiM5YFkDJXZ5Ch +QqA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=NdPCVyWG; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[213.113.123.174]) by smtp.gmail.com with ESMTPSA id t22sm13269164lfb.0.2019.01.07.07.56.41 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 07 Jan 2019 07:56:41 -0800 (PST) From: Linus Walleij To: Mark Brown , linux-spi@vger.kernel.org Cc: linux-gpio@vger.kernel.org, Bartosz Golaszewski , linuxarm@huawei.com, Linus Walleij , Eugen Hristev , Nicolas Ferre , Radu Pirea Subject: [PATCH 3/7 v2] spi: atmel: Convert to use CS GPIO descriptors Date: Mon, 7 Jan 2019 16:51:52 +0100 Message-Id: <20190107155156.3738-4-linus.walleij@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20190107155156.3738-1-linus.walleij@linaro.org> References: <20190107155156.3738-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org This converts the Atmel SPI master driver to use GPIO descriptors for chip select handling. The Atmel driver has duplicate code to look up and initialize CS GPIOs from the device tree, so this is removed. It further has code to retrieve a CS GPIO from .controller_data but this seems to be completely unused in the kernel (legacy codepath?) so I deleted this support. It keeps track of polarity when switching the CS, but this is not needed anymore since we moved this over to the gpiolib. The local handling of the "npcs_pin" (I guess this might mean "negative polarity chip select pin") is preserved, but I strongly suspect this can be switched over to handling by the core and using the SPI_MASTER_GPIO_SS flag on the master to assure that the additional CS handling in the driver is also done. Cc: Eugen Hristev Cc: Nicolas Ferre Cc: Radu Pirea Cc: Linuxarm Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Rebase on v5.0-rc1 --- drivers/spi/spi-atmel.c | 93 ++++++++++++----------------------------- 1 file changed, 27 insertions(+), 66 deletions(-) -- 2.19.2 diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c index 74fddcd3282b..f53f0c5e63da 100644 --- a/drivers/spi/spi-atmel.c +++ b/drivers/spi/spi-atmel.c @@ -23,8 +23,7 @@ #include #include -#include -#include +#include #include #include @@ -312,7 +311,7 @@ struct atmel_spi { /* Controller-specific per-slave state */ struct atmel_spi_device { - unsigned int npcs_pin; + struct gpio_desc *npcs_pin; u32 csr; }; @@ -355,7 +354,6 @@ static bool atmel_spi_is_v2(struct atmel_spi *as) static void cs_activate(struct atmel_spi *as, struct spi_device *spi) { struct atmel_spi_device *asd = spi->controller_state; - unsigned active = spi->mode & SPI_CS_HIGH; u32 mr; if (atmel_spi_is_v2(as)) { @@ -379,7 +377,7 @@ static void cs_activate(struct atmel_spi *as, struct spi_device *spi) mr = spi_readl(as, MR); if (as->use_cs_gpios) - gpio_set_value(asd->npcs_pin, active); + gpiod_set_value(asd->npcs_pin, 1); } else { u32 cpol = (spi->mode & SPI_CPOL) ? SPI_BIT(CPOL) : 0; int i; @@ -396,19 +394,16 @@ static void cs_activate(struct atmel_spi *as, struct spi_device *spi) mr = spi_readl(as, MR); mr = SPI_BFINS(PCS, ~(1 << spi->chip_select), mr); if (as->use_cs_gpios && spi->chip_select != 0) - gpio_set_value(asd->npcs_pin, active); + gpiod_set_value(asd->npcs_pin, 1); spi_writel(as, MR, mr); } - dev_dbg(&spi->dev, "activate %u%s, mr %08x\n", - asd->npcs_pin, active ? " (high)" : "", - mr); + dev_dbg(&spi->dev, "activate NPCS, mr %08x\n", mr); } static void cs_deactivate(struct atmel_spi *as, struct spi_device *spi) { struct atmel_spi_device *asd = spi->controller_state; - unsigned active = spi->mode & SPI_CS_HIGH; u32 mr; /* only deactivate *this* device; sometimes transfers to @@ -420,14 +415,12 @@ static void cs_deactivate(struct atmel_spi *as, struct spi_device *spi) spi_writel(as, MR, mr); } - dev_dbg(&spi->dev, "DEactivate %u%s, mr %08x\n", - asd->npcs_pin, active ? " (low)" : "", - mr); + dev_dbg(&spi->dev, "DEactivate NPCS, mr %08x\n", mr); if (!as->use_cs_gpios) spi_writel(as, CR, SPI_BIT(LASTXFER)); else if (atmel_spi_is_v2(as) || spi->chip_select != 0) - gpio_set_value(asd->npcs_pin, !active); + gpiod_set_value(asd->npcs_pin, 0); } static void atmel_spi_lock(struct atmel_spi *as) __acquires(&as->lock) @@ -1188,7 +1181,6 @@ static int atmel_spi_setup(struct spi_device *spi) struct atmel_spi_device *asd; u32 csr; unsigned int bits = spi->bits_per_word; - unsigned int npcs_pin; as = spi_master_get_devdata(spi->master); @@ -1217,25 +1209,27 @@ static int atmel_spi_setup(struct spi_device *spi) csr |= SPI_BF(DLYBS, 0); csr |= SPI_BF(DLYBCT, 0); - /* chipselect must have been muxed as GPIO (e.g. in board setup) */ - npcs_pin = (unsigned long)spi->controller_data; - - if (!as->use_cs_gpios) - npcs_pin = spi->chip_select; - else if (gpio_is_valid(spi->cs_gpio)) - npcs_pin = spi->cs_gpio; - asd = spi->controller_state; if (!asd) { asd = kzalloc(sizeof(struct atmel_spi_device), GFP_KERNEL); if (!asd) return -ENOMEM; - if (as->use_cs_gpios) - gpio_direction_output(npcs_pin, - !(spi->mode & SPI_CS_HIGH)); + /* + * If use_cs_gpios is true this means that we have "cs-gpios" + * defined in the device tree node so we should have + * gotten the GPIO lines from the device tree inside the + * SPI core. Warn if this is not the case but continue since + * CS GPIOs are after all optional. + */ + if (as->use_cs_gpios) { + if (!spi->cs_gpiod) { + dev_err(&spi->dev, + "host claims to use CS GPIOs but no CS found in DT by the SPI core\n"); + } + asd->npcs_pin = spi->cs_gpiod; + } - asd->npcs_pin = npcs_pin; spi->controller_state = asd; } @@ -1473,41 +1467,6 @@ static void atmel_get_caps(struct atmel_spi *as) as->caps.has_pdc_support = version < 0x212; } -/*-------------------------------------------------------------------------*/ -static int atmel_spi_gpio_cs(struct platform_device *pdev) -{ - struct spi_master *master = platform_get_drvdata(pdev); - struct atmel_spi *as = spi_master_get_devdata(master); - struct device_node *np = master->dev.of_node; - int i; - int ret = 0; - int nb = 0; - - if (!as->use_cs_gpios) - return 0; - - if (!np) - return 0; - - nb = of_gpio_named_count(np, "cs-gpios"); - for (i = 0; i < nb; i++) { - int cs_gpio = of_get_named_gpio(pdev->dev.of_node, - "cs-gpios", i); - - if (cs_gpio == -EPROBE_DEFER) - return cs_gpio; - - if (gpio_is_valid(cs_gpio)) { - ret = devm_gpio_request(&pdev->dev, cs_gpio, - dev_name(&pdev->dev)); - if (ret) - return ret; - } - } - - return 0; -} - static void atmel_spi_init(struct atmel_spi *as) { spi_writel(as, CR, SPI_BIT(SWRST)); @@ -1560,6 +1519,7 @@ static int atmel_spi_probe(struct platform_device *pdev) goto out_free; /* the spi->mode bits understood by this driver: */ + master->use_gpio_descriptors = true; master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; master->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 16); master->dev.of_node = pdev->dev.of_node; @@ -1592,6 +1552,11 @@ static int atmel_spi_probe(struct platform_device *pdev) atmel_get_caps(as); + /* + * If there are chip selects in the device tree, those will be + * discovered by the SPI core when registering the SPI master + * and assigned to each SPI device. + */ as->use_cs_gpios = true; if (atmel_spi_is_v2(as) && pdev->dev.of_node && @@ -1600,10 +1565,6 @@ static int atmel_spi_probe(struct platform_device *pdev) master->num_chipselect = 4; } - ret = atmel_spi_gpio_cs(pdev); - if (ret) - goto out_unmap_regs; - as->use_dma = false; as->use_pdc = false; if (as->caps.has_dma_support) { From patchwork Mon Jan 7 15:51:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 154893 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3630521ljp; Mon, 7 Jan 2019 07:56:49 -0800 (PST) X-Google-Smtp-Source: ALg8bN6Ucc3bFNxKOyNdj3IhJoJpblHTUj5QcNe9CKBg8VEUMfdB05FcPQItI4jgsJS3Fpi4EAqU X-Received: by 2002:a63:e21:: with SMTP id d33mr11369496pgl.272.1546876609639; Mon, 07 Jan 2019 07:56:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1546876609; cv=none; d=google.com; s=arc-20160816; b=jDJChNoEa2S/Vlw5ZOjTPByneCNgPe/NLYijF14y0wLqouMoH0LYEVV/IPaxtcwfGv M44BuX4Z/zPU+UxkVftmZ9ftccCuCPx6vlOpXjO6CsUPu/hR/de971GsGRSggyXXvWqL FSTw/xJEIuHmPi9cqS2ALneTS2gPobces5Dq7gUOH6VEAwkw66eKOfljBqfXrZo1yWOC tAfg+xHB6hfWQVnJUCW1W4E7AV8SfqmoUT19pwH3p7a3cHqa6xvnz7C8PGKN/e7lD6Ia llgmfSjwyI91DlqdKKFpeSLSPbu5k3k3zXTo/g7TZtOOqT8SDHp4fMGijH9npXHa/r6u 3BcQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=dyc209MkU26DsHhcTstxC4XkO3ZgBkaOKbCSbkZ/s8Y=; b=JXSEiJ2BQBSljqa0RhTHU/f+ZhA/mKfjJGfI+eDRa6yV+kdSYE7sYm0uzJZaOfX56o iO27iQX+JoKgRmEtw6Khlxj9Ygrj76WEjl7Ypm2eiExHsJiRD7tmAaSAjobk5GGAJlRp B+o8aZVtIWgP5V/2U1UqhcI71jsCyqR9re23QnBXu7XOwYeLC3t9GZd0vVI8wMVXAd+S kTL9SzAezH2O35ebRAVY1o2MgnpFJJkenkcRc+MOl7Jyu0Shx7tIM73nETQ8u9Oj4FQT /piw8JAycesVhB4cIQA9NEENDJfo0JLA2JUVRCf0NO9CEu6TajYQyqVeI4fvHdkBQGXw zntQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FhXDTNWD; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[213.113.123.174]) by smtp.gmail.com with ESMTPSA id t22sm13269164lfb.0.2019.01.07.07.56.43 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 07 Jan 2019 07:56:44 -0800 (PST) From: Linus Walleij To: Mark Brown , linux-spi@vger.kernel.org Cc: linux-gpio@vger.kernel.org, Bartosz Golaszewski , linuxarm@huawei.com, Linus Walleij , Wei Yongjun , Janek Kotas Subject: [PATCH 4/7 v2] spi: cadence: Convert to use CS GPIO descriptors Date: Mon, 7 Jan 2019 16:51:53 +0100 Message-Id: <20190107155156.3738-5-linus.walleij@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20190107155156.3738-1-linus.walleij@linaro.org> References: <20190107155156.3738-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org This converts the Cadence SPI master driver to use GPIO descriptors for chip select handling. The Cadence driver was allocating a state container just to hold the requested GPIO line and contained lots of polarity inversion code. As this is all handled by gpiolib and a simple devm_* request in the core, and as the driver is fully device tree only, most of this code chunk goes away in favour of central handling. The setup/cleanup callbacks goes away. This driver does NOT drive the CS line by setting the value of the GPIO so it relies on the SPI core to do this, which should work just fine with the descriptors. Cc: Wei Yongjun Cc: Janek Kotas Cc: Linuxarm Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Rebase on v5.0-rc1 --- drivers/spi/spi-cadence.c | 67 ++------------------------------------- 1 file changed, 2 insertions(+), 65 deletions(-) -- 2.19.2 diff --git a/drivers/spi/spi-cadence.c b/drivers/spi/spi-cadence.c index 7c88f74f7f47..e332d173dbf9 100644 --- a/drivers/spi/spi-cadence.c +++ b/drivers/spi/spi-cadence.c @@ -13,7 +13,7 @@ #include #include -#include +#include #include #include #include @@ -128,10 +128,6 @@ struct cdns_spi { u32 is_decoded_cs; }; -struct cdns_spi_device_data { - bool gpio_requested; -}; - /* Macros for the SPI controller read/write */ static inline u32 cdns_spi_read(struct cdns_spi *xspi, u32 offset) { @@ -469,64 +465,6 @@ static int cdns_unprepare_transfer_hardware(struct spi_master *master) return 0; } -static int cdns_spi_setup(struct spi_device *spi) -{ - - int ret = -EINVAL; - struct cdns_spi_device_data *cdns_spi_data = spi_get_ctldata(spi); - - /* this is a pin managed by the controller, leave it alone */ - if (spi->cs_gpio == -ENOENT) - return 0; - - /* this seems to be the first time we're here */ - if (!cdns_spi_data) { - cdns_spi_data = kzalloc(sizeof(*cdns_spi_data), GFP_KERNEL); - if (!cdns_spi_data) - return -ENOMEM; - cdns_spi_data->gpio_requested = false; - spi_set_ctldata(spi, cdns_spi_data); - } - - /* if we haven't done so, grab the gpio */ - if (!cdns_spi_data->gpio_requested && gpio_is_valid(spi->cs_gpio)) { - ret = gpio_request_one(spi->cs_gpio, - (spi->mode & SPI_CS_HIGH) ? - GPIOF_OUT_INIT_LOW : GPIOF_OUT_INIT_HIGH, - dev_name(&spi->dev)); - if (ret) - dev_err(&spi->dev, "can't request chipselect gpio %d\n", - spi->cs_gpio); - else - cdns_spi_data->gpio_requested = true; - } else { - if (gpio_is_valid(spi->cs_gpio)) { - int mode = ((spi->mode & SPI_CS_HIGH) ? - GPIOF_OUT_INIT_LOW : GPIOF_OUT_INIT_HIGH); - - ret = gpio_direction_output(spi->cs_gpio, mode); - if (ret) - dev_err(&spi->dev, "chipselect gpio %d setup failed (%d)\n", - spi->cs_gpio, ret); - } - } - - return ret; -} - -static void cdns_spi_cleanup(struct spi_device *spi) -{ - struct cdns_spi_device_data *cdns_spi_data = spi_get_ctldata(spi); - - if (cdns_spi_data) { - if (cdns_spi_data->gpio_requested) - gpio_free(spi->cs_gpio); - kfree(cdns_spi_data); - spi_set_ctldata(spi, NULL); - } - -} - /** * cdns_spi_probe - Probe method for the SPI driver * @pdev: Pointer to the platform_device structure @@ -621,13 +559,12 @@ static int cdns_spi_probe(struct platform_device *pdev) goto clk_dis_all; } + master->use_gpio_descriptors = true; master->prepare_transfer_hardware = cdns_prepare_transfer_hardware; master->prepare_message = cdns_prepare_message; master->transfer_one = cdns_transfer_one; master->unprepare_transfer_hardware = cdns_unprepare_transfer_hardware; master->set_cs = cdns_spi_chipselect; - master->setup = cdns_spi_setup; - master->cleanup = cdns_spi_cleanup; master->auto_runtime_pm = true; master->mode_bits = SPI_CPOL | SPI_CPHA;