From patchwork Fri Jan 11 10:01:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 155320 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp381441jaa; Fri, 11 Jan 2019 02:01:22 -0800 (PST) X-Google-Smtp-Source: ALg8bN5xhDBOE9dDb45Q3YJQ2KKnaK7XDHHB2vga3tmT6gD7kGcvHXV7nTv4skSS+hYCbuQhofRG X-Received: by 2002:a62:4156:: with SMTP id o83mr13842651pfa.72.1547200882005; Fri, 11 Jan 2019 02:01:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1547200881; cv=none; d=google.com; s=arc-20160816; b=sdq2nC+tg1VFyeFAyJ/3KT4Fpy3eu0EIJHqUhUNu8aj8yOj7caCLY4D5UILMsgZIIv zQ578re2j6W+cL0e78VCQBpRvWo9CNnmlvgX8HuFVuIRGGwN3yeVJWVyOqj/26eFuXk4 QGVKq8EZTP1YIGFrlsYaqr7/dx12XwygRM2zTFCV7R3ICYCnmSTYVOTtJLDFBScYrLnT hkGiQo7jguyqq+/NBowtZXE5KQfBv1KJCQixMijuyare4kDRfXlDMGFNbjdgs/mL8eS1 Uoda0Yk7k1AuyJH6HbeBIga/whLII8NEf+FjkbWVqtIwv/s8q1RBBcdbwhP9ID1VcEVG iYGA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=wRPh7eWPN+28E6yoCvH6h88EFxsbUT3SSDCd/6DmG1c=; b=hkvo2GTG1glCOYH+nT7OiyvbpR+MAfDYAYh9+9Mx5EFH+Vrav2gsCA58et8VW1yNny 1IEHbdu/DKWC9cRlPD6YbtRwLLTM9xAx4OnigWvgZgaaIjM2J97lqzGTI9N0AOdux0N/ SwrXckLiwsqDjmb2yFvtW4ZBncCaYN+TUiqAS20BFSt5f+G6Cjsd7qsg2J2BYs4T9d6Z qojpS5bBBpLRgvWKT9qs3rbqohsev9E0AZAPhVCVi7JMwe2R1D1vefX9YYDCBHy9tsKA EUoNff0llnfIjNqk+jj6zcNQc0Ms9mNgFx4QXoyCzIDuyRr2e2EOkdJoVq/dyDF1R5Vr B26A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=RZYWDAIW; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q11si6562788pgj.313.2019.01.11.02.01.21; Fri, 11 Jan 2019 02:01:21 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=RZYWDAIW; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731629AbfAKKBU (ORCPT + 31 others); Fri, 11 Jan 2019 05:01:20 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:50104 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727653AbfAKKBS (ORCPT ); Fri, 11 Jan 2019 05:01:18 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id x0BA1BD9055922; Fri, 11 Jan 2019 04:01:11 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1547200871; bh=wRPh7eWPN+28E6yoCvH6h88EFxsbUT3SSDCd/6DmG1c=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=RZYWDAIWn23EA1xb6WABnozXtK4CJNnFBDirmwkG8AOEc2KEwvLuW+3tIFjDRujnt MbxOX9g7eur76FbSiGts9LV7wHu3hLNxR+am7rGgArsIHQDdItOhmRNAk8GKxPTW+s 6lRymimAM7T8KLrbgXS2pBe57K+4hNg47ppKuy8Q= Received: from DFLE111.ent.ti.com (dfle111.ent.ti.com [10.64.6.32]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x0BA1Bvt052104 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 11 Jan 2019 04:01:11 -0600 Received: from DFLE109.ent.ti.com (10.64.6.30) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Fri, 11 Jan 2019 04:01:10 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Fri, 11 Jan 2019 04:01:10 -0600 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id x0BA12Xb015629; Fri, 11 Jan 2019 04:01:08 -0600 From: Roger Quadros To: CC: , , , , , , Roger Quadros Subject: [PATCH 2/3] arm64: dts: ti: k3-am6: add USB support Date: Fri, 11 Jan 2019 12:01:00 +0200 Message-ID: <1547200861-17795-3-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1547200861-17795-1-git-send-email-rogerq@ti.com> References: <1547200861-17795-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Adds support for USB0 and USB1 instances on the AM6 SoC. USB0 is limited to high-speed for now. Signed-off-by: Roger Quadros --- arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 80 ++++++++++++++++++++++++++++++++ 1 file changed, 80 insertions(+) -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi index 8b55108..680cbc7 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -199,4 +199,84 @@ #size-cells = <1>; ranges = <0x0 0x0 0x00100000 0x1c000>; }; + + dwc3_0: dwc3@4000000 { + compatible = "ti,am654-dwc3"; + reg = <0x0 0x4000000 0x0 0x4000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x4000000 0x20000>; + interrupts = ; + dma-coherent; + status = "disabled"; + power-domains = <&k3_pds 151>; + assigned-clocks = <&k3_clks 151 2>, <&k3_clks 151 7>; + assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */ + <&k3_clks 151 9>; /* set PIPE3_TXB_CLK to CLK_12M_RC/256 (for HS only) */ + + usb0: usb@10000 { + compatible = "snps,dwc3"; + reg = <0x10000 0x10000>; + interrupts = , + , + ; + interrupt-names = "peripheral", + "host", + "otg"; + maximum-speed = "high-speed"; + dr_mode = "otg"; + phys = <&usb0_phy>; + phy-names = "usb2-phy"; + snps,dis_u3_susphy_quirk; + }; + }; + + usb0_phy: phy@4100000 { + compatible = "ti,am654-usb2", "ti,omap-usb2"; + reg = <0x0 0x4100000 0x0 0x54>; + syscon-phy-power = <&scm_conf 0x4000>; + clocks = <&k3_clks 151 0>, <&k3_clks 151 1>; + clock-names = "wkupclk", "refclk"; + #phy-cells = <0>; + status = "disabled"; + }; + + dwc3_1: dwc3@4020000 { + compatible = "ti,am654-dwc3"; + reg = <0x0 0x4020000 0x0 0x4000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x4020000 0x20000>; + interrupts = ; + dma-coherent; + status = "disabled"; + power-domains = <&k3_pds 152>; + assigned-clocks = <&k3_clks 152 2>; + assigned-clock-parents = <&k3_clks 152 4>; /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */ + + usb1: usb@10000 { + compatible = "snps,dwc3"; + reg = <0x10000 0x10000>; + interrupts = , + , + ; + interrupt-names = "peripheral", + "host", + "otg"; + maximum-speed = "high-speed"; + dr_mode = "otg"; + phys = <&usb1_phy>; + phy-names = "usb2-phy"; + }; + }; + + usb1_phy: phy@4110000 { + compatible = "ti,am654-usb2", "ti,omap-usb2"; + reg = <0x0 0x4110000 0x0 0x54>; + syscon-phy-power = <&scm_conf 0x4020>; + clocks = <&k3_clks 152 0>, <&k3_clks 152 1>; + clock-names = "wkupclk", "refclk"; + #phy-cells = <0>; + status = "disabled"; + }; }; From patchwork Fri Jan 11 10:01:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 155321 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp381476jaa; Fri, 11 Jan 2019 02:01:24 -0800 (PST) X-Google-Smtp-Source: ALg8bN6S3EgYxIwlsXiU54tjDadgREQ58udHkd7VtQU2DCKKIU9wzHtese4BNLPc14bxLkWtYI/l X-Received: by 2002:a62:8d4f:: with SMTP id z76mr14322283pfd.2.1547200884546; Fri, 11 Jan 2019 02:01:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1547200884; cv=none; d=google.com; s=arc-20160816; b=NHV74t0iXo5gj7ECjtqgcWVNGlKaBOu694M2PPAuC5eNpwcYv9UIu8P5Lpb8o1MR1N 6i1EgJahSmQm4kOfdoXE0KQgVwN2rlT5OE+CFwEWhleWeO71KGN2e2Q/SoLlhp3+qgJO C7Eh5m7bQT2z+YmTJKO9xnWK6Niw3ybGgEo0xZTabRQKKE+BInEQhvNkh3jn+dq6zujl pVTfRXXvVa4DerQGn3QK32UbakPG/BGmI1PrkmJu2pcFmvtAusVpnpNfyuxcigGOttr3 EWx3Ea6vBW4YP6lLWybPsKZv4JVr4vja+PxTc52O/diuN3Pl5v932POSXE7fGGkf0xCo flQw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=msmu3UNmTxS9topzOUSlsNiM2nz/6tPGIWLErwVxSgM=; b=sHj1MpW2QDSlzad5ozTzk2Alq3B7BnFnO//fEyCfD6vRDL9vrJ2qRMLjqtZhLiBqOT Ez1DOU4JFraDTHraZwgecncfgP4W5k0M8MJrF48yFd0DQ67ZfE7tj34EBTmFnK6dr+sn rSMCss7HqrkI1kiosKQXMVvZTq/gJklurKsKheafZJCxohhYKShJsTj+u/6LwOCTU8+P 1SiIKdxtUfNVMCmLGH0cxVwjCwunDeRkAHoOwzASEgegpFTQ1WqAIU//WXZUh3xoXI99 Rub3k4RQ0vs5un/8O84g8nq0n//QNibNp6V5pWHY6MYfMFA83y98IKqFhvbSeGfJTTQN NFpg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=cfdwsNYf; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Roger Quadros --- arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts index e41fc3a..c4f7b29 100644 --- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts +++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts @@ -69,6 +69,12 @@ AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (AG13) SPI0_CS0 */ >; }; + + usb1_pins_default: usb1_pins_default { + pinctrl-single,pins = < + AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */ + >; + }; }; &main_pmx1 { @@ -163,3 +169,17 @@ #size-cells= <1>; }; }; + +&dwc3_1 { + status = "okay"; +}; + +&usb1_phy { + status = "okay"; +}; + +&usb1 { + pinctrl-names = "default"; + pinctrl-0 = <&usb1_pins_default>; + dr_mode = "otg"; +};