From patchwork Tue Jun 28 18:41:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 585680 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D1C5CCCA47F for ; Tue, 28 Jun 2022 18:49:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233643AbiF1Sto (ORCPT ); Tue, 28 Jun 2022 14:49:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48602 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233591AbiF1Stn (ORCPT ); Tue, 28 Jun 2022 14:49:43 -0400 Received: from mail-ed1-x534.google.com (mail-ed1-x534.google.com [IPv6:2a00:1450:4864:20::534]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D422F248C0; Tue, 28 Jun 2022 11:49:42 -0700 (PDT) Received: by mail-ed1-x534.google.com with SMTP id e40so18896952eda.2; Tue, 28 Jun 2022 11:49:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=qf5xZr94K/ycK+i9/Wok3iiobG+7FvR7R5ERaeixzlU=; b=gvrmMvMmxvE1vomu0BjvPFMa+PaQV5sc7fo9Gh2wDe+P34WIqrV1i3VWPKT1F5h6Ly gAdNdOaYEBNXq5FzYeF3SHvrfCErFCpb+JjDX7bKJpLePIZgiAypn/YUtCK8HlDlKgLA bDNX7LI48ePNjgGcKL5HHRfvfwFqDicVPcIzsaS8opmPH40Dsa85yrynrLuLmaBItx6q XRBL5rCV49ymGZuxuiGCy60X/P0WIvY+1TcrfP2OQ5S3bMkIr6lmxEkTnNA3LvGrafll dPG7Xm30L7SQZImkDg4BDBFXUE/9ewfsA5I0/xL8uKJfEkQrjyrtm9Eye+Nq21fft1fX pdIA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=qf5xZr94K/ycK+i9/Wok3iiobG+7FvR7R5ERaeixzlU=; b=riokfBlhHGIOg+bligkHAz7+slPJdbgVd2/T9RBavX2ysZBx93XMTnERlZwLvpGL0a TwHBuri6/gKILar3jtgR/8xny0UvM/GLpJ83ZffYwiwsPRgwVnoAAJ704aEUMQvE1dpA Tb0125V4emuBOUv2H3itPkzb2vx2Cb1shRlWjyqqMYjXnTgHPP1mJ1s4hDWpRDHHuzlV 9BsstuPNrvFZhap6E751zzfk11cqgy9DIEUy3xfsXIIVyjAGT7B9kfNSaDYv2kldCS+R THGfcNO0vPX1zvmZ9LeLeTsiA+2B0z4N95eRNCjkO9CmyhLtdPj4Fo8yM5houwVdPT36 KWhg== X-Gm-Message-State: AJIora/6ZJjnEQVYJGhS9OYicbJ0K5np+l8bFY/qpWA5bV2lpNIwlLqE LfN2v+9xvK0VXFyZ8+JI8W0= X-Google-Smtp-Source: AGRyM1uY5hVh5/TJfL3ndbckPvZcwLXff/B94mb+OlrbAWxnlX+1E1g9J9U9KajfwtVi1DDIkAfPqw== X-Received: by 2002:a05:6402:e83:b0:435:a9bd:8134 with SMTP id h3-20020a0564020e8300b00435a9bd8134mr24618551eda.243.1656442181318; Tue, 28 Jun 2022 11:49:41 -0700 (PDT) Received: from localhost.localdomain (93-42-70-190.ip85.fastwebnet.it. [93.42.70.190]) by smtp.googlemail.com with ESMTPSA id t21-20020a05640203d500b0043573c59ea0sm9747593edw.90.2022.06.28.11.49.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Jun 2022 11:49:40 -0700 (PDT) From: Christian Marangi To: Rob Herring , Krzysztof Kozlowski , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Jens Axboe , Greg Kroah-Hartman , Christian Marangi , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org Cc: Krzysztof Kozlowski , Rob Herring Subject: [PATCH v3 1/4] dt-bindings: clock: Convert qcom,krait-cc to yaml Date: Tue, 28 Jun 2022 20:41:34 +0200 Message-Id: <20220628184137.21678-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220628184137.21678-1-ansuelsmth@gmail.com> References: <20220628184137.21678-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Convert qcom,krait-cc to yaml Documentation. Signed-off-by: Christian Marangi Reviewed-by: Krzysztof Kozlowski Acked-by: Rob Herring --- .../bindings/clock/qcom,krait-cc.txt | 34 ----------- .../bindings/clock/qcom,krait-cc.yaml | 59 +++++++++++++++++++ 2 files changed, 59 insertions(+), 34 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/qcom,krait-cc.txt create mode 100644 Documentation/devicetree/bindings/clock/qcom,krait-cc.yaml diff --git a/Documentation/devicetree/bindings/clock/qcom,krait-cc.txt b/Documentation/devicetree/bindings/clock/qcom,krait-cc.txt deleted file mode 100644 index 030ba60dab08..000000000000 --- a/Documentation/devicetree/bindings/clock/qcom,krait-cc.txt +++ /dev/null @@ -1,34 +0,0 @@ -Krait Clock Controller - -PROPERTIES - -- compatible: - Usage: required - Value type: - Definition: must be one of: - "qcom,krait-cc-v1" - "qcom,krait-cc-v2" - -- #clock-cells: - Usage: required - Value type: - Definition: must be 1 - -- clocks: - Usage: required - Value type: - Definition: reference to the clock parents of hfpll, secondary muxes. - -- clock-names: - Usage: required - Value type: - Definition: must be "hfpll0", "hfpll1", "acpu0_aux", "acpu1_aux", "qsb". - -Example: - - kraitcc: clock-controller { - compatible = "qcom,krait-cc-v1"; - clocks = <&hfpll0>, <&hfpll1>, <&acpu0_aux>, <&acpu1_aux>, ; - clock-names = "hfpll0", "hfpll1", "acpu0_aux", "acpu1_aux", "qsb"; - #clock-cells = <1>; - }; diff --git a/Documentation/devicetree/bindings/clock/qcom,krait-cc.yaml b/Documentation/devicetree/bindings/clock/qcom,krait-cc.yaml new file mode 100644 index 000000000000..8caa5a677394 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,krait-cc.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,krait-cc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Krait Clock Controller + +maintainers: + - Christian Marangi + +description: | + Qualcomm Krait Clock Controller used to correctly scale the CPU and the L2 + rates. + +properties: + compatible: + enum: + - qcom,krait-cc-v1 + - qcom,krait-cc-v2 + + clocks: + items: + - description: phandle to hfpll for CPU0 mux + - description: phandle to hfpll for CPU1 mux + - description: phandle to CPU0 aux clock + - description: phandle to CPU1 aux clock + - description: phandle to QSB fixed clk + + clock-names: + items: + - const: hfpll0 + - const: hfpll1 + - const: acpu0_aux + - const: acpu1_aux + - const: qsb + + '#clock-cells': + const: 1 + +required: + - compatible + - clocks + - clock-names + - '#clock-cells' + +additionalProperties: false + +examples: + - | + clock-controller { + compatible = "qcom,krait-cc-v1"; + clocks = <&hfpll0>, <&hfpll1>, + <&acpu0_aux>, <&acpu1_aux>, <&qsb>; + clock-names = "hfpll0", "hfpll1", + "acpu0_aux", "acpu1_aux", "qsb"; + #clock-cells = <1>; + }; +... From patchwork Tue Jun 28 18:41:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 585679 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B5134C433EF for ; Tue, 28 Jun 2022 18:49:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233798AbiF1Stw (ORCPT ); Tue, 28 Jun 2022 14:49:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48660 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233693AbiF1Stq (ORCPT ); Tue, 28 Jun 2022 14:49:46 -0400 Received: from mail-ej1-x62a.google.com (mail-ej1-x62a.google.com [IPv6:2a00:1450:4864:20::62a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 490C824950; Tue, 28 Jun 2022 11:49:45 -0700 (PDT) Received: by mail-ej1-x62a.google.com with SMTP id fi2so27600468ejb.9; Tue, 28 Jun 2022 11:49:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=4FPkUUdFj7N4cyVSH9dZ9KXQ/52X77hSvZgVoO/7D4M=; b=gstC7xo1AEvWKUhvixaizNSnyNWPy//LAansrSGGap4FYta3JPXGOHPqqnQyEsZbYv 1V2XO0bcJYzSN1QRNlFneRJvJ2LZT7VHktV20UrAvgL1J+I4ZGls7+gJ7zgZ4nbqifC+ /qBW53hb8bTJeAEKYYn67EZhp6osLjLzL4o0gpiMzkiHCUk3hWszbhncRRBPFQJO8Iy0 74GVcWvxx71koaL3DH+mVrT+sX+XJXsrwdSFhK6WSONLaRenXbbekAPrdPchTQ2Y1sqa u4SIJK/nOc7hFPenaHmgt22phNLyCtqkcq1COD3RFOiQqA9A5dIYbx/xNH27jvVN9aBP CNrw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=4FPkUUdFj7N4cyVSH9dZ9KXQ/52X77hSvZgVoO/7D4M=; b=IjNoKql2OKfaSli1erHLcqqPck1vcu2eMVFKd61+KPBK/mrKZLOpt7jUADRa65L16K 8fiN+/B+Wa6MT7e+mtM4XGBF+N8beG/AylplSlg25/4PiuJbSvWilOqry1G1b0PhblZr 1xxc1LDzR78HxoODQrFH7S24LFgTOrePaEzpCD/b1QeDilrxz2V8VDZbfWBbJQc48P3T 1XvfTFAr2KYJUC3niepjBpPr5MQjErBEV2eCJf+zSo+zhL1zBt2gRUDxdI3/EJTGvA6o B1ZFhQK5TNRL2CMRwXtcGJO3n7BnxLzdF6IWOQYHQR7uLy73X1yhs/JJA7EEyN5p3Ccu cGBQ== X-Gm-Message-State: AJIora+ORyBAyD9MQ+voLQS1etbvZcpwJZi6AHuCYpdSHgzb1F+sSeln aKYgNiHCcyyREqGBbZvDsuk= X-Google-Smtp-Source: AGRyM1sPbUQJUF9V3odw3WotosGv+O2gMJkST/dUL5e6cE6iQuL6RVKt7CTyXB2U8YLH6A85XHAKYg== X-Received: by 2002:a17:906:9508:b0:723:ef49:fe4c with SMTP id u8-20020a170906950800b00723ef49fe4cmr19791717ejx.489.1656442183703; Tue, 28 Jun 2022 11:49:43 -0700 (PDT) Received: from localhost.localdomain (93-42-70-190.ip85.fastwebnet.it. [93.42.70.190]) by smtp.googlemail.com with ESMTPSA id t21-20020a05640203d500b0043573c59ea0sm9747593edw.90.2022.06.28.11.49.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Jun 2022 11:49:43 -0700 (PDT) From: Christian Marangi To: Rob Herring , Krzysztof Kozlowski , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Jens Axboe , Greg Kroah-Hartman , Christian Marangi , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v3 3/4] dt-bindings: arm: msm: Rework kpss-gcc driver Documentation to yaml Date: Tue, 28 Jun 2022 20:41:36 +0200 Message-Id: <20220628184137.21678-4-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220628184137.21678-1-ansuelsmth@gmail.com> References: <20220628184137.21678-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Rework kpss-gcc driver Documentation to yaml Documentation. The current kpss-gcc Documentation have major problems and can't be converted directly. Introduce various changes to the original Documentation. Add #clock-cells additional binding as this clock outputs a static clk named acpu_l2_aux with supported compatible. Only some compatible require and outputs a clock, for the others, set only the reg as a required binding to correctly export the kpss-gcc registers. As the reg is shared also add the required syscon compatible. Signed-off-by: Christian Marangi --- .../bindings/arm/msm/qcom,kpss-gcc.txt | 44 --------- .../bindings/arm/msm/qcom,kpss-gcc.yaml | 89 +++++++++++++++++++ 2 files changed, 89 insertions(+), 44 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt create mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.yaml diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt deleted file mode 100644 index e628758950e1..000000000000 --- a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt +++ /dev/null @@ -1,44 +0,0 @@ -Krait Processor Sub-system (KPSS) Global Clock Controller (GCC) - -PROPERTIES - -- compatible: - Usage: required - Value type: - Definition: should be one of the following. The generic compatible - "qcom,kpss-gcc" should also be included. - "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc" - "qcom,kpss-gcc-apq8064", "qcom,kpss-gcc" - "qcom,kpss-gcc-msm8974", "qcom,kpss-gcc" - "qcom,kpss-gcc-msm8960", "qcom,kpss-gcc" - -- reg: - Usage: required - Value type: - Definition: base address and size of the register region - -- clocks: - Usage: required - Value type: - Definition: reference to the pll parents. - -- clock-names: - Usage: required - Value type: - Definition: must be "pll8_vote", "pxo". - -- clock-output-names: - Usage: required - Value type: - Definition: Name of the output clock. Typically acpu_l2_aux indicating - an L2 cache auxiliary clock. - -Example: - - l2cc: clock-controller@2011000 { - compatible = "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc"; - reg = <0x2011000 0x1000>; - clocks = <&gcc PLL8_VOTE>, <&gcc PXO_SRC>; - clock-names = "pll8_vote", "pxo"; - clock-output-names = "acpu_l2_aux"; - }; diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.yaml b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.yaml new file mode 100644 index 000000000000..04db9aca5ca3 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.yaml @@ -0,0 +1,89 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/msm/qcom,kpss-gcc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Krait Processor Sub-system (KPSS) Global Clock Controller (GCC) + +maintainers: + - Christian Marangi + +description: | + Krait Processor Sub-system (KPSS) Global Clock Controller (GCC). Used + to control L2 mux (in the current implementation) and provide access + to the kpss-gcc registers. + +properties: + compatible: + items: + - enum: + - qcom,kpss-gcc-ipq8064 + - qcom,kpss-gcc-apq8064 + - qcom,kpss-gcc-msm8974 + - qcom,kpss-gcc-msm8960 + - qcom,kpss-gcc-msm8660 + - qcom,kpss-gcc-mdm9615 + - const: qcom,kpss-gcc + - const: syscon + + reg: + maxItems: 1 + + clocks: + items: + - description: phandle to pll8_vote + - description: phandle to pxo_board + + clock-names: + items: + - const: pll8_vote + - const: pxo + + '#clock-cells': + const: 0 + +required: + - compatible + - reg + +if: + properties: + compatible: + contains: + enum: + - qcom,kpss-gcc-ipq8064 + - qcom,kpss-gcc-msm8974 + - qcom,kpss-gcc-msm8960 +then: + required: + - clocks + - clock-names + - '#clock-cells' +else: + properties: + clock: false + clock-names: false + '#clock-cells': false + +additionalProperties: false + +examples: + - | + #include + + clock-controller@2011000 { + compatible = "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc", "syscon"; + reg = <0x2011000 0x1000>; + clocks = <&gcc PLL8_VOTE>, <&pxo_board>; + clock-names = "pll8_vote", "pxo"; + #clock-cells = <0>; + }; + + - | + clock-controller@2011000 { + compatible = "qcom,kpss-gcc-mdm9615", "qcom,kpss-gcc", "syscon"; + reg = <0x02011000 0x1000>; + }; +... +