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([122.255.60.245]) by smtp.gmail.com with ESMTPSA id d18-20020a170903231200b0016bf7981d0bsm508454plh.86.2022.07.05.04.00.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Jul 2022 04:00:04 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Song Gao , Thomas Huth Subject: [PULL 1/6] hw/rtc/ls7a_rtc: Drop unused inline functions Date: Tue, 5 Jul 2022 16:29:51 +0530 Message-Id: <20220705105957.1144514-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220705105957.1144514-1-richard.henderson@linaro.org> References: <20220705105957.1144514-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42c; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Remove toy_val_to_time_mon and toy_val_to_time_year as unused, to avoid a build failure with clang. Remove all of the other inline markers too so that this does not creep back in. Reviewed-by: Song Gao Reviewed-by: Thomas Huth Signed-off-by: Richard Henderson --- hw/rtc/ls7a_rtc.c | 27 ++++++--------------------- 1 file changed, 6 insertions(+), 21 deletions(-) diff --git a/hw/rtc/ls7a_rtc.c b/hw/rtc/ls7a_rtc.c index e8b75701e4..1f9e38a735 100644 --- a/hw/rtc/ls7a_rtc.c +++ b/hw/rtc/ls7a_rtc.c @@ -86,46 +86,31 @@ struct LS7ARtcState { }; /* switch nanoseconds time to rtc ticks */ -static inline uint64_t ls7a_rtc_ticks(void) +static uint64_t ls7a_rtc_ticks(void) { return qemu_clock_get_ns(rtc_clock) * LS7A_RTC_FREQ / NANOSECONDS_PER_SECOND; } /* switch rtc ticks to nanoseconds */ -static inline uint64_t ticks_to_ns(uint64_t ticks) +static uint64_t ticks_to_ns(uint64_t ticks) { return ticks * NANOSECONDS_PER_SECOND / LS7A_RTC_FREQ; } -static inline bool toy_enabled(LS7ARtcState *s) +static bool toy_enabled(LS7ARtcState *s) { return FIELD_EX32(s->cntrctl, RTC_CTRL, TOYEN) && FIELD_EX32(s->cntrctl, RTC_CTRL, EO); } -static inline bool rtc_enabled(LS7ARtcState *s) +static bool rtc_enabled(LS7ARtcState *s) { return FIELD_EX32(s->cntrctl, RTC_CTRL, RTCEN) && FIELD_EX32(s->cntrctl, RTC_CTRL, EO); } -/* parse toy value to struct tm */ -static inline void toy_val_to_time_mon(uint64_t toy_val, struct tm *tm) -{ - tm->tm_sec = FIELD_EX32(toy_val, TOY, SEC); - tm->tm_min = FIELD_EX32(toy_val, TOY, MIN); - tm->tm_hour = FIELD_EX32(toy_val, TOY, HOUR); - tm->tm_mday = FIELD_EX32(toy_val, TOY, DAY); - tm->tm_mon = FIELD_EX32(toy_val, TOY, MON) - 1; -} - -static inline void toy_val_to_time_year(uint64_t toy_year, struct tm *tm) -{ - tm->tm_year = toy_year; -} - /* parse struct tm to toy value */ -static inline uint64_t toy_time_to_val_mon(struct tm *tm) +static uint64_t toy_time_to_val_mon(const struct tm *tm) { uint64_t val = 0; @@ -137,7 +122,7 @@ static inline uint64_t toy_time_to_val_mon(struct tm *tm) return val; } -static inline void toymatch_val_to_time(LS7ARtcState *s, uint64_t val, struct tm *tm) +static void toymatch_val_to_time(LS7ARtcState *s, uint64_t val, struct tm *tm) { qemu_get_timedate(tm, s->offset_toy); tm->tm_sec = FIELD_EX32(val, TOY_MATCH, SEC); From patchwork Tue Jul 5 10:59:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 587445 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:1ec:0:0:0:0 with SMTP id 12csp1658854map; Tue, 5 Jul 2022 04:22:32 -0700 (PDT) X-Google-Smtp-Source: AGRyM1vt1uHuHY3JJEzTpZggoJVZ2r8uBpcAmucGxtT2t8cBJtDiiDd3gulOTmtRuQMYriK2N+o7 X-Received: by 2002:a81:34a:0:b0:31c:849b:a9a with SMTP id 71-20020a81034a000000b0031c849b0a9amr17831330ywd.422.1657020152288; Tue, 05 Jul 2022 04:22:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1657020152; cv=none; d=google.com; s=arc-20160816; b=bqe3ZGK/YVmFp1rLzDMl+iFJ/gY2fCQ+eeVPmPQ3u9pXI4zWFMM9lAIMCYxoE7tXYD m5nguzH38E6JenOjC6wwrfMI8b6pZXObIoi5RpgA6py6kwEsjJ+mHoT/XZmkzmX55ueV KX1Ltwbm1AsLZxaduhY5uCU3nWBvoQCLl586gY1ZhFXEGZB5KRPY3a8UOcCp7HIJiyb6 RwfpkZixKBpJVGC/l31WnYmZRxg7Rxa+y/Lxras4JsmjEAWP8PbOGjezcCHOEs1i1Mr/ avIXYSzTXmIbl7HrzM1yMYaNX4vNSmFxZ2RSRs12jkPJ4SdqHx5sqhGXqdLtL5gA6mRW 7BHA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=z9HYnLroahrDAazMWts4PSFEzXJdvqtXFJupFoU2vN8=; b=jf6OO7UJVMRxFAFGcpg1/woe9mOKCdhba+0tUepoTmSNjFki5uuGKM07ALFL2AGHMo quPuTrfKKsYgW6kj980EyvdWFFxe0tYNxMzKMMRvcW6Nub0EJVFB7L3LA2ZmG8pZXGi7 KCLx0CrwB7CZAZCJmSkZ9VCezzyTJkGSD7TRIpCXY5bnpI/SNVvjsoVEr5tAwgcxrpmB hsgWwwqff8U6YUhxw14gfrIyD7N3EDKuF9MtYAoM7EoUXVwTcdblecaeymxlhtISqquE 6ilZ2FgNl/5iTLJB9WKCrf+NgEZxgn6wr5AYcUF5/Qo2QwRJc63zZczg8TYW8HI7rjfK LRXQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dmooeY8o; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([122.255.60.245]) by smtp.gmail.com with ESMTPSA id d18-20020a170903231200b0016bf7981d0bsm508454plh.86.2022.07.05.04.00.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Jul 2022 04:00:08 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Song Gao Subject: [PULL 2/6] target/loongarch: Clean up tlb when cpu reset Date: Tue, 5 Jul 2022 16:29:53 +0530 Message-Id: <20220705105957.1144514-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220705105957.1144514-1-richard.henderson@linaro.org> References: <20220705105957.1144514-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::533; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x533.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Song Gao We should make sure that tlb is clean when cpu reset. Signed-off-by: Song Gao Message-Id: <20220705070950.2364243-1-gaosong@loongson.cn> Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson --- target/loongarch/cpu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index d2d4667a34..e21715592a 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -479,6 +479,7 @@ static void loongarch_cpu_reset(DeviceState *dev) #ifndef CONFIG_USER_ONLY env->pc = 0x1c000000; + memset(env->tlb, 0, sizeof(env->tlb)); #endif restore_fp_status(env); From patchwork Tue Jul 5 10:59:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 587441 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:1ec:0:0:0:0 with SMTP id 12csp1651738map; Tue, 5 Jul 2022 04:13:38 -0700 (PDT) X-Google-Smtp-Source: AGRyM1tBINrj+3Hg1N+0IAWZC0dq2U4Llx5t9dzPg+WPSEQdx2O58qLXjidALSKosTcS3zZ8YNvs X-Received: by 2002:ac8:7f0d:0:b0:31d:4894:ad54 with SMTP id f13-20020ac87f0d000000b0031d4894ad54mr9226176qtk.137.1657019618527; Tue, 05 Jul 2022 04:13:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1657019618; cv=none; d=google.com; s=arc-20160816; b=pN3B7uNQB4mqEfqC0C7vn5dVunvmky25rsxRDccYUsbci/sN+4Y/5sMsbVil1R/Qxh 9WaNkm/8IUqkoO3GQyeUPVrQEmDvE0oxDPP/TIzEv3LhW3HnLe28yTT/GRfEA/GMRL9w phcdoJj5R8Dm8x/YDylQSLzI+2TYUHrbt/eertKeR0SzN/o7gdcGtsP825MYYSKEihov 7Tbu+FZ949PH4z4qv38qK845r19n/pekqmg14sLqIFHIs9r3Hiwj1/9fsAmPof3Sfshg sjgYWOD2U1AhDpGmnym5HpMwD6rxdNH3R4eXBrhCCeB8Rzqwn1SWZlg/qPC+O1z6vZnW VUVQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Ky07ThqARHiFkhWeIFBW8AVKAgEQoX250iifcE1+G+E=; b=CZsi5kmrKs5+I5u5rXc2msMVgRqAhym/0HH72p5tD1p1cHOXRk2m6GrpZv8fehT4Hm lM9+DlVwdjA3Iic2e2+RWbmhIJ2oqnKVxlkpJMk3Vph/f9m5W3ig1W9BaQV0wcN6HW39 1Sx4sd1leWZsPJC8j9z1njVuBAXg8mKVuduKHiFLDDXL/SHNJC0uj8quUlJHomv/7hRk G1MTcO3mNoBjY9w7aoALeVdXctVYs1khDCu75ET0JADYoGfVl2eCvm51LtCwpmmWmx4c bye22cG35P53RjwUoNKK+kS45BGQLTI/w4Tk0sayGVR+MqvSONUwe1//2GYw7WA441o9 sP2Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KmtB3jfz; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([122.255.60.245]) by smtp.gmail.com with ESMTPSA id d18-20020a170903231200b0016bf7981d0bsm508454plh.86.2022.07.05.04.00.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Jul 2022 04:00:11 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Song Gao Subject: [PULL 3/6] scripts/qemu-binfmt-conf: Add LoongArch to qemu_get_family() Date: Tue, 5 Jul 2022 16:29:54 +0530 Message-Id: <20220705105957.1144514-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220705105957.1144514-1-richard.henderson@linaro.org> References: <20220705105957.1144514-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::633; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Song Gao qemu_get_family() needs to add LoongArch support. Signed-off-by: Song Gao Message-Id: <20220705065943.2353930-1-gaosong@loongson.cn> Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson --- scripts/qemu-binfmt-conf.sh | 3 +++ 1 file changed, 3 insertions(+) diff --git a/scripts/qemu-binfmt-conf.sh b/scripts/qemu-binfmt-conf.sh index 1f4e2cd19d..6ef9f118d9 100755 --- a/scripts/qemu-binfmt-conf.sh +++ b/scripts/qemu-binfmt-conf.sh @@ -171,6 +171,9 @@ qemu_get_family() { riscv*) echo "riscv" ;; + loongarch*) + echo "loongarch" + ;; *) echo "$cpu" ;; From patchwork Tue Jul 5 10:59:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 587444 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:1ec:0:0:0:0 with SMTP id 12csp1657757map; Tue, 5 Jul 2022 04:20:53 -0700 (PDT) X-Google-Smtp-Source: AGRyM1upV0gApEmBYXIFegBrBBWzSRaq2sKIRz/NEAVj/NFtpsUki2sCOqkz+d+GMkM4C5n2YdfU X-Received: by 2002:a0c:f40c:0:b0:472:ff75:49ce with SMTP id h12-20020a0cf40c000000b00472ff7549cemr4788024qvl.91.1657020052916; Tue, 05 Jul 2022 04:20:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1657020052; cv=none; d=google.com; s=arc-20160816; b=xJD6VnJod5vAjgK3VuRXurWrdbStO+fJppXXqtUhlmDtG571XHGDIMv+nMDJdlRr6Z MPzBG2vSxzcxSD+9hT4+ctE5hTB3K4vibwA61X22NESpsisdknv+APbBPT4at9KfsJgU RdttmmuS2AJbNrViDp0tyhcX6mkR1auUSojDHmY+rKpFbJltPd+IpcsweHz0fYyk2Y7k qZc4d1DLl5DgJqRgGLasK4wBQDdZJjma9RbvX09duAtgsjdRT09wS1hLIpcSdRyLcBS5 P340CtvGUZkZunYfLR7+cU9tMmUos5YKk/tcpzLIazKLTxcmCZ1XqBscyRZKJ086fAkw 70VQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=y9T0Dgh+y//OTwBqoQX1MWiwDSflPGnZ8HYkylQu7wI=; b=LtjTV4VVWt5lhbglyQ1HftQmfei13OowN3mQGL0BNZ+1MYJ5SedUPbMjMbSWh31xA5 cJcBeX2ATc6T55gS1/gHg4jrUAAPJ8DGh0RyrQlzdeOYIaCKa5kW+rK9BUSJ3HL2VbSP ravM8YT+priuVgGb+jRApzLxN8nL2WV8zKqgQJkZERY4YJOmzQh9ZcEKK44ecAYTyg/p 5rj8go/fshuJ/avm3hwFpnLDyKDWsvfDJ7IICgneCHscQfP87asCSsoc5AEaD0we6Oay 58kx88SCPpP2DuegNZQ66zC6+6uoJvJ+aWPCYfKZFo1muO1MjvPUbgNlshgtfxM5NGDy ag8A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EQU3B7Lx; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([122.255.60.245]) by smtp.gmail.com with ESMTPSA id d18-20020a170903231200b0016bf7981d0bsm508454plh.86.2022.07.05.04.00.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Jul 2022 04:00:13 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Song Gao , =?utf-8?q?Alex_Benn=C3=A9e?= Subject: [PULL 4/6] tcg/tci: Remove CONFIG_DEBUG_TCG_INTERPRETER Date: Tue, 5 Jul 2022 16:29:55 +0530 Message-Id: <20220705105957.1144514-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220705105957.1144514-1-richard.henderson@linaro.org> References: <20220705105957.1144514-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::629; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" There is nothing in this environment variable that cannot be done better with -d flags. There is nothing special about TCI that warrants this hack. Moreover, it does not compile -- remove it. Reported-by: Song Gao Reviewed-by: Song Gao Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- tcg/tci/tcg-target.h | 5 ----- tcg/tci/tcg-target.c.inc | 7 ------- 2 files changed, 12 deletions(-) diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h index 033e613f24..ceb36c4f7a 100644 --- a/tcg/tci/tcg-target.h +++ b/tcg/tci/tcg-target.h @@ -53,11 +53,6 @@ # error Unknown pointer size for tci target #endif -#ifdef CONFIG_DEBUG_TCG -/* Enable debug output. */ -#define CONFIG_DEBUG_TCG_INTERPRETER -#endif - /* Optional instructions. */ #define TCG_TARGET_HAS_bswap16_i32 1 diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 98337c567a..f3d7441e06 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -823,13 +823,6 @@ static void tcg_out_nop_fill(tcg_insn_unit *p, int count) static void tcg_target_init(TCGContext *s) { -#if defined(CONFIG_DEBUG_TCG_INTERPRETER) - const char *envval = getenv("DEBUG_TCG"); - if (envval) { - qemu_set_log(strtol(envval, NULL, 0)); - } -#endif - /* The current code uses uint8_t for tcg operations. */ tcg_debug_assert(tcg_op_defs_max <= UINT8_MAX); From patchwork Tue Jul 5 10:59:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 587443 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:1ec:0:0:0:0 with SMTP id 12csp1655821map; Tue, 5 Jul 2022 04:18:09 -0700 (PDT) X-Google-Smtp-Source: AGRyM1uX8y7MOgdhGxa/xyU2lwlc+8lIGWeADrLK3zr9B54h3NEgzC/13fQ1ND7HE9+M3YUXaznM X-Received: by 2002:a05:6902:1009:b0:66d:5f35:58aa with SMTP id w9-20020a056902100900b0066d5f3558aamr37352657ybt.275.1657019889806; Tue, 05 Jul 2022 04:18:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1657019889; cv=none; d=google.com; s=arc-20160816; b=l5Al7q+xbndSb3YFJgXX6ikkE2bTMsbQ7U0P4DNDgJqaO7fdxfviSGz1nL2VSADWsL 4OsZAR70tazvVGcV09xgGYGfX8qIJvTg2pi5UQigYfdQbKcUPMRQR+DFiEBYKYlxsHZD ZSWQtWkTY4r8heBEPvgPkRhI4kgJ8RZak28d2mYBrVsZrqdU1F1M8MbUXAXUNDSXEl5m Yw3UqBITpgM+cRkDhBrjc8QR+3YGzJcCc5NKdp0M0KXwT9Pn0cnkoK9JMtF6rIHaigVT M97kJ2h6OQZJsRQbhJGscIM65zKMTc4BgRlqhJn4JacWN5Na/0v5F+Aq7YZe1Nwuh1GT 0gkA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=AohpMsSvo2wFsE5mlCbRYktMX9SmmQeeRLqLmCJ9PEc=; b=mH31H5v/Hgo/7/EDrNn2vignFnn6SSaq/dWGmgS0D1RlhnjUQP2MMOPgoGGrwuQ73q FnXdH4jLH4E7/sOP46ilMCuahPwBsDM8hR/AEf0eqfYfOZZpxT0h6KbzS4Do2EHkTEbg GcDg+hfTSA2cm7fvMPT6cwwdtLvVdLu/M9EOcj6WJeT/G5ksj7YlmtFLwDJouPBWlKae rmaL5pD555IvmXNRfQzYp0RGxV3WwSgsKU52qv/hsR1xXuInYwwcDnS2kKIddvrGtcph enYlIJqGfpN6nXDg/d9O4PP/8dS7PF2pxi1VrLew5nO8J+iPXmdb2a0HQ+8GzkVih4IY w+Vg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="QbM+VBO/"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([122.255.60.245]) by smtp.gmail.com with ESMTPSA id d18-20020a170903231200b0016bf7981d0bsm508454plh.86.2022.07.05.04.00.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Jul 2022 04:00:16 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Xiaojuan Yang Subject: [PULL 5/6] hw/intc/loongarch_ipi: Fix ipi device access of 64bits Date: Tue, 5 Jul 2022 16:29:56 +0530 Message-Id: <20220705105957.1144514-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220705105957.1144514-1-richard.henderson@linaro.org> References: <20220705105957.1144514-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1034; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1034.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Xiaojuan Yang In general loongarch ipi device, 32bit registers is emulated, however for anysend/mailsend device only 64bit register access is supported. So separate the ipi memory region into two regions, including 32 bits and 64 bits. Signed-off-by: Xiaojuan Yang Message-Id: <20220705064901.2353349-2-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson --- include/hw/intc/loongarch_ipi.h | 7 +++--- hw/intc/loongarch_ipi.c | 38 +++++++++++++++++++++++++++------ hw/loongarch/loongson3.c | 5 ++++- 3 files changed, 39 insertions(+), 11 deletions(-) diff --git a/include/hw/intc/loongarch_ipi.h b/include/hw/intc/loongarch_ipi.h index 996ed7ea93..0ee48fca55 100644 --- a/include/hw/intc/loongarch_ipi.h +++ b/include/hw/intc/loongarch_ipi.h @@ -24,8 +24,9 @@ #define IOCSR_MAIL_SEND 0x48 #define IOCSR_ANY_SEND 0x158 -/* IPI system memory address */ -#define IPI_SYSTEM_MEM 0x1fe01000 +#define MAIL_SEND_ADDR (SMP_IPI_MAILBOX + IOCSR_MAIL_SEND) +#define MAIL_SEND_OFFSET 0 +#define ANY_SEND_OFFSET (IOCSR_ANY_SEND - IOCSR_MAIL_SEND) #define MAX_IPI_CORE_NUM 4 #define MAX_IPI_MBX_NUM 4 @@ -46,7 +47,7 @@ typedef struct IPICore { struct LoongArchIPI { SysBusDevice parent_obj; MemoryRegion ipi_iocsr_mem[MAX_IPI_CORE_NUM]; - MemoryRegion ipi_system_mem[MAX_IPI_CORE_NUM]; + MemoryRegion ipi64_iocsr_mem[MAX_IPI_CORE_NUM]; }; #endif diff --git a/hw/intc/loongarch_ipi.c b/hw/intc/loongarch_ipi.c index 66bee93675..b8b1b9cd53 100644 --- a/hw/intc/loongarch_ipi.c +++ b/hw/intc/loongarch_ipi.c @@ -150,12 +150,6 @@ static void loongarch_ipi_writel(void *opaque, hwaddr addr, uint64_t val, case IOCSR_IPI_SEND: ipi_send(val); break; - case IOCSR_MAIL_SEND: - mail_send(val); - break; - case IOCSR_ANY_SEND: - any_send(val); - break; default: qemu_log_mask(LOG_UNIMP, "invalid write: %x", (uint32_t)addr); break; @@ -172,6 +166,32 @@ static const MemoryRegionOps loongarch_ipi_ops = { .endianness = DEVICE_LITTLE_ENDIAN, }; +/* mail send and any send only support writeq */ +static void loongarch_ipi_writeq(void *opaque, hwaddr addr, uint64_t val, + unsigned size) +{ + addr &= 0xfff; + switch (addr) { + case MAIL_SEND_OFFSET: + mail_send(val); + break; + case ANY_SEND_OFFSET: + any_send(val); + break; + default: + break; + } +} + +static const MemoryRegionOps loongarch_ipi64_ops = { + .write = loongarch_ipi_writeq, + .impl.min_access_size = 8, + .impl.max_access_size = 8, + .valid.min_access_size = 8, + .valid.max_access_size = 8, + .endianness = DEVICE_LITTLE_ENDIAN, +}; + static void loongarch_ipi_init(Object *obj) { int cpu; @@ -187,8 +207,12 @@ static void loongarch_ipi_init(Object *obj) lams = LOONGARCH_MACHINE(machine); for (cpu = 0; cpu < MAX_IPI_CORE_NUM; cpu++) { memory_region_init_io(&s->ipi_iocsr_mem[cpu], obj, &loongarch_ipi_ops, - &lams->ipi_core[cpu], "loongarch_ipi_iocsr", 0x100); + &lams->ipi_core[cpu], "loongarch_ipi_iocsr", 0x48); sysbus_init_mmio(sbd, &s->ipi_iocsr_mem[cpu]); + + memory_region_init_io(&s->ipi64_iocsr_mem[cpu], obj, &loongarch_ipi64_ops, + &lams->ipi_core[cpu], "loongarch_ipi64_iocsr", 0x118); + sysbus_init_mmio(sbd, &s->ipi64_iocsr_mem[cpu]); qdev_init_gpio_out(DEVICE(obj), &lams->ipi_core[cpu].irq, 1); } } diff --git a/hw/loongarch/loongson3.c b/hw/loongarch/loongson3.c index 403dd91e11..15fddfc4f5 100644 --- a/hw/loongarch/loongson3.c +++ b/hw/loongarch/loongson3.c @@ -230,7 +230,10 @@ static void loongarch_irq_init(LoongArchMachineState *lams) /* IPI iocsr memory region */ memory_region_add_subregion(&env->system_iocsr, SMP_IPI_MAILBOX, sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), - cpu)); + cpu * 2)); + memory_region_add_subregion(&env->system_iocsr, MAIL_SEND_ADDR, + sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), + cpu * 2 + 1)); /* extioi iocsr memory region */ memory_region_add_subregion(&env->system_iocsr, APIC_BASE, sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi), From patchwork Tue Jul 5 10:59:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 587446 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:1ec:0:0:0:0 with SMTP id 12csp1659918map; Tue, 5 Jul 2022 04:24:01 -0700 (PDT) X-Google-Smtp-Source: AGRyM1tA2z94wK+yGgiheXUMtoDJEBrk7o0tKYG8bbYF+RHhZeY3d/6pFNopnxaWLFOecyRM51u8 X-Received: by 2002:a25:8386:0:b0:66e:3dba:b908 with SMTP id t6-20020a258386000000b0066e3dbab908mr13172163ybk.279.1657020241145; Tue, 05 Jul 2022 04:24:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1657020241; cv=none; d=google.com; s=arc-20160816; b=UPbd6IeEpSqlV+nUR7EOwEGsq9HI17jfOvZ9ck4xbYE861vGoCMFfPNlADUu6hF1Ls ph2lRXTXVMdToqWq+cV261ZeI5mCLK3ETGEoJ01g/VgzhQPFDAWZ9E1QRzbIMCtwswFK zCyppBaYTd6c1NnJh4rHZSxQ1Kq6zj5edF7qE0k5yGU2Xq5sCNtn7Cb/oyGZ0ZFSBc/3 nSZFsoFyXRjCDPZO5fJ0kCIofHv30nYP2+NC6WwD5S+xVNdv1023hXcMCmSdMU8Hqm80 E1kpYN0SEnIBnqoaTMp2ZduFeTNSWf18rX/u851BgdPxtcyBppzEXXz5WEjs5dbpA1Td 1B7g== ARC-Message-Signature: i=1; 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([122.255.60.245]) by smtp.gmail.com with ESMTPSA id d18-20020a170903231200b0016bf7981d0bsm508454plh.86.2022.07.05.04.00.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Jul 2022 04:00:19 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Xiaojuan Yang Subject: [PULL 6/6] hw/intc/loongarch_ipi: Fix mail send and any send function Date: Tue, 5 Jul 2022 16:29:57 +0530 Message-Id: <20220705105957.1144514-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220705105957.1144514-1-richard.henderson@linaro.org> References: <20220705105957.1144514-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102e; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Xiaojuan Yang By the document of ipi mailsend device, byte is written only when the mask bit is 0. The original code discards mask bit and overwrite the data always, this patch fixes the issue. Signed-off-by: Xiaojuan Yang Message-Id: <20220705064901.2353349-3-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson --- hw/intc/loongarch_ipi.c | 54 +++++++++++++++++++++++------------------ 1 file changed, 31 insertions(+), 23 deletions(-) diff --git a/hw/intc/loongarch_ipi.c b/hw/intc/loongarch_ipi.c index b8b1b9cd53..4f3c58f872 100644 --- a/hw/intc/loongarch_ipi.c +++ b/hw/intc/loongarch_ipi.c @@ -50,35 +50,45 @@ static uint64_t loongarch_ipi_readl(void *opaque, hwaddr addr, unsigned size) return ret; } -static int get_ipi_data(target_ulong val) +static void send_ipi_data(CPULoongArchState *env, target_ulong val, target_ulong addr) { - int i, mask, data; + int i, mask = 0, data = 0; - data = val >> 32; - mask = (val >> 27) & 0xf; - - for (i = 0; i < 4; i++) { - if ((mask >> i) & 1) { - data &= ~(0xff << (i * 8)); + /* + * bit 27-30 is mask for byte writing, + * if the mask is 0, we need not to do anything. + */ + if ((val >> 27) & 0xf) { + data = address_space_ldl(&env->address_space_iocsr, addr, + MEMTXATTRS_UNSPECIFIED, NULL); + for (i = 0; i < 4; i++) { + /* get mask for byte writing */ + if (val & (0x1 << (27 + i))) { + mask |= 0xff << (i * 8); + } } } - return data; + + data &= mask; + data |= (val >> 32) & ~mask; + address_space_stl(&env->address_space_iocsr, addr, + data, MEMTXATTRS_UNSPECIFIED, NULL); } static void ipi_send(uint64_t val) { int cpuid, data; CPULoongArchState *env; + CPUState *cs; + LoongArchCPU *cpu; cpuid = (val >> 16) & 0x3ff; /* IPI status vector */ data = 1 << (val & 0x1f); - qemu_mutex_lock_iothread(); - CPUState *cs = qemu_get_cpu(cpuid); - LoongArchCPU *cpu = LOONGARCH_CPU(cs); + cs = qemu_get_cpu(cpuid); + cpu = LOONGARCH_CPU(cs); env = &cpu->env; loongarch_cpu_set_irq(cpu, IRQ_IPI, 1); - qemu_mutex_unlock_iothread(); address_space_stl(&env->address_space_iocsr, 0x1008, data, MEMTXATTRS_UNSPECIFIED, NULL); @@ -86,23 +96,23 @@ static void ipi_send(uint64_t val) static void mail_send(uint64_t val) { - int cpuid, data; + int cpuid; hwaddr addr; CPULoongArchState *env; + CPUState *cs; + LoongArchCPU *cpu; cpuid = (val >> 16) & 0x3ff; addr = 0x1020 + (val & 0x1c); - CPUState *cs = qemu_get_cpu(cpuid); - LoongArchCPU *cpu = LOONGARCH_CPU(cs); + cs = qemu_get_cpu(cpuid); + cpu = LOONGARCH_CPU(cs); env = &cpu->env; - data = get_ipi_data(val); - address_space_stl(&env->address_space_iocsr, addr, - data, MEMTXATTRS_UNSPECIFIED, NULL); + send_ipi_data(env, val, addr); } static void any_send(uint64_t val) { - int cpuid, data; + int cpuid; hwaddr addr; CPULoongArchState *env; @@ -111,9 +121,7 @@ static void any_send(uint64_t val) CPUState *cs = qemu_get_cpu(cpuid); LoongArchCPU *cpu = LOONGARCH_CPU(cs); env = &cpu->env; - data = get_ipi_data(val); - address_space_stl(&env->address_space_iocsr, addr, - data, MEMTXATTRS_UNSPECIFIED, NULL); + send_ipi_data(env, val, addr); } static void loongarch_ipi_writel(void *opaque, hwaddr addr, uint64_t val,