From patchwork Wed Jul 6 17:15:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prashant Malani X-Patchwork-Id: 588073 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3F59CC433EF for ; Wed, 6 Jul 2022 17:18:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229840AbiGFRSo (ORCPT ); Wed, 6 Jul 2022 13:18:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40942 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229723AbiGFRSm (ORCPT ); Wed, 6 Jul 2022 13:18:42 -0400 Received: from mail-pg1-x530.google.com (mail-pg1-x530.google.com [IPv6:2607:f8b0:4864:20::530]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CA05F1838E for ; Wed, 6 Jul 2022 10:18:41 -0700 (PDT) Received: by mail-pg1-x530.google.com with SMTP id i190so1910211pge.7 for ; Wed, 06 Jul 2022 10:18:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=sB4D1atBiaqKiCp+/oP8s6xiYE5LCpCI5LwUJJ8ZAKk=; b=fCY8LiJ7Lx7jGPLpVOBG/PzTDFDgBR2+M9TVaoeErF0JqtEPIe1ynbxpUZPBHrzehU fxqDJQ24s4M0Vrwsjd0Z3qhlY1nTgElpZtgdQpBMhvGAjXGZD4UQMz5+2nZ+Qm4LW2CH JfJQflXLL8BzEkNAshx3aFvu4kPdU/a+6Apeg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=sB4D1atBiaqKiCp+/oP8s6xiYE5LCpCI5LwUJJ8ZAKk=; b=Ept3qe8fXhNyT//gZp/nZeho15tsGmsstnIfVoFszElfrbDlUGVgjthK2HT6d4eDP3 ONwzwBj7biJ6WxJ8r9XTj3pWsvlTUvSVyz6hIYNI8v13B7VYgJxZNls3oo352jOYpypm xQqsaOAAfTRg3Qw2eFW8JCbdfk/Ejht4SEf9iqfyXmjqWFf8xZWw5r9+Wl13J/IDWOlH f2dNknN6ldBO+YaVdOJ1Pe97Sl01Y1dYJSxmH80YFPoqjsgw1+s6AhMTGMqI4VnqIgf7 pb5T8QdAIaD6lxoYQPUg7xcBJX6n4MR4p+FNt4UfOsYhHWAFyL9w5BkmehvO8XXLFe0k El0A== X-Gm-Message-State: AJIora9TeJIDhARLOlK6lLJePVpqdBdv3A31jrBxb4YpHiFPu3FN1KGv q3f+zhIYOgqDiEUckQtoujB3uQ== X-Google-Smtp-Source: AGRyM1vAFvh2Hyslk30+D+mp3QJUfmdlP6BYbMGe3W7KBUXLVDYIwgTZ55rfzR/lLX3w0CIIur+/Lw== X-Received: by 2002:a65:4b82:0:b0:412:4346:f594 with SMTP id t2-20020a654b82000000b004124346f594mr15815383pgq.593.1657127921401; Wed, 06 Jul 2022 10:18:41 -0700 (PDT) Received: from pmalani.c.googlers.com.com (157.214.185.35.bc.googleusercontent.com. [35.185.214.157]) by smtp.gmail.com with ESMTPSA id h14-20020a170902f7ce00b0016be0d5483asm7514953plw.252.2022.07.06.10.18.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Jul 2022 10:18:41 -0700 (PDT) From: Prashant Malani To: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, chrome-platform@lists.linux.dev Cc: bleung@chromium.org, heikki.krogerus@linux.intel.com, Prashant Malani , Daisuke Nojiri , "Dustin L. Howett" , Greg Kroah-Hartman , Guenter Roeck , "Gustavo A. R. Silva" , Kees Cook , Sebastian Reichel , Tzung-Bi Shih Subject: [PATCH v2 2/9] usb: typec: Add retimer handle to port Date: Wed, 6 Jul 2022 17:15:06 +0000 Message-Id: <20220706171601.807042-3-pmalani@chromium.org> X-Mailer: git-send-email 2.37.0.rc0.161.g10f37bed90-goog In-Reply-To: <20220706171601.807042-1-pmalani@chromium.org> References: <20220706171601.807042-1-pmalani@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Similar to mux and orientation switch, add a handle for registered retimer to the port, so that it has handles to the various switches connected to it. Signed-off-by: Prashant Malani --- Changes since v1: - Relinquish retimer reference during typec_release. drivers/usb/typec/class.c | 9 +++++++++ drivers/usb/typec/class.h | 1 + 2 files changed, 10 insertions(+) diff --git a/drivers/usb/typec/class.c b/drivers/usb/typec/class.c index 9062836bb638..f08e32d552b4 100644 --- a/drivers/usb/typec/class.c +++ b/drivers/usb/typec/class.c @@ -12,6 +12,7 @@ #include #include #include +#include #include "bus.h" #include "class.h" @@ -1736,6 +1737,7 @@ static void typec_release(struct device *dev) ida_destroy(&port->mode_ids); typec_switch_put(port->sw); typec_mux_put(port->mux); + typec_retimer_put(port->retimer); kfree(port->cap); kfree(port); } @@ -2249,6 +2251,13 @@ struct typec_port *typec_register_port(struct device *parent, return ERR_PTR(ret); } + port->retimer = typec_retimer_get(&port->dev); + if (IS_ERR(port->retimer)) { + ret = PTR_ERR(port->retimer); + put_device(&port->dev); + return ERR_PTR(ret); + } + ret = device_add(&port->dev); if (ret) { dev_err(parent, "failed to register port (%d)\n", ret); diff --git a/drivers/usb/typec/class.h b/drivers/usb/typec/class.h index 43fcf9e37a8c..673b2952b074 100644 --- a/drivers/usb/typec/class.h +++ b/drivers/usb/typec/class.h @@ -55,6 +55,7 @@ struct typec_port { enum typec_orientation orientation; struct typec_switch *sw; struct typec_mux *mux; + struct typec_retimer *retimer; const struct typec_capability *cap; const struct typec_operations *ops; From patchwork Wed Jul 6 17:15:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prashant Malani X-Patchwork-Id: 588072 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DB65EC433EF for ; Wed, 6 Jul 2022 17:20:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233584AbiGFRUq (ORCPT ); Wed, 6 Jul 2022 13:20:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42062 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231147AbiGFRUp (ORCPT ); Wed, 6 Jul 2022 13:20:45 -0400 Received: from mail-pf1-x42d.google.com (mail-pf1-x42d.google.com [IPv6:2607:f8b0:4864:20::42d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BFC261A80E for ; Wed, 6 Jul 2022 10:20:44 -0700 (PDT) Received: by mail-pf1-x42d.google.com with SMTP id g126so513539pfb.3 for ; Wed, 06 Jul 2022 10:20:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0mAPFLRpf5mKx/F8Hi4SurvzzhTNKba+eu5GuTpXPCo=; b=ELfXB+Bk6HiRh0qy1XL+YhZRyb8jc2FuH7Zdt1AhsMCy6coyNqBSA2anIqt/T/QNZ3 cWUIAIvFUO4dlBdvL6yZ+9P0IlHvNS8iVpthlzqp+pE+lMhaJup27yQj5wXk+wX/sv/S /1//gD7zH/TBJDqzQtJKC/tRFJ92Eoe1nHIKs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0mAPFLRpf5mKx/F8Hi4SurvzzhTNKba+eu5GuTpXPCo=; b=mjk9xtN5ZsCEch7uf6jPtXgIRZL1u4BL7GxBkhTFtHMXwUijGD+9s43hefUPxOnj+2 bRe60png1pLiYp21ZtnI+fih1tFshkFvR26UbLtzCL4xwQjiYSwaWPoDDOiGSCYKBLCK 5m909Z5AVgTibX+B0D5fe7TqkN1sLxIPBxJ96Lria8A7q2xzXw7HtN4H+sfaKYBZ5g67 sbQP9KNqXf7ATEaZZ/gmi26GhAY0owxEWLQ2Yp+GjxvyqLUJ+2Gely9gwXV8TW3r/+cn ZB6pB0qr9cvBYaH7zQfthJ9olcd4nwuP4pS7Y/Q+qcWHm2twpYzu8EBPVwDYMENokjVj pVeA== X-Gm-Message-State: AJIora+O9D1QjD80ZEjFQiDNeeTRGHWwkghTVQaUPt/DS/7IE7Y8l47N 44VibuAEN9ece9v4Ter6qW0IIQ== X-Google-Smtp-Source: AGRyM1vTSkdhaYKWUxAlokXtexPiFDBlP2eg/5Y0AX/JR+CovhjdG0ayTLAARfDW68VJUIv8yfdi/g== X-Received: by 2002:a63:8341:0:b0:412:a34a:b9d3 with SMTP id h62-20020a638341000000b00412a34ab9d3mr2618813pge.437.1657128044289; Wed, 06 Jul 2022 10:20:44 -0700 (PDT) Received: from pmalani.c.googlers.com.com (157.214.185.35.bc.googleusercontent.com. [35.185.214.157]) by smtp.gmail.com with ESMTPSA id h14-20020a170902f7ce00b0016be0d5483asm7514953plw.252.2022.07.06.10.20.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Jul 2022 10:20:43 -0700 (PDT) From: Prashant Malani To: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, chrome-platform@lists.linux.dev Cc: bleung@chromium.org, heikki.krogerus@linux.intel.com, Prashant Malani , Daisuke Nojiri , "Dustin L. Howett" , Greg Kroah-Hartman , Guenter Roeck , "Gustavo A. R. Silva" , Kees Cook , Sebastian Reichel , Tzung-Bi Shih Subject: [PATCH v2 4/9] platform/chrome: cros_typec_switch: Add switch driver Date: Wed, 6 Jul 2022 17:15:08 +0000 Message-Id: <20220706171601.807042-5-pmalani@chromium.org> X-Mailer: git-send-email 2.37.0.rc0.161.g10f37bed90-goog In-Reply-To: <20220706171601.807042-1-pmalani@chromium.org> References: <20220706171601.807042-1-pmalani@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Introduce a driver to configure USB Type-C mode switches and retimers which are controlled by the Chrome OS EC (Embedded Controller). This allows Type-C port drivers, as well as alternate mode drivers to configure their relevant mode switches and retimers according to the Type-C state they want to achieve. ACPI devices with ID GOOG001A will bind to this driver. Currently, we only register a retimer switch with a stub set function. Subsequent patches will implement the host command set functionality, and introduce mode switches. Signed-off-by: Prashant Malani Reported-by: kernel test robot --- Changes since v1: - No changes. MAINTAINERS | 1 + drivers/platform/chrome/Kconfig | 11 ++ drivers/platform/chrome/Makefile | 1 + drivers/platform/chrome/cros_typec_switch.c | 171 ++++++++++++++++++++ 4 files changed, 184 insertions(+) create mode 100644 drivers/platform/chrome/cros_typec_switch.c diff --git a/MAINTAINERS b/MAINTAINERS index 7533cb27adc0..35ea91c619b7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4752,6 +4752,7 @@ M: Prashant Malani L: chrome-platform@lists.linux.dev S: Maintained F: drivers/platform/chrome/cros_ec_typec.c +F: drivers/platform/chrome/cros_typec_switch.c CHROMEOS EC USB PD NOTIFY DRIVER M: Prashant Malani diff --git a/drivers/platform/chrome/Kconfig b/drivers/platform/chrome/Kconfig index 717299cbccac..c62a514a087f 100644 --- a/drivers/platform/chrome/Kconfig +++ b/drivers/platform/chrome/Kconfig @@ -265,6 +265,17 @@ config CHROMEOS_PRIVACY_SCREEN this should probably always be built into the kernel to avoid or minimize drm probe deferral. +config CROS_TYPEC_SWITCH + tristate "ChromeOS EC Type-C Switch Control" + depends on MFD_CROS_EC_DEV && TYPEC + default MFD_CROS_EC_DEV + help + If you say Y here, you get support for configuring the Chrome OS EC Type C + muxes and retimers. + + To compile this driver as a module, choose M here: the module will be + called cros_typec_switch. + source "drivers/platform/chrome/wilco_ec/Kconfig" endif # CHROMEOS_PLATFORMS diff --git a/drivers/platform/chrome/Makefile b/drivers/platform/chrome/Makefile index 52f5a2dde8b8..0dcaf6a7ed27 100644 --- a/drivers/platform/chrome/Makefile +++ b/drivers/platform/chrome/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_CHROMEOS_TBMC) += chromeos_tbmc.o obj-$(CONFIG_CROS_EC) += cros_ec.o obj-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o obj-$(CONFIG_CROS_EC_ISHTP) += cros_ec_ishtp.o +obj-$(CONFIG_CROS_TYPEC_SWITCH) += cros_typec_switch.o obj-$(CONFIG_CROS_EC_RPMSG) += cros_ec_rpmsg.o obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o cros_ec_lpcs-objs := cros_ec_lpc.o cros_ec_lpc_mec.o diff --git a/drivers/platform/chrome/cros_typec_switch.c b/drivers/platform/chrome/cros_typec_switch.c new file mode 100644 index 000000000000..1a795f613543 --- /dev/null +++ b/drivers/platform/chrome/cros_typec_switch.c @@ -0,0 +1,171 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright 2022 Google LLC + * + * This driver provides the ability to configure Type C muxes and retimers which are controlled by + * the Chrome OS EC. + */ + +#include +#include +#include +#include +#include + +#define DRV_NAME "cros-typec-switch" + +/* Handles and other relevant data required for each port's switches. */ +struct cros_typec_port { + int port_num; + struct typec_retimer *retimer; + struct cros_typec_switch_data *sdata; +}; + +/* Driver-specific data. */ +struct cros_typec_switch_data { + struct device *dev; + struct cros_ec_device *ec; + struct cros_typec_port *ports[EC_USB_PD_MAX_PORTS]; +}; + +static int +cros_typec_retimer_set(struct typec_retimer *retimer, struct typec_retimer_state *state) +{ + return 0; +} + +void cros_typec_unregister_switches(struct cros_typec_switch_data *sdata) +{ + int i; + + for (i = 0; i < EC_USB_PD_MAX_PORTS; i++) { + if (!sdata->ports[i]) + continue; + typec_retimer_unregister(sdata->ports[i]->retimer); + } +} + +int cros_typec_register_retimer(struct cros_typec_port *port, struct fwnode_handle *fwnode) +{ + struct typec_retimer_desc retimer_desc = { + .fwnode = fwnode, + .drvdata = port, + .name = fwnode_get_name(fwnode), + .set = cros_typec_retimer_set, + }; + + port->retimer = typec_retimer_register(port->sdata->dev, &retimer_desc); + if (IS_ERR(port->retimer)) + return PTR_ERR(port->retimer); + + return 0; +} + +static int cros_typec_register_switches(struct cros_typec_switch_data *sdata) +{ + struct cros_typec_port *port = NULL; + struct device *dev = sdata->dev; + struct fwnode_handle *fwnode; + struct acpi_device *adev; + unsigned long long index; + int ret = 0; + int nports; + + nports = device_get_child_node_count(dev); + if (nports == 0) { + dev_err(dev, "No switch devices found.\n"); + return -ENODEV; + } + + device_for_each_child_node(dev, fwnode) { + port = devm_kzalloc(dev, sizeof(*port), GFP_KERNEL); + if (!port) { + ret = -ENOMEM; + goto err_switch; + } + + adev = to_acpi_device_node(fwnode); + if (!adev) { + dev_err(fwnode->dev, "Couldn't get ACPI device handle\n"); + ret = -ENODEV; + goto err_switch; + } + + ret = acpi_evaluate_integer(adev->handle, "_ADR", NULL, &index); + if (ACPI_FAILURE(ret)) { + dev_err(fwnode->dev, "_ADR wasn't evaluated\n"); + ret = -ENODATA; + goto err_switch; + } + + if (index < 0 || index >= EC_USB_PD_MAX_PORTS) { + dev_err(fwnode->dev, "Invalid port index number: %llu", index); + ret = -EINVAL; + goto err_switch; + } + port->sdata = sdata; + port->port_num = index; + sdata->ports[index] = port; + + ret = cros_typec_register_retimer(port, fwnode); + if (ret) { + dev_err(dev, "Retimer switch register failed\n"); + goto err_switch; + } + + dev_dbg(dev, "Retimer switch registered for index %llu\n", index); + } + + return 0; +err_switch: + cros_typec_unregister_switches(sdata); + return ret; +} + +static int cros_typec_switch_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct cros_typec_switch_data *sdata; + + sdata = devm_kzalloc(dev, sizeof(*sdata), GFP_KERNEL); + if (!sdata) + return -ENOMEM; + + sdata->dev = dev; + sdata->ec = dev_get_drvdata(pdev->dev.parent); + + platform_set_drvdata(pdev, sdata); + + return cros_typec_register_switches(sdata); +} + +static int cros_typec_switch_remove(struct platform_device *pdev) +{ + struct cros_typec_switch_data *sdata = platform_get_drvdata(pdev); + + cros_typec_unregister_switches(sdata); + return 0; +} + +#ifdef CONFIG_ACPI +static const struct acpi_device_id cros_typec_switch_acpi_id[] = { + { "GOOG001A", 0 }, + {} +}; +MODULE_DEVICE_TABLE(acpi, cros_typec_switch_acpi_id); +#endif + +static struct platform_driver cros_typec_switch_driver = { + .driver = { + .name = DRV_NAME, + .acpi_match_table = ACPI_PTR(cros_typec_switch_acpi_id), + }, + .probe = cros_typec_switch_probe, + .remove = cros_typec_switch_remove, +}; + +module_platform_driver(cros_typec_switch_driver); + +MODULE_AUTHOR("Prashant Malani "); +MODULE_DESCRIPTION("Chrome OS EC Type C Switch control"); +MODULE_LICENSE("GPL"); From patchwork Wed Jul 6 17:15:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prashant Malani X-Patchwork-Id: 588071 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5E9DBC433EF for ; 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[35.185.214.157]) by smtp.gmail.com with ESMTPSA id h14-20020a170902f7ce00b0016be0d5483asm7514953plw.252.2022.07.06.10.22.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Jul 2022 10:22:20 -0700 (PDT) From: Prashant Malani To: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, chrome-platform@lists.linux.dev Cc: bleung@chromium.org, heikki.krogerus@linux.intel.com, Prashant Malani , Daisuke Nojiri , "Dustin L. Howett" , Greg Kroah-Hartman , Guenter Roeck , "Gustavo A. R. Silva" , Sebastian Reichel , Tzung-Bi Shih Subject: [PATCH v2 6/9] platform/chrome: cros_typec_switch: Add event check Date: Wed, 6 Jul 2022 17:15:10 +0000 Message-Id: <20220706171601.807042-7-pmalani@chromium.org> X-Mailer: git-send-email 2.37.0.rc0.161.g10f37bed90-goog In-Reply-To: <20220706171601.807042-1-pmalani@chromium.org> References: <20220706171601.807042-1-pmalani@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org The Chrome EC updates Type-C status events when mux set requests from the Application Processor (AP) are completed. Add a check to the flow of configuring muxes to look for this status done bit, so that the driver is aware that the mux set completed successfully or not. Signed-off-by: Prashant Malani Reported-by: kernel test robot --- Changes since v1: - No changes. drivers/platform/chrome/cros_typec_switch.c | 72 ++++++++++++++++++++- 1 file changed, 70 insertions(+), 2 deletions(-) diff --git a/drivers/platform/chrome/cros_typec_switch.c b/drivers/platform/chrome/cros_typec_switch.c index 9faa442dd81a..a226f828514f 100644 --- a/drivers/platform/chrome/cros_typec_switch.c +++ b/drivers/platform/chrome/cros_typec_switch.c @@ -7,6 +7,8 @@ */ #include +#include +#include #include #include #include @@ -63,6 +65,40 @@ static int cros_typec_get_mux_state(unsigned long mode, struct typec_altmode *al return ret; } +static int cros_typec_send_clear_event(struct cros_typec_switch_data *sdata, int port_num, + u32 events_mask) +{ + struct ec_params_typec_control req = { + .port = port_num, + .command = TYPEC_CONTROL_COMMAND_CLEAR_EVENTS, + .clear_events_mask = events_mask, + }; + + return cros_ec_command(sdata->ec, 0, EC_CMD_TYPEC_CONTROL, &req, + sizeof(req), NULL, 0); +} + +bool cros_typec_check_event(struct cros_typec_switch_data *sdata, int port_num, u32 mask) +{ + struct ec_response_typec_status resp; + struct ec_params_typec_status req = { + .port = port_num, + }; + int ret; + + ret = cros_ec_command(sdata->ec, 0, EC_CMD_TYPEC_STATUS, &req, sizeof(req), + &resp, sizeof(resp)); + if (ret < 0) { + dev_warn(sdata->dev, "EC_CMD_TYPEC_STATUS failed for port: %d\n", port_num); + return false; + } + + if (resp.events & mask) + return true; + + return false; +} + /* * The Chrome EC treats both mode-switches and retimers as "muxes" for the purposes of the * host command API. This common function configures and verifies the retimer/mode-switch @@ -71,12 +107,44 @@ static int cros_typec_get_mux_state(unsigned long mode, struct typec_altmode *al static int cros_typec_configure_mux(struct cros_typec_switch_data *sdata, int port_num, int index, unsigned long mode, struct typec_altmode *alt) { - int ret = cros_typec_get_mux_state(mode, alt); + unsigned long end; + u32 event_mask; + u8 mux_state; + int ret; + + ret = cros_typec_get_mux_state(mode, alt); + if (ret < 0) + return ret; + mux_state = (u8)ret; + /* Clear any old mux set done event. */ + if (index == 0) + event_mask = PD_STATUS_EVENT_MUX_0_SET_DONE; + else + event_mask = PD_STATUS_EVENT_MUX_1_SET_DONE; + + ret = cros_typec_send_clear_event(sdata, port_num, event_mask); + if (ret < 0) + return ret; + + /* Send the set command. */ + ret = cros_typec_cmd_mux_set(sdata, port_num, index, mux_state); if (ret < 0) return ret; - return cros_typec_cmd_mux_set(sdata, port_num, index, (u8)ret); + /* Check for the mux set done event. */ + end = jiffies + msecs_to_jiffies(1000); + do { + if (cros_typec_check_event(sdata, port_num, event_mask)) + return 0; + + usleep_range(500, 1000); + } while (time_before(jiffies, end)); + + dev_err(sdata->dev, "Timed out waiting for mux set done on index: %d, state: %d\n", + index, mux_state); + + return -ETIMEDOUT; } static int From patchwork Wed Jul 6 17:15:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prashant Malani X-Patchwork-Id: 588070 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82970C433EF for ; Wed, 6 Jul 2022 17:23:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233870AbiGFRXw (ORCPT ); Wed, 6 Jul 2022 13:23:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45306 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233887AbiGFRXj (ORCPT ); Wed, 6 Jul 2022 13:23:39 -0400 Received: from mail-pl1-x632.google.com (mail-pl1-x632.google.com [IPv6:2607:f8b0:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 676492A71D for ; Wed, 6 Jul 2022 10:23:38 -0700 (PDT) Received: by mail-pl1-x632.google.com with SMTP id f11so1632566plr.4 for ; Wed, 06 Jul 2022 10:23:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yav60sk4t1jSHI9y7JwNTzYMHxVBsDg0h4MxYyUTEPE=; b=j2Jn45au290gtTFCTf5ikH5yAqAHf0I7w5DZ6J2ln2fTcaKI1HD+BMjDKiRf1fWhsh XfiCuSZJyaHD/8ghRqM5EcDDKHtC+IzPaP0SpwDeXP4r9gVE5NuBWd/QOd2qKPIqblc9 h/DGkYqxjMj00Jr6530xkwT3Gme6bs4dSOdfc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yav60sk4t1jSHI9y7JwNTzYMHxVBsDg0h4MxYyUTEPE=; b=LnvhDel+6MQE1NS42FOP25IeqpCwwfGvy+oU1Os+t9QOK016mMNXRYhqKW7qBEuFXe 7TRkKHsqac0TKeW6/VDHuCHB40G+SJZsytsiyGYrBmSv0v/nJYnUWh/smY3tkWquo6+Q Z/8xALcJ9L9ySJaHeJ52aTqK3fXXgPyz2yLGPKSBg7h1eOG+EILxuWOjsiUBUvEO4Kmi Sxc88Qk4beMNXzryHCFCczcHP7pC5c4UtWl8SlXuSCQ4Y/9VfyBqSXNveneiKYOkRIcX 2IOt/cLqSWCxG4voBnrGs9fYe1+nQZTO17DB8ZRo8GEITXbCKMKADV6gIwzvynt4E6DT b/GA== X-Gm-Message-State: AJIora8lUnXq4y17GUrb8US+G5GuWn8a2Na68ddx/mvYzPW/9/alEebh aTYF1cdQs9Y+YyC+EQzJnULkDg== X-Google-Smtp-Source: AGRyM1tnnh3jgtm7cCp9Qgeg1uF8C64jY6TXiUAsXTO+1wpBfTZrDmt44SkdsuY2bjLKYP5D1k01mw== X-Received: by 2002:a17:902:d50b:b0:16c:474:ce67 with SMTP id b11-20020a170902d50b00b0016c0474ce67mr3487691plg.112.1657128217975; Wed, 06 Jul 2022 10:23:37 -0700 (PDT) Received: from pmalani.c.googlers.com.com (157.214.185.35.bc.googleusercontent.com. [35.185.214.157]) by smtp.gmail.com with ESMTPSA id h14-20020a170902f7ce00b0016be0d5483asm7514953plw.252.2022.07.06.10.23.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Jul 2022 10:23:37 -0700 (PDT) From: Prashant Malani To: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, chrome-platform@lists.linux.dev Cc: bleung@chromium.org, heikki.krogerus@linux.intel.com, Prashant Malani , Daisuke Nojiri , "Dustin L. Howett" , Greg Kroah-Hartman , Guenter Roeck , "Gustavo A. R. Silva" , Kees Cook , Sebastian Reichel , Tzung-Bi Shih Subject: [PATCH v2 8/9] platform/chrome: cros_ec_typec: Cleanup switch handle return paths Date: Wed, 6 Jul 2022 17:15:12 +0000 Message-Id: <20220706171601.807042-9-pmalani@chromium.org> X-Mailer: git-send-email 2.37.0.rc0.161.g10f37bed90-goog In-Reply-To: <20220706171601.807042-1-pmalani@chromium.org> References: <20220706171601.807042-1-pmalani@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Some of the return paths for the cros_typec_get_switch_handles() aren't necessary. Clean up the return paths to only undo the handle get's which succeeded. Signed-off-by: Prashant Malani --- Changes since v1: - No changes. drivers/platform/chrome/cros_ec_typec.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chrome/cros_ec_typec.c index 7cb2e35c4ded..39e6fd4491a9 100644 --- a/drivers/platform/chrome/cros_ec_typec.c +++ b/drivers/platform/chrome/cros_ec_typec.c @@ -157,12 +157,10 @@ static int cros_typec_get_switch_handles(struct cros_typec_port *port, return 0; role_sw_err: - usb_role_switch_put(port->role_sw); -ori_sw_err: typec_switch_put(port->ori_sw); -mux_err: +ori_sw_err: typec_mux_put(port->mux); - +mux_err: return -ENODEV; }