From patchwork Tue Aug 2 15:39:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 595390 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D2651C00140 for ; Tue, 2 Aug 2022 15:40:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230159AbiHBPkI (ORCPT ); Tue, 2 Aug 2022 11:40:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41508 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230173AbiHBPkF (ORCPT ); Tue, 2 Aug 2022 11:40:05 -0400 Received: from mail-lj1-x232.google.com (mail-lj1-x232.google.com [IPv6:2a00:1450:4864:20::232]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B9EC11D0ED for ; Tue, 2 Aug 2022 08:40:03 -0700 (PDT) Received: by mail-lj1-x232.google.com with SMTP id v7so8392177ljh.5 for ; Tue, 02 Aug 2022 08:40:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=pKFMxLdzMMCmBAvAMafde7KAO0riCXoUd+kCG04d3r8=; b=WtXCGVaCBrGBE93teWIHaijjVyU+aUP1RhNj0/CkHurBb4Zgt5as+KR7yghEspuKJB rQ6vRfSExnf5CGaCrK8f1d3uuq7Z8cQKIrJWBw/VcpD8P19exHEK0BeIkWObSJI+coVW TQW0dEmphVcIJMCXXLgGB0liy7FWSHNhfAhFjKeUA2m1b0jzs4CfHO0vRivedp69o1MQ 43ENEbXQNBM+bz5DmjT7sw5dJNSgODV28Ii3JMEmgkvUjsbideGva2+cfZrgl5COXnpU re2mNMDVV5x6KWRzGy2Kx1x6vZrMueTWX5tJFYkk0czVG1h9UUioEaE8dVahmEZX849G akYA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=pKFMxLdzMMCmBAvAMafde7KAO0riCXoUd+kCG04d3r8=; b=EsNlP6eoZBsmJfdlhTT9n03osuU308FORV1My3dmSgF34en7hzDJe5jyA/9t7/bLbY WcZphIhEuvGHiROO5RZqY16m39DkhtUr9BN/5gvosTW5uAo12lWfeR2PZJuo8fTOtHms tvV9/zPNZHrQ1uk280UO2gQ7IIzp9d+dMTtr/P0Nk9hbVNAOig9jPZh31U/CLtsXRvMn 1MLFtVIWwdFi+f2NCgFIAPH/Fz4nKccz3B+bnFroHWyQqrWoWpGYytlkow+4qDw5SdPc dA0PzAvmHruv3BCB31TB1TiIzgJazVG4kNz7gAar3+Y1i5bPPtxRB/+YtqlNXoNEOQer uhew== X-Gm-Message-State: AJIora+sTV4p+jOgTDdKQuLCZHjSRy4mhnHEwrS7sfQnpyd/SgTjZQZY DreGMiVcl4lOzgBtLz0IWF5IWA== X-Google-Smtp-Source: AGRyM1uRTYMK1JhX8SYxG08TsaYXt/wJd0IECVQqxWGt0vLTkj44kGBQdgj6J068T+zNhgw77IDwng== X-Received: by 2002:a2e:84ca:0:b0:25d:77e0:2566 with SMTP id q10-20020a2e84ca000000b0025d77e02566mr7165001ljh.78.1659454801856; Tue, 02 Aug 2022 08:40:01 -0700 (PDT) Received: from krzk-bin.. ([213.161.169.44]) by smtp.gmail.com with ESMTPSA id c2-20020a056512074200b0048b06f34566sm407669lfs.76.2022.08.02.08.40.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Aug 2022 08:40:01 -0700 (PDT) From: Krzysztof Kozlowski To: Rob Herring , Krzysztof Kozlowski , Loic Poulain , Robert Foss , Andy Gross , Bjorn Andersson , Konrad Dybcio , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: corbet@lwn.net, Krzysztof Kozlowski Subject: [PATCH 1/5] arm64: dts: qcom: sdm845-db845c: drop power-domains from CCI I2C sensors Date: Tue, 2 Aug 2022 17:39:43 +0200 Message-Id: <20220802153947.44457-2-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220802153947.44457-1-krzysztof.kozlowski@linaro.org> References: <20220802153947.44457-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The Camera Control Interface I2C controller device node belongs to TITAN_TOP_GDSC power domain, so its children do not need to specify it again. The OV7251 and OV8856 camera sensor bindings do not allow power-domains. Signed-off-by: Krzysztof Kozlowski --- Not tested on hardware. --- arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts index c6e2c571b452..b9304f81290a 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts @@ -1228,8 +1228,6 @@ camera@10 { * both have to be enabled through the power management * gpios. */ - power-domains = <&clock_camcc TITAN_TOP_GDSC>; - dovdd-supply = <&vreg_lvs1a_1p8>; avdd-supply = <&cam0_avdd_2v8>; dvdd-supply = <&cam0_dvdd_1v2>; @@ -1273,8 +1271,6 @@ camera@60 { * * No 1.2V vddd-supply regulator is used. */ - power-domains = <&clock_camcc TITAN_TOP_GDSC>; - vdddo-supply = <&vreg_lvs1a_1p8>; vdda-supply = <&cam3_avdd_2v8>; From patchwork Tue Aug 2 15:39:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 594906 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B7BB7C25B07 for ; Tue, 2 Aug 2022 15:40:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230173AbiHBPkK (ORCPT ); Tue, 2 Aug 2022 11:40:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41526 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231199AbiHBPkI (ORCPT ); Tue, 2 Aug 2022 11:40:08 -0400 Received: from mail-lf1-x12e.google.com (mail-lf1-x12e.google.com [IPv6:2a00:1450:4864:20::12e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9D1BA220C4 for ; Tue, 2 Aug 2022 08:40:05 -0700 (PDT) Received: by mail-lf1-x12e.google.com with SMTP id e15so12475911lfs.0 for ; Tue, 02 Aug 2022 08:40:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=dwlezbvhXuRvV5TPdrQiV7stHxCGcT+SmzyEBBd3qdo=; b=N0cpFWI/ylXfaxwVjxPbWzBvKvt2QFKUdosx2mmu90xftITQDuB0ZYnRy7mwtY9V4S fKV4N4a0JXLzQGnTEkQ0zKxN4fPSw9cy1PHUakHUNQDMT+OPvI5WdBz6isCELWkd8yMd HnSEtmi+U9i7LIPXMJ3duagQEsLMFapZZM9faQ/RZqzwltCwg6mER+DOUhNQpPuKePte ayhHMD3GmAdEZQTX8syhL0/vfofvEbJBPqRP6v+jNDICrFtFQaU2hY6Uu/TUMZNHk4X6 ua3w22EcHqHW6WSNXICyCSPN47Mo9agZPv6RmLvHMkjrh+/JZ2STYwpZ2PzV30Qy/3u2 rrIQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=dwlezbvhXuRvV5TPdrQiV7stHxCGcT+SmzyEBBd3qdo=; b=ZSaREuw/w43fxK+PzIzaeudltFTZT6ZdQOTymhmypoqsV2CHFuoLbB6HzOl+l+97di OBpaby7Gnb/D0oAWihpWexgu1mAmOZ++ceOGIFwImt+PGdwN/SjKYjW2e9X2tz7sqXg+ ZFt6oSly+qd7PMQM5v/7Qw8avBXZT0bTcDKpmdrtQ+5Crc03ls2BzOae9w+zkk/Zkz30 vxr3NBlFUA4Ad21nxQD3+aV3yMtbQh36+Z0e0+Eg8I+wjfa4SnQhSIjmE93HSSC7ewKE 5uOfq6MPIWHen462CEP98Jt1uLx1GlROjIPFRLGHfWwAzsqIKiWhwDReJN5ufhmjDKaV Haiw== X-Gm-Message-State: ACgBeo1gdWwSfBYAiU1Bkem27hizgQYQUnIt9+43OlFnqtk3nPTiV0DY SFCusZ+8zw0cgqxC7XIGzzVZkQ== X-Google-Smtp-Source: AA6agR5oggDH/S0CVwXycN1Z+nIz4U3RvOhhs5EFFUPMEIJLcH2s8mt3kCdoQKDVs+D3+6ECHMGMlQ== X-Received: by 2002:a05:6512:12c9:b0:48b:138d:c84f with SMTP id p9-20020a05651212c900b0048b138dc84fmr950215lfg.391.1659454803659; Tue, 02 Aug 2022 08:40:03 -0700 (PDT) Received: from krzk-bin.. ([213.161.169.44]) by smtp.gmail.com with ESMTPSA id c2-20020a056512074200b0048b06f34566sm407669lfs.76.2022.08.02.08.40.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Aug 2022 08:40:03 -0700 (PDT) From: Krzysztof Kozlowski To: Rob Herring , Krzysztof Kozlowski , Loic Poulain , Robert Foss , Andy Gross , Bjorn Andersson , Konrad Dybcio , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: corbet@lwn.net, Krzysztof Kozlowski Subject: [PATCH 2/5] arm64: dts: qcom: sdm845-db845c: drop gpios from CCI I2C sensors Date: Tue, 2 Aug 2022 17:39:44 +0200 Message-Id: <20220802153947.44457-3-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220802153947.44457-1-krzysztof.kozlowski@linaro.org> References: <20220802153947.44457-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The OV7251 and OV8856 camera sensor bindings do not allow property "gpios" and Linux driver does not parse it. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Robert Foss --- Not tested on hardware. --- arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts index b9304f81290a..f313f6964810 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts @@ -1214,8 +1214,6 @@ camera@10 { reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>; pinctrl-names = "default"; pinctrl-0 = <&cam0_default>; - gpios = <&tlmm 13 0>, - <&tlmm 9 GPIO_ACTIVE_LOW>; clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; clock-names = "xvclk"; @@ -1256,8 +1254,6 @@ camera@60 { enable-gpios = <&tlmm 21 0>; pinctrl-names = "default"; pinctrl-0 = <&cam3_default>; - gpios = <&tlmm 16 0>, - <&tlmm 21 0>; clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; clock-names = "xclk"; From patchwork Tue Aug 2 15:39:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 595389 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4E748C25B0C for ; Tue, 2 Aug 2022 15:40:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230381AbiHBPkL (ORCPT ); Tue, 2 Aug 2022 11:40:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41616 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231247AbiHBPkJ (ORCPT ); Tue, 2 Aug 2022 11:40:09 -0400 Received: from mail-lf1-x133.google.com (mail-lf1-x133.google.com [IPv6:2a00:1450:4864:20::133]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7162B1D0ED for ; Tue, 2 Aug 2022 08:40:07 -0700 (PDT) Received: by mail-lf1-x133.google.com with SMTP id y11so22489197lfs.6 for ; Tue, 02 Aug 2022 08:40:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6U0K0h4XfCxZ6J88e7aNUQxYgHcQqggkH+1chvRPQrA=; b=NELq2s9YVjKFC0Zg3wUCSM5EfibpG68Oh5KtmFcV2J3SB8SekFdPhgcXQdX14jYTK4 sW4Ta1Xo9RuEMyAYsN81qJObrjWKGpjPtOpqBxx65+9gHtohFSllO0j1IkIvscOQ86gV 1fROcfZW5QDI4U+Ozux/OHjBgSUxmi1R6YMSsoGoXQjdCvzMJPyMT2xcYT+5g4GF6scN EWFMPONp97dEssVj0N5Ct2aCUc1uJwEHbIqcdWp6IxYpg0fH6Dk228BHMjMrNqWiydDo 42XKZH5sL9KamcEAg8s1sU/TRRfgfaQFGIVM80ywNLfJINP1CX5m98601MCcnPhpllbm hlew== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6U0K0h4XfCxZ6J88e7aNUQxYgHcQqggkH+1chvRPQrA=; b=kPkzBC/egZruOzjq0kT/SRHU0rVuyDlKRy2JbQ8pquuJ/Bihi3qcmIeRq6R4Jsj8iy 90XPN1/LsL8/05CXbHLMJxdzN2tU29idN7e+WztItXhFilFjI26aCk1kJMHCLbDxMtaw pYpkMZrMUUGhINtWTZjHdFggtWpq7zY1DBdNs1+f/R//J8Qwqh3O4Pd7hhZX/tVZmfBf idP1rAuPvetU+HbQCQWOpGI71ThX49Ve/hdxYHcWLlgYYrfGVFwfMDpOI9jDX+26funG eVuHRdvEs3aw7Xnwa1nSzf+rla/lxdukem18/gG18iO0yODYvoNmAN2I2/DoCePnJKKy geBA== X-Gm-Message-State: AJIora9ZkFdblhk24g22vXAAk77lVxobFjJ1DGCKhfmSNWmtsiQGnS7s BpHN6XVeOOqucBaYVCK+B0Qh/Q== X-Google-Smtp-Source: AA6agR5t1E3bEfgdy3JYeJ7AgQkrUCDx1qVi1ExbWCxlf3PshWe2xgu+y3rowdsDBbkZWlrhDGRGWQ== X-Received: by 2002:a05:6512:33c4:b0:489:da1c:76cc with SMTP id d4-20020a05651233c400b00489da1c76ccmr8303662lfg.237.1659454805247; Tue, 02 Aug 2022 08:40:05 -0700 (PDT) Received: from krzk-bin.. ([213.161.169.44]) by smtp.gmail.com with ESMTPSA id c2-20020a056512074200b0048b06f34566sm407669lfs.76.2022.08.02.08.40.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Aug 2022 08:40:04 -0700 (PDT) From: Krzysztof Kozlowski To: Rob Herring , Krzysztof Kozlowski , Loic Poulain , Robert Foss , Andy Gross , Bjorn Andersson , Konrad Dybcio , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: corbet@lwn.net, Krzysztof Kozlowski Subject: [PATCH 3/5] arm64: dts: qcom: use GPIO flags for tlmm Date: Tue, 2 Aug 2022 17:39:45 +0200 Message-Id: <20220802153947.44457-4-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220802153947.44457-1-krzysztof.kozlowski@linaro.org> References: <20220802153947.44457-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Use respective GPIO_ACTIVE_LOW/HIGH flags for tlmm GPIOs. Include gpio.h header if this is first usage of that flag. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/apq8096-ifc6640.dts | 2 +- arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi | 2 +- arch/arm64/boot/dts/qcom/msm8994.dtsi | 3 ++- arch/arm64/boot/dts/qcom/msm8996.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 4 ++-- arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium.dts | 2 +- arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts | 4 ++-- arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts | 2 +- arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts | 2 +- arch/arm64/boot/dts/qcom/sm8250-mtp.dts | 2 +- 10 files changed, 14 insertions(+), 12 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/apq8096-ifc6640.dts b/arch/arm64/boot/dts/qcom/apq8096-ifc6640.dts index 567b33106556..92f264891d84 100644 --- a/arch/arm64/boot/dts/qcom/apq8096-ifc6640.dts +++ b/arch/arm64/boot/dts/qcom/apq8096-ifc6640.dts @@ -368,7 +368,7 @@ &sdhc2 { bus-width = <4>; - cd-gpios = <&tlmm 38 0x1>; + cd-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>; vmmc-supply = <&vreg_l21a_2p95>; vqmmc-supply = <&vreg_l13a_2p95>; diff --git a/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi b/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi index f430d797196f..ff60b7004d26 100644 --- a/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi @@ -471,7 +471,7 @@ &sdhc1 { &sdhc2 { status = "okay"; - cd-gpios = <&tlmm 100 0>; + cd-gpios = <&tlmm 100 GPIO_ACTIVE_HIGH>; vmmc-supply = <&pm8994_l21>; vqmmc-supply = <&pm8994_l13>; }; diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi index 8bc6c070e306..86ef0091caff 100644 --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi @@ -6,6 +6,7 @@ #include #include #include +#include #include / { @@ -502,7 +503,7 @@ sdhc2: mmc@f98a4900 { pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on>; pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>; - cd-gpios = <&tlmm 100 0>; + cd-gpios = <&tlmm 100 GPIO_ACTIVE_HIGH>; bus-width = <4>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 742eac4ce9b3..0815b31c9e10 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -3337,7 +3338,7 @@ wcd9335: codec@1{ interrupt-names = "intr1", "intr2"; interrupt-controller; #interrupt-cells = <1>; - reset-gpios = <&tlmm 64 0>; + reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>; slim-ifc-dev = <&tasha_ifd>; diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts index f313f6964810..dff49e3dfe56 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts @@ -1081,7 +1081,7 @@ &wcd9340{ pinctrl-names = "default"; clock-names = "extclk"; clocks = <&rpmhcc RPMH_LN_BB_CLK2>; - reset-gpios = <&tlmm 64 0>; + reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>; vdd-buck-supply = <&vreg_s4a_1p8>; vdd-buck-sido-supply = <&vreg_s4a_1p8>; vdd-tx-supply = <&vreg_s4a_1p8>; @@ -1251,7 +1251,7 @@ camera@60 { reg = <0x60>; // CAM3_RST_N - enable-gpios = <&tlmm 21 0>; + enable-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&cam3_default>; diff --git a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium.dts b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium.dts index 82c27f90d300..0f470cf1ed1c 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium.dts @@ -546,7 +546,7 @@ &wcd9340{ pinctrl-names = "default"; clock-names = "extclk"; clocks = <&rpmhcc RPMH_LN_BB_CLK2>; - reset-gpios = <&tlmm 64 0>; + reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>; vdd-buck-supply = <&vreg_s4a_1p8>; vdd-buck-sido-supply = <&vreg_s4a_1p8>; vdd-tx-supply = <&vreg_s4a_1p8>; diff --git a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts index 7747081b9887..6a2b98c23628 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts @@ -126,7 +126,7 @@ vreg_tp_vddio: vreg-tp-vddio { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; - gpio = <&tlmm 23 0>; + gpio = <&tlmm 23 GPIO_ACTIVE_HIGH>; regulator-always-on; regulator-boot-on; enable-active-high; @@ -712,7 +712,7 @@ &wcd9340 { pinctrl-names = "default"; clock-names = "extclk"; clocks = <&rpmhcc RPMH_LN_BB_CLK2>; - reset-gpios = <&tlmm 64 0>; + reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>; vdd-buck-sido-supply = <&vreg_s4a_1p8>; vdd-buck-supply = <&vreg_s4a_1p8>; vdd-tx-supply = <&vreg_s4a_1p8>; diff --git a/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts b/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts index a7af1bed4312..be59a8ba9c1f 100644 --- a/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts +++ b/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts @@ -772,7 +772,7 @@ &wcd9340{ pinctrl-names = "default"; clock-names = "extclk"; clocks = <&rpmhcc RPMH_LN_BB_CLK2>; - reset-gpios = <&tlmm 64 0>; + reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>; vdd-buck-supply = <&vreg_s4a_1p8>; vdd-buck-sido-supply = <&vreg_s4a_1p8>; vdd-tx-supply = <&vreg_s4a_1p8>; diff --git a/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts b/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts index b0315eeb1320..f954fe5cb61a 100644 --- a/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts +++ b/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts @@ -704,7 +704,7 @@ &wcd9340{ pinctrl-names = "default"; clock-names = "extclk"; clocks = <&rpmhcc RPMH_LN_BB_CLK2>; - reset-gpios = <&tlmm 64 0>; + reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>; vdd-buck-supply = <&vreg_s4a_1p8>; vdd-buck-sido-supply = <&vreg_s4a_1p8>; vdd-tx-supply = <&vreg_s4a_1p8>; diff --git a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts index 7ab3627cc347..a102aa5efa32 100644 --- a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts @@ -635,7 +635,7 @@ &soc { wcd938x: codec { compatible = "qcom,wcd9380-codec"; #sound-dai-cells = <1>; - reset-gpios = <&tlmm 32 0>; + reset-gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>; 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([213.161.169.44]) by smtp.gmail.com with ESMTPSA id c2-20020a056512074200b0048b06f34566sm407669lfs.76.2022.08.02.08.40.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Aug 2022 08:40:06 -0700 (PDT) From: Krzysztof Kozlowski To: Rob Herring , Krzysztof Kozlowski , Loic Poulain , Robert Foss , Andy Gross , Bjorn Andersson , Konrad Dybcio , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: corbet@lwn.net, Krzysztof Kozlowski Subject: [PATCH 4/5] ARM: dts: qcom: use GPIO flags for tlmm Date: Tue, 2 Aug 2022 17:39:46 +0200 Message-Id: <20220802153947.44457-5-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220802153947.44457-1-krzysztof.kozlowski@linaro.org> References: <20220802153947.44457-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Use respective GPIO_ACTIVE_LOW/HIGH flags for tlmm GPIOs. Include gpio.h header if this is first usage of that flag. Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/qcom-apq8074-dragonboard.dts | 3 ++- arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 3 ++- arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi | 4 ++-- arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts | 5 +++-- arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts | 2 +- 5 files changed, 10 insertions(+), 7 deletions(-) diff --git a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts index 3051a861ff0c..91716298ec5e 100644 --- a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts @@ -1,4 +1,5 @@ // SPDX-License-Identifier: GPL-2.0 +#include #include "qcom-msm8974.dtsi" #include "qcom-pm8841.dtsi" #include "qcom-pm8941.dtsi" @@ -261,7 +262,7 @@ &sdhc_1 { &sdhc_2 { status = "okay"; - cd-gpios = <&tlmm 62 0x1>; + cd-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>; vmmc-supply = <&pm8941_l21>; vqmmc-supply = <&pm8941_l13>; diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi index 03bb9e1768c4..0505270cf508 100644 --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi @@ -14,6 +14,7 @@ * */ +#include #include "qcom-ipq4019.dtsi" / { @@ -72,7 +73,7 @@ spi@78b5000 { pinctrl-0 = <&spi_0_pins>; pinctrl-names = "default"; status = "okay"; - cs-gpios = <&tlmm 54 0>; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>; mx25l25635e@0 { #address-cells = <1>; diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi index 44a9597d8bfd..c2f5222e72de 100644 --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi @@ -87,7 +87,7 @@ spi@78b5000 { /* BLSP1 QUP1 */ pinctrl-0 = <&spi_0_pins>; pinctrl-names = "default"; status = "okay"; - cs-gpios = <&tlmm 12 0>; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>; flash@0 { #address-cells = <1>; @@ -100,7 +100,7 @@ flash@0 { pci@40000000 { status = "okay"; - perst-gpio = <&tlmm 38 0x1>; + perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>; }; qpic-nand@79b0000 { diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts index c7a6e77da272..7fc33149060c 100644 --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 // Copyright (c) 2018, The Linux Foundation. All rights reserved. +#include #include "qcom-ipq4019-ap.dk07.1.dtsi" / { @@ -10,7 +11,7 @@ / { soc { pci@40000000 { status = "okay"; - perst-gpio = <&tlmm 38 0x1>; + perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>; }; spi@78b6000 { @@ -50,7 +51,7 @@ spi@78b5000 { pinctrl-0 = <&spi_0_pins>; pinctrl-names = "default"; status = "okay"; - cs-gpios = <&tlmm 12 0>; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>; flash@0 { #address-cells = <1>; diff --git a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts index ec5d340562b6..6daceaa87802 100644 --- a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts +++ b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts @@ -175,7 +175,7 @@ i2c-gate { ak8963@f { compatible = "asahi-kasei,ak8963"; reg = <0x0f>; - gpios = <&tlmm 67 0>; + gpios = <&tlmm 67 GPIO_ACTIVE_HIGH>; vid-supply = <&pm8941_lvs1>; vdd-supply = <&pm8941_l17>; }; From patchwork Tue Aug 2 15:39:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 594905 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9AFC8C00140 for ; Tue, 2 Aug 2022 15:40:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231387AbiHBPkS (ORCPT ); Tue, 2 Aug 2022 11:40:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41810 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231368AbiHBPkM (ORCPT ); Tue, 2 Aug 2022 11:40:12 -0400 Received: from mail-lj1-x235.google.com (mail-lj1-x235.google.com [IPv6:2a00:1450:4864:20::235]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B17A72A4 for ; Tue, 2 Aug 2022 08:40:10 -0700 (PDT) Received: by mail-lj1-x235.google.com with SMTP id r14so16072341ljp.2 for ; Tue, 02 Aug 2022 08:40:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=mRLanuME96wPjp8H7M+PfpQzPAMElhMOqOMIo9y5QKw=; b=NpaOMVR0Mtb24/vJYjIGZnxs3n5/ZQgj1hh1O2AOPWgK7xaa8iGF5cIkZtWT+LDJ05 fVuAl84J3xlPMuaWsTZ6XWIGV9ey025dc9DoKRGas+X3EvE4tGzjDyDH4NLN1XS6YAvB aun6nn4B+1N1xrUvAaWmYQ6FUsp1z2nHej+pgdX7MBrhDGHcrn2+EDP8hwrFch5SokZ8 DAsOYctlnUa9aEb4tx1b3ivuKI6Em5i0mFtrKMCQxFGGUs5n58ur2JDSKdsVx0KAP5OY 4ERDUXaczSbzfGnl9HQB2kZui/5U7kJUvZ62nefS7P8GpRj9ewOmT80sDVLn+QL2MHA0 EGlQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=mRLanuME96wPjp8H7M+PfpQzPAMElhMOqOMIo9y5QKw=; b=jQk1dr50M0nn0Rnpx2OjZzf3hr97mWn9Jr2sYNK643vjJeqKs6NRUFscje82oGFwLY fn8e7hRpiDPFvkLshh+DxtqHSteFsKPb0oSdV8nygKMW2yy0yntD5a38ferFSDbuzO7q SHSab9Fhouhnu2rP3U6ZDz4KgYgM/wFvII3kK6iCJgjyf2ZZbJld1G5AKJIsF6636RJQ lqbDWcvV6EyzT0+tYTCQKlov0GIms43Q4jYG0p+D0TEwwy6L+7ny2mTOMYAyanpvAJ6i r6dUqOGv+yhqeXdVDtwrNLPZsAuCXOXWU0V/tb19PazpyYqDdNi4dSrOvc03VYjYUjHJ zGag== X-Gm-Message-State: AJIora/whZrNPu5vTgy1Nw2qHlC2eJQeFjO5WSF8hg/Lwj5n8Efl20Jq bCtEvI38V5HdsdiEFRois+JjvA== X-Google-Smtp-Source: AGRyM1t2eyl9aw+FQ8cyJR10lGcIFIWZkg6kQRzUt7UwdDIhyJKiUwg6lJCgRz0bsEbLCdANbABLUg== X-Received: by 2002:a05:651c:50f:b0:25d:9c69:a4e6 with SMTP id o15-20020a05651c050f00b0025d9c69a4e6mr7321814ljp.391.1659454808873; Tue, 02 Aug 2022 08:40:08 -0700 (PDT) Received: from krzk-bin.. ([213.161.169.44]) by smtp.gmail.com with ESMTPSA id c2-20020a056512074200b0048b06f34566sm407669lfs.76.2022.08.02.08.40.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Aug 2022 08:40:08 -0700 (PDT) From: Krzysztof Kozlowski To: Rob Herring , Krzysztof Kozlowski , Loic Poulain , Robert Foss , Andy Gross , Bjorn Andersson , Konrad Dybcio , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: corbet@lwn.net, Krzysztof Kozlowski Subject: [PATCH 5/5] dt-bindings: i2c: qcom,i2c-cci: convert to dtschema Date: Tue, 2 Aug 2022 17:39:47 +0200 Message-Id: <20220802153947.44457-6-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220802153947.44457-1-krzysztof.kozlowski@linaro.org> References: <20220802153947.44457-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Convert the Qualcomm Camera Control Interface (CCI) I2C controller to DT schema. The original bindings were not complete, so this includes changes: 1. Add address/size-cells. 2. Describe the clocks per variant. 3. Use more descriptive example based on sdm845. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring --- .../devicetree/bindings/i2c/i2c-qcom-cci.txt | 96 ------- .../devicetree/bindings/i2c/qcom,i2c-cci.yaml | 242 ++++++++++++++++++ MAINTAINERS | 2 +- 3 files changed, 243 insertions(+), 97 deletions(-) delete mode 100644 Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt create mode 100644 Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml diff --git a/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt b/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt deleted file mode 100644 index 166865e48849..000000000000 --- a/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt +++ /dev/null @@ -1,96 +0,0 @@ -Qualcomm Camera Control Interface (CCI) I2C controller - -PROPERTIES: - -- compatible: - Usage: required - Value type: - Definition: must be one of: - "qcom,msm8916-cci" - "qcom,msm8974-cci" - "qcom,msm8996-cci" - "qcom,sdm845-cci" - "qcom,sm8250-cci" - "qcom,sm8450-cci" - -- reg - Usage: required - Value type: - Definition: base address CCI I2C controller and length of memory - mapped region. - -- interrupts: - Usage: required - Value type: - Definition: specifies the CCI I2C interrupt. The format of the - specifier is defined by the binding document describing - the node's interrupt parent. - -- clocks: - Usage: required - Value type: - Definition: a list of phandle, should contain an entry for each - entries in clock-names. - -- clock-names - Usage: required - Value type: - Definition: a list of clock names, must include "cci" clock. - -- power-domains - Usage: required for "qcom,msm8996-cci" - Value type: - Definition: - -SUBNODES: - -The CCI provides I2C masters for one (msm8916) or two i2c busses (msm8974, -msm8996, sdm845, sm8250 and sm8450), described as subdevices named "i2c-bus@0" -and "i2c-bus@1". - -PROPERTIES: - -- reg: - Usage: required - Value type: - Definition: Index of the CCI bus/master - -- clock-frequency: - Usage: optional - Value type: - Definition: Desired I2C bus clock frequency in Hz, defaults to 100 - kHz if omitted. - -Example: - - cci@a0c000 { - compatible = "qcom,msm8996-cci"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0xa0c000 0x1000>; - interrupts = ; - clocks = <&mmcc MMSS_MMAGIC_AHB_CLK>, - <&mmcc CAMSS_TOP_AHB_CLK>, - <&mmcc CAMSS_CCI_AHB_CLK>, - <&mmcc CAMSS_CCI_CLK>, - <&mmcc CAMSS_AHB_CLK>; - clock-names = "mmss_mmagic_ahb", - "camss_top_ahb", - "cci_ahb", - "cci", - "camss_ahb"; - - i2c-bus@0 { - reg = <0>; - clock-frequency = <400000>; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c-bus@1 { - reg = <1>; - clock-frequency = <400000>; - #address-cells = <1>; - #size-cells = <0>; - }; - }; diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml new file mode 100644 index 000000000000..90c9e401229e --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml @@ -0,0 +1,242 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/qcom,i2c-cci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Camera Control Interface (CCI) I2C controller + +maintainers: + - Loic Poulain + - Robert Foss + +properties: + compatible: + enum: + - qcom,msm8916-cci + - qcom,msm8974-cci + - qcom,msm8996-cci + - qcom,sdm845-cci + - qcom,sm8250-cci + - qcom,sm8450-cci + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + clocks: + minItems: 4 + maxItems: 6 + + clock-names: + minItems: 4 + maxItems: 6 + + interrupts: + maxItems: 1 + + power-domains: + maxItems: 1 + + reg: + maxItems: 1 + +patternProperties: + "^i2c-bus@[01]$": + $ref: /schemas/i2c/i2c-controller.yaml# + unevaluatedProperties: false + + properties: + reg: + maxItems: 1 + + clock-frequency: + default: 100000 + +required: + - compatible + - clock-names + - clocks + - interrupts + - reg + +allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,msm8996-cci + then: + required: + - power-domains + + - if: + properties: + compatible: + contains: + enum: + - qcom,msm8916-cci + then: + properties: + i2c-bus@1: false + + - if: + properties: + compatible: + contains: + enum: + - qcom,msm8916-cci + - qcom,msm8996-cci + then: + properties: + clocks: + maxItems: 4 + clock-names: + items: + - const: camss_top_ahb + - const: cci_ahb + - const: cci + - const: camss_ahb + + - if: + properties: + compatible: + contains: + enum: + - qcom,sdm845-cci + then: + properties: + clocks: + minItems: 6 + clock-names: + items: + - const: camnoc_axi + - const: soc_ahb + - const: slow_ahb_src + - const: cpas_ahb + - const: cci + - const: cci_src + + - if: + properties: + compatible: + contains: + enum: + - qcom,sm8250-cci + then: + properties: + clocks: + minItems: 5 + maxItems: 5 + clock-names: + items: + - const: camnoc_axi + - const: slow_ahb_src + - const: cpas_ahb + - const: cci + - const: cci_src + +additionalProperties: false + +examples: + - | + #include + #include + #include + + cci@ac4a000 { + reg = <0x0ac4a000 0x4000>; + compatible = "qcom,sdm845-cci"; + #address-cells = <1>; + #size-cells = <0>; + + interrupts = ; + power-domains = <&clock_camcc TITAN_TOP_GDSC>; + + clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>, + <&clock_camcc CAM_CC_SOC_AHB_CLK>, + <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_CPAS_AHB_CLK>, + <&clock_camcc CAM_CC_CCI_CLK>, + <&clock_camcc CAM_CC_CCI_CLK_SRC>; + clock-names = "camnoc_axi", + "soc_ahb", + "slow_ahb_src", + "cpas_ahb", + "cci", + "cci_src"; + + assigned-clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>, + <&clock_camcc CAM_CC_CCI_CLK>; + assigned-clock-rates = <80000000>, + <37500000>; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&cci0_default &cci1_default>; + pinctrl-1 = <&cci0_sleep &cci1_sleep>; + + i2c-bus@0 { + reg = <0>; + clock-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + + camera@10 { + compatible = "ovti,ov8856"; + reg = <0x10>; + + reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&cam0_default>; + + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "xvclk"; + clock-frequency = <19200000>; + + dovdd-supply = <&vreg_lvs1a_1p8>; + avdd-supply = <&cam0_avdd_2v8>; + dvdd-supply = <&cam0_dvdd_1v2>; + + port { + ov8856_ep: endpoint { + link-frequencies = /bits/ 64 <360000000 180000000>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&csiphy0_ep>; + }; + }; + }; + }; + + cci_i2c1: i2c-bus@1 { + reg = <1>; + clock-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + + camera@60 { + compatible = "ovti,ov7251"; + reg = <0x60>; + + enable-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&cam3_default>; + + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "xclk"; + clock-frequency = <24000000>; + + vdddo-supply = <&vreg_lvs1a_1p8>; + vdda-supply = <&cam3_avdd_2v8>; + + port { + ov7251_ep: endpoint { + data-lanes = <0 1>; + remote-endpoint = <&csiphy3_ep>; + }; + }; + }; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 56af0182a93b..ea0aaf754eaf 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -16882,7 +16882,7 @@ M: Robert Foss L: linux-i2c@vger.kernel.org L: linux-arm-msm@vger.kernel.org S: Maintained -F: Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt +F: Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml F: drivers/i2c/busses/i2c-qcom-cci.c QUALCOMM INTERCONNECT BWMON DRIVER