From patchwork Fri Feb 1 10:03:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 157189 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp201322jaa; Fri, 1 Feb 2019 02:03:50 -0800 (PST) X-Google-Smtp-Source: ALg8bN5CXaUyZdsiwFn0uPVG9t5b9qXCuxM/2mB18VnOFbcNEP7zMHxmtU4pDC9Sm5Cxsei7Pa2Q X-Received: by 2002:a17:902:9a02:: with SMTP id v2mr39531715plp.180.1549015430121; Fri, 01 Feb 2019 02:03:50 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549015430; cv=none; d=google.com; s=arc-20160816; b=rCO0PahX06dZvRx0hGMAWdQLQON27PoTW87XUyuTVupjsDy0aBU7ai0bU66ptsd8kB Sqf0rZFbyEetizdrSkzdxO+fUdlhH1yobLjn7Z4yOR7ESHhjnvdmjLunN88z20E3meXE h84flr2sQ85xOtVOIosX+3bcAPmgpK36JUGWRmw9i27y2BMAOebozWsKWw+oudcdNm3N jEC2fdycvKvuKa14q9hXwyTlsTG76SEpoTtD2I8OGdCy+Fk/wy5RFU9CBoovVLH/fop5 gutHsXiHt5c5IW7seB8by/TApN0Sj83t8oIJmcV4J9lQqPfx1v17EKy//CHKgmXmDHjT GW7w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=errors-to:sender:content-transfer-encoding:cc:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:mime-version:message-id:date:subject:to:from :dkim-signature:dkim-signature; bh=QoecdzOCKkCtn7gKnawi0OhuVNT5PtbdYNEWAxq827U=; b=DXGggySS/n886c19t5DpJol88ptGdasgAK5f568mwrGAdf74bBdIh475Pw0o9q8m6z EWb3AC7Ko2RnVUhVXacnHEHnbH8po3dDaggbPkkbqKYOiseatoFW5QlFOXemr0MYZSTw XAYHObYtUsBF7ilSjinq7WeftvZ/uQy+A440Ikyx+zG3w/CARaPJZfRZRS+GiVDR8dst 1P67Fbwp6x3pGqfDFJs8H6kf6xU5BBqdb2lb3yscJGoNGagM+jXqtDEkKL4TJPEex3th XnrEUxpzwutC3jWtCntrGZbvLstKS+z2RY7fZA4uwMLVetx1WdnuTyY7iGjoe6F1aDT5 UIlQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@lists.infradead.org header.s=bombadil.20170209 header.b=EKhuRo4u; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=Ld2i02Jx; spf=pass (google.com: best guess record for domain of linux-mtd-bounces+patch=linaro.org@lists.infradead.org designates 2607:7c80:54:e::133 as permitted sender) smtp.mailfrom="linux-mtd-bounces+patch=linaro.org@lists.infradead.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from bombadil.infradead.org (bombadil.infradead.org. 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[213.113.123.174]) by smtp.gmail.com with ESMTPSA id r1-v6sm1223897ljb.64.2019.02.01.02.03.35 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 01 Feb 2019 02:03:35 -0800 (PST) From: Linus Walleij To: David Woodhouse , Brian Norris , Boris Brezillon , Marek Vasut , Richard Weinberger , linux-mtd@lists.infradead.org Subject: [PATCH 1/2] mtd: add DT bindings for the Intel IXP4xx Flash Date: Fri, 1 Feb 2019 11:03:30 +0100 Message-Id: <20190201100331.27224-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190201_020339_607714_2A9D4709 X-CRM114-Status: GOOD ( 14.80 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:244 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Linus Walleij Sender: "linux-mtd" Errors-To: linux-mtd-bounces+patch=linaro.org@lists.infradead.org This adds device tree bindings for the Intel IXP4xx flash controller, a simple physmap which however need a specific big-endian or mixed-endian access pattern to the memory. Signed-off-by: Linus Walleij --- .../bindings/mtd/intel,ixp4xx-flash.txt | 22 +++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/intel,ixp4xx-flash.txt -- 2.20.1 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ diff --git a/Documentation/devicetree/bindings/mtd/intel,ixp4xx-flash.txt b/Documentation/devicetree/bindings/mtd/intel,ixp4xx-flash.txt new file mode 100644 index 000000000000..4bdcb92ae381 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/intel,ixp4xx-flash.txt @@ -0,0 +1,22 @@ +Flash device on Intel IXP4xx SoC + +This flash is regular CFI compatible (Intel or AMD extended) flash chips with +specific big-endian or mixed-endian memory access pattern. + +Required properties: +- compatible : must be "intel,ixp4xx-flash", "cfi-flash"; +- reg : memory address for the flash chip +- bank-width : width in bytes of flash interface, should be <2> + +For the rest of the properties, see mtd-physmap.txt. + +The device tree may optionally contain sub-nodes describing partitions of the +address space. See partition.txt for more detail. + +Example: + +flash@50000000 { + compatible = "intel,ixp4xx-flash", "cfi-flash"; + reg = <0x50000000 0x01000000>; + bank-width = <2>; +}; From patchwork Fri Feb 1 10:04:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 157191 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp202503jaa; Fri, 1 Feb 2019 02:04:53 -0800 (PST) X-Google-Smtp-Source: AHgI3IZIQKKKGLOhkytKOFQqZdWU6AsV5AccvH8IRCWEyafSFWLF6R62N9r8rsFbQCVjl+pwEEhx X-Received: by 2002:a63:2744:: with SMTP id n65mr1625026pgn.65.1549015493699; Fri, 01 Feb 2019 02:04:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549015493; cv=none; d=google.com; s=arc-20160816; b=AvabhhB9PT1vmGs84eUCCYj5975G0TUpFwerkcKhgBG3bQdlxXNC2s3XOLnCWOfE9A uPrq08bE91oj5TbM3LkGGGMDtQC87JynBQNacbwA66cJBGpIur77LqzZ/UCA01ktLsB/ QtOlaF3L9pi/J/LfD5SoALr9JWtx9VzTDbXZdgrTYJne/akHFqlyr70HontQ/AiE6c4j cRALnbLn1tdROF3wh5G5c1SFKu+wYh4JS5xaC7AiOpjnMEDsberrD+PkeatFzdFUONFK cPFCcR5SeatXBNyLcnnircxcU5lXnn6TU0g+qOSySfeMzmncBtD+tAeOB54VKll2vxNV wqFg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=errors-to:sender:content-transfer-encoding:cc:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:mime-version:references:in-reply-to:message-id:date :subject:to:from:dkim-signature:dkim-signature; bh=m7CK/Pym0uIc8QZ4M2ubczwmpf3JbVN8+QNGG91W/uw=; b=on/YiQ5H1moxsvcmh+RvLuOzUyGEdV3U+/nz+3ZEoRB1K8jg/lCkQrLGReNiZA/sOq 4N5PwfRPjDVLJu5OrVNEKx4q2/nL6k2Hvmp1BormEC3wPdPFSDvfC6oplqR5DLsitG49 QhRWYxCUaq4IiM9kEIlDhvOSwpYORxs8sTkxrwu/fmE+Os7d0sDCs7/AyHmcMSZYkyop Co/NFZ51AcFvOwGl5hD1+ReCVIXRs1mTn0jrbWbZLaL/hH1sCQLh/7S3lEpB+RNDx5Yh OQJcHCynqSpXqdXQBQCgFYo7ompRGKMYRQGQzi1CscguNQJNjdJTbYWrJGte1MaFn9VE ACbg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@lists.infradead.org header.s=bombadil.20170209 header.b=RvwEKZs2; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=HrbWztuI; spf=pass (google.com: best guess record for domain of linux-mtd-bounces+patch=linaro.org@lists.infradead.org designates 2607:7c80:54:e::133 as permitted sender) smtp.mailfrom="linux-mtd-bounces+patch=linaro.org@lists.infradead.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from bombadil.infradead.org (bombadil.infradead.org. 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[213.113.123.174]) by smtp.gmail.com with ESMTPSA id g15sm1279197lfb.1.2019.02.01.02.04.27 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 01 Feb 2019 02:04:27 -0800 (PST) From: Linus Walleij To: David Woodhouse , Brian Norris , Boris Brezillon , Marek Vasut , Richard Weinberger , linux-mtd@lists.infradead.org Subject: [PATCH 2/2] mtd: physmap_of: add a hook for Intel IXP4xx flash probing Date: Fri, 1 Feb 2019 11:04:21 +0100 Message-Id: <20190201100421.27504-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190201100421.27504-1-linus.walleij@linaro.org> References: <20190201100421.27504-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190201_020431_248113_EB40F4D9 X-CRM114-Status: GOOD ( 29.63 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:243 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Linus Walleij Sender: "linux-mtd" Errors-To: linux-mtd-bounces+patch=linaro.org@lists.infradead.org In order to support device tree probing of IXP4xx NOR flash chips, a certain big-endian or mixed-endian memory access pattern need to be used. I have opted to use the pattern set by previous plug-ins to physmap for Gemini and Versatile, just override some functions and reuse most of the physmap core code as it is to minimize maintenance. Parts of drivers/mtd/ixp4xx.c are copied into this file. After we have IXP4xx converted fully to device tree, the drivers/mtd/ixp4xx.c file will be deleted and this will be the only access pattern to the IXP4xx flash. I did not keep the quirk in the flash write function after probe, where the old code for a while checks for access to odd addresses, fails and assigns a "faster" write function once it has convinced probe to only use 2-byte accesses. As we mandate that this device should be using bank-width = <2> this should not be a problem unless misconfigured. Signed-off-by: Linus Walleij --- drivers/mtd/maps/Kconfig | 9 ++ drivers/mtd/maps/Makefile | 1 + drivers/mtd/maps/physmap-core.c | 5 ++ drivers/mtd/maps/physmap-ixp4xx.c | 135 ++++++++++++++++++++++++++++++ drivers/mtd/maps/physmap-ixp4xx.h | 17 ++++ 5 files changed, 167 insertions(+) create mode 100644 drivers/mtd/maps/physmap-ixp4xx.c create mode 100644 drivers/mtd/maps/physmap-ixp4xx.h -- 2.20.1 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig index e0cf869c8544..531db0aa8266 100644 --- a/drivers/mtd/maps/Kconfig +++ b/drivers/mtd/maps/Kconfig @@ -95,6 +95,15 @@ config MTD_PHYSMAP_GEMINI platforms, some detection and setting up parallel mode on the external interface. +config MTD_PHYSMAP_IXP4XX + bool "Intel IXP4xx OF-based physical memory map handling" + depends on MTD_PHYSMAP_OF + select MTD_COMPLEX_MAPPINGS + default ARCH_IXP4XX + help + This provides some extra DT physmap parsing for the Intel IXP4xx + platforms, some elaborate endianness handling in particular. + config MTD_PHYSMAP_GPIO_ADDR bool "GPIO-assisted Flash Chip Support" depends on MTD_PHYSMAP diff --git a/drivers/mtd/maps/Makefile b/drivers/mtd/maps/Makefile index 1146009f41df..c0da86a5d26f 100644 --- a/drivers/mtd/maps/Makefile +++ b/drivers/mtd/maps/Makefile @@ -20,6 +20,7 @@ obj-$(CONFIG_MTD_PXA2XX) += pxa2xx-flash.o physmap-objs-y += physmap-core.o physmap-objs-$(CONFIG_MTD_PHYSMAP_VERSATILE) += physmap-versatile.o physmap-objs-$(CONFIG_MTD_PHYSMAP_GEMINI) += physmap-gemini.o +physmap-objs-$(CONFIG_MTD_PHYSMAP_IXP4XX) += physmap-ixp4xx.o physmap-objs := $(physmap-objs-y) obj-$(CONFIG_MTD_PHYSMAP) += physmap.o obj-$(CONFIG_MTD_PISMO) += pismo.o diff --git a/drivers/mtd/maps/physmap-core.c b/drivers/mtd/maps/physmap-core.c index d9a3e4bebe5d..1f0eafb02bb6 100644 --- a/drivers/mtd/maps/physmap-core.c +++ b/drivers/mtd/maps/physmap-core.c @@ -41,6 +41,7 @@ #include #include "physmap-gemini.h" +#include "physmap-ixp4xx.h" #include "physmap-versatile.h" struct physmap_flash_info { @@ -368,6 +369,10 @@ static int physmap_flash_of_init(struct platform_device *dev) if (err) return err; + err = of_flash_probe_ixp4xx(dev, dp, &info->maps[i]); + if (err) + return err; + err = of_flash_probe_versatile(dev, dp, &info->maps[i]); if (err) return err; diff --git a/drivers/mtd/maps/physmap-ixp4xx.c b/drivers/mtd/maps/physmap-ixp4xx.c new file mode 100644 index 000000000000..2cce63eebcc0 --- /dev/null +++ b/drivers/mtd/maps/physmap-ixp4xx.c @@ -0,0 +1,135 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Intel IXP4xx OF physmap add-on + * Copyright (C) 2019 Linus Walleij + * + * Based on the ixp4xx.c map driver, originally written by: + * Intel Corporation + * Deepak Saxena + * Copyright (C) 2002 Intel Corporation + * Copyright (C) 2003-2004 MontaVista Software, Inc. + */ +#include +#include +#include +#include +#include +#include "physmap-ixp4xx.h" + +/* + * Read/write a 16 bit word from flash address 'addr'. + * + * When the cpu is in little-endian mode it swizzles the address lines + * ('address coherency') so we need to undo the swizzling to ensure commands + * and the like end up on the correct flash address. + * + * To further complicate matters, due to the way the expansion bus controller + * handles 32 bit reads, the byte stream ABCD is stored on the flash as: + * D15 D0 + * +---+---+ + * | A | B | 0 + * +---+---+ + * | C | D | 2 + * +---+---+ + * This means that on LE systems each 16 bit word must be swapped. Note that + * this requires CONFIG_MTD_CFI_BE_BYTE_SWAP to be enabled to 'unswap' the CFI + * data and other flash commands which are always in D7-D0. + */ +#ifndef __ARMEB__ +#ifndef CONFIG_MTD_CFI_BE_BYTE_SWAP +# error CONFIG_MTD_CFI_BE_BYTE_SWAP required for LE operation +#endif + +static inline u16 flash_read16(void __iomem *addr) +{ + return be16_to_cpu(__raw_readw((void __iomem *)((unsigned long)addr ^ 0x2))); +} + +static inline void flash_write16(u16 d, void __iomem *addr) +{ + __raw_writew(cpu_to_be16(d), (void __iomem *)((unsigned long)addr ^ 0x2)); +} + +#define BYTE0(h) ((h) & 0xFF) +#define BYTE1(h) (((h) >> 8) & 0xFF) + +#else + +static inline u16 flash_read16(const void __iomem *addr) +{ + return __raw_readw(addr); +} + +static inline void flash_write16(u16 d, void __iomem *addr) +{ + __raw_writew(d, addr); +} + +#define BYTE0(h) (((h) >> 8) & 0xFF) +#define BYTE1(h) ((h) & 0xFF) +#endif + +static map_word ixp4xx_read16(struct map_info *map, unsigned long ofs) +{ + map_word val; + + val.x[0] = flash_read16(map->virt + ofs); + return val; +} + +/* + * The IXP4xx expansion bus only allows 16-bit wide acceses + * when attached to a 16-bit wide device (such as the 28F128J3A), + * so we can't just memcpy_fromio(). + */ +static void ixp4xx_copy_from(struct map_info *map, void *to, + unsigned long from, ssize_t len) +{ + u8 *dest = (u8 *) to; + void __iomem *src = map->virt + from; + + if (len <= 0) + return; + + if (from & 1) { + *dest++ = BYTE1(flash_read16(src-1)); + src++; + --len; + } + + while (len >= 2) { + u16 data = flash_read16(src); + *dest++ = BYTE0(data); + *dest++ = BYTE1(data); + src += 2; + len -= 2; + } + + if (len > 0) + *dest++ = BYTE0(flash_read16(src)); +} + +static void ixp4xx_write16(struct map_info *map, map_word d, unsigned long adr) +{ + flash_write16(d.x[0], map->virt + adr); +} + +int of_flash_probe_ixp4xx(struct platform_device *pdev, + struct device_node *np, + struct map_info *map) +{ + struct device *dev = &pdev->dev; + + /* Multiplatform guard */ + if (!of_device_is_compatible(np, "intel,ixp4xx-flash")) + return 0; + + map->read = ixp4xx_read16; + map->write = ixp4xx_write16; + map->copy_from = ixp4xx_copy_from; + map->copy_to = NULL; + + dev_info(dev, "initialized Intel IXP4xx-specific physmap control\n"); + + return 0; +} diff --git a/drivers/mtd/maps/physmap-ixp4xx.h b/drivers/mtd/maps/physmap-ixp4xx.h new file mode 100644 index 000000000000..b0fc49b7f3ed --- /dev/null +++ b/drivers/mtd/maps/physmap-ixp4xx.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#include +#include + +#ifdef CONFIG_MTD_PHYSMAP_IXP4XX +int of_flash_probe_ixp4xx(struct platform_device *pdev, + struct device_node *np, + struct map_info *map); +#else +static inline +int of_flash_probe_ixp4xx(struct platform_device *pdev, + struct device_node *np, + struct map_info *map) +{ + return 0; +} +#endif