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Sat, 6 Aug 2022 08:58:55 +0000 From: Vadym Kochan To: Hu Ziji , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Adrian Hunter , Vadym Kochan , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Elad Nachman Subject: [PATCH 1/3] dt-bindings: mmc: xenon: Add compatible string for Xenon SDHCI on AC5 SoC Date: Sat, 6 Aug 2022 11:58:12 +0300 Message-Id: <20220806085818.9873-2-vadym.kochan@plvision.eu> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220806085818.9873-1-vadym.kochan@plvision.eu> References: <20220806085818.9873-1-vadym.kochan@plvision.eu> X-ClientProxiedBy: FR3P281CA0080.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:1f::15) To VI1P190MB0317.EURP190.PROD.OUTLOOK.COM (2603:10a6:802:38::26) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: dfa34d70-3b34-452e-ef0b-08da7789e493 X-MS-TrafficTypeDiagnostic: DB9P190MB1098:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Signed-off-by: Vadym Kochan --- Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml b/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml index 3ee758886558..17cda847e0a3 100644 --- a/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml @@ -34,6 +34,9 @@ properties: - const: marvell,armada-3700-sdhci - const: marvell,sdhci-xenon + - items: + - const: marvell,ac5-sdhci + reg: minItems: 1 maxItems: 2 From patchwork Sat Aug 6 08:58:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vadym Kochan X-Patchwork-Id: 595850 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 418DDC19F2D for ; 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SFS:(13230016)(4636009)(346002)(136003)(376002)(39830400003)(34036004)(366004)(396003)(44832011)(2906002)(41320700001)(8676002)(66476007)(66556008)(66946007)(4326008)(508600001)(6486002)(316002)(36756003)(110136005)(38100700002)(26005)(41300700001)(52116002)(6666004)(86362001)(6512007)(6506007)(8936002)(5660300002)(38350700002)(1076003)(186003)(2616005)(83380400001); DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: PbR1Go4d4RbtwVUhQ59LqSU7bXizznLdnOdxmoKqSfmkfg6bGQKPw73v+mYAzYoXvrsV2UEug71HRsuoL/m1W24ZLUIIpFUY8lVl4ZhXYx0y8N814UYEHoYb1HMkoDd/27TBesDAdDY9v/5V280S6FAf8mQkuVFWqvcbZpRt5LiIu95y17gpc+2ZfJtY42EpzBv+IEWIuUCi3/jV3d3EZffWPG8iYyeLE7izzHUybukYkqqPjXnghCF1+KRzEfEUOik/v2Rp1cFChc/oR1b8MVXa2/AtnSfMgW3Ffho/3tGNm91jFp+EQCgtwk6yuls1ogdTwtGarM9QCTsBS4dOz2qaSnJAX0Q+jNUT//L2hx1FmGyRUarYFVCMfs8KIb/yxlMnkB2zg8awlEwWWIZu14Qf9l1PJ6K/6alhVN5m2oyXdtSVLqpWhhgCSBQCkXCkEpyOzoRsnCI8d9AnKF9AxLRWU2thfQ077ttENzxjZqNtHsiNinsOOHj04G1Vm8JAlsXTGhS6VBngzoR9UDkt7FBDohIwyofRGRNB9OUFjdOxKTqLq+VHYpA8Jo6wad+LLzOoQNcMoDxkaM4csFRq5bM95QugYcYKqWSoDyhjiCo22454gmBAwrF+pL9TK3j+fsHAraweAzLMb/4VHq1IBZKX9fI/AkrqTyjoI/gwBr8X5GsrvZZaFr4ChU+VSW5mpg752A8QCoZsUI1aCoRzMUJbY3DLC3QKnlbM2jwnG+vYdZYKxJnHX9/ahdx7L07ZDEuVaSFCYM2ikowtDGSJkf31K+5dYYxvOW/5oE6B2iZuTjKgcl35S0FiIgVIb3Dbyg+fKriDPWn+IrXAQnT5l7u0PQzyrV2BAo06lesSO8MFTY1AcisPupN+2rz/Lp7EPXWc0l/yNUW2RBEzA7tV2y85jMjJ49plUL5bJfbo7rUwoa9X1/99wFVGkOpqyg4GaZ7M0H6VV08q9pGFLdpcnH28K7iFI9SnWA6PbDa2VYXFCGY4h92HJyDwPPymo6sgMBgRJaA7vPabL5dZuII5H+6IO6jxKNa9R2PEsy0A3d1W+C8t3qr+jmq8iwK3LfiwtycfDn2pk76OYag0RUxWsqjgOEQ/AqPeOYPHgVgsrJa4dBpuiMnrhAB7KdwVq4Jf576ZbtCbQAGC3XCEwsMLAPNVO+XtpdJqXtuq8eRsIIk5DPrwI/20+zpgdia7mPBRMgfMdI9DKE+PuVPmTTmTfZL5Qjk0A2eL7bQ6Q6feURV7A8QV/2bUCcK/Asm4MyxqLIzzbid/bf6iyFV8iDWU6QhpHG6MrSiPc1l7n4byG1WYcxXx+nl0luMWJbmLSzkzjpCW4SiNLSNpA0u7vqZaFM1fDhb+rSTmB6sO+zcE+h/+JYAtwcsd8siSevSe9OpSz3fh4TVRQmrHRlUuEmrseQCK5nasZ+GkF+NaVUCauJyV2fZX93VEJFb5Wb+uKHtBy/So6u56next/vCrvFow1B0QWK8lojzsSABYeZXmQMGFG2ijSjzRoejV+mylNGI/BJSDOJ43QWjk5Edfixi2wTBsabyHGAm6FahhGtxEIgfdLcVi/ulTKE/pa7qhs0McCKFSbaDO3sFJPxWIlDCEhA== X-OriginatorOrg: plvision.eu X-MS-Exchange-CrossTenant-Network-Message-Id: c6da7dee-35fe-4bad-2ceb-08da7789ea61 X-MS-Exchange-CrossTenant-AuthSource: VI1P190MB0317.EURP190.PROD.OUTLOOK.COM X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Aug 2022 08:59:05.4058 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 03707b74-30f3-46b6-a0e0-ff0a7438c9c4 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: ispCFq80mwyzTNMIvdXi9WECFCPi66khtssBit39ulLAlWOcWidZZq2PMTGCbMHFaHIOt6Gp5UIoHCwyn/ZgqknNGB1e1JTWK/fvwo2sZp4= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9P190MB1098 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org There is a limitation in Xenon SDHCI on AC5 SoC that it can address only the first 2G of memory, so it was decided to use reserved-memory as bounce buffer because swiotlb=force and SDMA mode did not help. There is a custom property which is used to attach bounce memory region to the device on demand (only if more 2G memory is used). This is a software property only so it was not described in the dt-bindings. Separate DTSI is added to reserve memory only for boards with eMMC cards. Signed-off-by: Vadym Kochan --- .../boot/dts/marvell/ac5-98dx25xx-sdhci.dtsi | 40 +++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 arch/arm64/boot/dts/marvell/ac5-98dx25xx-sdhci.dtsi diff --git a/arch/arm64/boot/dts/marvell/ac5-98dx25xx-sdhci.dtsi b/arch/arm64/boot/dts/marvell/ac5-98dx25xx-sdhci.dtsi new file mode 100644 index 000000000000..cc5e53b64473 --- /dev/null +++ b/arch/arm64/boot/dts/marvell/ac5-98dx25xx-sdhci.dtsi @@ -0,0 +1,40 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree Include file for AC5 with SDHCI support + * + * Copyright (C) 2022 Marvell + */ + +/ { + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* + * SDHCI controller in AC5 SoC has 2G address space + * limitation, so in case if RAM has more 2G then use + * this dedicated memory region. + */ + sdhci_dma_restricted_region: sdhci-dma-restricted-region@0 { + compatible = "restricted-dma-pool"; + reg = <0x2 0x0 0x0 0x200000>; + }; + }; + + sdhci_dma_bounce_pool: sdhci-dma-bounce-pool@0 { + memory-region = <&sdhci_dma_restricted_region>; + }; + + soc { + sdhci: sdhci@805c0000 { + compatible = "marvell,ac5-sdhci"; + reg = <0x0 0x805c0000 0x0 0x300>; + interrupts = ; + clocks = <&cnm_clock>; + clock-names = "core"; + marvell,ac5-sdhci-dma-bounce-pool = <&sdhci_dma_bounce_pool>; + status = "okay"; + }; + }; +};