From patchwork Fri Feb 8 02:16:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Masney X-Patchwork-Id: 157789 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp1403218jaa; Thu, 7 Feb 2019 18:17:46 -0800 (PST) X-Google-Smtp-Source: AHgI3IZwwO072/l3rwa1T4V5CwXd3v0r7UGICkmFHc4XCEyvS0GY0yBRmiqxl406uQi34kd7pCTR X-Received: by 2002:a63:3f89:: with SMTP id m131mr8396509pga.115.1549592266882; Thu, 07 Feb 2019 18:17:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549592266; cv=none; d=google.com; s=arc-20160816; b=eszYmcqzcisjcH66IjIPSNPBkfNiGNCGqWx6htwTqpHyWrSTdNjiG6KDJ8EqRI7+Zi 5rPkad3TUbSI55XcL5XWzaTT11OTvEs5X8GePB9gDughpbslHRYkzW2e5MuDu7fai/Jw 9irUc3B6c44Upb4OsgAP4ijVtcrZcQqkWpOdyg1egKtUb4fY6Po8QHru0Gnx3lEaiue8 EpQNUGC9zN8gG6Bco2AVZ9Qd4h2oxahEFZSGfcM2JhPijugkAt0lp65TzdSAg3MPT8/y y0+Q4d6m7u0EOAkhl/g6KAZvdIhSOH4AfumxvseH2MON3uS0NKkaYxWqon/61xuHYf6D U6NA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=OKMzp2I5SEF51p+KejhVjaHTalx+Z/6iXESeMCoNGUg=; b=AOJztXBDLzKCfHLXfkCInVz2vEOjk3EjF59Rm4d6gJyzZUAR9a4zn7+yaiC7Dztpvs E0o1oE46VKmEUohNVjdK5lDSY7ZQaXEnGZtwgRgd3NXME8oaPHqzpBjE0Pez784ODXUk MjYAAj75OO0wgdQ5vxiY63aMCkzPDJXQFR8h2SowiQCcUnL8z4Hwjsv88W46XgvI3KBt 4QuUaOaQ+aa3hEtMewB/9R8i403EJgvrd0Kfviunhi9KFZapU8GCJhAV7UYlSydpUwf6 J3tvA4r1UQL/fE5DcpWTmqabGfSDy28PWhX4NtRGfS/lGHfLj6G5Qq25C6vv6GAQ4PPh PJ/w== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail (test mode) header.i=@onstation.org header.s=default header.b=DGqyDQXR; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d10si778881plo.286.2019.02.07.18.17.46; Thu, 07 Feb 2019 18:17:46 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail (test mode) header.i=@onstation.org header.s=default header.b=DGqyDQXR; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727186AbfBHCRp (ORCPT + 15 others); Thu, 7 Feb 2019 21:17:45 -0500 Received: from onstation.org ([52.200.56.107]:34968 "EHLO onstation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726801AbfBHCQv (ORCPT ); Thu, 7 Feb 2019 21:16:51 -0500 Received: from localhost.localdomain (c-98-239-145-235.hsd1.wv.comcast.net [98.239.145.235]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: masneyb) by onstation.org (Postfix) with ESMTPSA id 3BBC066A; Fri, 8 Feb 2019 02:16:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=onstation.org; s=default; t=1549592210; bh=lOih7rtuGk2GaNrR8Pnk7HSLL+7QCJJAUJTGbDvdAKk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DGqyDQXRarhIMnvf2bELMCxu4SducLpTHP/t0iBogzIssjpG2CHxkTdps1gKQs06h j9ML24VDXbdZ1jGWlU2tM4pJgadlrIekQI4TFbkTJSEH/PBBOJbaA7x4yD3C53pWEe OCCzoK0DP07Ke5YzL+FffHB5fpyf5wcf0U9U2920= From: Brian Masney To: linus.walleij@linaro.org, sboyd@kernel.org, bjorn.andersson@linaro.org, andy.gross@linaro.org, marc.zyngier@arm.com, lee.jones@linaro.org Cc: tglx@linutronix.de, shawnguo@kernel.org, dianders@chromium.org, linux-gpio@vger.kernel.org, nicolas.dechesne@linaro.org, niklas.cassel@linaro.org, david.brown@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, thierry.reding@gmail.com, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 03/11] genirq: introduce irq_chip_mask_ack_parent() Date: Thu, 7 Feb 2019 21:16:23 -0500 Message-Id: <20190208021631.30252-4-masneyb@onstation.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20190208021631.30252-1-masneyb@onstation.org> References: <20190208021631.30252-1-masneyb@onstation.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Linus Walleij The hierarchical irqchip never before ran into a situation where the parent is not "simple", i.e. does not implement .irq_ack() and .irq_mask() like most, but the qcom-pm8xxx.c happens to implement only .irq_mask_ack(). Since we want to make ssbi-gpio a hierarchical child of this irqchip, it must *also* only implement .irq_mask_ack() and call down to the parent, and for this we of course need irq_chip_mask_ack_parent(). Cc: Marc Zyngier Cc: Thomas Gleixner Signed-off-by: Linus Walleij Acked-by: Marc Zyngier Signed-off-by: Brian Masney --- This is a new patch introduced in v2. include/linux/irq.h | 1 + kernel/irq/chip.c | 11 +++++++++++ 2 files changed, 12 insertions(+) -- 2.17.2 diff --git a/include/linux/irq.h b/include/linux/irq.h index def2b2aac8b1..9a1a67d2e07d 100644 --- a/include/linux/irq.h +++ b/include/linux/irq.h @@ -605,6 +605,7 @@ extern void irq_chip_disable_parent(struct irq_data *data); extern void irq_chip_ack_parent(struct irq_data *data); extern int irq_chip_retrigger_hierarchy(struct irq_data *data); extern void irq_chip_mask_parent(struct irq_data *data); +extern void irq_chip_mask_ack_parent(struct irq_data *data); extern void irq_chip_unmask_parent(struct irq_data *data); extern void irq_chip_eoi_parent(struct irq_data *data); extern int irq_chip_set_affinity_parent(struct irq_data *data, diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c index 086d5a34b5a0..0aefc2e69cf5 100644 --- a/kernel/irq/chip.c +++ b/kernel/irq/chip.c @@ -1277,6 +1277,17 @@ void irq_chip_mask_parent(struct irq_data *data) } EXPORT_SYMBOL_GPL(irq_chip_mask_parent); +/** + * irq_chip_mask_ack_parent - Mask and acknowledge the parent interrupt + * @data: Pointer to interrupt specific data + */ +void irq_chip_mask_ack_parent(struct irq_data *data) +{ + data = data->parent_data; + data->chip->irq_mask_ack(data); +} +EXPORT_SYMBOL_GPL(irq_chip_mask_ack_parent); + /** * irq_chip_unmask_parent - Unmask the parent interrupt * @data: Pointer to interrupt specific data From patchwork Fri Feb 8 02:16:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Masney X-Patchwork-Id: 157788 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp1402685jaa; Thu, 7 Feb 2019 18:17:08 -0800 (PST) X-Google-Smtp-Source: AHgI3IYtNaQgrH+p3zgHGp7EwdoDfkmpG2BD66wKacm97Z2bHYWaH0i0l2MZbGZA/PhRuYr6TNDY X-Received: by 2002:a62:1a88:: with SMTP id a130mr4707088pfa.80.1549592227963; Thu, 07 Feb 2019 18:17:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549592227; cv=none; d=google.com; s=arc-20160816; b=IHImyfcBehprBACFwej6Lc+HcO8QjuOn9rpkUTWZVuKp8Ov1HgRDmnFccWA3u31L5w RUrMtd+1HndhJ6nJGkdoZJSUBTd6Drc/BB8HRV4rVrlzTDyexCqzqE8iNwkgf7Yey4g9 gVa2f8BOVonuKWWxKlrUWHvsgFYF9UtGhoDEPNybfI+EMJ77gZK0HrrCuvV/7cHEy4Um uc7fNJtro5cq1m4BW8vmoaN6OkgustC7/OdOVGqRSXvqYdttDYyK3hEDbfRtLrYUSOBB SoOF0MLTHOwByEepWFTbUt5HgQLfWf/Zpim7A8rmCp38ct70M8tUsac6tl/Gb9nhHCjU uzFg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=QVttG1dA/Zoav5mf7OOhdjhXlQ2cR4yzyiUnzGzG7+g=; b=JR3jfTDs0WKE+UQaH5T6DxMCmGB2+BWLpkaIdIigFBWO+mDtYHl4o/XRfgcx4iwgLt z/ETtzn3InHuyXCNUbflq6ST5MfCicCRvRc1AgAdsp+cxS65qu4C364HwUC0QjBl10r0 gZXaOpQN0anKvBxK731FKCRj3D/RJrP6A6EROMp2vuQcEKRzhHUTTqmmen9nqpNNk88i IBdIB6Rf2CPHp0bKMsPaCW1+a24O8tQw0wfYuzMa3TbRozKGKHv9g+8Qa1zeyTmz1zaF bj2zgJyRxDHfys/zPGAA8pZAn3Er6l6fEgdnXYoGP8cAz0n1CwBcLdbhxXVkD8Xk17xd 8ISg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail (test mode) header.i=@onstation.org header.s=default header.b=ejoKSQFZ; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 9si756794pgn.524.2019.02.07.18.17.07; Thu, 07 Feb 2019 18:17:07 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail (test mode) header.i=@onstation.org header.s=default header.b=ejoKSQFZ; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726952AbfBHCRH (ORCPT + 15 others); Thu, 7 Feb 2019 21:17:07 -0500 Received: from onstation.org ([52.200.56.107]:35042 "EHLO onstation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727194AbfBHCQ4 (ORCPT ); Thu, 7 Feb 2019 21:16:56 -0500 Received: from localhost.localdomain (c-98-239-145-235.hsd1.wv.comcast.net [98.239.145.235]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: masneyb) by onstation.org (Postfix) with ESMTPSA id 979931B7A; Fri, 8 Feb 2019 02:16:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=onstation.org; s=default; t=1549592215; bh=tvm2edBZVSVKW+NESaeMg2bFJ4yxQbdH70Akn3Wd5m8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ejoKSQFZUruQ3ReQC0GjIUZwRRt+/F+v12Ydnmffp/PP7+8kJNWE6BM0UaE7+4R/I vufmWsFwH9v42tiGUkHuvw3zuvUEb9TEQu8qVV9M08Cs7eLVjOtNmbBaO+zHh2xf1A jhiTi9B56aKH7YM20zf+GCYek+aVSq4VF+/6k+kk= From: Brian Masney To: linus.walleij@linaro.org, sboyd@kernel.org, bjorn.andersson@linaro.org, andy.gross@linaro.org, marc.zyngier@arm.com, lee.jones@linaro.org Cc: tglx@linutronix.de, shawnguo@kernel.org, dianders@chromium.org, linux-gpio@vger.kernel.org, nicolas.dechesne@linaro.org, niklas.cassel@linaro.org, david.brown@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, thierry.reding@gmail.com, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 10/11] ARM: dts: qcom-apq8060: Fix up interrupt parents Date: Thu, 7 Feb 2019 21:16:30 -0500 Message-Id: <20190208021631.30252-11-masneyb@onstation.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20190208021631.30252-1-masneyb@onstation.org> References: <20190208021631.30252-1-masneyb@onstation.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Linus Walleij Before we fixed up the interrupt hierarchy for the SSBI GPIO controller, we had to use the PM8058 directly to pick interrupts. After making the interrupt controller work properly, we can reference the real interrupt parent. Signed-off-by: Linus Walleij Signed-off-by: Brian Masney --- This is a new patch introduced in v2. .../arm/boot/dts/qcom-apq8060-dragonboard.dts | 21 +++++++------------ 1 file changed, 8 insertions(+), 13 deletions(-) -- 2.17.2 diff --git a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts index 497bb065eb9d..4e6c50d45cb2 100644 --- a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts +++ b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts @@ -93,9 +93,8 @@ vdd-supply = <&pm8058_l14>; // 2.85V aset-gpios = <&pm8058_gpio 35 GPIO_ACTIVE_LOW>; capella,aset-resistance-ohms = <100000>; - /* GPIO34 has interrupt 225 on the PM8058 */ /* Trig on both edges - getting close or far away */ - interrupts-extended = <&pm8058 225 IRQ_TYPE_EDGE_BOTH>; + interrupts-extended = <&pm8058_gpio 34 IRQ_TYPE_EDGE_BOTH>; /* MPP05 analog input to the XOADC */ io-channels = <&xoadc 0x00 0x05>; io-channel-names = "aout"; @@ -515,9 +514,8 @@ ak8975@c { compatible = "asahi-kasei,ak8975"; reg = <0x0c>; - /* FIXME: GPIO33 has interrupt 224 on the PM8058 */ - interrupt-parent = <&pm8058>; - interrupts = <224 IRQ_TYPE_EDGE_RISING>; + interrupt-parent = <&pm8058_gpio>; + interrupts = <33 IRQ_TYPE_EDGE_RISING>; pinctrl-names = "default"; pinctrl-0 = <&dragon_ak8975_gpios>; vid-supply = <&pm8058_lvs0>; // 1.8V @@ -526,9 +524,8 @@ bmp085@77 { compatible = "bosch,bmp085"; reg = <0x77>; - /* FIXME: GPIO16 has interrupt 207 on the PM8058 */ - interrupt-parent = <&pm8058>; - interrupts = <207 IRQ_TYPE_EDGE_RISING>; + interrupt-parent = <&pm8058_gpio>; + interrupts = <16 IRQ_TYPE_EDGE_RISING>; reset-gpios = <&tlmm 86 GPIO_ACTIVE_LOW>; pinctrl-names = "default"; pinctrl-0 = <&dragon_bmp085_gpios>; @@ -539,12 +536,11 @@ compatible = "invensense,mpu3050"; reg = <0x68>; /* - * GPIO17 has interrupt 208 on the - * PM8058, it is pulled high by a 10k + * GPIO17 is pulled high by a 10k * resistor to VLOGIC so needs to be * active low/falling edge. */ - interrupts-extended = <&pm8058 208 IRQ_TYPE_EDGE_FALLING>; + interrupts-extended = <&pm8058_gpio 17 IRQ_TYPE_EDGE_FALLING>; pinctrl-names = "default"; pinctrl-0 = <&dragon_mpu3050_gpios>; vlogic-supply = <&pm8058_lvs0>; // 1.8V @@ -589,11 +585,10 @@ compatible = "smsc,lan9221", "smsc,lan9115"; reg = <2 0x0 0x100>; /* - * GPIO7 has interrupt 198 on the PM8058 * The second interrupt is the PME interrupt * for network wakeup, connected to the TLMM. */ - interrupts-extended = <&pm8058 198 IRQ_TYPE_EDGE_FALLING>, + interrupts-extended = <&pm8058_gpio 7 IRQ_TYPE_EDGE_FALLING>, <&tlmm 29 IRQ_TYPE_EDGE_RISING>; reset-gpios = <&tlmm 30 GPIO_ACTIVE_LOW>; vdd33a-supply = <&dragon_veth>;