From patchwork Wed Aug 31 13:46:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephan Gerhold X-Patchwork-Id: 601892 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6EF67C64991 for ; Wed, 31 Aug 2022 14:36:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231777AbiHaOgs (ORCPT ); Wed, 31 Aug 2022 10:36:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50460 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231765AbiHaOgr (ORCPT ); Wed, 31 Aug 2022 10:36:47 -0400 Received: from mx.kernkonzept.com (serv1.kernkonzept.com [IPv6:2a01:4f8:1c1c:b490::2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8DEC551A18; Wed, 31 Aug 2022 07:36:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=kernkonzept.com; s=mx1; h=Content-Transfer-Encoding:MIME-Version:References :In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=HgSNj2jJKp7nJMPMpiRfIqDjRaUM/apZpTj637tSUXE=; b=PRMtnHKrxGEUSDSa9+Z8TgguYn d0CyvxqW6JQncQxO6X89FfED4dWO8RktEJZ/bJVZOhSlSrm6AK8B4U1pYJzSBSqkZBKA9dVBcyFtM WyE45Xs+Z/zRmGKiowOGMP5w9XPv42XD/7mDJhXLxLV6r5x1CSD08ivx4mI4DAmjRTVOgkk0Y18cv B9qukGOQSPTrTHqY781qoA96/MOQAuZccK2w4qWuTQrZSg85vqyKWjPhXvtcGjkBNEnjmXwsNtfN9 NUxQQ91VBTGMlomjGxqNUOTQ5C11opgJVIlDTQrHn4AuJbc8aC9lXWSC27o3bxlPTCoQsFJ88x4Ty 52U7evBg==; Received: from [10.22.3.24] (helo=kernkonzept.com) by mx.kernkonzept.com with esmtpsa (TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim 4.94.2) id 1oTO40-003wS7-SY; Wed, 31 Aug 2022 15:47:28 +0200 From: Stephan Gerhold To: Bjorn Andersson Cc: Andy Gross , Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Sireesh Kodali , Luca Weiss , Stephan Gerhold , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, Stephan Gerhold , Krzysztof Kozlowski Subject: [PATCH v3 1/7] arm64: dts: qcom: msm8916: Drop MSS fallback compatible Date: Wed, 31 Aug 2022 15:46:20 +0200 Message-Id: <20220831134626.2803117-2-stephan.gerhold@kernkonzept.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220831134626.2803117-1-stephan.gerhold@kernkonzept.com> References: <20220831134626.2803117-1-stephan.gerhold@kernkonzept.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org MSM8916 was originally using the "qcom,q6v5-pil" compatible for the MSS remoteproc. Later it was decided to use SoC-specific compatibles instead, so "qcom,msm8916-mss-pil" is now the preferred compatible. Commit 60a05ed059a0 ("arm64: dts: qcom: msm8916: Add MSM8916-specific compatibles to SCM/MSS") updated the MSM8916 device tree to make use of the new compatible but still kept the old "qcom,q6v5-pil" as fallback. This is inconsistent with other SoCs and conflicts with the description in the binding documentation (which says that only one compatible should be present). Also, it has no functional advantage since older kernels could not handle this DT anyway (e.g. "power-domains" in the MSS node is only supported by kernels that also support "qcom,msm8916-mss-pil"). Make this consistent with other SoCs by using only the "qcom,msm8916-mss-pil" compatible. Fixes: 60a05ed059a0 ("arm64: dts: qcom: msm8916: Add MSM8916-specific compatibles to SCM/MSS") Signed-off-by: Stephan Gerhold Reviewed-by: Krzysztof Kozlowski --- Changes in v3: None Changes in v2: Add Krzysztof's Reviewed-by --- This fixes the following dtbs_check warning after the DT schema conversion: remoteproc@4080000: compatible: 'oneOf' conditional failed, one must be fixed: ['qcom,msm8916-mss-pil', 'qcom,q6v5-pil'] is too long, or 'qcom,q6v5-pil' was expected From schema: remoteproc/qcom,msm8916-mss-pil.yaml --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index de741f287e1d..147c6aa3f046 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -1345,7 +1345,7 @@ bam_dmux_dma: dma-controller@4044000 { }; mpss: remoteproc@4080000 { - compatible = "qcom,msm8916-mss-pil", "qcom,q6v5-pil"; + compatible = "qcom,msm8916-mss-pil"; reg = <0x04080000 0x100>, <0x04020000 0x040>; From patchwork Wed Aug 31 13:46:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephan Gerhold X-Patchwork-Id: 601893 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82832C3DA6B for ; Wed, 31 Aug 2022 14:36:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231742AbiHaOgo (ORCPT ); Wed, 31 Aug 2022 10:36:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50438 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230215AbiHaOgn (ORCPT ); Wed, 31 Aug 2022 10:36:43 -0400 Received: from mx.kernkonzept.com (serv1.kernkonzept.com [IPv6:2a01:4f8:1c1c:b490::2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BA629A9C3B; Wed, 31 Aug 2022 07:36:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=kernkonzept.com; s=mx1; h=Content-Transfer-Encoding:MIME-Version:References :In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=JIHRwXFbIf9HY7kfiZgiqaEFpa9UQEiSDAiAUX0cUHI=; b=gmRVXPm14LkjnoyfgL3CHg6ZpZ bOW9T4kU9oPvL1mRFai49VneWz5J7jrNEajR1pNUx3Sw6Ekf+hJDen5ZQkvYN8EmnPGGJi70isVRy pRYkDDmOzaPofQXdKf2I0LRAGi69PEM4ENx6Z4fTeRfM2x4irNlSO24Xlb9A1uWYMpVZXfStaDVOy GJN6vs8T0SQpIoYhNnM09vnTUWaImkGGkgjStB3utsyXd9795kCrMm7kS8Dk3mFgXtD+F8YgDj/vW MTljVKskG94s0i69lTAYm06y+Smr5ZmGCdu94RqA1jc+wT0GaZevcy54yMVS9OU9AIputxWPzA94W pWYm1ZXg==; Received: from [10.22.3.24] (helo=kernkonzept.com) by mx.kernkonzept.com with esmtpsa (TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim 4.94.2) id 1oTO42-003wS7-It; Wed, 31 Aug 2022 15:47:30 +0200 From: Stephan Gerhold To: Bjorn Andersson Cc: Andy Gross , Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Sireesh Kodali , Luca Weiss , Stephan Gerhold , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, Stephan Gerhold Subject: [PATCH v3 2/7] dt-bindings: remoteproc: qcom,q6v5: Move MSM8916 to schema Date: Wed, 31 Aug 2022 15:46:21 +0200 Message-Id: <20220831134626.2803117-3-stephan.gerhold@kernkonzept.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220831134626.2803117-1-stephan.gerhold@kernkonzept.com> References: <20220831134626.2803117-1-stephan.gerhold@kernkonzept.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org qcom,q6v5.txt covers multiple SoCs with quite different binding requirements. Converting this into one DT schema would require several if statements, making the DT schema overall harder to read and understand. To avoid this, follow the example of SC7180/SC7280 and split "qcom,msm8916-mss-pil" (and the equivalent deprecated "qcom,q6v5-pil" compatible) into a separate DT schema. The schema is somewhat based on the one for SC7180/SC7280 but adjusted for the old platforms. Compared to the old plain text bindings, add missing documentation for the "bam-dmux" subnode and recommend one particular approach to specify the MBA/MPSS "memory-region" (the other one is marked as deprecated). Signed-off-by: Stephan Gerhold --- Changes in v3: None Changes in v2: - Add blank lines between top-level properties - Drop "deprecated" in "oneOf" list, it is not clear if this is valid and it should be redundant since the properties itself are already marked as "deprecated" --- .../remoteproc/qcom,msm8916-mss-pil.yaml | 247 ++++++++++++++++++ .../bindings/remoteproc/qcom,q6v5.txt | 19 -- 2 files changed, 247 insertions(+), 19 deletions(-) create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml new file mode 100644 index 000000000000..e4ac4889fc92 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml @@ -0,0 +1,247 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,msm8916-mss-pil.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm MSM8916 MSS Peripheral Image Loader (and similar) + +maintainers: + - Stephan Gerhold + +description: + This document describes the hardware for a component that loads and boots + firmware on the Qualcomm MSM8916 Modem Hexagon Core (and similar). + +properties: + compatible: + oneOf: + - enum: + - qcom,msm8916-mss-pil + + - const: qcom,q6v5-pil + description: Deprecated, prefer using qcom,msm8916-mss-pil + deprecated: true + + reg: + items: + - description: MSS QDSP6 registers + - description: RMB registers + + reg-names: + items: + - const: qdsp6 + - const: rmb + + interrupts: + items: + - description: Watchdog interrupt + - description: Fatal interrupt + - description: Ready interrupt + - description: Handover interrupt + - description: Stop acknowledge interrupt + + interrupt-names: + items: + - const: wdog + - const: fatal + - const: ready + - const: handover + - const: stop-ack + + clocks: + items: + - description: Configuration interface (AXI) clock + - description: Configuration bus (AHB) clock + - description: Boot ROM (AHB) clock + - description: XO proxy clock (control handed over after startup) + + clock-names: + items: + - const: iface + - const: bus + - const: mem + - const: xo + + power-domains: + items: + - description: CX proxy power domain (control handed over after startup) + - description: MX proxy power domain (control handed over after startup) + + power-domain-names: + items: + - const: cx + - const: mx + + pll-supply: + description: PLL proxy supply (control handed over after startup) + + resets: + items: + - description: MSS restart control + + reset-names: + items: + - const: mss_restart + + qcom,smem-states: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: States used by the AP to signal the Hexagon core + items: + - description: Stop modem + + qcom,smem-state-names: + description: Names of the states used by the AP to signal the Hexagon core + items: + - const: stop + + qcom,halt-regs: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + Halt registers are used to halt transactions of various sub-components + within MSS. + items: + - items: + - description: phandle to TCSR syscon region + - description: offset to the Q6 halt register + - description: offset to the modem halt register + - description: offset to the nc halt register + + memory-region: + items: + - description: MBA reserved region + - description: MPSS reserved region + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string-array + items: + - description: Name of MBA firmware + - description: Name of modem firmware + + bam-dmux: + $ref: /schemas/net/qcom,bam-dmux.yaml# + description: + Qualcomm BAM Data Multiplexer (provides network interface to the modem) + + smd-edge: + $ref: qcom,smd-edge.yaml# + description: + Qualcomm SMD subnode which represents communication edge, channels + and devices related to the DSP. + + properties: + label: + enum: + - modem + - hexagon + + # Deprecated properties + cx-supply: + description: CX power domain regulator supply (prefer using power-domains) + deprecated: true + + mx-supply: + description: MX power domain regulator supply (prefer using power-domains) + deprecated: true + + mba: + type: object + description: + MBA reserved region (prefer using memory-region with two items) + properties: + memory-region: true + required: + - memory-region + deprecated: true + + mpss: + type: object + description: + MPSS reserved region (prefer using memory-region with two items) + properties: + memory-region: true + required: + - memory-region + deprecated: true + +required: + - compatible + - reg + - reg-names + - interrupts + - interrupt-names + - clocks + - clock-names + - pll-supply + - resets + - reset-names + - qcom,halt-regs + - qcom,smem-states + - qcom,smem-state-names + - smd-edge + +allOf: + # Fallbacks for deprecated properties + - oneOf: + - required: + - memory-region + - required: + - mba + - mpss + - oneOf: + - required: + - power-domains + - power-domain-names + - required: + - cx-supply + - mx-supply + +additionalProperties: false + +examples: + - | + #include + #include + #include + + remoteproc_mpss: remoteproc@4080000 { + compatible = "qcom,msm8916-mss-pil"; + reg = <0x04080000 0x100>, <0x04020000 0x40>; + reg-names = "qdsp6", "rmb"; + + interrupts-extended = <&intc GIC_SPI 24 IRQ_TYPE_EDGE_RISING>, + <&hexagon_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&hexagon_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&hexagon_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&hexagon_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack"; + + qcom,smem-states = <&hexagon_smp2p_out 0>; + qcom,smem-state-names = "stop"; + qcom,halt-regs = <&tcsr 0x18000 0x19000 0x1a000>; + + clocks = <&gcc GCC_MSS_CFG_AHB_CLK>, + <&gcc GCC_MSS_Q6_BIMC_AXI_CLK>, + <&gcc GCC_BOOT_ROM_AHB_CLK>, + <&xo_board>; + clock-names = "iface", "bus", "mem", "xo"; + + power-domains = <&rpmpd MSM8916_VDDCX>, <&rpmpd MSM8916_VDDMX>; + power-domain-names = "cx", "mx"; + pll-supply = <&pm8916_l7>; + + resets = <&scm 0>; + reset-names = "mss_restart"; + + memory-region = <&mba_mem>, <&mpss_mem>; + + smd-edge { + interrupts = ; + + qcom,smd-edge = <0>; + qcom,ipc = <&apcs 8 12>; + qcom,remote-pid = <1>; + + label = "hexagon"; + }; + }; diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index d0ebd16ee0e1..11862b6c2339 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -7,10 +7,8 @@ on the Qualcomm Hexagon core. Usage: required Value type: Definition: must be one of: - "qcom,q6v5-pil", "qcom,ipq8074-wcss-pil" "qcom,qcs404-wcss-pil" - "qcom,msm8916-mss-pil", "qcom,msm8974-mss-pil" "qcom,msm8996-mss-pil" "qcom,msm8998-mss-pil" @@ -37,10 +35,8 @@ on the Qualcomm Hexagon core. Value type: Definition: The interrupts needed depends on the compatible string: - qcom,q6v5-pil: qcom,ipq8074-wcss-pil: qcom,qcs404-wcss-pil: - qcom,msm8916-mss-pil: qcom,msm8974-mss-pil: must be "wdog", "fatal", "ready", "handover", "stop-ack" qcom,msm8996-mss-pil: @@ -72,8 +68,6 @@ on the Qualcomm Hexagon core. "gcc_axim_cbcr", "lcc_ahbfabric_cbc", "tcsr_lcc_cbc", "lcc_abhs_cbc", "lcc_tcm_slave_cbc", "lcc_abhm_cbc", "lcc_axim_cbc", "lcc_bcr_sleep" - qcom,q6v5-pil: - qcom,msm8916-mss-pil: qcom,msm8974-mss-pil: must be "iface", "bus", "mem", "xo" qcom,msm8996-mss-pil: @@ -112,17 +106,6 @@ should be referenced as follows: Definition: reference to the reserved-memory for the mba region followed by the mpss region -For the compatible strings below the following supplies are required: - "qcom,q6v5-pil" - "qcom,msm8916-mss-pil", -- cx-supply: (deprecated, use power domain instead) -- mx-supply: (deprecated, use power domain instead) -- pll-supply: - Usage: required - Value type: - Definition: reference to the regulators to be held on behalf of the - booting of the Hexagon core - For the compatible string below the following supplies are required: "qcom,msm8974-mss-pil" - cx-supply: (deprecated, use power domain instead) @@ -161,8 +144,6 @@ For the compatible string below the following supplies are required: Definition: The power-domains needed depend on the compatible string: qcom,ipq8074-wcss-pil: no power-domain names required - qcom,q6v5-pil: - qcom,msm8916-mss-pil: qcom,msm8974-mss-pil: qcom,msm8996-mss-pil: qcom,msm8998-mss-pil: From patchwork Wed Aug 31 13:46:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephan Gerhold X-Patchwork-Id: 601504 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A56DFC54EE9 for ; Wed, 31 Aug 2022 14:36:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231745AbiHaOgp (ORCPT ); Wed, 31 Aug 2022 10:36:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50444 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230215AbiHaOgo (ORCPT ); Wed, 31 Aug 2022 10:36:44 -0400 Received: from mx.kernkonzept.com (serv1.kernkonzept.com [IPv6:2a01:4f8:1c1c:b490::2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ABA9E51A18; Wed, 31 Aug 2022 07:36:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=kernkonzept.com; s=mx1; h=Content-Transfer-Encoding:MIME-Version:References :In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=nGSmRsAujBazAHqrtfh3QSvd8Ae4QbEgTLD1kEu2UgU=; b=LzPYtetfSnl4DGNKoCaeAZE4P4 Z6aw/gZG24wjm6mFAcuWgNov5G8jTHkqmbKM3iOXFyBgUKkF1CnZ7hkQdabDgM6QyfNaoJ8hNONrt lpJqeqZq9XPeYKiMKq8CHDJeOQl5uY4jmhHTWLoVZXlsh+0R2SetzxyMXiA2WuB0X2N8mjS40BrSU KKSK+lxhOMubmqM+h8/m41yJwqjnm1S3+HfCLcNyBjaq13m4aCXGfKea75iezgmSmiSClm5zwYzn8 KFID7KsWNCkhiSoYXFT2r6nK28rpwOc3agFycW2nXLFKraYkkjkSOI9UQRWQDOE5leHNqVektSDCu OXEExdAA==; Received: from [10.22.3.24] (helo=kernkonzept.com) by mx.kernkonzept.com with esmtpsa (TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim 4.94.2) id 1oTO44-003wS7-9Z; Wed, 31 Aug 2022 15:47:32 +0200 From: Stephan Gerhold To: Bjorn Andersson Cc: Andy Gross , Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Sireesh Kodali , Luca Weiss , Stephan Gerhold , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, Stephan Gerhold Subject: [PATCH v3 3/7] dt-bindings: remoteproc: qcom,msm8916-mss-pil: Add MSM8974 Date: Wed, 31 Aug 2022 15:46:22 +0200 Message-Id: <20220831134626.2803117-4-stephan.gerhold@kernkonzept.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220831134626.2803117-1-stephan.gerhold@kernkonzept.com> References: <20220831134626.2803117-1-stephan.gerhold@kernkonzept.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The "qcom,msm8974-mss-pil" binding is still similar enough to MSM8916 to be covered by the same DT schema. The only difference is the additional "mss-supply", which can be easily handled using a single if statement. Signed-off-by: Stephan Gerhold --- Changes in v3: None Changes in v2: - Add if to the "allOf" list (suggested by Krzysztof) --- .../remoteproc/qcom,msm8916-mss-pil.yaml | 16 ++++++++++++++++ .../devicetree/bindings/remoteproc/qcom,q6v5.txt | 16 ---------------- 2 files changed, 16 insertions(+), 16 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml index e4ac4889fc92..c7e594873648 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml @@ -18,6 +18,7 @@ properties: oneOf: - enum: - qcom,msm8916-mss-pil + - qcom,msm8974-mss-pil - const: qcom,q6v5-pil description: Deprecated, prefer using qcom,msm8916-mss-pil @@ -76,6 +77,9 @@ properties: pll-supply: description: PLL proxy supply (control handed over after startup) + mss-supply: + description: MSS power domain supply (only valid for qcom,msm8974-mss-pil) + resets: items: - description: MSS restart control @@ -181,6 +185,18 @@ required: - smd-edge allOf: + # mss-supply is only valid (and required) for MSM8974 + - if: + properties: + compatible: + const: qcom,msm8974-mss-pil + then: + required: + - mss-supply + else: + properties: + mss-supply: false + # Fallbacks for deprecated properties - oneOf: - required: diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 11862b6c2339..5923c0447e2d 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -9,7 +9,6 @@ on the Qualcomm Hexagon core. Definition: must be one of: "qcom,ipq8074-wcss-pil" "qcom,qcs404-wcss-pil" - "qcom,msm8974-mss-pil" "qcom,msm8996-mss-pil" "qcom,msm8998-mss-pil" "qcom,sdm845-mss-pil" @@ -37,7 +36,6 @@ on the Qualcomm Hexagon core. string: qcom,ipq8074-wcss-pil: qcom,qcs404-wcss-pil: - qcom,msm8974-mss-pil: must be "wdog", "fatal", "ready", "handover", "stop-ack" qcom,msm8996-mss-pil: qcom,msm8998-mss-pil: @@ -68,8 +66,6 @@ on the Qualcomm Hexagon core. "gcc_axim_cbcr", "lcc_ahbfabric_cbc", "tcsr_lcc_cbc", "lcc_abhs_cbc", "lcc_tcm_slave_cbc", "lcc_abhm_cbc", "lcc_axim_cbc", "lcc_bcr_sleep" - qcom,msm8974-mss-pil: - must be "iface", "bus", "mem", "xo" qcom,msm8996-mss-pil: must be "iface", "bus", "mem", "xo", "gpll0_mss", "snoc_axi", "mnoc_axi", "pnoc", "qdss" @@ -106,17 +102,6 @@ should be referenced as follows: Definition: reference to the reserved-memory for the mba region followed by the mpss region -For the compatible string below the following supplies are required: - "qcom,msm8974-mss-pil" -- cx-supply: (deprecated, use power domain instead) -- mss-supply: -- mx-supply: (deprecated, use power domain instead) -- pll-supply: - Usage: required - Value type: - Definition: reference to the regulators to be held on behalf of the - booting of the Hexagon core - For the compatible string below the following supplies are required: "qcom,qcs404-wcss-pil" - cx-supply: @@ -144,7 +129,6 @@ For the compatible string below the following supplies are required: Definition: The power-domains needed depend on the compatible string: qcom,ipq8074-wcss-pil: no power-domain names required - qcom,msm8974-mss-pil: qcom,msm8996-mss-pil: qcom,msm8998-mss-pil: must be "cx", "mx" From patchwork Wed Aug 31 13:46:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephan Gerhold X-Patchwork-Id: 601503 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AE722ECAAD4 for ; Wed, 31 Aug 2022 14:36:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230215AbiHaOgq (ORCPT ); Wed, 31 Aug 2022 10:36:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50454 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231765AbiHaOgq (ORCPT ); Wed, 31 Aug 2022 10:36:46 -0400 Received: from mx.kernkonzept.com (serv1.kernkonzept.com [IPv6:2a01:4f8:1c1c:b490::2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 48064A9C3B; Wed, 31 Aug 2022 07:36:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=kernkonzept.com; s=mx1; h=Content-Transfer-Encoding:MIME-Version:References :In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=jHYQLgIy73+C5d/zQ7aP6bZs8zQdWqWJqNgxB8FmdKo=; b=SxEVDb5TimbBsCjisriPMmS1i8 H2uK4V1jjvDFqZovlDlTnDKXcgI6zMQyFE/RX3CzIaq8SHAdC7OXjG72nYRzGEUJwtg5hCnZ6XzBg oZN94PzGRQV27IE/Au92XiLu65RLM5Ew9J9vjbaJoqb4XOKZY1Au7VfaHEI5PReLJeta8mUehqHY4 pItfmxG24ZVS/wk+R9jd/hE+mx2a1a/mbdhPUgwl3KGNbau3vE8S849BYRP5uWrbPS+0V2d0/HE0c XZLEkO67Y215CnVFaTLAKZaUC8flEBgXrJCBngx0p6A4Rf6nLiwYyj8RWK/XusYdfrr+MXtHSMvZX NJVZIm1w==; Received: from [10.22.3.24] (helo=kernkonzept.com) by mx.kernkonzept.com with esmtpsa (TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim 4.94.2) id 1oTO46-003wS7-9t; Wed, 31 Aug 2022 15:47:34 +0200 From: Stephan Gerhold To: Bjorn Andersson Cc: Andy Gross , Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Sireesh Kodali , Luca Weiss , Stephan Gerhold , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, Stephan Gerhold , Krzysztof Kozlowski Subject: [PATCH v3 4/7] dt-bindings: remoteproc: qcom,msm8916-mss-pil: Add MSM8909 Date: Wed, 31 Aug 2022 15:46:23 +0200 Message-Id: <20220831134626.2803117-5-stephan.gerhold@kernkonzept.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220831134626.2803117-1-stephan.gerhold@kernkonzept.com> References: <20220831134626.2803117-1-stephan.gerhold@kernkonzept.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Document the "qcom,msm8909-mss-pil" compatible for the modem remote processor on MSM8909. It is used pretty much exactly like the existing one for MSM8916. Signed-off-by: Stephan Gerhold Acked-by: Krzysztof Kozlowski --- Changes in v3: None Changes in v2: - Fix typo in commit subject (qcom,q6v5-pil -> qcom,msm8916-mss-pil) - Add Krzysztof's Acked-by --- .../devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml index c7e594873648..98b19296bde5 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml @@ -17,6 +17,7 @@ properties: compatible: oneOf: - enum: + - qcom,msm8909-mss-pil - qcom,msm8916-mss-pil - qcom,msm8974-mss-pil From patchwork Wed Aug 31 13:46:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephan Gerhold X-Patchwork-Id: 601502 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 97C24ECAAD1 for ; Wed, 31 Aug 2022 14:36:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230355AbiHaOgt (ORCPT ); Wed, 31 Aug 2022 10:36:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50468 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231765AbiHaOgt (ORCPT ); Wed, 31 Aug 2022 10:36:49 -0400 Received: from mx.kernkonzept.com (serv1.kernkonzept.com [IPv6:2a01:4f8:1c1c:b490::2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CCA9851A18; Wed, 31 Aug 2022 07:36:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=kernkonzept.com; s=mx1; h=Content-Transfer-Encoding:MIME-Version:References :In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=ZhrRbaelvZ7ySN6jiarUfB/76WC+u+zbxv6C66BL3Vs=; b=loxQRbjBbk2ol9WFL3fvMeyR/3 hc7LhgXALTCBPLwH23WwlPt6zpmAoflK6hKBnY9QoPknBjImtsvrSfdlEbIWBmBH2XyYj2TBUVf4E ngPYtGA5ej7Ur3vExASMXZ/0dZK97l6JhoQuXIyCmov/hrslBjYFJtm+Zuh14v2xsqWfCnAdHvkJO vPwB/XeEbnUiSqoNw+roSIsayO+ztleFhK0H0yNko/RU0P7KHWuewmcrlwew20/yspc3E+keYgEoU wOJIONMh36EFFvXb3+TEf8wHuKQaC3bJmEcSt5poueNb1xRzri+G+kx9AsFCiTJKbcbm2j/z26tLr yxYSk7TA==; Received: from [10.22.3.24] (helo=kernkonzept.com) by mx.kernkonzept.com with esmtpsa (TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim 4.94.2) id 1oTO47-003wS7-W1; Wed, 31 Aug 2022 15:47:36 +0200 From: Stephan Gerhold To: Bjorn Andersson Cc: Andy Gross , Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Sireesh Kodali , Luca Weiss , Stephan Gerhold , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, Stephan Gerhold Subject: [PATCH v3 5/7] remoteproc: qcom_q6v5_mss: Add support for MSM8909 Date: Wed, 31 Aug 2022 15:46:24 +0200 Message-Id: <20220831134626.2803117-6-stephan.gerhold@kernkonzept.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220831134626.2803117-1-stephan.gerhold@kernkonzept.com> References: <20220831134626.2803117-1-stephan.gerhold@kernkonzept.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Port the initialization sequence necessary for booting the modem remote processor on the MSM8909 SoC from Qualcomm's msm-3.10 release [1]. The sequence is actually similar to the existing one for MSM8996 and MSM8998 except that there is no separate QDSP6SS_MEM_PWR_CTL register and most of the "memories" are enabled at once instead of sequentially. To reuse the existing code just insert some if statements where needed and add a configuration similar to the one from MSM8916. [1]: https://git.codelinaro.org/clo/la/kernel/msm-3.10/-/commit/56dcedc8dac8abff6b007f76a29430b2d0a44704 Signed-off-by: Stephan Gerhold --- Changes in v3: None Changes in v2: None --- drivers/remoteproc/qcom_q6v5_mss.c | 123 +++++++++++++++++++++-------- 1 file changed, 90 insertions(+), 33 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c index fddb63cffee0..2555f06dfc74 100644 --- a/drivers/remoteproc/qcom_q6v5_mss.c +++ b/drivers/remoteproc/qcom_q6v5_mss.c @@ -111,6 +111,9 @@ #define QDSS_BHS_ON BIT(21) #define QDSS_LDO_BYP BIT(22) +/* QDSP6v55 parameters */ +#define QDSP6V55_MEM_BITS GENMASK(16, 8) + /* QDSP6v56 parameters */ #define QDSP6v56_LDO_BYP BIT(25) #define QDSP6v56_BHS_ON BIT(24) @@ -234,6 +237,7 @@ struct q6v5 { }; enum { + MSS_MSM8909, MSS_MSM8916, MSS_MSM8974, MSS_MSM8996, @@ -687,13 +691,14 @@ static int q6v5proc_reset(struct q6v5 *qproc) return ret; } goto pbl_wait; - } else if (qproc->version == MSS_MSM8996 || + } else if (qproc->version == MSS_MSM8909 || + qproc->version == MSS_MSM8996 || qproc->version == MSS_MSM8998) { - int mem_pwr_ctl; - /* Override the ACC value if required */ - writel(QDSP6SS_ACC_OVERRIDE_VAL, - qproc->reg_base + QDSP6SS_STRAP_ACC); + if (qproc->version != MSS_MSM8909) + /* Override the ACC value if required */ + writel(QDSP6SS_ACC_OVERRIDE_VAL, + qproc->reg_base + QDSP6SS_STRAP_ACC); /* Assert resets, stop core */ val = readl(qproc->reg_base + QDSP6SS_RESET_REG); @@ -725,36 +730,53 @@ static int q6v5proc_reset(struct q6v5 *qproc) val |= QDSP6v56_LDO_BYP; writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); - /* Deassert QDSP6 compiler memory clamp */ - val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); - val &= ~QDSP6v56_CLAMP_QMC_MEM; - writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); - - /* Deassert memory peripheral sleep and L2 memory standby */ - val |= Q6SS_L2DATA_STBY_N | Q6SS_SLP_RET_N; - writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); - - /* Turn on L1, L2, ETB and JU memories 1 at a time */ - if (qproc->version == MSS_MSM8996) { - mem_pwr_ctl = QDSP6SS_MEM_PWR_CTL; - i = 19; + if (qproc->version != MSS_MSM8909) { + int mem_pwr_ctl; + + /* Deassert QDSP6 compiler memory clamp */ + val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); + val &= ~QDSP6v56_CLAMP_QMC_MEM; + writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); + + /* Deassert memory peripheral sleep and L2 memory standby */ + val |= Q6SS_L2DATA_STBY_N | Q6SS_SLP_RET_N; + writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); + + /* Turn on L1, L2, ETB and JU memories 1 at a time */ + if (qproc->version == MSS_MSM8996) { + mem_pwr_ctl = QDSP6SS_MEM_PWR_CTL; + i = 19; + } else { + /* MSS_MSM8998 */ + mem_pwr_ctl = QDSP6V6SS_MEM_PWR_CTL; + i = 28; + } + val = readl(qproc->reg_base + mem_pwr_ctl); + for (; i >= 0; i--) { + val |= BIT(i); + writel(val, qproc->reg_base + mem_pwr_ctl); + /* + * Read back value to ensure the write is done then + * wait for 1us for both memory peripheral and data + * array to turn on. + */ + val |= readl(qproc->reg_base + mem_pwr_ctl); + udelay(1); + } } else { - /* MSS_MSM8998 */ - mem_pwr_ctl = QDSP6V6SS_MEM_PWR_CTL; - i = 28; - } - val = readl(qproc->reg_base + mem_pwr_ctl); - for (; i >= 0; i--) { - val |= BIT(i); - writel(val, qproc->reg_base + mem_pwr_ctl); - /* - * Read back value to ensure the write is done then - * wait for 1us for both memory peripheral and data - * array to turn on. - */ - val |= readl(qproc->reg_base + mem_pwr_ctl); - udelay(1); + /* Turn on memories */ + val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); + val |= Q6SS_SLP_RET_N | Q6SS_L2DATA_STBY_N | + Q6SS_ETB_SLP_NRET_N | QDSP6V55_MEM_BITS; + writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); + + /* Turn on L2 banks 1 at a time */ + for (i = 0; i <= 7; i++) { + val |= BIT(i); + writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); + } } + /* Remove word line clamp */ val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); val &= ~QDSP6v56_CLAMP_WL; @@ -2240,6 +2262,40 @@ static const struct rproc_hexagon_res msm8996_mss = { .version = MSS_MSM8996, }; +static const struct rproc_hexagon_res msm8909_mss = { + .hexagon_mba_image = "mba.mbn", + .proxy_supply = (struct qcom_mss_reg_res[]) { + { + .supply = "pll", + .uA = 100000, + }, + {} + }, + .proxy_clk_names = (char*[]){ + "xo", + NULL + }, + .active_clk_names = (char*[]){ + "iface", + "bus", + "mem", + NULL + }, + .proxy_pd_names = (char*[]){ + "mx", + "cx", + NULL + }, + .need_mem_protection = false, + .has_alt_reset = false, + .has_mba_logs = false, + .has_spare_reg = false, + .has_qaccept_regs = false, + .has_ext_cntl_regs = false, + .has_vq6 = false, + .version = MSS_MSM8909, +}; + static const struct rproc_hexagon_res msm8916_mss = { .hexagon_mba_image = "mba.mbn", .proxy_supply = (struct qcom_mss_reg_res[]) { @@ -2340,6 +2396,7 @@ static const struct rproc_hexagon_res msm8974_mss = { static const struct of_device_id q6v5_of_match[] = { { .compatible = "qcom,q6v5-pil", .data = &msm8916_mss}, + { .compatible = "qcom,msm8909-mss-pil", .data = &msm8909_mss}, { .compatible = "qcom,msm8916-mss-pil", .data = &msm8916_mss}, { .compatible = "qcom,msm8974-mss-pil", .data = &msm8974_mss}, { .compatible = "qcom,msm8996-mss-pil", .data = &msm8996_mss}, From patchwork Wed Aug 31 13:46:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephan Gerhold X-Patchwork-Id: 601501 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 67810C3DA6B for ; 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b=XoFt6Ofsb1K+i1OqIbZZFTaQn6 oP+uAfh9fyPKy4jfEQkF8Ri36Quj4JBFcJyGgLJoCUm4Ys4HTLWw2W2PdftFGTTk+I6g+5mvz+qVJ 1aD/DZ75ZD2bVDysw41VIM13P5zZIbBztZKze2aGAfBq0lqxTNzzTiws0dPae/7i3uuyBtLmkD7dp WgpeiWLyoboWWALY4A9TrLbJ/W8a5+74EWiSwLnVVP/lM8WaW6EtiuwmG91tCWoSYB5vXWkZO9qHS LQ6+SBj91XJHOUNdxeVnbnl9xotwrMY9ja+TBWZZkukeBDsOk7uIKuTo9gFcvGuNiV0A3E/zzborp vUQnh1lQ==; Received: from [10.22.3.24] (helo=kernkonzept.com) by mx.kernkonzept.com with esmtpsa (TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim 4.94.2) id 1oTO49-003wS7-M1; Wed, 31 Aug 2022 15:47:37 +0200 From: Stephan Gerhold To: Bjorn Andersson Cc: Andy Gross , Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Sireesh Kodali , Luca Weiss , Stephan Gerhold , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, Stephan Gerhold Subject: [PATCH v3 6/7] dt-bindings: remoteproc: qcom,msm8916-mss-pil: Add MSM8953 Date: Wed, 31 Aug 2022 15:46:25 +0200 Message-Id: <20220831134626.2803117-7-stephan.gerhold@kernkonzept.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220831134626.2803117-1-stephan.gerhold@kernkonzept.com> References: <20220831134626.2803117-1-stephan.gerhold@kernkonzept.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the compatible for MSS as found on the MSM8953 platform. The situation is similar to the existing bindings for MSM8974: there is an additional "mss" power domain that must be voted for while starting up the remote processor. The difference is that on MSM8974 the power domain is represented as a regulator (firmware expects specific voltage) while on MSM8953 it is represented as power domain (firmware expects performance state instead of voltage). Handle this difference by adding the "mss" power domain as optional third item, and then restrict it (and make it required) only when using the MSM8953 compatible. Co-developed-by: Sireesh Kodali Signed-off-by: Sireesh Kodali Signed-off-by: Stephan Gerhold Reviewed-by: Krzysztof Kozlowski --- Changes in v3: Combine series with Sireesh's patches for MSM8953 --- .../remoteproc/qcom,msm8916-mss-pil.yaml | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml index 98b19296bde5..3686aabf074a 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml @@ -19,6 +19,7 @@ properties: - enum: - qcom,msm8909-mss-pil - qcom,msm8916-mss-pil + - qcom,msm8953-mss-pil - qcom,msm8974-mss-pil - const: qcom,q6v5-pil @@ -69,11 +70,16 @@ properties: items: - description: CX proxy power domain (control handed over after startup) - description: MX proxy power domain (control handed over after startup) + - description: MSS proxy power domain (control handed over after startup) + (only valid for qcom,msm8953-mss-pil) + minItems: 2 power-domain-names: items: - const: cx - const: mx + - const: mss # only valid for qcom,msm8953-mss-pil + minItems: 2 pll-supply: description: PLL proxy supply (control handed over after startup) @@ -186,6 +192,27 @@ required: - smd-edge allOf: + # mss power domain is only valid (and required) for MSM8953 + - if: + properties: + compatible: + const: qcom,msm8953-mss-pil + then: + properties: + power-domains: + minItems: 3 + power-domain-names: + minItems: 3 + required: + - power-domains + - power-domain-names + else: + properties: + power-domains: + maxItems: 2 + power-domain-names: + maxItems: 2 + # mss-supply is only valid (and required) for MSM8974 - if: properties: From patchwork Wed Aug 31 13:46:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephan Gerhold X-Patchwork-Id: 601891 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0B85CECAAD4 for ; Wed, 31 Aug 2022 14:36:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231797AbiHaOgv (ORCPT ); Wed, 31 Aug 2022 10:36:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50474 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231765AbiHaOgu (ORCPT ); Wed, 31 Aug 2022 10:36:50 -0400 Received: from mx.kernkonzept.com (serv1.kernkonzept.com [IPv6:2a01:4f8:1c1c:b490::2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6DDD651A18; Wed, 31 Aug 2022 07:36:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=kernkonzept.com; s=mx1; h=Content-Transfer-Encoding:MIME-Version:References :In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=3RXUYIfGmiNssmAyA8sAS6ro4O/YXpdGE4Tgo9zFWeQ=; b=OoE81rc13VFdR5HYr3mG/Vqmtj QKoxkLvUN4Msbivwq1UBDcO5XJtN4pRDtQU6NnIV+2KV1YB1uF041KJAGl+CaUPy1eWyZ+b7D9ktp sRTf8Kzt8HiN+7YDIsvcCWqVF2+ZyQqU0jpo+NUAcF+JJsscEeOZoIkmZy50Lh82PvzX+BNi+qMdE 1feOgs/lQdg62YcLPFajeDdPC3xbNoY6kWuSXod26D3xnQmJ7W9oZ3XcojlevcnFaZqMjGBV9Ruuf tOPfe7pWlGPT2/U2nOWJxgdh9PSlymXXb2qmo2+cJGZT6Smpar81+kJG1Wb12CUIQ6rZO1PYXZP8q y9hhonJw==; Received: from [10.22.3.24] (helo=kernkonzept.com) by mx.kernkonzept.com with esmtpsa (TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim 4.94.2) id 1oTO4B-003wS7-CQ; Wed, 31 Aug 2022 15:47:39 +0200 From: Stephan Gerhold To: Bjorn Andersson Cc: Andy Gross , Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Sireesh Kodali , Luca Weiss , Stephan Gerhold , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, Stephan Gerhold Subject: [PATCH v3 7/7] remoteproc: qcom: q6v5-mss: Add modem support on MSM8953 Date: Wed, 31 Aug 2022 15:46:26 +0200 Message-Id: <20220831134626.2803117-8-stephan.gerhold@kernkonzept.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220831134626.2803117-1-stephan.gerhold@kernkonzept.com> References: <20220831134626.2803117-1-stephan.gerhold@kernkonzept.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Sireesh Kodali The modem on the MSM8953 platform is similar to the modem on the MSM8996 platform in terms of set up. It differs primarily in that TZ needs to be informed of the modem start address and pas_id. Signed-off-by: Sireesh Kodali Signed-off-by: Stephan Gerhold --- Changes in v3: Combine series with Sireesh's patches for MSM8953 --- drivers/remoteproc/qcom_q6v5_mss.c | 55 ++++++++++++++++++++++++++++-- 1 file changed, 53 insertions(+), 2 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c index 2555f06dfc74..2f4027664a0e 100644 --- a/drivers/remoteproc/qcom_q6v5_mss.c +++ b/drivers/remoteproc/qcom_q6v5_mss.c @@ -40,6 +40,8 @@ #define MBA_LOG_SIZE SZ_4K +#define MPSS_PAS_ID 5 + /* RMB Status Register Values */ #define RMB_PBL_SUCCESS 0x1 @@ -239,6 +241,7 @@ struct q6v5 { enum { MSS_MSM8909, MSS_MSM8916, + MSS_MSM8953, MSS_MSM8974, MSS_MSM8996, MSS_MSM8998, @@ -692,10 +695,12 @@ static int q6v5proc_reset(struct q6v5 *qproc) } goto pbl_wait; } else if (qproc->version == MSS_MSM8909 || + qproc->version == MSS_MSM8953 || qproc->version == MSS_MSM8996 || qproc->version == MSS_MSM8998) { - if (qproc->version != MSS_MSM8909) + if (qproc->version != MSS_MSM8909 && + qproc->version != MSS_MSM8953) /* Override the ACC value if required */ writel(QDSP6SS_ACC_OVERRIDE_VAL, qproc->reg_base + QDSP6SS_STRAP_ACC); @@ -743,7 +748,8 @@ static int q6v5proc_reset(struct q6v5 *qproc) writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); /* Turn on L1, L2, ETB and JU memories 1 at a time */ - if (qproc->version == MSS_MSM8996) { + if (qproc->version == MSS_MSM8953 || + qproc->version == MSS_MSM8996) { mem_pwr_ctl = QDSP6SS_MEM_PWR_CTL; i = 19; } else { @@ -1365,6 +1371,15 @@ static int q6v5_mpss_load(struct q6v5 *qproc) max_addr = ALIGN(phdr->p_paddr + phdr->p_memsz, SZ_4K); } + if (qproc->version == MSS_MSM8953) { + ret = qcom_scm_pas_mem_setup(MPSS_PAS_ID, qproc->mpss_phys, qproc->mpss_size); + if (ret) { + dev_err(qproc->dev, + "setting up mpss memory failed: %d\n", ret); + goto release_firmware; + } + } + /* * In case of a modem subsystem restart on secure devices, the modem * memory can be reclaimed only after MBA is loaded. @@ -2341,6 +2356,41 @@ static const struct rproc_hexagon_res msm8916_mss = { .version = MSS_MSM8916, }; +static const struct rproc_hexagon_res msm8953_mss = { + .hexagon_mba_image = "mba.mbn", + .proxy_supply = (struct qcom_mss_reg_res[]) { + { + .supply = "pll", + .uA = 100000, + }, + {} + }, + .proxy_clk_names = (char*[]){ + "xo", + NULL + }, + .active_clk_names = (char*[]){ + "iface", + "bus", + "mem", + NULL + }, + .proxy_pd_names = (char*[]) { + "cx", + "mx", + "mss", + NULL + }, + .need_mem_protection = false, + .has_alt_reset = false, + .has_mba_logs = false, + .has_spare_reg = false, + .has_qaccept_regs = false, + .has_ext_cntl_regs = false, + .has_vq6 = false, + .version = MSS_MSM8953, +}; + static const struct rproc_hexagon_res msm8974_mss = { .hexagon_mba_image = "mba.b00", .proxy_supply = (struct qcom_mss_reg_res[]) { @@ -2398,6 +2448,7 @@ static const struct of_device_id q6v5_of_match[] = { { .compatible = "qcom,q6v5-pil", .data = &msm8916_mss}, { .compatible = "qcom,msm8909-mss-pil", .data = &msm8909_mss}, { .compatible = "qcom,msm8916-mss-pil", .data = &msm8916_mss}, + { .compatible = "qcom,msm8953-mss-pil", .data = &msm8953_mss}, { .compatible = "qcom,msm8974-mss-pil", .data = &msm8974_mss}, { .compatible = "qcom,msm8996-mss-pil", .data = &msm8996_mss}, { .compatible = "qcom,msm8998-mss-pil", .data = &msm8998_mss},