From patchwork Fri Sep 2 18:26:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 602275 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6EE4C6FA83 for ; Fri, 2 Sep 2022 18:35:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229508AbiIBSfd (ORCPT ); Fri, 2 Sep 2022 14:35:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55256 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229849AbiIBSe1 (ORCPT ); Fri, 2 Sep 2022 14:34:27 -0400 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CFA95110D8B; Fri, 2 Sep 2022 11:26:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1662143206; x=1693679206; h=from:to:subject:date:message-id:mime-version: content-transfer-encoding; bh=0rZByPU8jLloX7VT/25CU9V/snC5Hc8cjMfHRRhdw9s=; b=dnfJWUC6tXwRfPnkL0U39rA3BEP4z/TQ3u22UsNHK4kC5jFbQIsbke7W ktxcAjYV43RgJ8oBmKWeGdr+KRSDxm6aB+0pcSfmNNdUPjgIQtdKmqwC+ MAxaMTOXCASMz6l7NHASVKrlPBjhrH5WMwZUfTC4jCefS/1jLmfEfpOE/ jgshlh9sBTcQz1lkT3WCOjKBYdk/LsmRnNuno5FW4d3JIDhRVNid8u/up cjjLK1TlOHHwr/ZZjdVRzLVP9X16EoqVwlCehFqxCE6b/3IcLANioPcJ8 Tf2M5l0OKSGpS0w+03slwgKwAkNRM+0VsJei5wtV3/eyeD2w3kcI6bCeh Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10458"; a="296832712" X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="296832712" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Sep 2022 11:26:46 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="615791647" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga007.fm.intel.com with ESMTP; 02 Sep 2022 11:26:44 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id D027745; Fri, 2 Sep 2022 21:26:59 +0300 (EEST) From: Andy Shevchenko To: Linus Walleij , Andy Shevchenko , Patrick Rudolph , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 01/17] pinctrl: cy8c95x0: make irq_chip immutable Date: Fri, 2 Sep 2022 21:26:34 +0300 Message-Id: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Since recently, the kernel is nagging about mutable irq_chips: "not an immutable chip, please consider fixing it!" Drop the unneeded copy, flag it as IRQCHIP_IMMUTABLE, add the new helper functions and call the appropriate gpiolib functions. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-cy8c95x0.c | 32 ++++++++++++++++++------------ 1 file changed, 19 insertions(+), 13 deletions(-) diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index a29df0920f4f..8bb01f852c54 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -90,7 +90,6 @@ MODULE_DEVICE_TABLE(of, cy8c95x0_dt_ids); * @irq_trig_high: I/O bits affected by a high voltage level * @push_pull: I/O bits configured as push pull driver * @shiftmask: Mask used to compensate for Gport2 width - * @irq_chip: IRQ chip configuration * @nport: Number of Gports in this chip * @gpio_chip: gpiolib chip * @driver_data: private driver data @@ -112,7 +111,6 @@ struct cy8c95x0_pinctrl { DECLARE_BITMAP(irq_trig_high, MAX_LINE); DECLARE_BITMAP(push_pull, MAX_LINE); DECLARE_BITMAP(shiftmask, MAX_LINE); - struct irq_chip irq_chip; int nport; struct gpio_chip gpio_chip; unsigned long driver_data; @@ -844,16 +842,20 @@ static void cy8c95x0_irq_mask(struct irq_data *d) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc); + irq_hw_number_t hwirq = irqd_to_hwirq(d); - set_bit(irqd_to_hwirq(d), chip->irq_mask); + set_bit(hwirq, chip->irq_mask); + gpiochip_disable_irq(gc, hwirq); } static void cy8c95x0_irq_unmask(struct irq_data *d) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc); + irq_hw_number_t hwirq = irqd_to_hwirq(d); - clear_bit(irqd_to_hwirq(d), chip->irq_mask); + gpiochip_enable_irq(gc, hwirq); + clear_bit(hwirq, chip->irq_mask); } static void cy8c95x0_irq_bus_lock(struct irq_data *d) @@ -931,6 +933,18 @@ static void cy8c95x0_irq_shutdown(struct irq_data *d) clear_bit(hwirq, chip->irq_trig_high); } +static const struct irq_chip cy8c95x0_irqchip = { + .name = "cy8c95x0-irq", + .irq_mask = cy8c95x0_irq_mask, + .irq_unmask = cy8c95x0_irq_unmask, + .irq_bus_lock = cy8c95x0_irq_bus_lock, + .irq_bus_sync_unlock = cy8c95x0_irq_bus_sync_unlock, + .irq_set_type = cy8c95x0_irq_set_type, + .irq_shutdown = cy8c95x0_irq_shutdown, + .flags = IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, +}; + static bool cy8c95x0_irq_pending(struct cy8c95x0_pinctrl *chip, unsigned long *pending) { DECLARE_BITMAP(ones, MAX_LINE); @@ -1136,7 +1150,6 @@ static const struct pinconf_ops cy8c95x0_pinconf_ops = { static int cy8c95x0_irq_setup(struct cy8c95x0_pinctrl *chip, int irq) { - struct irq_chip *irq_chip = &chip->irq_chip; struct gpio_irq_chip *girq = &chip->gpio_chip.irq; DECLARE_BITMAP(pending_irqs, MAX_LINE); int ret; @@ -1155,15 +1168,8 @@ static int cy8c95x0_irq_setup(struct cy8c95x0_pinctrl *chip, int irq) /* Mask all interrupts */ bitmap_fill(chip->irq_mask, MAX_LINE); - irq_chip->name = devm_kasprintf(chip->dev, GFP_KERNEL, "%s-irq", chip->name); - irq_chip->irq_mask = cy8c95x0_irq_mask; - irq_chip->irq_unmask = cy8c95x0_irq_unmask; - irq_chip->irq_bus_lock = cy8c95x0_irq_bus_lock; - irq_chip->irq_bus_sync_unlock = cy8c95x0_irq_bus_sync_unlock; - irq_chip->irq_set_type = cy8c95x0_irq_set_type; - irq_chip->irq_shutdown = cy8c95x0_irq_shutdown; + gpio_irq_chip_set_chip(girq, &cy8c95x0_irqchip); - girq->chip = irq_chip; /* This will let us handle the parent IRQ in the driver */ girq->parent_handler = NULL; girq->num_parents = 0; From patchwork Fri Sep 2 18:26:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 602529 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BC1E0ECAAD5 for ; Fri, 2 Sep 2022 18:41:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229919AbiIBSl4 (ORCPT ); Fri, 2 Sep 2022 14:41:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48346 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229914AbiIBSlz (ORCPT ); Fri, 2 Sep 2022 14:41:55 -0400 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 025871037F8; Fri, 2 Sep 2022 11:41:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1662144112; x=1693680112; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=/on5oCP1KwPaqtBjm1JAAFKloDtpOWIhGehylfeYbQU=; b=h4ExZRTYzIFsHdymt5Gyc9xTkhJ2KKLSq+FhyxTGbjltAwOjUBVrRK1H lNwCLVC00M+5KUxVuM5CCBQ5wjanR5Q6vIlUZ6xZq041/TQykdn0Mr/Sa blTvppmXOu/9vks20ZDVnqRZ7vN7DmqtctEEWAAUyz88zgHY+kkWkVRK5 IuekfJ1LT5yfs7wBM4E5mkcgCCHficBY49mq1Cn4VyvrH0pMqyBOhx6eH BtK6CQ0YLgDiJ4FBVEwkJEsMwMUydzcbFyKvII+6pSbaPGY2Mj8GmxEqM S+PKOGaO6yNLiR/Ps4PK2B1NiqsBWaR1vcCJpo8g6mfiDE8QNTHMuLTt7 A==; X-IronPort-AV: E=McAfee;i="6500,9779,10458"; a="275796130" X-IronPort-AV: E=Sophos;i="5.93,285,1654585200"; d="scan'208";a="275796130" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Sep 2022 11:26:47 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="788745380" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga005.jf.intel.com with ESMTP; 02 Sep 2022 11:26:44 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id DF6CF41; Fri, 2 Sep 2022 21:26:59 +0300 (EEST) From: Andy Shevchenko To: Linus Walleij , Andy Shevchenko , Patrick Rudolph , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 02/17] pinctrl: cy8c95x0: Allow IRQ chip core to handle numbering Date: Fri, 2 Sep 2022 21:26:35 +0300 Message-Id: <20220902182650.83098-2-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> References: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org No need to assign first line number for IRQ chip. Let IRQ core to decide. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-cy8c95x0.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index 8bb01f852c54..521acfdeef38 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -1177,7 +1177,6 @@ static int cy8c95x0_irq_setup(struct cy8c95x0_pinctrl *chip, int irq) girq->default_type = IRQ_TYPE_NONE; girq->handler = handle_simple_irq; girq->threaded = true; - girq->first = 0; ret = devm_request_threaded_irq(chip->dev, irq, NULL, cy8c95x0_irq_handler, From patchwork Fri Sep 2 18:26:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 602535 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3D886ECAAD5 for ; Fri, 2 Sep 2022 18:34:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229837AbiIBSee (ORCPT ); Fri, 2 Sep 2022 14:34:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55110 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229729AbiIBSeZ (ORCPT ); Fri, 2 Sep 2022 14:34:25 -0400 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8B237110D96; Fri, 2 Sep 2022 11:26:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1662143207; x=1693679207; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=MQdtzzlnd/8Z1I5x7bO0gzZYHKdwVRA8kRquAQW3UtM=; b=BSfLl4RcyGTr0kkX4BRp+oRcjl2v/n3Q2AFMFfgJTSmj6GzFgwJrofpU nbEdDEiDU7p6vd/VDKxT3ojXdev9w7F274hU+k82Hk5QP05YMfokFd8Oc X+JAj3RrowSjwIv6CLyD78ca1Y04ZCQq4dyLz7wMn+NEBGOzvgLpeM0Hv pRc9F/BerFYkT3X/G8j7VrSsSdfNtvI60DtMvVxKOjGB0CFRSYXgkuggQ m8FpnfeI7IrgN4/feTo+WjCSZqG4E5hECx50HLmivB4AmYO+IvEKJrvEH 6zKPn9UnzEHuQWQGpdQ26gFQDTk3gDftyCSP2NelW7jjAnpgjow2f4SgA w==; X-IronPort-AV: E=McAfee;i="6500,9779,10458"; a="296832714" X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="296832714" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Sep 2022 11:26:46 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="615791648" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga007.fm.intel.com with ESMTP; 02 Sep 2022 11:26:44 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id E9A65101; Fri, 2 Sep 2022 21:26:59 +0300 (EEST) From: Andy Shevchenko To: Linus Walleij , Andy Shevchenko , Patrick Rudolph , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 03/17] pinctrl: cy8c95x0: Allow most of the registers to be cached Date: Fri, 2 Sep 2022 21:26:36 +0300 Message-Id: <20220902182650.83098-3-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> References: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org It's unclear why many of static registers were marked as volatile. They are pretty much bidirectional and static in a sense that written value is kept there until a new write or chip reset. Drop those registers from the list to allow them to be cached. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-cy8c95x0.c | 11 ----------- 1 file changed, 11 deletions(-) diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index 521acfdeef38..5ef772d29a36 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -303,17 +303,6 @@ static bool cy8c95x0_volatile_register(struct device *dev, unsigned int reg) switch (reg) { case CY8C95X0_INPUT_(0) ... CY8C95X0_INPUT_(7): case CY8C95X0_INTSTATUS_(0) ... CY8C95X0_INTSTATUS_(7): - case CY8C95X0_INTMASK: - case CY8C95X0_INVERT: - case CY8C95X0_PWMSEL: - case CY8C95X0_DIRECTION: - case CY8C95X0_DRV_PU: - case CY8C95X0_DRV_PD: - case CY8C95X0_DRV_ODH: - case CY8C95X0_DRV_ODL: - case CY8C95X0_DRV_PP_FAST: - case CY8C95X0_DRV_PP_SLOW: - case CY8C95X0_DRV_HIZ: return true; } From patchwork Fri Sep 2 18:26:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 602537 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 266B7C6FA82 for ; Fri, 2 Sep 2022 18:31:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229932AbiIBSbR (ORCPT ); Fri, 2 Sep 2022 14:31:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47618 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229796AbiIBSa6 (ORCPT ); Fri, 2 Sep 2022 14:30:58 -0400 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B1B7C70E4F; Fri, 2 Sep 2022 11:30:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1662143456; x=1693679456; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=DniUnueTY3Xs7L6hV7C4s2m6UQ2FC9TCsvhg8kdaFrQ=; b=IgT1fpbSUT4sSxNNv0R2P3dtJwlkyMMc33x2DcAwPHH1c9GLytkdgdJM 0o7XTKrqocaC1cW09CfroksE1d5lD9qRHlootSpxSnUxMnn3wK8srjTk8 x51Z/KOIg175JcIpNoED5RUFm3oHpdF4IKucM/Y7vW++XkCIwgLA8HYMm ILAmzUQ+Ebr1io+KOEvzDkwaLdetYKSt6HemVGqRfS/N64uujlKnkshcE w8j5LCzYTG8UOLQbLkd10i3NeZ9PnsGLBE6sS6a+rUCbwp3KN2BdrnNHJ ZGlp0TpfzA863+91Ki5rTiQiYpn6GoI94JkMPVGySy07p2EZY/J19eCdU Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10458"; a="294790980" X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="294790980" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Sep 2022 11:26:46 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="613125405" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga002.jf.intel.com with ESMTP; 02 Sep 2022 11:26:44 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 043FC1C3; Fri, 2 Sep 2022 21:26:59 +0300 (EEST) From: Andy Shevchenko To: Linus Walleij , Andy Shevchenko , Patrick Rudolph , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 04/17] pinctrl: cy8c95x0: Fix return value in cy8c95x0_detect() Date: Fri, 2 Sep 2022 21:26:37 +0300 Message-Id: <20220902182650.83098-4-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> References: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org It's an obvious typo in never tested piece of code that successful detection shouldn't fail. Fix that. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-cy8c95x0.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index 5ef772d29a36..f016c283af57 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -1255,7 +1255,7 @@ static int cy8c95x0_detect(struct i2c_client *client, dev_info(&client->dev, "Found a %s chip at 0x%02x.\n", name, client->addr); strscpy(info->type, name, I2C_NAME_SIZE); - return -ENODEV; + return 0; } static int cy8c95x0_probe(struct i2c_client *client) From patchwork Fri Sep 2 18:26:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 602532 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 97956ECAAD5 for ; Fri, 2 Sep 2022 18:36:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229681AbiIBSgN (ORCPT ); Fri, 2 Sep 2022 14:36:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34512 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229558AbiIBSgM (ORCPT ); Fri, 2 Sep 2022 14:36:12 -0400 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 01DC386FF2; Fri, 2 Sep 2022 11:36:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1662143770; x=1693679770; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=AEMYuFe/5gkoHwFFx3sE9BEZPNNMfh8MtP/d/z5X8tE=; b=aKX386kdrPxBdENRK48yHFTDr2thBmVvRMHq3pMoSKn80SprO3/07B9I nd9IfPL8kpTMoEzhDzi3rRAjQmXtc+W6oK0tj7k06XbpToPQ9xJeM7KBf M+OSF2xG0KC0MSMAImOTWOD9ZCoc6nk5sW3CQgSwPJfii3JaQoPIm4eBH zkeGRNFSA5z+EiprEyq9+Qgeln5x3jWOueuJ5Kqj+B6x1Ry37IeDN78aw 4vM7BfqbFuwnwm3mQtLwdL3qL9yt9oPgutCVwBiv2igOHDm+E1rmBdA2Q aaA0xByNktbwkv+B9s2+at0VVjNYBuse9SWf5Fcd2PEx4gNO4R1WQ+JQX Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10458"; a="382351229" X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="382351229" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Sep 2022 11:26:46 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="674457514" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga008.fm.intel.com with ESMTP; 02 Sep 2022 11:26:44 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 0E05819D; Fri, 2 Sep 2022 21:27:00 +0300 (EEST) From: Andy Shevchenko To: Linus Walleij , Andy Shevchenko , Patrick Rudolph , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 05/17] pinctrl: cy8c95x0: Fix pin control name to enable more than one Date: Fri, 2 Sep 2022 21:26:38 +0300 Message-Id: <20220902182650.83098-5-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> References: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The Cypress GPIO expander is an I²C discrete component. Hence the platform may contain more than one of a such. Currently this has limitations in the driver due to same name used for all chips of a type. Replace this with device instance specific name. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-cy8c95x0.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index f016c283af57..a05fbf818bf2 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -1188,8 +1188,7 @@ static int cy8c95x0_setup_pinctrl(struct cy8c95x0_pinctrl *chip) pd->confops = &cy8c95x0_pinconf_ops; pd->pmxops = &cy8c95x0_pmxops; pd->npins = chip->gpio_chip.ngpio; - pd->name = devm_kasprintf(chip->dev, GFP_KERNEL, "pinctrl-%s", - chip->name); + pd->name = dev_name(chip->dev); pd->pins = cy8c9560_pins; pd->npins = chip->tpin; pd->owner = THIS_MODULE; From patchwork Fri Sep 2 18:26:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 602531 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9D22AECAAD5 for ; Fri, 2 Sep 2022 18:36:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229948AbiIBSgW (ORCPT ); Fri, 2 Sep 2022 14:36:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34904 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229918AbiIBSgU (ORCPT ); Fri, 2 Sep 2022 14:36:20 -0400 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AE7FED31DC; Fri, 2 Sep 2022 11:36:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1662143772; x=1693679772; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=u/e/eIbdBJutq5AbGgNzaebhsZM9EByb+sMUL/rPFWU=; b=jPo2tPZ2zbUGRaSjfTTSpypfnhcZm0/hT/eD5EbeRjEdRM42ma2tuhlV hI2vFE1ZLiQiqAgXy/zc09rFSr//441PnC9QadN1TqZIhlcsLFPQIOuFR 16S0zhFRzXp93ENRPJxVDIn6DuOU8EL36ewds6AVTGCM1A/4yuX6yQPf9 h254oq4FNDkrGNaO2Y8onSrtqamwdy3Fhb88SnCK/kAwdhNTRHcLunerf pDKxAur/ym33Yiqc2ws7ooRU8WuxL1GE85U3TAOIU6cJRavwwp7NgstzL g0MtsBRjnPYOYAnjFsFcMMl0LVZuY2MBNcSx0lSBIqUvwx4vTJCXluI3k A==; X-IronPort-AV: E=McAfee;i="6500,9779,10458"; a="382351237" X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="382351237" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Sep 2022 11:26:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="674457530" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga008.fm.intel.com with ESMTP; 02 Sep 2022 11:26:47 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 18B3B2E7; Fri, 2 Sep 2022 21:27:00 +0300 (EEST) From: Andy Shevchenko To: Linus Walleij , Andy Shevchenko , Patrick Rudolph , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 06/17] pinctrl: cy8c95x0: Drop unneeded npins assignment Date: Fri, 2 Sep 2022 21:26:39 +0300 Message-Id: <20220902182650.83098-6-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> References: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The npins field is assigned twice. Remove the first occurrence. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-cy8c95x0.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index a05fbf818bf2..eac8b073e19f 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -1187,7 +1187,6 @@ static int cy8c95x0_setup_pinctrl(struct cy8c95x0_pinctrl *chip) pd->pctlops = &cy8c95x0_pinctrl_ops; pd->confops = &cy8c95x0_pinconf_ops; pd->pmxops = &cy8c95x0_pmxops; - pd->npins = chip->gpio_chip.ngpio; pd->name = dev_name(chip->dev); pd->pins = cy8c9560_pins; pd->npins = chip->tpin; From patchwork Fri Sep 2 18:26:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 602277 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7DDFDC6FA83 for ; Fri, 2 Sep 2022 18:34:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229594AbiIBSef (ORCPT ); Fri, 2 Sep 2022 14:34:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55220 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229794AbiIBSe1 (ORCPT ); Fri, 2 Sep 2022 14:34:27 -0400 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BA1B4110D9A; Fri, 2 Sep 2022 11:26:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1662143208; x=1693679208; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=BDT5EmdqjuMJqMI5cl7RV/oDMZZp4jG1VH1Y9bjPvBA=; b=MB6bGupnzcyWew3eYr/XVpYj9RRbYdjIeDZkOnkDw0/lcFbhzXkKq7iI dCW8Lk8q+r4R2+LRf+6/nEpaT+R+gtkSUfz0Gpsl859ym+sBwmGex9Rp2 obP5RcHFLy66xqaH4gaNnHu8Bcbcf19/X7FapmzbICcHetE0ztF6Af8DA 2fswu0oIiMIJGveoXoNJtFygbKut9XkgLaf0YRnm4vynb8Ujox/VN58zy 1tq8Uftl9B+/LUVmw6QiTtJawA3hKLElyufysd4qsSqZg/8NLlIVmN427 CViWjDUafHTsScA7F0hFOxAy36DaX1oDBk6qQ6bDuxlpEtGZgMELXsPMy w==; X-IronPort-AV: E=McAfee;i="6500,9779,10458"; a="296832723" X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="296832723" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Sep 2022 11:26:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="615791657" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga007.fm.intel.com with ESMTP; 02 Sep 2022 11:26:47 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 1F48449F; Fri, 2 Sep 2022 21:27:00 +0300 (EEST) From: Andy Shevchenko To: Linus Walleij , Andy Shevchenko , Patrick Rudolph , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 07/17] pinctrl: cy8c95x0: Enable GPIO range Date: Fri, 2 Sep 2022 21:26:40 +0300 Message-Id: <20220902182650.83098-7-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> References: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Since it's a pin control, GPIO counterpart needs to know the mapping between pin numbering and GPIO numbering. Enable this by calling gpiochip_add_pin_range() at the chip addition time. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-cy8c95x0.c | 22 ++++++++++++++++++---- 1 file changed, 18 insertions(+), 4 deletions(-) diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index eac8b073e19f..f09311d2d3fa 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -801,7 +801,20 @@ static void cy8c95x0_gpio_set_multiple(struct gpio_chip *gc, cy8c95x0_write_regs_mask(chip, CY8C95X0_OUTPUT, bits, mask); } -static int cy8c95x0_setup_gpiochip(struct cy8c95x0_pinctrl *chip, int ngpio) +static int cy8c95x0_add_pin_ranges(struct gpio_chip *gc) +{ + struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc); + struct device *dev = chip->dev; + int ret; + + ret = gpiochip_add_pin_range(gc, dev_name(dev), 0, 0, chip->tpin); + if (ret) + dev_err(dev, "failed to add GPIO pin range\n"); + + return ret; +} + +static int cy8c95x0_setup_gpiochip(struct cy8c95x0_pinctrl *chip) { struct gpio_chip *gc = &chip->gpio_chip; @@ -814,9 +827,10 @@ static int cy8c95x0_setup_gpiochip(struct cy8c95x0_pinctrl *chip, int ngpio) gc->set_multiple = cy8c95x0_gpio_set_multiple; gc->set_config = cy8c95x0_gpio_set_config; gc->can_sleep = true; + gc->add_pin_ranges = cy8c95x0_add_pin_ranges; gc->base = -1; - gc->ngpio = ngpio; + gc->ngpio = chip->tpin; gc->parent = chip->dev; gc->owner = THIS_MODULE; @@ -1328,11 +1342,11 @@ static int cy8c95x0_probe(struct i2c_client *client) goto err_exit; } - ret = cy8c95x0_setup_gpiochip(chip, chip->tpin); + ret = cy8c95x0_setup_pinctrl(chip); if (ret) goto err_exit; - ret = cy8c95x0_setup_pinctrl(chip); + ret = cy8c95x0_setup_gpiochip(chip); if (ret) goto err_exit; From patchwork Fri Sep 2 18:26:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 602278 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0836BC6FA89 for ; Fri, 2 Sep 2022 18:34:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229779AbiIBSeZ (ORCPT ); Fri, 2 Sep 2022 14:34:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54878 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229765AbiIBSeX (ORCPT ); Fri, 2 Sep 2022 14:34:23 -0400 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2D3C3110DA8; Fri, 2 Sep 2022 11:26:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1662143210; x=1693679210; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=Q3WRq63GSFT0VKkdIUx6lAxO0G6NE0E/uC/WGB8UDaY=; b=ghjbht9M2YaZbrD8rBmK7OcQrWf2oNn8Q0ECFw3yNPyzzMpjej6JA5MK oUsEMRSTDe5ujNQD39+FqwLr5QI25WcHVAubuG/miq6VoT8Ugu/TihjfB wrn/lnr6y08VsBW4BtEdNtBVU+ratItxvxQOpQQHsy/0QpGebpE6OBQxC rcTMOkSy6b7BWbMLqRdjrnEztQ6BCrdE5R7ia4yBEy7EulQWHMCf1q6ri ujMiloVjO5jzgSWkWxExNA7XUPzMJxDB3SEcKYEQc8sI8ihZE9NmJ00Ev U4L272aA86jOIIsRfizCyaKHx8ixZxZcpABdKeOtH91fI97yahWq7Fs/B Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10458"; a="283034556" X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="283034556" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Sep 2022 11:26:49 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="681373078" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga004.fm.intel.com with ESMTP; 02 Sep 2022 11:26:47 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 25BC35E4; Fri, 2 Sep 2022 21:27:00 +0300 (EEST) From: Andy Shevchenko To: Linus Walleij , Andy Shevchenko , Patrick Rudolph , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 08/17] pinctrl: cy8c95x0: Remove device initialization Date: Fri, 2 Sep 2022 21:26:41 +0300 Message-Id: <20220902182650.83098-8-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> References: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The Cypress CY8C95x0 chips have an internal EEPROM that defines initial configuration. It might be that bootloader or other entity wrote the platform related setup into it. Don't override it in the driver. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-cy8c95x0.c | 28 ---------------------------- 1 file changed, 28 deletions(-) diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index f09311d2d3fa..b09f9485e57d 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -1213,30 +1213,6 @@ static int cy8c95x0_setup_pinctrl(struct cy8c95x0_pinctrl *chip) return 0; } -static int device_cy8c95x0_init(struct cy8c95x0_pinctrl *chip) -{ - DECLARE_BITMAP(ones, MAX_LINE); - DECLARE_BITMAP(zeros, MAX_LINE); - int ret; - - /* Set all pins to input. This is the POR default. */ - bitmap_fill(ones, MAX_LINE); - ret = cy8c95x0_write_regs_mask(chip, CY8C95X0_DIRECTION, ones, ones); - if (ret) { - dev_err(chip->dev, "Failed to set pins to input\n"); - return ret; - } - - bitmap_zero(zeros, MAX_LINE); - ret = cy8c95x0_write_regs_mask(chip, CY8C95X0_INVERT, zeros, ones); - if (ret) { - dev_err(chip->dev, "Failed to set polarity inversion\n"); - return ret; - } - - return 0; -} - static int cy8c95x0_detect(struct i2c_client *client, struct i2c_board_info *info) { @@ -1332,10 +1308,6 @@ static int cy8c95x0_probe(struct i2c_client *client) bitmap_set(chip->shiftmask, 0, 20); mutex_init(&chip->i2c_lock); - ret = device_cy8c95x0_init(chip); - if (ret) - goto err_exit; - if (client->irq) { ret = cy8c95x0_irq_setup(chip, client->irq); if (ret) From patchwork Fri Sep 2 18:26:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 602274 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 45702C6FA82 for ; Fri, 2 Sep 2022 18:36:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229943AbiIBSgW (ORCPT ); Fri, 2 Sep 2022 14:36:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34726 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229908AbiIBSgQ (ORCPT ); Fri, 2 Sep 2022 14:36:16 -0400 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1626994EFB; Fri, 2 Sep 2022 11:36:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1662143773; x=1693679773; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=PmaBa0A40FNoymQJbeinRG5loNg9jLUksJeBjTU6ICE=; b=DwJBkDmhburHkSmVs09CWg2AKL6Mn6wxs/6+iAjyd1ax0pm/EsaZ2jof miF8uN5l7q5kSWFMLXJKq8EHSSX1hzZ3QxlyPjRvlqoVsHG2TrHvUx6mn jghL2uKErrUqWxFkYK2ekM6nHlpg/OIKWZ80GzYA1D9aQycRlwQlgypRI bTmgH+ShwOh6FzNY7z08KsC2wR+j+S+lzoqzRHGgbGQRD9rwCBS6/bHJR zc0FY2C+8h6pCAmsnV5PfqRQ7ipt9FxX7bMTWpZ2WsF4qp8+RDBsBqgks GknVb2JaMNNt5tn9RybjAPVJQCIA0A4tJD7dJRclwMFBGSsBrDBg85jbn A==; X-IronPort-AV: E=McAfee;i="6500,9779,10458"; a="382351238" X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="382351238" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Sep 2022 11:26:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="716614439" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga002.fm.intel.com with ESMTP; 02 Sep 2022 11:26:47 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 2C8AB607; Fri, 2 Sep 2022 21:27:00 +0300 (EEST) From: Andy Shevchenko To: Linus Walleij , Andy Shevchenko , Patrick Rudolph , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 09/17] pinctrl: cy8c95x0: Remove useless conditionals Date: Fri, 2 Sep 2022 21:26:42 +0300 Message-Id: <20220902182650.83098-9-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> References: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The pin control framework checks pin boundaries before calling the respective driver's callbacks. Hence no need to check for pin boundaries, the respective conditionals won't be ever true. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-cy8c95x0.c | 14 -------------- 1 file changed, 14 deletions(-) diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index b09f9485e57d..97da22016cce 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -1029,14 +1029,6 @@ static int cy8c95x0_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, const unsigned int **pins, unsigned int *num_pins) { - struct cy8c95x0_pinctrl *chip = pinctrl_dev_get_drvdata(pctldev); - - if (group >= chip->tpin) { - *pins = NULL; - *num_pins = 0; - return 0; - } - *pins = &cy8c9560_pins[group].number; *num_pins = 1; return 0; @@ -1104,9 +1096,6 @@ static int cy8c95x0_set_mux(struct pinctrl_dev *pctldev, unsigned int selector, { struct cy8c95x0_pinctrl *chip = pinctrl_dev_get_drvdata(pctldev); - if (group >= chip->tpin) - return -EINVAL; - return cy8c95x0_pinmux_cfg(chip, selector, group); } @@ -1133,9 +1122,6 @@ static int cy8c95x0_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, int ret = 0; int i; - if (WARN_ON(pin >= chip->tpin)) - return -EINVAL; - for (i = 0; i < num_configs; i++) { ret = cy8c95x0_gpio_set_pincfg(chip, pin, configs[i]); if (ret) From patchwork Fri Sep 2 18:26:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 602279 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 744E8ECAAD5 for ; Fri, 2 Sep 2022 18:34:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229646AbiIBSeD (ORCPT ); Fri, 2 Sep 2022 14:34:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54358 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229729AbiIBSeC (ORCPT ); Fri, 2 Sep 2022 14:34:02 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B038A105B74; Fri, 2 Sep 2022 11:34:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1662143640; x=1693679640; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=xkJ6xoIywugi4fMwTGaUIozhuU7T/pgcEKpJ47n1K48=; b=E2uImZQi6CBtCSs6E7pxiTd+ZpF5TEmybzsM5RBvD41ccuwNw+3lZavZ Jz6cqsb0ubfCU3qnsSXm9hRlaU5F94FKulhOfkwBPCGp+gs6OlMSB3j8P pRokXr26ll+2MT6pDanhP9qiT02tBjlOL5HXsh2TRq9xjPr7DNTloB6q5 BkUUghisndwp9P2ApfiCX+5GAbLjCawqvoF6XyBKepSJ/w268V9WteaT3 k0OdbYxSbbP1C5VtiZii/96YghlV2ej/kJksZIaowaseHHHPbPvGpljLC GLOcf5eurMjDo91MAr/9ZT0ReQ3dTsA/gbR7W7ri2o62W+iGIgtCUhAyZ g==; X-IronPort-AV: E=McAfee;i="6500,9779,10458"; a="293635826" X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="293635826" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Sep 2022 11:26:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="646203180" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga001.jf.intel.com with ESMTP; 02 Sep 2022 11:26:47 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 330DC63F; Fri, 2 Sep 2022 21:27:00 +0300 (EEST) From: Andy Shevchenko To: Linus Walleij , Andy Shevchenko , Patrick Rudolph , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 10/17] pinctrl: cy8c95x0: Remove custom ->set_config() Date: Fri, 2 Sep 2022 21:26:43 +0300 Message-Id: <20220902182650.83098-10-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> References: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Since we have pin configuration getter and setter provided, there is no need to duplicate that in the custom ->set_config(). Instead, switch to gpiochip_generic_config(). Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-cy8c95x0.c | 26 +------------------------- 1 file changed, 1 insertion(+), 25 deletions(-) diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index 97da22016cce..55bd48c9d020 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -761,30 +761,6 @@ static int cy8c95x0_gpio_set_pincfg(struct cy8c95x0_pinctrl *chip, return ret; } -static int cy8c95x0_gpio_set_config(struct gpio_chip *gc, unsigned int offset, - unsigned long config) -{ - struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc); - unsigned long arg = pinconf_to_config_argument(config); - - switch (pinconf_to_config_param(config)) { - case PIN_CONFIG_INPUT_ENABLE: - return cy8c95x0_gpio_direction_input(gc, offset); - case PIN_CONFIG_OUTPUT: - return cy8c95x0_gpio_direction_output(gc, offset, arg); - case PIN_CONFIG_MODE_PWM: - case PIN_CONFIG_BIAS_PULL_UP: - case PIN_CONFIG_BIAS_PULL_DOWN: - case PIN_CONFIG_BIAS_DISABLE: - case PIN_CONFIG_DRIVE_OPEN_DRAIN: - case PIN_CONFIG_DRIVE_OPEN_SOURCE: - case PIN_CONFIG_DRIVE_PUSH_PULL: - return cy8c95x0_gpio_set_pincfg(chip, offset, config); - default: - return -ENOTSUPP; - } -} - static int cy8c95x0_gpio_get_multiple(struct gpio_chip *gc, unsigned long *mask, unsigned long *bits) { @@ -825,7 +801,7 @@ static int cy8c95x0_setup_gpiochip(struct cy8c95x0_pinctrl *chip) gc->get_direction = cy8c95x0_gpio_get_direction; gc->get_multiple = cy8c95x0_gpio_get_multiple; gc->set_multiple = cy8c95x0_gpio_set_multiple; - gc->set_config = cy8c95x0_gpio_set_config; + gc->set_config = gpiochip_generic_config, gc->can_sleep = true; gc->add_pin_ranges = cy8c95x0_add_pin_ranges; From patchwork Fri Sep 2 18:26:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 602536 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 07E52ECAAD5 for ; Fri, 2 Sep 2022 18:34:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229770AbiIBSeX (ORCPT ); Fri, 2 Sep 2022 14:34:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54786 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229768AbiIBSeV (ORCPT ); Fri, 2 Sep 2022 14:34:21 -0400 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 13BAC110D9B; Fri, 2 Sep 2022 11:26:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1662143209; x=1693679209; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=3LyWhMqj6glFDb6XAKpJQvL41W8JoiazUOgVOjSZZCE=; b=byilvA0UFwwQ8A3HxvtfdHIp7UhFKF6z048Ftww8b+crw3410JiJWJs8 DAx5lqZvoyzja0MYFxyjlAsWvp1eaSygSyeR0gxZ3A6p1UTttrxY7RbuM g1DW/vhq6LAosHF3X1nDflDuqXiOG52qLxmy7uyjgtSdDRqMkk3/S14Os cYRXMgu3A2oNguuC5gtLvfe9PRoYjPKFxmrEBKeMMvjbG60toV9k0QaZd JuTO0XRR2r3gr64z8Kxj4HO3r5ioNZQvZ0J2KZVaDrJcq8kcQ8BA0guvb jJSldSg+WQVUOZfh8Lqo+LusGDe11/56qWTU3+O4kj4/zxOaD6jYGltnB w==; X-IronPort-AV: E=McAfee;i="6500,9779,10458"; a="296832726" X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="296832726" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Sep 2022 11:26:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="615791659" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga007.fm.intel.com with ESMTP; 02 Sep 2022 11:26:47 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 3DC2F6B7; Fri, 2 Sep 2022 21:27:00 +0300 (EEST) From: Andy Shevchenko To: Linus Walleij , Andy Shevchenko , Patrick Rudolph , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 11/17] pinctrl: cy8c95x0: Use 'default' in all switch-cases Date: Fri, 2 Sep 2022 21:26:44 +0300 Message-Id: <20220902182650.83098-11-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> References: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Move the default values to the 'default' case in the switches. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-cy8c95x0.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index 55bd48c9d020..6fe442b44cab 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -279,9 +279,9 @@ static bool cy8c95x0_readable_register(struct device *dev, unsigned int reg) switch (reg) { case 0x24 ... 0x27: return false; + default: + return true; } - - return true; } static bool cy8c95x0_writeable_register(struct device *dev, unsigned int reg) @@ -293,9 +293,9 @@ static bool cy8c95x0_writeable_register(struct device *dev, unsigned int reg) return false; case 0x24 ... 0x27: return false; + default: + return true; } - - return true; } static bool cy8c95x0_volatile_register(struct device *dev, unsigned int reg) @@ -304,9 +304,9 @@ static bool cy8c95x0_volatile_register(struct device *dev, unsigned int reg) case CY8C95X0_INPUT_(0) ... CY8C95X0_INPUT_(7): case CY8C95X0_INTSTATUS_(0) ... CY8C95X0_INTSTATUS_(7): return true; + default: + return false; } - - return false; } static bool cy8c95x0_precious_register(struct device *dev, unsigned int reg) @@ -314,9 +314,9 @@ static bool cy8c95x0_precious_register(struct device *dev, unsigned int reg) switch (reg) { case CY8C95X0_INTSTATUS_(0) ... CY8C95X0_INTSTATUS_(7): return true; + default: + return false; } - - return false; } static const struct reg_default cy8c95x0_reg_defaults[] = { @@ -1244,6 +1244,8 @@ static int cy8c95x0_probe(struct i2c_client *client) case 60: strscpy(chip->name, cy8c95x0_id[2].name, I2C_NAME_SIZE); break; + default: + return -ENODEV; } reg = devm_regulator_get(&client->dev, "vdd"); From patchwork Fri Sep 2 18:26:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 602530 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 457D4C6FA82 for ; Fri, 2 Sep 2022 18:36:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229939AbiIBSga (ORCPT ); Fri, 2 Sep 2022 14:36:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35052 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229919AbiIBSg0 (ORCPT ); Fri, 2 Sep 2022 14:36:26 -0400 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 99176105B74; Fri, 2 Sep 2022 11:36:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1662143779; x=1693679779; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=CEs9JIj75JOFSDMR+9UBVZY6R0aGuxZKEnPwlAb3kDc=; b=an/qbitKhKzowjm14DugILxzLkXXUxpMKkjVkTs+x6pC+dtBKhhgibKJ eGdj55oEx1iik06QIxd0r3a9UBuZTHVPiImUh/n+d9EjDAYBZF72ir7UB 6ovupHalURZk/uL9Gs7PCJFPZgWOtbD9udV1M4L9RXZehkopGyvROcWlq toJ7TA0OXO1eZsgBAW3+2E4/g4DWzUn3538WKut/LWgJ2SS9x5WUpqUKa FgqIObXo0afAPxjJmbFpYrPSXwkIqdd/KVHjrqD4+sEORWXbrRCSI30g5 OldTTnwOY/rJNu2ybvgbIrCk2jxuspCB8i5dp+TUZHNIpahBAMjIiCnJw Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10458"; a="382351242" X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="382351242" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Sep 2022 11:26:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="674457533" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga008.fm.intel.com with ESMTP; 02 Sep 2022 11:26:47 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 4957A702; Fri, 2 Sep 2022 21:27:00 +0300 (EEST) From: Andy Shevchenko To: Linus Walleij , Andy Shevchenko , Patrick Rudolph , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 12/17] pinctrl: cy8c95x0: Implement ->pin_dbg_show() Date: Fri, 2 Sep 2022 21:26:45 +0300 Message-Id: <20220902182650.83098-12-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> References: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The introduced callback ->pin_dbg_show() is useful for debugging. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-cy8c95x0.c | 40 ++++++++++++++++++++++++------ 1 file changed, 32 insertions(+), 8 deletions(-) diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index 6fe442b44cab..ea81b5ae27a6 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -1010,25 +1010,49 @@ static int cy8c95x0_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, return 0; } +static const char *cy8c95x0_get_fname(unsigned int selector) +{ + if (selector == 0) + return "gpio"; + else + return "pwm"; +} + +static void cy8c95x0_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, + unsigned int pin) +{ + struct cy8c95x0_pinctrl *chip = pinctrl_dev_get_drvdata(pctldev); + DECLARE_BITMAP(mask, MAX_LINE); + DECLARE_BITMAP(pwm, MAX_LINE); + + bitmap_zero(mask, MAX_LINE); + __set_bit(pin, mask); + + if (cy8c95x0_read_regs_mask(chip, CY8C95X0_PWMSEL, pwm, mask)) { + seq_puts(s, "not available"); + return; + } + + seq_printf(s, "MODE:%s", cy8c95x0_get_fname(test_bit(pin, pwm))); +} + static const struct pinctrl_ops cy8c95x0_pinctrl_ops = { .get_groups_count = cy8c95x0_pinctrl_get_groups_count, .get_group_name = cy8c95x0_pinctrl_get_group_name, .get_group_pins = cy8c95x0_pinctrl_get_group_pins, .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, .dt_free_map = pinconf_generic_dt_free_map, + .pin_dbg_show = cy8c95x0_pin_dbg_show, }; -static int cy8c95x0_get_functions_count(struct pinctrl_dev *pctldev) +static const char *cy8c95x0_get_functions_name(struct pinctrl_dev *pctldev, unsigned int selector) { - return 2; + return cy8c95x0_get_fname(selector); } -static const char *cy8c95x0_get_fname(struct pinctrl_dev *pctldev, unsigned int selector) +static int cy8c95x0_get_functions_count(struct pinctrl_dev *pctldev) { - if (selector == 0) - return "gpio"; - else - return "pwm"; + return 2; } static int cy8c95x0_get_groups(struct pinctrl_dev *pctldev, unsigned int selector, @@ -1077,7 +1101,7 @@ static int cy8c95x0_set_mux(struct pinctrl_dev *pctldev, unsigned int selector, static const struct pinmux_ops cy8c95x0_pmxops = { .get_functions_count = cy8c95x0_get_functions_count, - .get_function_name = cy8c95x0_get_fname, + .get_function_name = cy8c95x0_get_functions_name, .get_function_groups = cy8c95x0_get_groups, .set_mux = cy8c95x0_set_mux, .strict = true, From patchwork Fri Sep 2 18:26:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 602533 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 37185ECAAD5 for ; Fri, 2 Sep 2022 18:35:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229791AbiIBSfc (ORCPT ); Fri, 2 Sep 2022 14:35:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55270 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229869AbiIBSe2 (ORCPT ); Fri, 2 Sep 2022 14:34:28 -0400 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DABFF110DA9; Fri, 2 Sep 2022 11:26:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; 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02 Sep 2022 11:26:47 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 512D0713; Fri, 2 Sep 2022 21:27:00 +0300 (EEST) From: Andy Shevchenko To: Linus Walleij , Andy Shevchenko , Patrick Rudolph , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 13/17] pinctrl: cy8c95x0: Make use of device properties Date: Fri, 2 Sep 2022 21:26:46 +0300 Message-Id: <20220902182650.83098-13-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> References: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Convert the module to be property provider agnostic and allow it to be used on non-OF platforms. Add mod_devicetable.h include. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/Kconfig | 2 +- drivers/pinctrl/pinctrl-cy8c95x0.c | 16 +++++++++------- 2 files changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index fc0e529e633f..c09562fbb1b7 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -137,7 +137,7 @@ config PINCTRL_BM1880 config PINCTRL_CY8C95X0 tristate "Cypress CY8C95X0 I2C pinctrl and GPIO driver" - depends on I2C && OF + depends on I2C select GPIOLIB select GPIOLIB_IRQCHIP select PINMUX diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index ea81b5ae27a6..699da63d9c39 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -13,15 +13,16 @@ #include #include #include +#include #include -#include -#include +#include +#include +#include + #include #include #include #include -#include -#include /* Fast access registers */ #define CY8C95X0_INPUT 0x00 @@ -1040,8 +1041,10 @@ static const struct pinctrl_ops cy8c95x0_pinctrl_ops = { .get_groups_count = cy8c95x0_pinctrl_get_groups_count, .get_group_name = cy8c95x0_pinctrl_get_group_name, .get_group_pins = cy8c95x0_pinctrl_get_group_pins, +#ifdef CONFIG_OF .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, .dt_free_map = pinconf_generic_dt_free_map, +#endif .pin_dbg_show = cy8c95x0_pin_dbg_show, }; @@ -1245,9 +1248,8 @@ static int cy8c95x0_probe(struct i2c_client *client) chip->dev = &client->dev; /* Set the device type */ - if (client->dev.of_node) - chip->driver_data = (unsigned long)of_device_get_match_data(&client->dev); - else + chip->driver_data = (unsigned long)device_get_match_data(&client->dev); + if (!chip->driver_data) chip->driver_data = i2c_match_id(cy8c95x0_id, client)->driver_data; if (!chip->driver_data) From patchwork Fri Sep 2 18:26:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 602280 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E5B13ECAAD5 for ; Fri, 2 Sep 2022 18:30:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229961AbiIBSa4 (ORCPT ); Fri, 2 Sep 2022 14:30:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46996 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229966AbiIBSa3 (ORCPT ); Fri, 2 Sep 2022 14:30:29 -0400 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A3CEF12AE0; Fri, 2 Sep 2022 11:30:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1662143428; x=1693679428; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=Q0ymAdm6otN/gngzS3FLjUFevWcyueCxj1MBaH9yisg=; b=NNadTbJBM1Xpovc+CyI3O5xJp85hMGEk898e/FTYiAqeCFe9MKMrXwOt ITlHk21CSs0ASrlZPX5Ry3i84KS5zOobVDYt8Ggmo6YKJ0tuAM8TUgcbo w4yZgQbsYKW3tK7sl08mkbySZopO3KEmwUNRyoyaT6bktRLYR/HXjvwsi HSaLrpq/uB47wbAXHpqX8RwtImSgy/G7dmfJutjq4r1FNGgGHasr8eHNf ISZt4AkPTfBSWJLHbQ7SCQyXqc/H48APVlD6sSdF4BHJ+5A/4gnjKTxej a5G27T8oQUjF/DukE2clZ7pMvaVZE5KiYzUaRAYonpzU94oitGIMR3veg g==; X-IronPort-AV: E=McAfee;i="6500,9779,10458"; a="296056318" X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="296056318" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Sep 2022 11:26:49 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="858319714" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga006.fm.intel.com with ESMTP; 02 Sep 2022 11:26:47 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 5877F725; Fri, 2 Sep 2022 21:27:00 +0300 (EEST) From: Andy Shevchenko To: Linus Walleij , Andy Shevchenko , Patrick Rudolph , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 14/17] pinctrl: cy8c95x0: support ACPI device found on Galileo Gen1 Date: Fri, 2 Sep 2022 21:26:47 +0300 Message-Id: <20220902182650.83098-14-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> References: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add support of the expander found on Intel Galileo Gen1 board. The platform information comes from ACPI. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-cy8c95x0.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index 699da63d9c39..5d8a7d236e62 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -1330,10 +1330,17 @@ static int cy8c95x0_remove(struct i2c_client *client) return 0; } +static const struct acpi_device_id cy8c95x0_acpi_ids[] = { + { "INT3490", 40, }, + { } +}; +MODULE_DEVICE_TABLE(acpi, cy8c95x0_acpi_ids); + static struct i2c_driver cy8c95x0_driver = { .driver = { .name = "cy8c95x0-pinctrl", .of_match_table = cy8c95x0_dt_ids, + .acpi_match_table = cy8c95x0_acpi_ids, }, .probe_new = cy8c95x0_probe, .remove = cy8c95x0_remove, From patchwork Fri Sep 2 18:26:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 602534 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA778C6FA82 for ; Fri, 2 Sep 2022 18:34:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229512AbiIBSet (ORCPT ); Fri, 2 Sep 2022 14:34:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55222 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229791AbiIBSe1 (ORCPT ); Fri, 2 Sep 2022 14:34:27 -0400 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B8790110DB4; Fri, 2 Sep 2022 11:26:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1662143211; x=1693679211; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=gF2xAfEfw1RkrefI6n8YgdfanuwDVgivOEmhvTPqu1c=; b=SlO92U+qBNpzWKyEFa5PPso60wWgxx7HDe3oPlYf6xE8cOpobMYS5XxS 35GgvFbIoL1oL+QJsStVsLZ5knevpauxh9VDkDcSf6tu7aD0XSadM9D+3 VWjmZ15fRjpRMRSzkESly34tGU+h32Fw9Y3/Q2YvYDyA+QVMw6ChExZt1 3M2aZu6XXwWBvJETEz9fVbc2kC8rK0mFZUep4jM0KTe+a4GIza+huVeDU stA77mnuxf2uU8KrXoeWwts8+lfRbzvI4Eu38b49fO2IwbOrIMXosxYCI mQvCY0N8Rf5/g94y6qH7QKlqncRv4SpXQV4tmNi1sn9X4PEmLv4HWvbT9 A==; X-IronPort-AV: E=McAfee;i="6500,9779,10458"; a="283034559" X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="283034559" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Sep 2022 11:26:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="681373080" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga004.fm.intel.com with ESMTP; 02 Sep 2022 11:26:47 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 5FF5874E; Fri, 2 Sep 2022 21:27:00 +0300 (EEST) From: Andy Shevchenko To: Linus Walleij , Andy Shevchenko , Patrick Rudolph , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 15/17] pinctrl: cy8c95x0: Override IRQ for one of the expanders on Galileo Gen 1 Date: Fri, 2 Sep 2022 21:26:48 +0300 Message-Id: <20220902182650.83098-15-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> References: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org ACPI table on Intel Galileo Gen 1 has wrong pin number for IRQ resource of the I²C GPIO expander. Since we know what that number is and luckily have GPIO bases fixed for SoC's controllers, we may use a simple DMI quirk to match the platform and retrieve GpioInt() pin on it for the expander in question. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-cy8c95x0.c | 48 ++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index 5d8a7d236e62..f38e7dc794e9 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -7,7 +7,9 @@ * Author: Naresh Solanki */ +#include #include +#include #include #include #include @@ -73,6 +75,46 @@ static const struct of_device_id cy8c95x0_dt_ids[] = { MODULE_DEVICE_TABLE(of, cy8c95x0_dt_ids); +static const struct acpi_gpio_params cy8c95x0_irq_gpios = { 0, 0, true }; + +static const struct acpi_gpio_mapping cy8c95x0_acpi_irq_gpios[] = { + { "irq-gpios", &cy8c95x0_irq_gpios, 1, ACPI_GPIO_QUIRK_ABSOLUTE_NUMBER }, + { } +}; + +static int cy8c95x0_acpi_get_irq(struct device *dev) +{ + int ret; + + ret = devm_acpi_dev_add_driver_gpios(dev, cy8c95x0_acpi_irq_gpios); + if (ret) + dev_warn(dev, "can't add GPIO ACPI mapping\n"); + + ret = acpi_dev_gpio_irq_get_by(ACPI_COMPANION(dev), "irq-gpios", 0); + if (ret < 0) + return ret; + + dev_info(dev, "ACPI interrupt quirk (IRQ %d)\n", ret); + return ret; +} + +static const struct dmi_system_id cy8c95x0_dmi_acpi_irq_info[] = { + { + /* + * On Intel Galileo Gen 1 board the IRQ pin is provided + * as an absolute number instead of being relative. + * Since first controller (gpio-sch.c) and second + * (gpio-dwapb.c) are at the fixed bases, we may safely + * refer to the number in the global space to get an IRQ + * out of it. + */ + .matches = { + DMI_EXACT_MATCH(DMI_BOARD_NAME, "Galileo"), + }, + }, + {} +}; + #define MAX_BANK 8 #define BANK_SZ 8 #define MAX_LINE (MAX_BANK * BANK_SZ) @@ -1298,6 +1340,12 @@ static int cy8c95x0_probe(struct i2c_client *client) bitmap_set(chip->shiftmask, 0, 20); mutex_init(&chip->i2c_lock); + if (dmi_first_match(cy8c95x0_dmi_acpi_irq_info)) { + ret = cy8c95x0_acpi_get_irq(&client->dev); + if (ret > 0) + client->irq = ret; + } + if (client->irq) { ret = cy8c95x0_irq_setup(chip, client->irq); if (ret) From patchwork Fri Sep 2 18:26:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 602273 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4F0E9ECAAD5 for ; Fri, 2 Sep 2022 18:36:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229907AbiIBSg3 (ORCPT ); Fri, 2 Sep 2022 14:36:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35120 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229932AbiIBSgY (ORCPT ); Fri, 2 Sep 2022 14:36:24 -0400 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 96599F54A5; Fri, 2 Sep 2022 11:36:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1662143779; x=1693679779; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=n3flIGifqT0/3LYVkgKHJ/DinDGHYI69R63FhYW3Scc=; b=a999vR8qtA/IBWtlGN76jq56eAaiHvMP9quls+J+Kz0k+OjpOs7Gp/Dx sVJBtnc1vSZO/hCiGjofwVa4IoVweoRi06UhfY0f1WFM0KqsxfqxIlnJx NASwxMmpIE4v2lrbATHUrfCscVkkEISacj2q3bDqA4goJg4IXe7GfXWnw EhgxNAC00hEPzXeavzdqP7SHhzraPhZszQUHl5lcPsL18pVSPL3vIjWoQ fVQ3L0i/11nQnvK29pOvrL433SiWxWJrd/rI14WjoMMI2dgmSVnn4iAoi 4jax6Kcv9erWXiunKMDU3i7Tar8PKJ0Vs2tskqjxhr+G3XOqE75vatcJl A==; X-IronPort-AV: E=McAfee;i="6500,9779,10458"; a="382351249" X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="382351249" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Sep 2022 11:26:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="615791668" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga007.fm.intel.com with ESMTP; 02 Sep 2022 11:26:49 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 65319238; Fri, 2 Sep 2022 21:27:00 +0300 (EEST) From: Andy Shevchenko To: Linus Walleij , Andy Shevchenko , Patrick Rudolph , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 16/17] pinctrl: cy8c95x0: use bits.h macros for all masks Date: Fri, 2 Sep 2022 21:26:49 +0300 Message-Id: <20220902182650.83098-16-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> References: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Make use of the GENMASK() (far less error-prone, far more concise). Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-cy8c95x0.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index f38e7dc794e9..57302cb0186f 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -363,14 +363,14 @@ static bool cy8c95x0_precious_register(struct device *dev, unsigned int reg) } static const struct reg_default cy8c95x0_reg_defaults[] = { - { CY8C95X0_OUTPUT_(0), 0xff }, - { CY8C95X0_OUTPUT_(1), 0xff }, - { CY8C95X0_OUTPUT_(2), 0xff }, - { CY8C95X0_OUTPUT_(3), 0xff }, - { CY8C95X0_OUTPUT_(4), 0xff }, - { CY8C95X0_OUTPUT_(5), 0xff }, - { CY8C95X0_OUTPUT_(6), 0xff }, - { CY8C95X0_OUTPUT_(7), 0xff }, + { CY8C95X0_OUTPUT_(0), GENMASK(7, 0) }, + { CY8C95X0_OUTPUT_(1), GENMASK(7, 0) }, + { CY8C95X0_OUTPUT_(2), GENMASK(7, 0) }, + { CY8C95X0_OUTPUT_(3), GENMASK(7, 0) }, + { CY8C95X0_OUTPUT_(4), GENMASK(7, 0) }, + { CY8C95X0_OUTPUT_(5), GENMASK(7, 0) }, + { CY8C95X0_OUTPUT_(6), GENMASK(7, 0) }, + { CY8C95X0_OUTPUT_(7), GENMASK(7, 0) }, { CY8C95X0_PORTSEL, 0 }, { CY8C95X0_PWMSEL, 0 }, }; @@ -1257,7 +1257,7 @@ static int cy8c95x0_detect(struct i2c_client *client, ret = i2c_smbus_read_byte_data(client, CY8C95X0_DEVID); if (ret < 0) return ret; - switch (ret & 0xf0) { + switch (ret & GENMASK(7, 4)) { case 0x20: name = cy8c95x0_id[0].name; break; From patchwork Fri Sep 2 18:26:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 602276 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5113EC6FA83 for ; Fri, 2 Sep 2022 18:35:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229547AbiIBSfa (ORCPT ); Fri, 2 Sep 2022 14:35:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55268 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229867AbiIBSe2 (ORCPT ); Fri, 2 Sep 2022 14:34:28 -0400 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E16DB110DB3; Fri, 2 Sep 2022 11:26:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1662143210; x=1693679210; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=ND91XIHDSWohHAk+2uk3acPnsWKSM2E/c7zJlBjDfOg=; b=Himl8uAZbL8kfBeYj44kKiPe+zyLn+nD/f41rnQB/UBSbEFMYLRbktKX QbNSi1eYIjYeNNNfpdXHaI+cS5icBTrcUYcl2Xp9bqOg2b+32n2esqkhl lMWyubj8Tp7rB6BAOPGz8TyVfiUL99gLsuo5orGQOPLgvkhsNz3SYNcnU 1nXjqDlARhQu6AZ8ZgGRJSh7NK77Kr2C00/UyTrZZro7FdooEXZ+BPT4Z GGZchP4sicuzw00TsIR/v2HIa9IJly/ruS/WzM+2g8PQ1IkKpV0oJebsw 5Rr0o2mZezXVTu8yUWfr35I0hyZyi9Ckg5XyupkoXX4cfokJ9qm3Tq0tK A==; X-IronPort-AV: E=McAfee;i="6500,9779,10458"; a="296832735" X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="296832735" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Sep 2022 11:26:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="615791667" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga007.fm.intel.com with ESMTP; 02 Sep 2022 11:26:49 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 79D6A8BE; Fri, 2 Sep 2022 21:27:00 +0300 (EEST) From: Andy Shevchenko To: Linus Walleij , Andy Shevchenko , Patrick Rudolph , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 17/17] pinctrl: cy8c95x0: Correct comment style Date: Fri, 2 Sep 2022 21:26:50 +0300 Message-Id: <20220902182650.83098-17-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> References: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org In a few comments the style is not aligned with the rest. Correct them. While at it, drop unneeded blank lines and deduplicate 'Author'. Signed-off-by: Andy Shevchenko Tested-by: Patrick Rudolph --- drivers/pinctrl/pinctrl-cy8c95x0.c | 40 +++++++++++++++--------------- 1 file changed, 20 insertions(+), 20 deletions(-) diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index 57302cb0186f..fc2c54164669 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -3,8 +3,8 @@ * CY8C95X0 20/40/60 pin I2C GPIO port expander with interrupt support * * Copyright (C) 2022 9elements GmbH - * Author: Patrick Rudolph - * Author: Naresh Solanki + * Authors: Patrick Rudolph + * Naresh Solanki */ #include @@ -37,7 +37,7 @@ /* Port Select configures the port */ #define CY8C95X0_PORTSEL 0x18 -/* port settings, write PORTSEL first */ +/* Port settings, write PORTSEL first */ #define CY8C95X0_INTMASK 0x19 #define CY8C95X0_PWMSEL 0x1A #define CY8C95X0_INVERT 0x1B @@ -72,7 +72,6 @@ static const struct of_device_id cy8c95x0_dt_ids[] = { { .compatible = "cypress,cy8c9560", .data = OF_CY8C95X(60), }, { } }; - MODULE_DEVICE_TABLE(of, cy8c95x0_dt_ids); static const struct acpi_gpio_params cy8c95x0_irq_gpios = { 0, 0, true }; @@ -418,7 +417,7 @@ static int cy8c95x0_write_regs_mask(struct cy8c95x0_pinctrl *chip, int reg, continue; switch (reg) { - /* muxed registers */ + /* Muxed registers */ case CY8C95X0_INTMASK: case CY8C95X0_PWMSEL: case CY8C95X0_INVERT: @@ -435,7 +434,7 @@ static int cy8c95x0_write_regs_mask(struct cy8c95x0_pinctrl *chip, int reg, goto out; off = reg; break; - /* direct access registers */ + /* Direct access registers */ case CY8C95X0_INPUT: case CY8C95X0_OUTPUT: case CY8C95X0_INTSTATUS: @@ -489,7 +488,7 @@ static int cy8c95x0_read_regs_mask(struct cy8c95x0_pinctrl *chip, int reg, continue; switch (reg) { - /* muxed registers */ + /* Muxed registers */ case CY8C95X0_INTMASK: case CY8C95X0_PWMSEL: case CY8C95X0_INVERT: @@ -506,7 +505,7 @@ static int cy8c95x0_read_regs_mask(struct cy8c95x0_pinctrl *chip, int reg, goto out; off = reg; break; - /* direct access registers */ + /* Direct access registers */ case CY8C95X0_INPUT: case CY8C95X0_OUTPUT: case CY8C95X0_INTSTATUS: @@ -581,18 +580,18 @@ static int cy8c95x0_gpio_direction_output(struct gpio_chip *gc, u8 bit = cypress_get_pin_mask(chip, off); int ret; - /* set output level */ + /* Set output level */ ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0); if (ret) return ret; mutex_lock(&chip->i2c_lock); - /* select port */ + /* Select port... */ ret = regmap_write(chip->regmap, CY8C95X0_PORTSEL, port); if (ret) goto out; - /* then direction */ + /* ...then direction */ ret = regmap_write_bits(chip->regmap, CY8C95X0_DIRECTION, bit, 0); out: @@ -613,7 +612,7 @@ static int cy8c95x0_gpio_get_value(struct gpio_chip *gc, unsigned int off) if (ret < 0) { /* * NOTE: - * diagnostic already emitted; that's all we should + * Diagnostic already emitted; that's all we should * do unless gpio_*_value_cansleep() calls become different * from their nonsleeping siblings (and report faults). */ @@ -676,7 +675,7 @@ static int cy8c95x0_gpio_get_pincfg(struct cy8c95x0_pinctrl *chip, mutex_lock(&chip->i2c_lock); - /* select port */ + /* Select port */ ret = regmap_write(chip->regmap, CY8C95X0_PORTSEL, port); if (ret < 0) goto out; @@ -731,7 +730,8 @@ static int cy8c95x0_gpio_get_pincfg(struct cy8c95x0_pinctrl *chip, ret = -ENOTSUPP; goto out; } - /* Writing 1 to one of the drive mode registers will automatically + /* + * Writing 1 to one of the drive mode registers will automatically * clear conflicting set bits in the other drive mode registers. */ ret = regmap_read(chip->regmap, reg, ®_val); @@ -757,7 +757,7 @@ static int cy8c95x0_gpio_set_pincfg(struct cy8c95x0_pinctrl *chip, mutex_lock(&chip->i2c_lock); - /* select port */ + /* Select port */ ret = regmap_write(chip->regmap, CY8C95X0_PORTSEL, port); if (ret < 0) goto out; @@ -794,7 +794,8 @@ static int cy8c95x0_gpio_set_pincfg(struct cy8c95x0_pinctrl *chip, ret = -ENOTSUPP; goto out; } - /* Writing 1 to one of the drive mode registers will automatically + /* + * Writing 1 to one of the drive mode registers will automatically * clear conflicting set bits in the other drive mode registers. */ ret = regmap_write_bits(chip->regmap, reg, bit, bit); @@ -1119,7 +1120,7 @@ static int cy8c95x0_pinmux_cfg(struct cy8c95x0_pinctrl *chip, u8 bit = cypress_get_pin_mask(chip, off); int ret; - /* select port */ + /* Select port */ ret = regmap_write(chip->regmap, CY8C95X0_PORTSEL, port); if (ret < 0) return ret; @@ -1236,11 +1237,12 @@ static int cy8c95x0_setup_pinctrl(struct cy8c95x0_pinctrl *chip) pd->pins = cy8c9560_pins; pd->npins = chip->tpin; pd->owner = THIS_MODULE; - chip->pctldev = devm_pinctrl_register(chip->dev, pd, chip); + chip->pctldev = devm_pinctrl_register(chip->dev, pd, chip); if (IS_ERR(chip->pctldev)) return dev_err_probe(chip->dev, PTR_ERR(chip->pctldev), "can't register controller\n"); + return 0; } @@ -1293,7 +1295,6 @@ static int cy8c95x0_probe(struct i2c_client *client) chip->driver_data = (unsigned long)device_get_match_data(&client->dev); if (!chip->driver_data) chip->driver_data = i2c_match_id(cy8c95x0_id, client)->driver_data; - if (!chip->driver_data) return -ENODEV; @@ -1395,7 +1396,6 @@ static struct i2c_driver cy8c95x0_driver = { .id_table = cy8c95x0_id, .detect = cy8c95x0_detect, }; - module_i2c_driver(cy8c95x0_driver); MODULE_AUTHOR("Patrick Rudolph ");