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[209.132.180.67]) by mx.google.com with ESMTP id s13si9827354pgp.347.2019.02.18.04.30.21; Mon, 18 Feb 2019 04:30:21 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Hx1wjV+i; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730151AbfBRMaU (ORCPT + 15 others); Mon, 18 Feb 2019 07:30:20 -0500 Received: from mail-yb1-f195.google.com ([209.85.219.195]:40615 "EHLO mail-yb1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728293AbfBRMaU (ORCPT ); Mon, 18 Feb 2019 07:30:20 -0500 Received: by mail-yb1-f195.google.com with SMTP id k2so2190768ybk.7 for ; Mon, 18 Feb 2019 04:30:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=ateX3s8gpfmkf/nVro5ijlmm4WUX31nTOLg9tsTAyHo=; b=Hx1wjV+im/r8g4D1bp3S1D5jpGoQGj7HvHwpejDBhO/CkXGx+488gncYSBSpGNSARm iyTtVcc3KgVZaLfunUua9UODmwMPXQnFIRm8hl9EVyEh8QHXmQBzsdp1Z/CBoOPeaoSV ikin1xwyzeDLAkn4CXt3ISvrrC9oQ4MFt5ZqQvfTYSTYah6G8iIsRMK35MQQN9CKqqtP ekeKHjxRHUN/JwIAHKBcbEldy8+1U9naKLok9pywoHknJNboUZAjo1VQUTYjxYxuA2K/ o6L+DI/PyfOHSh1Zd1/haa40AGy3gMtSNoSNf89t33VGN6ZH+Kbn1/slGAk0GH0hxm+W LHbg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=ateX3s8gpfmkf/nVro5ijlmm4WUX31nTOLg9tsTAyHo=; b=sJsjtlbUVAGA/lrHwRQRbD4HDBf/u/vX2Wt45fl4EM4A0fgx/AzESGC6NU0gHfCf+I 5TrwokVfjr5/kM+DsukQuZbu9wzTr9gNxEOxMwTRlQbC45Wk+QU1kSWjZQVOkghTcps1 r6bBuvWqNCm7gbrjvzE3Mm44pvqrhu1ePjG5szEWnWnF4EI2WxjV3B5qRtL6Edx3mcU2 JA49h89bIXEEVanK4AAwg9AdOmw1I2lMYfRGH/IvQICjvcDJ/VX++AgX2GlkBrY9TCe1 /Z8wR8bvgfxzsPmIfkyOO+G7b5ySTz+DhzGuG4UvJ99xTFIeTZk64Z2JJHrYZVLCo8u+ WtZw== X-Gm-Message-State: AHQUAuZFbVHmoDLXemxIzmv72fGv0AUbGRAOY7v8BvwsehlOjWNS07PP DnWJiBH//kKpeVg5TFYZfZjnOw== X-Received: by 2002:a25:be85:: with SMTP id i5mr18703799ybk.134.1550493019787; Mon, 18 Feb 2019 04:30:19 -0800 (PST) Received: from localhost.localdomain ([106.51.22.126]) by smtp.gmail.com with ESMTPSA id z77sm1663695ywz.91.2019.02.18.04.30.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 18 Feb 2019 04:30:19 -0800 (PST) From: Amit Pundir To: Greg KH Cc: Stable , Linus Walleij , Jonas Gorski , Paul Burton , linux-mips@vger.kernel.org, Ralf Baechle , James Hogan , Florian Fainelli Subject: [PATCH for-3.18.y+] MIPS: BCM63XX: fix switch core reset on BCM6368 Date: Mon, 18 Feb 2019 18:00:10 +0530 Message-Id: <1550493012-5959-1-git-send-email-amit.pundir@linaro.org> X-Mailer: git-send-email 2.7.4 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Jonas Gorski commit 8a38dacf87180738d42b058334c951eba15d2d47 upstream. The Ethernet Switch core mask was set to 0, causing the switch core to be not reset on BCM6368 on boot. Provide the proper mask so the switch core gets reset to a known good state. Fixes: 799faa626c71 ("MIPS: BCM63XX: add core reset helper") Signed-off-by: Jonas Gorski Signed-off-by: Paul Burton Cc: linux-mips@vger.kernel.org Cc: Ralf Baechle Cc: James Hogan Cc: Florian Fainelli Signed-off-by: Amit Pundir --- Cherry-picked from lede tree https://git.lede-project.org/?p=source.git and build tested for LTS trees up to v4.19.y for ARCH=mips bcm63xx_defconfig. arch/mips/bcm63xx/reset.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.7.4 diff --git a/arch/mips/bcm63xx/reset.c b/arch/mips/bcm63xx/reset.c index a2af38cf28a7..64574e74cb23 100644 --- a/arch/mips/bcm63xx/reset.c +++ b/arch/mips/bcm63xx/reset.c @@ -120,7 +120,7 @@ #define BCM6368_RESET_DSL 0 #define BCM6368_RESET_SAR SOFTRESET_6368_SAR_MASK #define BCM6368_RESET_EPHY SOFTRESET_6368_EPHY_MASK -#define BCM6368_RESET_ENETSW 0 +#define BCM6368_RESET_ENETSW SOFTRESET_6368_ENETSW_MASK #define BCM6368_RESET_PCM SOFTRESET_6368_PCM_MASK #define BCM6368_RESET_MPI SOFTRESET_6368_MPI_MASK #define BCM6368_RESET_PCIE 0