From patchwork Mon Sep 19 20:48:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marijn Suijten X-Patchwork-Id: 607400 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 83425C6FA82 for ; Mon, 19 Sep 2022 20:48:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229880AbiISUsu (ORCPT ); Mon, 19 Sep 2022 16:48:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45560 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229892AbiISUsn (ORCPT ); Mon, 19 Sep 2022 16:48:43 -0400 Received: from relay05.th.seeweb.it (relay05.th.seeweb.it [5.144.164.166]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3BF574AD5C for ; Mon, 19 Sep 2022 13:48:41 -0700 (PDT) Received: from localhost.localdomain (94-209-172-39.cable.dynamic.v4.ziggo.nl [94.209.172.39]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r2.th.seeweb.it (Postfix) with ESMTPSA id A78F53F608; Mon, 19 Sep 2022 22:48:37 +0200 (CEST) From: Marijn Suijten To: phone-devel@vger.kernel.org, Andy Gross , Bjorn Andersson , Konrad Dybcio Cc: ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Martin Botka , Jami Kettunen , Marijn Suijten , Lee Jones , Rob Herring , Krzysztof Kozlowski , Stephen Boyd , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 3/5] arm64: dts: qcom: Add PM6125 PMIC Date: Mon, 19 Sep 2022 22:48:24 +0200 Message-Id: <20220919204826.215845-4-marijn.suijten@somainline.org> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220919204826.215845-1-marijn.suijten@somainline.org> References: <20220919204826.215845-1-marijn.suijten@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This PMIC is commonly used on boards with an SM6125 SoC and looks very similar in layout to the PM6150. Downstream declares more nodes to be available, but these have been omitted from this patch: the pwm/lpg block is unused on my reference device making it impossible to test/validate, and the spmi-clkdiv does not have a single device-tree binding using this driver yet, hence inclusion is better postponed until ie. audio which uses these clocks is brought up. Signed-off-by: Marijn Suijten Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/pm6125.dtsi | 154 +++++++++++++++++++++++++++ 1 file changed, 154 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pm6125.dtsi diff --git a/arch/arm64/boot/dts/qcom/pm6125.dtsi b/arch/arm64/boot/dts/qcom/pm6125.dtsi new file mode 100644 index 000000000000..1c8ccda26ffb --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pm6125.dtsi @@ -0,0 +1,154 @@ +// SPDX-License-Identifier: BSD-3-Clause + +#include +#include +#include +#include +#include + +/ { + thermal-zones { + pm6125-thermal { + polling-delay-passive = <100>; + polling-delay = <0>; + + thermal-sensors = <&pm6125_temp>; + + trips { + trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + trip1 { + temperature = <115000>; + hysteresis = <0>; + type = "hot"; + }; + + trip2 { + temperature = <145000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + }; +}; + +&spmi_bus { + pmic@0 { + compatible = "qcom,pm6125", "qcom,spmi-pmic"; + reg = <0x0 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pm6125_pon: pon@800 { + compatible = "qcom,pm8998-pon"; + reg = <0x800>; + mode-bootloader = <0x2>; + mode-recovery = <0x1>; + + pon_pwrkey: pwrkey { + compatible = "qcom,pm8941-pwrkey"; + interrupts = <0x0 0x8 0x0 IRQ_TYPE_EDGE_BOTH>; + debounce = <15625>; + linux,code = ; + bias-pull-up; + status = "disabled"; + }; + + pon_resin: resin { + compatible = "qcom,pm8941-resin"; + interrupts = <0x0 0x8 0x1 IRQ_TYPE_EDGE_BOTH>; + debounce = <15625>; + bias-pull-up; + status = "disabled"; + }; + }; + + pm6125_temp: temp-alarm@2400 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0x2400>; + interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_RISING>; + io-channels = <&pm6125_adc ADC5_DIE_TEMP>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pm6125_adc: adc@3100 { + compatible = "qcom,spmi-adc5"; + reg = <0x3100>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells = <1>; + + ref-gnd@0 { + reg = ; + qcom,pre-scaling = <1 1>; + }; + + vref-1p25@1 { + reg = ; + qcom,pre-scaling = <1 1>; + }; + + die-temp@6 { + reg = ; + qcom,pre-scaling = <1 1>; + }; + + vph-pwr@83 { + reg = ; + qcom,pre-scaling = <1 3>; + }; + + vcoin@85 { + reg = ; + qcom,pre-scaling = <1 3>; + }; + + xo-therm@4c { + reg = ; + qcom,pre-scaling = <1 1>; + qcom,hw-settle-time = <200>; + qcom,ratiometric; + }; + }; + + pm6125_adc_tm: adc-tm@3500 { + compatible = "qcom,spmi-adc-tm5"; + reg = <0x3500>; + interrupts = <0x0 0x35 0x0 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; + #thermal-sensor-cells = <1>; + status = "disabled"; + }; + + pm6125_rtc: rtc@6000 { + compatible = "qcom,pm8941-rtc"; + reg = <0x6000>, <0x6100>; + reg-names = "rtc", "alarm"; + interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>; + status = "disabled"; + }; + + pm6125_gpio: gpio@c000 { + compatible = "qcom,pm6125-gpio", "qcom,spmi-gpio"; + reg = <0xc000>; + gpio-controller; + gpio-ranges = <&pm6125_gpio 0 0 9>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmic@1 { + compatible = "qcom,pm6125", "qcom,spmi-pmic"; + reg = <0x1 SPMI_USID>; + }; +}; From patchwork Mon Sep 19 20:48:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marijn Suijten X-Patchwork-Id: 607401 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 428B8ECAAD3 for ; Mon, 19 Sep 2022 20:48:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229912AbiISUss (ORCPT ); Mon, 19 Sep 2022 16:48:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45576 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229884AbiISUsl (ORCPT ); Mon, 19 Sep 2022 16:48:41 -0400 Received: from m-r2.th.seeweb.it (m-r2.th.seeweb.it [5.144.164.171]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4C0974B0F6; Mon, 19 Sep 2022 13:48:40 -0700 (PDT) Received: from localhost.localdomain (94-209-172-39.cable.dynamic.v4.ziggo.nl [94.209.172.39]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r2.th.seeweb.it (Postfix) with ESMTPSA id 63D7D3F610; Mon, 19 Sep 2022 22:48:38 +0200 (CEST) From: Marijn Suijten To: phone-devel@vger.kernel.org, Andy Gross , Bjorn Andersson , Konrad Dybcio Cc: ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Martin Botka , Jami Kettunen , Marijn Suijten , Lee Jones , Rob Herring , Krzysztof Kozlowski , Stephen Boyd , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 4/5] arm64: dts: qcom: sm6125-seine: Include PM6125 and configure PON Date: Mon, 19 Sep 2022 22:48:25 +0200 Message-Id: <20220919204826.215845-5-marijn.suijten@somainline.org> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220919204826.215845-1-marijn.suijten@somainline.org> References: <20220919204826.215845-1-marijn.suijten@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The Sony Xperia Seine board uses the PM6125; include it and configure the PON buttons that provide the power and volume-up key. Signed-off-by: Marijn Suijten Reviewed-by: AngeloGioacchino Del Regno --- .../boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts b/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts index 0aad2e94e757..e01ea35f9a62 100644 --- a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts +++ b/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts @@ -6,8 +6,8 @@ /dts-v1/; #include "sm6125.dtsi" +#include "pm6125.dtsi" #include -#include #include / { @@ -86,6 +86,15 @@ &hsusb_phy1 { status = "okay"; }; +&pon_pwrkey { + status = "okay"; +}; + +&pon_resin { + status = "okay"; + linux,code = ; +}; + &sdc2_off_state { sd-cd { pins = "gpio98"; From patchwork Mon Sep 19 20:48:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marijn Suijten X-Patchwork-Id: 607399 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C0C21ECAAA1 for ; Mon, 19 Sep 2022 20:48:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229877AbiISUsw (ORCPT ); Mon, 19 Sep 2022 16:48:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45574 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229895AbiISUso (ORCPT ); Mon, 19 Sep 2022 16:48:44 -0400 Received: from relay07.th.seeweb.it (relay07.th.seeweb.it [5.144.164.168]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C471D4AD5F for ; Mon, 19 Sep 2022 13:48:42 -0700 (PDT) Received: from localhost.localdomain (94-209-172-39.cable.dynamic.v4.ziggo.nl [94.209.172.39]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r2.th.seeweb.it (Postfix) with ESMTPSA id 2C14D3F613; Mon, 19 Sep 2022 22:48:39 +0200 (CEST) From: Marijn Suijten To: phone-devel@vger.kernel.org, Andy Gross , Bjorn Andersson , Konrad Dybcio Cc: ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Martin Botka , Jami Kettunen , Marijn Suijten , Lee Jones , Rob Herring , Krzysztof Kozlowski , Stephen Boyd , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 5/5] arm64: dts: qcom: sm6125-seine: Configure additional trinket thermistors Date: Mon, 19 Sep 2022 22:48:26 +0200 Message-Id: <20220919204826.215845-6-marijn.suijten@somainline.org> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220919204826.215845-1-marijn.suijten@somainline.org> References: <20220919204826.215845-1-marijn.suijten@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org In addition to PMIC-specific (pm6125) thermistors downstream extends this set with the rf-pa0/rf-pa1, quiet, camera-flash and UFS/eMMC thermistors in sm6125 (trinket) board and seine-specific DT files. All thermistors report sensible temperature readings in userspace. The sensors are also added to their respective Thermal Monitor node, with thermal zones to match where applicable: emmc-ufs and camera-flash are not available on the TM5 block, hence cannot be configured with a tripping point and will not have a thermal zone. Signed-off-by: Marijn Suijten Reviewed-by: AngeloGioacchino Del Regno --- .../qcom/sm6125-sony-xperia-seine-pdx201.dts | 151 ++++++++++++++++++ 1 file changed, 151 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts b/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts index e01ea35f9a62..5d41def2ccc9 100644 --- a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts +++ b/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts @@ -9,6 +9,7 @@ #include "pm6125.dtsi" #include #include +#include / { /* required for bootloader to select correct board */ @@ -80,12 +81,162 @@ cmdline_mem: memory@ffd00000 { no-map; }; }; + + thermal-zones { + rf-pa0-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&pm6125_adc_tm 0>; + + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + quiet-thermal { + polling-delay-passive = <0>; + polling-delay = <5000>; + thermal-sensors = <&pm6125_adc_tm 1>; + + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + xo-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&pm6125_adc_tm 2>; + + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + rf-pa1-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&pm6125_adc_tm 3>; + + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + }; }; &hsusb_phy1 { status = "okay"; }; +&pm6125_adc { + pinctrl-names = "default"; + pinctrl-0 = <&camera_flash_therm &emmc_ufs_therm &rf_pa1_therm>; + + rf-pa0-therm@4d { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + quiet-therm@4e { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + camera-flash-therm@52 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + emmc-ufs-therm@54 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + rf-pa1-therm@55 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; +}; + +&pm6125_adc_tm { + status = "okay"; + + rf-pa0-therm@0 { + reg = <0>; + io-channels = <&pm6125_adc ADC5_AMUX_THM1_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + quiet-therm@1 { + reg = <1>; + io-channels = <&pm6125_adc ADC5_AMUX_THM2_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + xo-therm@2 { + reg = <2>; + io-channels = <&pm6125_adc ADC5_XO_THERM_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + rf-pa1-therm@3 { + reg = <3>; + io-channels = <&pm6125_adc ADC5_GPIO4_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; +}; + +&pm6125_gpio { + camera_flash_therm: camera-flash-therm-state { + pins = "gpio3"; + function = PMIC_GPIO_FUNC_NORMAL; + bias-high-impedance; + }; + + emmc_ufs_therm: emmc-ufs-therm-state { + pins = "gpio6"; + function = PMIC_GPIO_FUNC_NORMAL; + bias-high-impedance; + }; + + rf_pa1_therm: rf-pa1-therm-state { + pins = "gpio7"; + function = PMIC_GPIO_FUNC_NORMAL; + bias-high-impedance; + }; +}; + &pon_pwrkey { status = "okay"; };