From patchwork Tue Feb 19 07:54:39 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhen Lei X-Patchwork-Id: 158692 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp3377589jaa; Mon, 18 Feb 2019 23:57:16 -0800 (PST) X-Google-Smtp-Source: AHgI3IZUMXAnjWXV2dQ1f0uQywLyDHC0pZyV6nZnij7EuSpLJAmoHTQ83fKgGHu2pAzEWddiDL7/ X-Received: by 2002:a63:29c3:: with SMTP id p186mr22830246pgp.24.1550563036668; Mon, 18 Feb 2019 23:57:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550563036; cv=none; d=google.com; s=arc-20160816; b=TnM9EKFyW2Ei+wT65rIolseb2MZfuzeKxJIQ43KLRT5k57SWtiP1wFfdnwA17SVHHw 1F7ps4zKcsImDwuLOXhKsG/8MModlHtKxj4BryQzBLYqd3tyo7OQLwx3uoxFhkLCS6Iz Os/DGuAp51r5pM/Pxqsk8QlMw7faVbuLDp0rlUQJ1rD7Z6/rvV/icFOvILP85m3/I8I2 GZCB76ezRZC5D1gArp26ZGf+y416fQtXrlHVFA72EMtq8tX93fb352gfavPJ6kxeCvs9 59iktkvkupouD3N/Jy5SMIG3vkrXIe+Q5XEyp1ECDW1Bohc8ny3cPoesuox9H+1hSQkV ig+Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=dCUBr31f4Go3Gg7A1z5SiBc0ZELnR1JYG3EU6GZZxYo=; b=ZrTgaTJq8KStYxXeZHvho/qgzL9kdRCzgisQS9t91LLJiU8ZO1/9OmhUbJhvdNwyAD qIRb/82fHUUcPqcK2UjsCa529HIm507iS8giUfLzE8TvLp1sWv9rRtCjrbpZG2YeUvmn fZKLpervCyC13fVeDXzw3Jt497p1eSYYAoaawfo7YDuDFLplBD66ShitmZChU/Kv8HTp syRrJtSDFxDIe9ars0VbsVzvmhP67KTOwQ/UpVDBuKCFvPabp02U7xIqPj+xcjs3LStD tvRUvMc7ahm1oQqimoCXjWCXb1qU5WgHPnSWZNEOUNo3v+lU1iPQOKpi1LdxbRha6SYs aSOw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l7si17032453plb.366.2019.02.18.23.57.16; Mon, 18 Feb 2019 23:57:16 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727714AbfBSH5P (ORCPT + 32 others); Tue, 19 Feb 2019 02:57:15 -0500 Received: from szxga05-in.huawei.com ([45.249.212.191]:3783 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725764AbfBSH5K (ORCPT ); Tue, 19 Feb 2019 02:57:10 -0500 Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id CE2F61F92350A8F9A9FE; Tue, 19 Feb 2019 15:57:05 +0800 (CST) Received: from HGHY1l002753561.china.huawei.com (10.177.23.164) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.408.0; Tue, 19 Feb 2019 15:56:55 +0800 From: Zhen Lei To: Jean-Philippe Brucker , Robin Murphy , Will Deacon , Joerg Roedel , linux-arm-kernel , iommu , linux-kernel CC: Zhen Lei Subject: [PATCH 1/5] iommu/arm-smmu-v3: make sure the stale caching of L1STD are invalid Date: Tue, 19 Feb 2019 15:54:39 +0800 Message-ID: <20190219075443.17732-2-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.19.2.windows.1 In-Reply-To: <20190219075443.17732-1-thunder.leizhen@huawei.com> References: <20190219075443.17732-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.23.164] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Invalidate the caching of the intermediate L1ST descriptor after it has been updated. Signed-off-by: Zhen Lei --- drivers/iommu/arm-smmu-v3.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) -- 1.8.3 diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index 0d28402..2072897 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -1072,13 +1072,14 @@ static void arm_smmu_write_ctx_desc(struct arm_smmu_device *smmu, *dst = cpu_to_le64(val); } -static void arm_smmu_sync_ste_for_sid(struct arm_smmu_device *smmu, u32 sid) +static void +__arm_smmu_sync_ste_for_sid(struct arm_smmu_device *smmu, u32 sid, bool leaf) { struct arm_smmu_cmdq_ent cmd = { .opcode = CMDQ_OP_CFGI_STE, .cfgi = { .sid = sid, - .leaf = true, + .leaf = leaf, }, }; @@ -1086,6 +1087,16 @@ static void arm_smmu_sync_ste_for_sid(struct arm_smmu_device *smmu, u32 sid) arm_smmu_cmdq_issue_sync(smmu); } +static void arm_smmu_sync_ste_for_sid(struct arm_smmu_device *smmu, u32 sid) +{ + __arm_smmu_sync_ste_for_sid(smmu, sid, true); +} + +static void arm_smmu_sync_std_for_sid(struct arm_smmu_device *smmu, u32 sid) +{ + __arm_smmu_sync_ste_for_sid(smmu, sid, false); +} + static void arm_smmu_write_strtab_ent(struct arm_smmu_device *smmu, u32 sid, __le64 *dst, struct arm_smmu_strtab_ent *ste) { @@ -1233,6 +1244,7 @@ static int arm_smmu_init_l2_strtab(struct arm_smmu_device *smmu, u32 sid) arm_smmu_init_bypass_stes(desc->l2ptr, 1 << STRTAB_SPLIT); arm_smmu_write_strtab_l1_desc(strtab, desc); + arm_smmu_sync_std_for_sid(smmu, sid); return 0; } From patchwork Tue Feb 19 07:54:40 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhen Lei X-Patchwork-Id: 158693 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp3377694jaa; Mon, 18 Feb 2019 23:57:25 -0800 (PST) X-Google-Smtp-Source: AHgI3IaJ83cce6uLyyUjEYZ+90Y5YrQDqs5tsa/a7xRt1Eo6or729lvGPV/liywy6+wiAJ3O1eoI X-Received: by 2002:a62:b286:: with SMTP id z6mr28166749pfl.106.1550563045161; Mon, 18 Feb 2019 23:57:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550563045; cv=none; d=google.com; s=arc-20160816; b=HCEvtkdhUKLJWBDp/wr5PyStk/1EsAM5dGVWJAjl+5ULWgpvshzohYwn6gNbVRJJlU iwL1tR2L9On9hasll6L3mBhOY9Q+ko36HizjM3clXuyOfdmX+oSWyfAQk6mWTQsKMKSZ ZuEz5dGMQyGLRfVwmY6Alg3EUBTVBtbndQ1d2tEL0THFVJ9vT2A1K1MWqGC6cHlRoSxF 1AEmAh4/x9aoJ9U8jrr4Y8BakzmEiw7L9R3wMbr/Ei3bLc8zGikZj57Uv/jkRRn+7AfX XTzyQe/ylZe6td7ekyI2A+pwyaMwUmLSZv2SUUzHIawUcico6qdXr2QCbo+n0LYQrEiU 2k9A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=vJtTYwVN2ZrO+zujXXUtZmAlmOVofY0l/KpnALiuyr0=; b=Bx28e698NeH/LvCcpEtEY+N/KpXskaJs/eYwJrgI7o3/dcuDBWxSQafPyYXlvkJF56 hjMt2v+BMPfMXpAX82Zc1cedyXfWuX8FymMb7YiVI7QQ/dif2IjkZvKga7MProhCBTu1 L6c34zPZ/S75nprda+otLu6M13Hbul8G8rbM49S1ODJcR4rtg2htcGBr+6pR3kGPHOh1 437kVIDzzeqB8bVcUe53XIlZYnb+V2rofIy86Yji9K4vsKmOKbUdgQq/G5zy8GRHner+ I3ajeF+uL5RAydqr7S6Sq+03JBZ6tCnNpFtCzSKc2cV5UH88vY+Gxh4k9Qzwp4mNLALp IC4A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k5si14470355pfi.176.2019.02.18.23.57.24; Mon, 18 Feb 2019 23:57:25 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727574AbfBSH5J (ORCPT + 32 others); Tue, 19 Feb 2019 02:57:09 -0500 Received: from szxga05-in.huawei.com ([45.249.212.191]:3780 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727464AbfBSH5H (ORCPT ); Tue, 19 Feb 2019 02:57:07 -0500 Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id BADA7EB5788C8B2F511F; Tue, 19 Feb 2019 15:57:05 +0800 (CST) Received: from HGHY1l002753561.china.huawei.com (10.177.23.164) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.408.0; Tue, 19 Feb 2019 15:56:55 +0800 From: Zhen Lei To: Jean-Philippe Brucker , Robin Murphy , Will Deacon , Joerg Roedel , linux-arm-kernel , iommu , linux-kernel CC: Zhen Lei Subject: [PATCH 2/5] iommu/arm-smmu-v3: make smmu can be enabled in kdump kernel Date: Tue, 19 Feb 2019 15:54:40 +0800 Message-ID: <20190219075443.17732-3-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.19.2.windows.1 In-Reply-To: <20190219075443.17732-1-thunder.leizhen@huawei.com> References: <20190219075443.17732-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.23.164] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org To reduce the risk of further crash, the device_shutdown() was not called by the first kernel. That means some devices may still working in the secondary kernel. For example, a netcard may still using ring buffer to receive the broadcast messages in the kdump kernel. No events are reported utill the related smmu reinitialized by the kdump kernel. commit b63b3439b856 ("iommu/arm-smmu-v3: Abort all transactions if SMMU is enabled in kdump kernel") set SMMU_GBPA.ABORT to prevent the unexpected devices accessing, but it also prevent the devices accessing which we needed, like hard disk, netcard. In fact, we can use STE.config=0b000 to abort the unexpected devices accessing only. As below: 1. In the first kernel, all buffers used by the "unexpected" devices are correctly mapped, and it will not be used by the secondary kernel because the latter has its dedicated reserved memory. 2. In the secondary kernel, set SMMU_GBPA.ABORT=1 before "disable smmu". 3. In the secondary kernel, after the smmu was disabled, preset all STE.config=0b000. For 2-level Stream Table, make all L1STD.l2ptr pointer to a dummy L2ST. The dummy L2ST is shared by all L1STDs. 4. In the secondary kernel, enable smmu. For the needed devices, allocate new L2STs accordingly. For phase 1 and 2, the unexpected devices base the old mapping access memory, it will not corrupt others. For phase 3, SMMU_GBPA abort it. For phase 4 STE abort it. Fixes: commit b63b3439b856 ("iommu/arm-smmu-v3: Abort all transactions ...") Signed-off-by: Zhen Lei --- drivers/iommu/arm-smmu-v3.c | 72 ++++++++++++++++++++++++++++++++------------- 1 file changed, 51 insertions(+), 21 deletions(-) -- 1.8.3 diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index 2072897..c3c4ff2 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -1219,35 +1219,57 @@ static void arm_smmu_init_bypass_stes(u64 *strtab, unsigned int nent) } } -static int arm_smmu_init_l2_strtab(struct arm_smmu_device *smmu, u32 sid) +static int __arm_smmu_init_l2_strtab(struct arm_smmu_device *smmu, u32 sid, + struct arm_smmu_strtab_l1_desc *desc) { - size_t size; void *strtab; struct arm_smmu_strtab_cfg *cfg = &smmu->strtab_cfg; - struct arm_smmu_strtab_l1_desc *desc = &cfg->l1_desc[sid >> STRTAB_SPLIT]; - if (desc->l2ptr) - return 0; - - size = 1 << (STRTAB_SPLIT + ilog2(STRTAB_STE_DWORDS) + 3); strtab = &cfg->strtab[(sid >> STRTAB_SPLIT) * STRTAB_L1_DESC_DWORDS]; - desc->span = STRTAB_SPLIT + 1; - desc->l2ptr = dmam_alloc_coherent(smmu->dev, size, &desc->l2ptr_dma, - GFP_KERNEL | __GFP_ZERO); if (!desc->l2ptr) { - dev_err(smmu->dev, - "failed to allocate l2 stream table for SID %u\n", - sid); - return -ENOMEM; + size_t size; + + size = 1 << (STRTAB_SPLIT + ilog2(STRTAB_STE_DWORDS) + 3); + desc->l2ptr = dmam_alloc_coherent(smmu->dev, size, + &desc->l2ptr_dma, + GFP_KERNEL | __GFP_ZERO); + if (!desc->l2ptr) { + dev_err(smmu->dev, + "failed to allocate l2 stream table for SID %u\n", + sid); + return -ENOMEM; + } + + desc->span = STRTAB_SPLIT + 1; + arm_smmu_init_bypass_stes(desc->l2ptr, 1 << STRTAB_SPLIT); } - arm_smmu_init_bypass_stes(desc->l2ptr, 1 << STRTAB_SPLIT); arm_smmu_write_strtab_l1_desc(strtab, desc); + return 0; +} + +static int arm_smmu_init_l2_strtab(struct arm_smmu_device *smmu, u32 sid) +{ + int ret; + struct arm_smmu_strtab_cfg *cfg = &smmu->strtab_cfg; + struct arm_smmu_strtab_l1_desc *desc = &cfg->l1_desc[sid >> STRTAB_SPLIT]; + + ret = __arm_smmu_init_l2_strtab(smmu, sid, desc); + if (ret) + return ret; + arm_smmu_sync_std_for_sid(smmu, sid); return 0; } +static int arm_smmu_init_dummy_l2_strtab(struct arm_smmu_device *smmu, u32 sid) +{ + static struct arm_smmu_strtab_l1_desc dummy_desc; + + return __arm_smmu_init_l2_strtab(smmu, sid, &dummy_desc); +} + /* IRQ and event handlers */ static irqreturn_t arm_smmu_evtq_thread(int irq, void *dev) { @@ -2150,8 +2172,12 @@ static int arm_smmu_init_l1_strtab(struct arm_smmu_device *smmu) } for (i = 0; i < cfg->num_l1_ents; ++i) { - arm_smmu_write_strtab_l1_desc(strtab, &cfg->l1_desc[i]); - strtab += STRTAB_L1_DESC_DWORDS << 3; + if (is_kdump_kernel()) { + arm_smmu_init_dummy_l2_strtab(smmu, i << STRTAB_SPLIT); + } else { + arm_smmu_write_strtab_l1_desc(strtab, &cfg->l1_desc[i]); + strtab += STRTAB_L1_DESC_DWORDS << 3; + } } return 0; @@ -2467,11 +2493,8 @@ static int arm_smmu_device_reset(struct arm_smmu_device *smmu, bool bypass) /* Clear CR0 and sync (disables SMMU and queue processing) */ reg = readl_relaxed(smmu->base + ARM_SMMU_CR0); if (reg & CR0_SMMUEN) { - if (is_kdump_kernel()) { + if (is_kdump_kernel()) arm_smmu_update_gbpa(smmu, GBPA_ABORT, 0); - arm_smmu_device_disable(smmu); - return -EBUSY; - } dev_warn(smmu->dev, "SMMU currently enabled! Resetting...\n"); } @@ -2859,6 +2882,13 @@ static int arm_smmu_device_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; bool bypass; + /* + * Force to disable bypass for the kdump kernel, abort all incoming + * transactions from the unknown devices. + */ + if (is_kdump_kernel()) + disable_bypass = 1; + smmu = devm_kzalloc(dev, sizeof(*smmu), GFP_KERNEL); if (!smmu) { dev_err(dev, "failed to allocate arm_smmu_device\n"); From patchwork Tue Feb 19 07:54:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhen Lei X-Patchwork-Id: 158691 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp3377548jaa; Mon, 18 Feb 2019 23:57:13 -0800 (PST) X-Google-Smtp-Source: AHgI3IZJG0+Yf41Vn4CmhdKOuuVBU6lhgqzRzNe9WFDEb1vSCmdoYRK24tjRO6cP210gco53ZVu6 X-Received: by 2002:a63:2882:: with SMTP id o124mr22910930pgo.446.1550563033836; Mon, 18 Feb 2019 23:57:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550563033; cv=none; d=google.com; s=arc-20160816; b=BqtC9htFETvpJ7S666QcP3ARlDrlXysTpfNX3SG1SgihfRuUXYGLbcLK/KvAwNj8/I kBWjBP95q5zsegu/S4QjhMnwFSgoxapc+N3jheTTKNG/qPv5Hk+z8F2t0G9qeKnX4bSG NBhcZ/cleGwHd3OYNkLA2qtcDRZB801jn01zejo0qfpR66BtUzzFSvLPSMhbpBL3FVNE 4YdgbMZcITb7xXpHH0IJdbPW8zMJV/yZ9XI65hMR4/6itIv5Rbm7D6hLKnROc7T2zfdZ 4BoLxNocmPVWC3Cwc1DeDx3f1ZtbDTiYBH7km0+lVC7zuCdu/H/qtJ9QfjBWwgiMgGAr 93jw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=kSh+WRN1tSr4rPWX19ZsxOmKOuPIBQXusUyxrJybnA4=; b=gyMjXDv/tupIj5N+aaHm2Ws74Rtz5KNArBB9wlwj8vEiYDbuNi+Y0X1AufTL/bTwti dfp9KwIa8bL/euR2YffcVslFW7VE/d5w58KZvZBIFSHimXHKZdk4sUrNNMS0iIaj1uz0 AafTS4QtvQiLm5PP9ABFVNeNNDHkW5sW2+lyYbKNAQ0lT8pHOfybbli1ATevZ0ZydZPl b3iMYx5qnVqJzQRf6TvGI+giZ6avBzrVNPVfGCG8st8yJovMZsqzI6oQQTgUY8v82OSN 2n0KlELjGu2p1u182lxrt8zWRsblcujvkf2jyNfYshkNFnEUK3PO2bXRxScNwQGphs1F IiCw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l7si17032453plb.366.2019.02.18.23.57.13; Mon, 18 Feb 2019 23:57:13 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727680AbfBSH5L (ORCPT + 32 others); Tue, 19 Feb 2019 02:57:11 -0500 Received: from szxga05-in.huawei.com ([45.249.212.191]:3781 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727298AbfBSH5I (ORCPT ); Tue, 19 Feb 2019 02:57:08 -0500 Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id C2A23C5DFA5D557064F3; Tue, 19 Feb 2019 15:57:05 +0800 (CST) Received: from HGHY1l002753561.china.huawei.com (10.177.23.164) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.408.0; Tue, 19 Feb 2019 15:56:56 +0800 From: Zhen Lei To: Jean-Philippe Brucker , Robin Murphy , Will Deacon , Joerg Roedel , linux-arm-kernel , iommu , linux-kernel CC: Zhen Lei Subject: [PATCH 3/5] iommu/arm-smmu-v3: add macro xxx_SIZE to replace xxx_DWORDS shift Date: Tue, 19 Feb 2019 15:54:41 +0800 Message-ID: <20190219075443.17732-4-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.19.2.windows.1 In-Reply-To: <20190219075443.17732-1-thunder.leizhen@huawei.com> References: <20190219075443.17732-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.23.164] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The (STRTAB_L1_DESC_DWORDS << 3) appears more than 1 times, replace it with STRTAB_L1_DESC_SIZE to eliminate the duplication. And the latter seems more clear when it's used to calculate memory size. And the same is true for STRTAB_STE_DWORDS and CTXDESC_CD_DWORDS. Signed-off-by: Zhen Lei --- drivers/iommu/arm-smmu-v3.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) -- 1.8.3 diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index c3c4ff2..5bb5dcd 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -202,10 +202,12 @@ #define STRTAB_SPLIT 8 #define STRTAB_L1_DESC_DWORDS 1 +#define STRTAB_L1_DESC_SIZE (STRTAB_L1_DESC_DWORDS << 3) #define STRTAB_L1_DESC_SPAN GENMASK_ULL(4, 0) #define STRTAB_L1_DESC_L2PTR_MASK GENMASK_ULL(51, 6) #define STRTAB_STE_DWORDS 8 +#define STRTAB_STE_SIZE (STRTAB_STE_DWORDS << 3) #define STRTAB_STE_0_V (1UL << 0) #define STRTAB_STE_0_CFG GENMASK_ULL(3, 1) #define STRTAB_STE_0_CFG_ABORT 0 @@ -251,6 +253,7 @@ /* Context descriptor (stage-1 only) */ #define CTXDESC_CD_DWORDS 8 +#define CTXDESC_CD_SIZE (CTXDESC_CD_DWORDS << 3) #define CTXDESC_CD_0_TCR_T0SZ GENMASK_ULL(5, 0) #define ARM64_TCR_T0SZ GENMASK_ULL(5, 0) #define CTXDESC_CD_0_TCR_TG0 GENMASK_ULL(7, 6) @@ -1563,7 +1566,7 @@ static void arm_smmu_domain_free(struct iommu_domain *domain) if (cfg->cdptr) { dmam_free_coherent(smmu_domain->smmu->dev, - CTXDESC_CD_DWORDS << 3, + CTXDESC_CD_SIZE, cfg->cdptr, cfg->cdptr_dma); @@ -1590,7 +1593,7 @@ static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain, if (asid < 0) return asid; - cfg->cdptr = dmam_alloc_coherent(smmu->dev, CTXDESC_CD_DWORDS << 3, + cfg->cdptr = dmam_alloc_coherent(smmu->dev, CTXDESC_CD_SIZE, &cfg->cdptr_dma, GFP_KERNEL | __GFP_ZERO); if (!cfg->cdptr) { @@ -2176,7 +2179,7 @@ static int arm_smmu_init_l1_strtab(struct arm_smmu_device *smmu) arm_smmu_init_dummy_l2_strtab(smmu, i << STRTAB_SPLIT); } else { arm_smmu_write_strtab_l1_desc(strtab, &cfg->l1_desc[i]); - strtab += STRTAB_L1_DESC_DWORDS << 3; + strtab += STRTAB_L1_DESC_SIZE; } } @@ -2201,7 +2204,7 @@ static int arm_smmu_init_strtab_2lvl(struct arm_smmu_device *smmu) "2-level strtab only covers %u/%u bits of SID\n", size, smmu->sid_bits); - l1size = cfg->num_l1_ents * (STRTAB_L1_DESC_DWORDS << 3); + l1size = cfg->num_l1_ents * STRTAB_L1_DESC_SIZE; strtab = dmam_alloc_coherent(smmu->dev, l1size, &cfg->strtab_dma, GFP_KERNEL | __GFP_ZERO); if (!strtab) { @@ -2228,7 +2231,7 @@ static int arm_smmu_init_strtab_linear(struct arm_smmu_device *smmu) u32 size; struct arm_smmu_strtab_cfg *cfg = &smmu->strtab_cfg; - size = (1 << smmu->sid_bits) * (STRTAB_STE_DWORDS << 3); + size = (1 << smmu->sid_bits) * STRTAB_STE_SIZE; strtab = dmam_alloc_coherent(smmu->dev, size, &cfg->strtab_dma, GFP_KERNEL | __GFP_ZERO); if (!strtab) { From patchwork Tue Feb 19 07:54:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhen Lei X-Patchwork-Id: 158694 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp3377743jaa; Mon, 18 Feb 2019 23:57:28 -0800 (PST) X-Google-Smtp-Source: AHgI3Ibm6aah36UchD1J4XpYdWgyCvXG0AMjAaM8uRESR2Dk0SvFmrqF7qbCKp0Q5KRSunJYLYJt X-Received: by 2002:a62:4754:: with SMTP id u81mr11716371pfa.66.1550563048708; Mon, 18 Feb 2019 23:57:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550563048; cv=none; d=google.com; s=arc-20160816; b=OKOWibDqGbszcuN71OwWhs72UcWCekI78jkXuUMn+Pf9R9orm2ILFMk8exkBFZnt+s vjzyjkcGdHcxY5BEIEMn7xDDzD2KvObcJ2FcT2om/hWHa8okrBlp0QLSmGNEfrpn4e62 HI0Wj0Bk0aeDU0d8jyJktdUvzB+5uIJ6Y2HxBvpkd34Uemd7ccYVcGWCOTGx81PZxz/C AeQ7EgjIHs2P/9jjq8qRp6Umwa1Gj9qMuqu2BwKBFkpdLZvSPwLiCPS+4VKIJl9rAdyw 92hTdmEdC3uLH2YXu4nrIGnGAnP7WgjqFYRSe0SOJCO7AW8MihtpkuE2mP2BoidOiLdD 0q8w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=XnMsyeW+OzPD+PGeYjVhm2LrHnKsqi+vpIguDJN7AFA=; b=jY6204juw6V+kiFzSrZXeDLXfgzjSG+EE7HFojQ8GEHIo1KJEaki5mL+J4DwMOXVRj DtK3KuIpwPmuAk83vsk9si61ZR9dDJBsqn5kyWFwKSjGtpcoxVqHDZ4gMAutuAjfeY2i YUCrYbp7Vs7NMqBD7FoD+5zQyBKZlKjondiwo5JpOiNaL24Wq+Ggt41UeuhEb6kw1/3G xvJ8TPaZsd9WywPhJ2bWl6OI63X9Il7hVdab3tAyGIoLnFKvhhCNfLjYVU20l5SA8CG+ YkbFKdQ4W+XbGdapOwmLQ5z+1U87wcgzczoWycguLvlMfYn45lF6n8bZkR+Rxwixrhhz krJQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k5si14470355pfi.176.2019.02.18.23.57.28; Mon, 18 Feb 2019 23:57:28 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727513AbfBSH5I (ORCPT + 32 others); Tue, 19 Feb 2019 02:57:08 -0500 Received: from szxga05-in.huawei.com ([45.249.212.191]:3779 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727438AbfBSH5H (ORCPT ); Tue, 19 Feb 2019 02:57:07 -0500 Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id B5739DA62C566277D21B; Tue, 19 Feb 2019 15:57:05 +0800 (CST) Received: from HGHY1l002753561.china.huawei.com (10.177.23.164) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.408.0; Tue, 19 Feb 2019 15:56:57 +0800 From: Zhen Lei To: Jean-Philippe Brucker , Robin Murphy , Will Deacon , Joerg Roedel , linux-arm-kernel , iommu , linux-kernel CC: Zhen Lei Subject: [PATCH 4/5] iommu/arm-smmu-v3: move arm_smmu_get_step_for_sid() a little ahead Date: Tue, 19 Feb 2019 15:54:42 +0800 Message-ID: <20190219075443.17732-5-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.19.2.windows.1 In-Reply-To: <20190219075443.17732-1-thunder.leizhen@huawei.com> References: <20190219075443.17732-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.23.164] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org No functional change, just prepare for the next patch. Signed-off-by: Zhen Lei --- drivers/iommu/arm-smmu-v3.c | 44 ++++++++++++++++++++++---------------------- 1 file changed, 22 insertions(+), 22 deletions(-) -- 1.8.3 diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index 5bb5dcd..84adecc 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -1273,6 +1273,28 @@ static int arm_smmu_init_dummy_l2_strtab(struct arm_smmu_device *smmu, u32 sid) return __arm_smmu_init_l2_strtab(smmu, sid, &dummy_desc); } +static __le64 *arm_smmu_get_step_for_sid(struct arm_smmu_device *smmu, u32 sid) +{ + __le64 *step; + struct arm_smmu_strtab_cfg *cfg = &smmu->strtab_cfg; + + if (smmu->features & ARM_SMMU_FEAT_2_LVL_STRTAB) { + struct arm_smmu_strtab_l1_desc *l1_desc; + int idx; + + /* Two-level walk */ + idx = (sid >> STRTAB_SPLIT) * STRTAB_L1_DESC_DWORDS; + l1_desc = &cfg->l1_desc[idx]; + idx = (sid & ((1 << STRTAB_SPLIT) - 1)) * STRTAB_STE_DWORDS; + step = &l1_desc->l2ptr[idx]; + } else { + /* Simple linear lookup */ + step = &cfg->strtab[sid * STRTAB_STE_DWORDS]; + } + + return step; +} + /* IRQ and event handlers */ static irqreturn_t arm_smmu_evtq_thread(int irq, void *dev) { @@ -1704,28 +1726,6 @@ static int arm_smmu_domain_finalise(struct iommu_domain *domain) return 0; } -static __le64 *arm_smmu_get_step_for_sid(struct arm_smmu_device *smmu, u32 sid) -{ - __le64 *step; - struct arm_smmu_strtab_cfg *cfg = &smmu->strtab_cfg; - - if (smmu->features & ARM_SMMU_FEAT_2_LVL_STRTAB) { - struct arm_smmu_strtab_l1_desc *l1_desc; - int idx; - - /* Two-level walk */ - idx = (sid >> STRTAB_SPLIT) * STRTAB_L1_DESC_DWORDS; - l1_desc = &cfg->l1_desc[idx]; - idx = (sid & ((1 << STRTAB_SPLIT) - 1)) * STRTAB_STE_DWORDS; - step = &l1_desc->l2ptr[idx]; - } else { - /* Simple linear lookup */ - step = &cfg->strtab[sid * STRTAB_STE_DWORDS]; - } - - return step; -} - static void arm_smmu_install_ste_for_dev(struct iommu_fwspec *fwspec) { int i, j; From patchwork Tue Feb 19 07:54:43 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhen Lei X-Patchwork-Id: 158690 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp3377530jaa; Mon, 18 Feb 2019 23:57:11 -0800 (PST) X-Google-Smtp-Source: AHgI3IbY8/qX91I+xxZk/yiqREPyI1AinkvLpv/yJwA2cWOwCjG/WfoBIqfbQhGI1uhL3MXfjrny X-Received: by 2002:a62:bd17:: with SMTP id a23mr27847259pff.233.1550563031657; Mon, 18 Feb 2019 23:57:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550563031; cv=none; d=google.com; s=arc-20160816; b=VuvJgtH5QXg6Oop2cY66sPBaS4L2bWyFjX0nT0Y3B76aU/RZZ23IrknGedIjIiXces +PPcC6pYL937fIm7psz1iwlDkVbue8nl86HFtriARVv+phQcDQlVAfXjZAtZ/2N3T1H+ x7IlF2+MT53g+0bjUVo2fKyKRUowyXto+vA7ao/fTuwn8OSY4kb9dzhDMXFNQdrBRp6g hKZwcmh10PMfS9LrkFDAgbiRry+tDx8W8bSWCiq77xe0Y0ZCLhSFeu0ezee+jdyO0wtC UHv6Jf/nd4fm9u4mZVND+kokF4237IJW/4uLmY4GytJqDPzRFPZbyWKt601ziZ3HZP5t O5dQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=fLmVF8n4eVKFdo+gaycIFWnWmYCsSEhrSNShmPG2vJo=; b=d/v16qMrtp904f1q6kq1Gu3hKaQTWRaavJQMq4Ovd0al/odxx5B1IZ2M7ABeDPbuzl Vfcoznpy764uNxTgmZ9OrOQc/XryZAUTNSJXwQOhPGnsSgRALK8AmY0r4ViMuIy5L5aO fjuBUe2D/4xg0Jea39lzhETkBNc0fQQXOtbiLQDliKFH1FNP8GWD4gwxCsHAk0sQh6rB gHk0DZnz/EuV32Vo/yKdHBXdNkUQqIn7NHjT53h/NYAQIVhBymPNQTcbaZWSba+gqH4G dTFrR/ENS6/ngu89gZkzu/IJn7GAOdrAsgGS/ahbqYfFPt2xuILDUg5l+v+NJ3w7XrDe FaWA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t5si14972404pfb.67.2019.02.18.23.57.11; Mon, 18 Feb 2019 23:57:11 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727634AbfBSH5K (ORCPT + 32 others); Tue, 19 Feb 2019 02:57:10 -0500 Received: from szxga05-in.huawei.com ([45.249.212.191]:3782 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727417AbfBSH5I (ORCPT ); Tue, 19 Feb 2019 02:57:08 -0500 Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id C81D06C226B520B95EC4; Tue, 19 Feb 2019 15:57:05 +0800 (CST) Received: from HGHY1l002753561.china.huawei.com (10.177.23.164) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.408.0; Tue, 19 Feb 2019 15:56:57 +0800 From: Zhen Lei To: Jean-Philippe Brucker , Robin Murphy , Will Deacon , Joerg Roedel , linux-arm-kernel , iommu , linux-kernel CC: Zhen Lei Subject: [PATCH 5/5] iommu/arm-smmu-v3: workaround for STE abort in kdump kernel Date: Tue, 19 Feb 2019 15:54:43 +0800 Message-ID: <20190219075443.17732-6-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.19.2.windows.1 In-Reply-To: <20190219075443.17732-1-thunder.leizhen@huawei.com> References: <20190219075443.17732-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.23.164] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Some boards may not implement the STE.config=0b000 correctly, it also reports event C_BAD_STE when a transaction incoming. To make kdump kernel can be worked well in this situation, backup the strtab_base which is used in the first kernel, to make the unexpected devices can reuse the old mapping if we detected the STE.config=0b000 take no effect. Signed-off-by: Zhen Lei --- drivers/iommu/arm-smmu-v3.c | 100 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 100 insertions(+) -- 1.8.3 diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index 84adecc..4e95710 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -335,6 +335,9 @@ #define EVTQ_MAX_SZ_SHIFT 7 #define EVTQ_0_ID GENMASK_ULL(7, 0) +#define EVTQ_0_ID_C_BAD_STE 0x4 +#define EVTQ_0_SSV GENMASK_ULL(11, 11) +#define EVTQ_0_SID GENMASK_ULL(63, 32) /* PRI queue */ #define PRIQ_ENT_DWORDS 2 @@ -525,6 +528,7 @@ struct arm_smmu_strtab_ent { struct arm_smmu_strtab_cfg { __le64 *strtab; dma_addr_t strtab_dma; + dma_addr_t former_strtab_dma; struct arm_smmu_strtab_l1_desc *l1_desc; unsigned int num_l1_ents; @@ -1295,6 +1299,95 @@ static __le64 *arm_smmu_get_step_for_sid(struct arm_smmu_device *smmu, u32 sid) return step; } +/* + * This function is only called in the kdump kernel, and mainly because of the + * smmu hardware feature "ste abort" is not effective. + * + * The first kernel flushed all cache before start the secondary kernel, so + * it's safe base on ioremap() to access the former smmu tables. + * + * If any error detected, just simply give up the attempt, directly return + * without any error reported. + */ +static void arm_smmu_ste_abort_quirks(struct arm_smmu_device *smmu, u64 evt0) +{ + int i; + __le64 *dst, *src; + u64 val, paddr; + u32 sid = FIELD_GET(EVTQ_0_SID, evt0); + struct arm_smmu_strtab_cfg *cfg = &smmu->strtab_cfg; + + /* SubStreamID is not support yet */ + if (FIELD_GET(EVTQ_0_SSV, evt0)) + return; + + /* + * If no device within this L2ST range has been added, the L1STD.L2Ptr + * still point to the dummy L2ST, we should allocate one now. + */ + if (smmu->features & ARM_SMMU_FEAT_2_LVL_STRTAB) { + int idx, ret; + + idx = (sid >> STRTAB_SPLIT) * STRTAB_L1_DESC_DWORDS; + if (!cfg->l1_desc[idx].l2ptr) { + ret = arm_smmu_init_l2_strtab(smmu, sid); + if (ret) + return; + } + } + + dst = arm_smmu_get_step_for_sid(smmu, sid); + val = le64_to_cpu(dst[0]); + if (FIELD_GET(STRTAB_STE_0_CFG, val) != STRTAB_STE_0_CFG_ABORT) + return; + + /* The value of SMMU_STRTAB_BASE maybe corrupted, sanity check it */ + if (cfg->former_strtab_dma & ~(STRTAB_BASE_RA | STRTAB_BASE_ADDR_MASK)) + return; + + /* Find the STE base address of "sid" */ + if (smmu->features & ARM_SMMU_FEAT_2_LVL_STRTAB) { + u32 span; + + paddr = cfg->former_strtab_dma + + (sid >> STRTAB_SPLIT) * STRTAB_L1_DESC_SIZE; + src = ioremap(paddr, STRTAB_L1_DESC_SIZE); + if (!src) + return; + + val = le64_to_cpu(*src); + paddr = val & STRTAB_L1_DESC_L2PTR_MASK; + span = val & STRTAB_L1_DESC_SPAN; + iounmap(src); + + /* The content of L1STD maybe corrupted, sanity check it */ + if (val & ~(STRTAB_L1_DESC_L2PTR_MASK | STRTAB_L1_DESC_SPAN)) + return; + paddr += (sid & ((1 << STRTAB_SPLIT) - 1)) * STRTAB_STE_SIZE; + } else { + paddr = cfg->former_strtab_dma + (sid * STRTAB_STE_SIZE); + } + + src = ioremap(paddr, STRTAB_STE_SIZE); + if (!src) + return; + + /* + * Copy the former STE content, so that the device can base the former + * mapping to access "memory", and does not report any event again. + * + * Please note that, the "memory" is legally allocated in the first + * kernel, so that it will not corrupt the memory of current secondary + * kernel. + */ + for (i = 1; i < STRTAB_STE_DWORDS; i++) + dst[i] = src[i]; + arm_smmu_sync_ste_for_sid(smmu, sid); + dst[0] = src[0]; + arm_smmu_sync_ste_for_sid(smmu, sid); + iounmap(src); +} + /* IRQ and event handlers */ static irqreturn_t arm_smmu_evtq_thread(int irq, void *dev) { @@ -1312,6 +1405,8 @@ static irqreturn_t arm_smmu_evtq_thread(int irq, void *dev) dev_info(smmu->dev, "\t0x%016llx\n", (unsigned long long)evt[i]); + if ((id == EVTQ_0_ID_C_BAD_STE) && is_kdump_kernel()) + arm_smmu_ste_abort_quirks(smmu, evt[0]); } /* @@ -2491,6 +2586,7 @@ static int arm_smmu_device_reset(struct arm_smmu_device *smmu, bool bypass) { int ret; u32 reg, enables; + u64 reg64; struct arm_smmu_cmdq_ent cmd; /* Clear CR0 and sync (disables SMMU and queue processing) */ @@ -2519,6 +2615,10 @@ static int arm_smmu_device_reset(struct arm_smmu_device *smmu, bool bypass) reg = CR2_PTM | CR2_RECINVSID | CR2_E2H; writel_relaxed(reg, smmu->base + ARM_SMMU_CR2); + /* save the former strtab base */ + reg64 = readq_relaxed(smmu->base + ARM_SMMU_STRTAB_BASE); + smmu->strtab_cfg.former_strtab_dma = reg64 & STRTAB_BASE_ADDR_MASK; + /* Stream table */ writeq_relaxed(smmu->strtab_cfg.strtab_base, smmu->base + ARM_SMMU_STRTAB_BASE);