From patchwork Wed Sep 28 12:27:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivasa Rao Mandadapu X-Patchwork-Id: 610330 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EE5ABC6FA8E for ; Wed, 28 Sep 2022 12:29:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233582AbiI1M3e (ORCPT ); Wed, 28 Sep 2022 08:29:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36468 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233749AbiI1M3W (ORCPT ); Wed, 28 Sep 2022 08:29:22 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E6A4691D98; Wed, 28 Sep 2022 05:29:20 -0700 (PDT) Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 28SA6GkK007835; Wed, 28 Sep 2022 12:28:37 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=kHlMIOMUC53oCCIkBATRhP63nWzIh3zAahM0TDIuoWE=; b=eLNATM9lWdHB9q6MWVV0SrYYNk/uqo1mqUvTt9wf0raCLsMhnawwx8jEKQ5C2QpK8+BW 9m7DI2z++NNRJ8ai/gJ8PiC5zAQKguKFj6EHOdnNb5JtkeHmUMcUAk0JSDUBFBnr5Z3T O6fHNmXvza9MGN1V/23h5YdNe5fqKqSYHdKXNYaDI3qZKkG5JAKGyAis5bHtL41nnVqF tDNQlaKMgbuCyQlZEc4guxyl8LwuZv8+FgC94g9CI+/nhzjzDc9Bgj5fflLfHNteuC9B +AB4DWYIfZ7jaE0efvCe56s5mxPpC19+CX+4SUnN98hCVlBqZ26I+RTKgeJWXPZzVsjJ TQ== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3jv28a406s-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Sep 2022 12:28:37 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 28SCSaLw030555 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Sep 2022 12:28:36 GMT Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Wed, 28 Sep 2022 05:28:30 -0700 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , , , , , , , , CC: Srinivasa Rao Mandadapu Subject: [PATCH v10 3/7] remoteproc: qcom: Add compatible name for SC7280 ADSP Date: Wed, 28 Sep 2022 17:57:49 +0530 Message-ID: <1664368073-13659-4-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1664368073-13659-1-git-send-email-quic_srivasam@quicinc.com> References: <1664368073-13659-1-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: LH-OCv4yCJ2ZoNXJxKZ09EijEvYz_cl1 X-Proofpoint-GUID: LH-OCv4yCJ2ZoNXJxKZ09EijEvYz_cl1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-28_05,2022-09-28_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 impostorscore=0 suspectscore=0 spamscore=0 mlxscore=0 lowpriorityscore=0 mlxlogscore=999 priorityscore=1501 malwarescore=0 clxscore=1015 adultscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2209280077 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Update adsp pil data and compatible name for loading ADSP binary on SC7280 based platforms. Signed-off-by: Srinivasa Rao Mandadapu Reviewed-by: Stephen Boyd --- Changes since V5: -- Rename adsp_sandbox_needed to has_iommu. -- Change adsp binary extension name. Changes since V3: -- Rename is_adsp_sb_needed to adsp_sandbox_needed. -- Update sc7280 compatible name entry in sorted order. Changes since V2: -- Initialize is_adsp_sb_needed flag. -- Remove empty proxy pds array. drivers/remoteproc/qcom_q6v5_adsp.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c b/drivers/remoteproc/qcom_q6v5_adsp.c index fe385e8..14a3864 100644 --- a/drivers/remoteproc/qcom_q6v5_adsp.c +++ b/drivers/remoteproc/qcom_q6v5_adsp.c @@ -701,6 +701,21 @@ static const struct adsp_pil_data adsp_resource_init = { }, }; +static const struct adsp_pil_data adsp_sc7280_resource_init = { + .crash_reason_smem = 423, + .firmware_name = "adsp.pbn", + .load_state = "adsp", + .ssr_name = "lpass", + .sysmon_name = "adsp", + .ssctl_id = 0x14, + .has_iommu = true, + .auto_boot = true, + .clk_ids = (const char*[]) { + "gcc_cfg_noc_lpass", NULL + }, + .num_clks = 1, +}; + static const struct adsp_pil_data cdsp_resource_init = { .crash_reason_smem = 601, .firmware_name = "cdsp.mdt", @@ -739,6 +754,7 @@ static const struct adsp_pil_data wpss_resource_init = { static const struct of_device_id adsp_of_match[] = { { .compatible = "qcom,qcs404-cdsp-pil", .data = &cdsp_resource_init }, + { .compatible = "qcom,sc7280-adsp-pil", .data = &adsp_sc7280_resource_init }, { .compatible = "qcom,sc7280-wpss-pil", .data = &wpss_resource_init }, { .compatible = "qcom,sdm845-adsp-pil", .data = &adsp_resource_init }, { }, From patchwork Wed Sep 28 12:27:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivasa Rao Mandadapu X-Patchwork-Id: 610329 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1681AC32771 for ; Wed, 28 Sep 2022 12:29:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233764AbiI1M3i (ORCPT ); Wed, 28 Sep 2022 08:29:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36782 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233550AbiI1M3a (ORCPT ); Wed, 28 Sep 2022 08:29:30 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4789D91D85; Wed, 28 Sep 2022 05:29:29 -0700 (PDT) Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 28SCQlYx019409; Wed, 28 Sep 2022 12:28:49 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=z3xS40VpnnGhnThjLzZ8BsCLJAxS5XIMjpjPRBeM03A=; b=E7BtKpGzdSDgcH3pst+NaebqQVw+QwBciVl70tmAj7TYVSeacWP+JvVs0+WF2tgaa5K2 X8C1HKMbyHWryM3oOJeulaaAaQFdhf1v//7ns5A3Z+09ZsHxeZT5vghlHULWOEbR1tdl mEmpvGchQR2NjAPUzHg2QpyhjkigM7QZbfnVoZ9B/VqgLa+5F+FdQO1U/pvi2nxuZgOh cbiqkYw5T0xvwbX43GPfFxioW/KxyRimJ6Ob3HKRCjKYGj9nCKOcYRPt1rsFdWslJPHc Mzj9jeN3/Pb0/k9Pu5fa/x6bdS47bLDf/wLjAlRaPz2KAIX5qfuO9gxbPPEJ8OnrpL+x Aw== Received: from nalasppmta04.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3jvja2ggtq-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Sep 2022 12:28:49 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 28SCSmeD020430 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Sep 2022 12:28:48 GMT Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Wed, 28 Sep 2022 05:28:42 -0700 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , , , , , , , , CC: Srinivasa Rao Mandadapu Subject: [PATCH v10 5/7] remoteproc: qcom: Replace hard coded values with macros Date: Wed, 28 Sep 2022 17:57:51 +0530 Message-ID: <1664368073-13659-6-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1664368073-13659-1-git-send-email-quic_srivasam@quicinc.com> References: <1664368073-13659-1-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: TpFgo_cSIcHPuK5IpnOcN4EFfLU4TUF6 X-Proofpoint-GUID: TpFgo_cSIcHPuK5IpnOcN4EFfLU4TUF6 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-28_05,2022-09-28_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 bulkscore=0 malwarescore=0 spamscore=0 priorityscore=1501 mlxscore=0 adultscore=0 clxscore=1015 phishscore=0 mlxlogscore=999 suspectscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2209280077 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Replace hard coded values of QDSP6 boot control reg params with appropriate macro names. Signed-off-by: Srinivasa Rao Mandadapu Reviewed-by: Dmitry Baryshkov Reviewed-by: Stephen Boyd Reviewed-by: Sibi Sankar --- drivers/remoteproc/qcom_q6v5_adsp.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c b/drivers/remoteproc/qcom_q6v5_adsp.c index b8cbbf7..14c94af 100644 --- a/drivers/remoteproc/qcom_q6v5_adsp.c +++ b/drivers/remoteproc/qcom_q6v5_adsp.c @@ -54,6 +54,9 @@ #define QCOM_Q6V5_RPROC_PROXY_PD_MAX 3 +#define LPASS_BOOT_CORE_START BIT(0) +#define LPASS_BOOT_CMD_START BIT(0) + struct adsp_pil_data { int crash_reason_smem; const char *firmware_name; @@ -365,10 +368,10 @@ static int adsp_start(struct rproc *rproc) writel(adsp->mem_phys >> 4, adsp->qdsp6ss_base + RST_EVB_REG); /* De-assert QDSP6 stop core. QDSP6 will execute after out of reset */ - writel(0x1, adsp->qdsp6ss_base + CORE_START_REG); + writel(LPASS_BOOT_CORE_START, adsp->qdsp6ss_base + CORE_START_REG); /* Trigger boot FSM to start QDSP6 */ - writel(0x1, adsp->qdsp6ss_base + BOOT_CMD_REG); + writel(LPASS_BOOT_CMD_START, adsp->qdsp6ss_base + BOOT_CMD_REG); /* Wait for core to come out of reset */ ret = readl_poll_timeout(adsp->qdsp6ss_base + BOOT_STATUS_REG, From patchwork Wed Sep 28 12:27:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivasa Rao Mandadapu X-Patchwork-Id: 610328 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9E5EFC32771 for ; Wed, 28 Sep 2022 12:30:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234016AbiI1MaI (ORCPT ); Wed, 28 Sep 2022 08:30:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38468 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233840AbiI1M3r (ORCPT ); Wed, 28 Sep 2022 08:29:47 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1EFF62EF01; Wed, 28 Sep 2022 05:29:42 -0700 (PDT) Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 28SA6B06000601; Wed, 28 Sep 2022 12:29:00 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=80Zx/fpfN738Afn5maYFKuP5UtNBBeyq0CUNs+Odxys=; b=QHK8rumMQb5qUKP8tXjHfDAhVwJsl2tb788lqrsymvhLgslRIjUAW4mjyty5wqadvPPG eQPkmDexnmxZFEJmuA3RHEXQpofangA1XZ/RNki0fTVxf92BDKGQAmSrqaYOha2sHllp nsTmikxdGmJDEyYPy4LvdY6gNr9Np5mVBd/7V+unLsYVHkeGKRKUwprCWDpMI+FCk5gh gp0wcNWGScdqCoy3Scy8DLtic5ePxTNxGlcjein1fADBp1g3cti4Mzal4736UmYil1/A WL2S5lUscaMeIFcpRMozhVctd+b3VqYLXBV4hw1kEEZB+6CPgWJXF8F8ssvy8VHpo8bV jA== Received: from nalasppmta02.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3jvep6sdg2-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Sep 2022 12:29:00 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 28SCT0k0028720 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Sep 2022 12:29:00 GMT Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Wed, 28 Sep 2022 05:28:54 -0700 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , , , , , , , , CC: Srinivasa Rao Mandadapu Subject: [PATCH v10 7/7] remoteproc: qcom: Add support for memory sandbox Date: Wed, 28 Sep 2022 17:57:53 +0530 Message-ID: <1664368073-13659-8-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1664368073-13659-1-git-send-email-quic_srivasam@quicinc.com> References: <1664368073-13659-1-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: zpRcH8S1zFwzgjIhWxRYP_UvGPvMMhWW X-Proofpoint-ORIG-GUID: zpRcH8S1zFwzgjIhWxRYP_UvGPvMMhWW X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-28_05,2022-09-28_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 mlxlogscore=999 mlxscore=0 spamscore=0 clxscore=1015 impostorscore=0 phishscore=0 lowpriorityscore=0 suspectscore=0 adultscore=0 malwarescore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2209280077 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Update pil driver with SMMU mapping for allowing authorised memory access to ADSP firmware, by carveout reserved adsp memory region from device tree file. Signed-off-by: Srinivasa Rao Mandadapu --- Changes since V6: -- Update smmu map and unmap function names. -- Revert adsp_ops const change. -- Move iommu check to within smmu map/unmap functions. Changes since V5: -- Remove adsp_rproc_unmap_smmu, adsp_of_unmap_smmu, adsp_of_map_smmu and adsp_rproc_map_smmu functions. -- Remove find_loaded_rsc_table call back initialization. -- Rename adsp_sandbox_needed to has_iommu. Changes since V4: -- Split the code and add appropriate APIs for resource allocation and free. -- Update adsp_unmap_smmu with missing free ops call. -- Update normalizing length value in adsp_of_unmap_smmu. Changes since V3: -- Rename is_adsp_sb_needed to adsp_sandbox_needed. -- Add smmu unmapping in error case and in adsp stop. Changes since V2: -- Replace platform_bus_type with adsp->dev->bus. -- Use API of_parse_phandle_with_args() instead of of_parse_phandle_with_fixed_args(). -- Replace adsp->is_wpss with adsp->is_adsp. -- Update error handling in adsp_start(). drivers/remoteproc/qcom_q6v5_adsp.c | 56 ++++++++++++++++++++++++++++++++++++- 1 file changed, 55 insertions(+), 1 deletion(-) diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c b/drivers/remoteproc/qcom_q6v5_adsp.c index 4e70e76..2dc850f 100644 --- a/drivers/remoteproc/qcom_q6v5_adsp.c +++ b/drivers/remoteproc/qcom_q6v5_adsp.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -48,6 +49,8 @@ #define LPASS_PWR_ON_REG 0x10 #define LPASS_HALTREQ_REG 0x0 +#define SID_MASK_DEFAULT 0xF + #define QDSP6SS_XO_CBCR 0x38 #define QDSP6SS_CORE_CBCR 0x20 #define QDSP6SS_SLEEP_CBCR 0x3c @@ -332,6 +335,47 @@ static int adsp_load(struct rproc *rproc, const struct firmware *fw) return 0; } +static void adsp_unmap_carveout(struct rproc *rproc) +{ + struct qcom_adsp *adsp = rproc->priv; + + if (adsp->has_iommu) + iommu_unmap(rproc->domain, adsp->mem_phys, adsp->mem_size); +} + +static int adsp_map_carveout(struct rproc *rproc) +{ + struct qcom_adsp *adsp = rproc->priv; + struct of_phandle_args args; + long long sid; + unsigned long iova; + int ret; + + if (!adsp->has_iommu) + return 0; + + if (!rproc->domain) + return -EINVAL; + + ret = of_parse_phandle_with_args(adsp->dev->of_node, "iommus", "#iommu-cells", 0, &args); + if (ret < 0) + return ret; + + sid = args.args[0] & SID_MASK_DEFAULT; + + /* Add SID configuration for ADSP Firmware to SMMU */ + iova = adsp->mem_phys | (sid << 32); + + ret = iommu_map(rproc->domain, iova, adsp->mem_phys, + adsp->mem_size, IOMMU_READ | IOMMU_WRITE); + if (ret) { + dev_err(adsp->dev, "Unable to map ADSP Physical Memory\n"); + return ret; + } + + return 0; +} + static int adsp_start(struct rproc *rproc) { struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv; @@ -342,9 +386,15 @@ static int adsp_start(struct rproc *rproc) if (ret) return ret; + ret = adsp_map_carveout(rproc); + if (ret) { + dev_err(adsp->dev, "ADSP smmu mapping failed\n"); + goto disable_irqs; + } + ret = clk_prepare_enable(adsp->xo); if (ret) - goto disable_irqs; + goto adsp_smmu_unmap; ret = qcom_rproc_pds_enable(adsp, adsp->proxy_pds, adsp->proxy_pd_count); @@ -400,6 +450,8 @@ static int adsp_start(struct rproc *rproc) qcom_rproc_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count); disable_xo_clk: clk_disable_unprepare(adsp->xo); +adsp_smmu_unmap: + adsp_unmap_carveout(rproc); disable_irqs: qcom_q6v5_unprepare(&adsp->q6v5); @@ -428,6 +480,8 @@ static int adsp_stop(struct rproc *rproc) if (ret) dev_err(adsp->dev, "failed to shutdown: %d\n", ret); + adsp_unmap_carveout(rproc); + handover = qcom_q6v5_unprepare(&adsp->q6v5); if (handover) qcom_adsp_pil_handover(&adsp->q6v5);