From patchwork Thu Feb 28 12:20:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 159348 Delivered-To: patch@linaro.org Received: by 2002:a02:5cc1:0:0:0:0:0 with SMTP id w62csp571813jad; Thu, 28 Feb 2019 04:22:02 -0800 (PST) X-Google-Smtp-Source: AHgI3IZHLLy8DuBsAPLapae956eHft91GyBqIhZ6DHA34YMztsfNvHZHP7UuVredMgcuHByR3qOI X-Received: by 2002:a63:5b43:: with SMTP id l3mr8145604pgm.298.1551356522187; Thu, 28 Feb 2019 04:22:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1551356522; cv=none; d=google.com; s=arc-20160816; b=tXAsO6WwQr0kZX0Kk9VQZGITnr0xZbHNf1smGzSqtQwhHYC3qgjlxTEwxuQLNEFaKI oDlmAIhJpX5A6eWfULk2/UKZe4vnT2WJo0mIjkopSi1P80/ay4ur73vlCGEDr+OOLloY PuYVrVxngycjqSdtr8014iWFwQgXAU7LlHeb30s7ybLdV9V2kIT5+s3MO8fJNgBv5xEQ hN7AnZlyVUuQEtfwkkV4KpUKS6e0SVQEMLiw3qJJ/sHG9RvAIb9yBw0XR9OGNZS/f6ux VZ/jM1yBx4EE2PRVmGUmZnhaj2Lcm4GpKMCgc1UwZfrsGFVu13yHNGU4WDtrO96rntbS 9f7g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=3oKLYEtp34qQzSU/4qu4XNpq94BvIIyZ8kLyNwL2S7o=; b=TIDehY9Vhw72tcpx3sxpxCnzas7HP3uee4vM2l2jraxLWtcdvckeDGzL0LrVaUdcqM Ejp+gyGYs/ywps3uFhnH9F0TcYm+iXPoqctDOZ6tK5zxTqO5OX69uW+TvVQsPrxDQ9A3 7VCFuM/h4S7DT1ThHsflm46Um5VgYtQuJ4PYLUljVOaR1KCCBev4gTOVtOiEj04ZjliF LwCdr5zlte5SUiikeftB9Nqe/ng/zpyTWKfqlDytNiMbX2y20UsI26ClmO7Yi+V6Npq6 sWDxh2EgfjDdhnP4HgI5TA7YRxEvtK5UgQVy3lurQzJQCneV7vYRcy4VW30Rtg8Pt8Xk KUGA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WXzC7yz4; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x18si14333331pll.104.2019.02.28.04.22.01; Thu, 28 Feb 2019 04:22:02 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WXzC7yz4; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731704AbfB1MWA (ORCPT + 31 others); Thu, 28 Feb 2019 07:22:00 -0500 Received: from mail-wm1-f68.google.com ([209.85.128.68]:54589 "EHLO mail-wm1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730975AbfB1MV7 (ORCPT ); Thu, 28 Feb 2019 07:21:59 -0500 Received: by mail-wm1-f68.google.com with SMTP id a62so9069310wmh.4 for ; Thu, 28 Feb 2019 04:21:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=3oKLYEtp34qQzSU/4qu4XNpq94BvIIyZ8kLyNwL2S7o=; b=WXzC7yz45IfIOP+gvN/XH6DTxMxDj0RV3sv2kAr3/xolDwWu0ZEH12E+fR31HCLKfn v2vGkiD/h2boJkdgBrAOHfYdVKYHCeOBvZUJ3Wg7BLfDOCBNsw6sz9dbFmZanD7wocde PjZwI5PZlfWlA7Q+lcMyNQg+lpMmmPB9wRjVfbvMHQb8OR981LB08RTHUtQyB+1PEq0h kuWC2wZAWUP3C3G102HfudoQ5EUIwyIxsRjANwSxrCO7p0FuIYsdIO2SX+8Rnuxe87Mh nI/tYasaGd/99zAwfLpCHC4rR7fVDGVZoVkVrIBaeEA966kkpRKvkfHvd0R5c4A3V02e IKxg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=3oKLYEtp34qQzSU/4qu4XNpq94BvIIyZ8kLyNwL2S7o=; b=rFje6pBqSZyKHK+F67mZiESbLYua4jTG+FMTMlXHaAP6uxHkmcpmwGzs2AQcpMJxl4 XWz0BS/u86kyAa2RKV7xGsJcBKrKzhjbQUTwB+GA8h7eFxveuy+48WcWiOaOLgLJFpUB mskmqq/HDvaRTnvsYIqSLxjQMh2KhzUmPmFj4j+5JincaL3arYTwy8uCvcgOmqW21Daj 2cQ36liMOMCC6ntXKQ+IXcvbpGVXYiIo6TLDHyGcnWr4VADoy5Anf5hK9RAHdzbn7jKY vGKWBNsHd+XI9M0EHNbv7XHvZc8D8qnAwjMDRzVqa6+12RUXYWIc4EES9AJDvpSYx5Ow OAJg== X-Gm-Message-State: AHQUAuZfIPTNTeQTi9dXaDITRw2tgg5HE3NPhY/YfOBvOVAPK2Z8zgS1 5RMqsHXlzm1p2bDwktYFxokZ+UjWBZ0= X-Received: by 2002:a7b:c777:: with SMTP id x23mr2848327wmk.71.1551356515702; Thu, 28 Feb 2019 04:21:55 -0800 (PST) Received: from localhost ([49.248.54.130]) by smtp.gmail.com with ESMTPSA id v20sm2563312wmj.2.2019.02.28.04.21.53 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 28 Feb 2019 04:21:54 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, Daniel Lezcano , David Brown , Zhang Rui Cc: linux-pm@vger.kernel.org Subject: [PATCH v2 04/24] drivers: thermal: tsens: Rename variable tmdev Date: Thu, 28 Feb 2019 17:50:54 +0530 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org tmdev seems to imply that this is a device pointer when in fact it is just private platform data for each tsens device. Rename it to priv improve code readability. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-8916.c | 16 +++--- drivers/thermal/qcom/tsens-8960.c | 82 ++++++++++++++--------------- drivers/thermal/qcom/tsens-8974.c | 16 +++--- drivers/thermal/qcom/tsens-common.c | 52 +++++++++--------- drivers/thermal/qcom/tsens-v2.c | 12 ++--- drivers/thermal/qcom/tsens.c | 80 ++++++++++++++-------------- drivers/thermal/qcom/tsens.h | 4 +- 7 files changed, 131 insertions(+), 131 deletions(-) -- 2.17.1 diff --git a/drivers/thermal/qcom/tsens-8916.c b/drivers/thermal/qcom/tsens-8916.c index 7b8f83c9a033..d4ad4082c800 100644 --- a/drivers/thermal/qcom/tsens-8916.c +++ b/drivers/thermal/qcom/tsens-8916.c @@ -39,23 +39,23 @@ #define CAL_SEL_MASK 0xe0000000 #define CAL_SEL_SHIFT 29 -static int calibrate_8916(struct tsens_priv *tmdev) +static int calibrate_8916(struct tsens_priv *priv) { int base0 = 0, base1 = 0, i; u32 p1[5], p2[5]; int mode = 0; u32 *qfprom_cdata, *qfprom_csel; - qfprom_cdata = (u32 *)qfprom_read(tmdev->dev, "calib"); + qfprom_cdata = (u32 *)qfprom_read(priv->dev, "calib"); if (IS_ERR(qfprom_cdata)) return PTR_ERR(qfprom_cdata); - qfprom_csel = (u32 *)qfprom_read(tmdev->dev, "calib_sel"); + qfprom_csel = (u32 *)qfprom_read(priv->dev, "calib_sel"); if (IS_ERR(qfprom_csel)) return PTR_ERR(qfprom_csel); mode = (qfprom_csel[0] & CAL_SEL_MASK) >> CAL_SEL_SHIFT; - dev_dbg(tmdev->dev, "calibration mode is %d\n", mode); + dev_dbg(priv->dev, "calibration mode is %d\n", mode); switch (mode) { case TWO_PT_CALIB: @@ -65,7 +65,7 @@ static int calibrate_8916(struct tsens_priv *tmdev) p2[2] = (qfprom_cdata[1] & S2_P2_MASK) >> S2_P2_SHIFT; p2[3] = (qfprom_cdata[1] & S3_P2_MASK) >> S3_P2_SHIFT; p2[4] = (qfprom_cdata[1] & S4_P2_MASK) >> S4_P2_SHIFT; - for (i = 0; i < tmdev->num_sensors; i++) + for (i = 0; i < priv->num_sensors; i++) p2[i] = ((base1 + p2[i]) << 3); /* Fall through */ case ONE_PT_CALIB2: @@ -75,18 +75,18 @@ static int calibrate_8916(struct tsens_priv *tmdev) p1[2] = (qfprom_cdata[0] & S2_P1_MASK) >> S2_P1_SHIFT; p1[3] = (qfprom_cdata[1] & S3_P1_MASK) >> S3_P1_SHIFT; p1[4] = (qfprom_cdata[1] & S4_P1_MASK) >> S4_P1_SHIFT; - for (i = 0; i < tmdev->num_sensors; i++) + for (i = 0; i < priv->num_sensors; i++) p1[i] = (((base0) + p1[i]) << 3); break; default: - for (i = 0; i < tmdev->num_sensors; i++) { + for (i = 0; i < priv->num_sensors; i++) { p1[i] = 500; p2[i] = 780; } break; } - compute_intercept_slope(tmdev, p1, p2, mode); + compute_intercept_slope(priv, p1, p2, mode); return 0; } diff --git a/drivers/thermal/qcom/tsens-8960.c b/drivers/thermal/qcom/tsens-8960.c index 7e340eea48da..8d9b721dadb6 100644 --- a/drivers/thermal/qcom/tsens-8960.c +++ b/drivers/thermal/qcom/tsens-8960.c @@ -56,21 +56,21 @@ #define TRDY_MASK BIT(7) #define TIMEOUT_US 100 -static int suspend_8960(struct tsens_priv *tmdev) +static int suspend_8960(struct tsens_priv *priv) { int ret; unsigned int mask; - struct regmap *map = tmdev->tm_map; + struct regmap *map = priv->tm_map; - ret = regmap_read(map, THRESHOLD_ADDR, &tmdev->ctx.threshold); + ret = regmap_read(map, THRESHOLD_ADDR, &priv->ctx.threshold); if (ret) return ret; - ret = regmap_read(map, CNTL_ADDR, &tmdev->ctx.control); + ret = regmap_read(map, CNTL_ADDR, &priv->ctx.control); if (ret) return ret; - if (tmdev->num_sensors > 1) + if (priv->num_sensors > 1) mask = SLP_CLK_ENA | EN; else mask = SLP_CLK_ENA_8660 | EN; @@ -82,10 +82,10 @@ static int suspend_8960(struct tsens_priv *tmdev) return 0; } -static int resume_8960(struct tsens_priv *tmdev) +static int resume_8960(struct tsens_priv *priv) { int ret; - struct regmap *map = tmdev->tm_map; + struct regmap *map = priv->tm_map; ret = regmap_update_bits(map, CNTL_ADDR, SW_RST, SW_RST); if (ret) @@ -95,80 +95,80 @@ static int resume_8960(struct tsens_priv *tmdev) * Separate CONFIG restore is not needed only for 8660 as * config is part of CTRL Addr and its restored as such */ - if (tmdev->num_sensors > 1) { + if (priv->num_sensors > 1) { ret = regmap_update_bits(map, CONFIG_ADDR, CONFIG_MASK, CONFIG); if (ret) return ret; } - ret = regmap_write(map, THRESHOLD_ADDR, tmdev->ctx.threshold); + ret = regmap_write(map, THRESHOLD_ADDR, priv->ctx.threshold); if (ret) return ret; - ret = regmap_write(map, CNTL_ADDR, tmdev->ctx.control); + ret = regmap_write(map, CNTL_ADDR, priv->ctx.control); if (ret) return ret; return 0; } -static int enable_8960(struct tsens_priv *tmdev, int id) +static int enable_8960(struct tsens_priv *priv, int id) { int ret; u32 reg, mask; - ret = regmap_read(tmdev->tm_map, CNTL_ADDR, ®); + ret = regmap_read(priv->tm_map, CNTL_ADDR, ®); if (ret) return ret; mask = BIT(id + SENSOR0_SHIFT); - ret = regmap_write(tmdev->tm_map, CNTL_ADDR, reg | SW_RST); + ret = regmap_write(priv->tm_map, CNTL_ADDR, reg | SW_RST); if (ret) return ret; - if (tmdev->num_sensors > 1) + if (priv->num_sensors > 1) reg |= mask | SLP_CLK_ENA | EN; else reg |= mask | SLP_CLK_ENA_8660 | EN; - ret = regmap_write(tmdev->tm_map, CNTL_ADDR, reg); + ret = regmap_write(priv->tm_map, CNTL_ADDR, reg); if (ret) return ret; return 0; } -static void disable_8960(struct tsens_priv *tmdev) +static void disable_8960(struct tsens_priv *priv) { int ret; u32 reg_cntl; u32 mask; - mask = GENMASK(tmdev->num_sensors - 1, 0); + mask = GENMASK(priv->num_sensors - 1, 0); mask <<= SENSOR0_SHIFT; mask |= EN; - ret = regmap_read(tmdev->tm_map, CNTL_ADDR, ®_cntl); + ret = regmap_read(priv->tm_map, CNTL_ADDR, ®_cntl); if (ret) return; reg_cntl &= ~mask; - if (tmdev->num_sensors > 1) + if (priv->num_sensors > 1) reg_cntl &= ~SLP_CLK_ENA; else reg_cntl &= ~SLP_CLK_ENA_8660; - regmap_write(tmdev->tm_map, CNTL_ADDR, reg_cntl); + regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl); } -static int init_8960(struct tsens_priv *tmdev) +static int init_8960(struct tsens_priv *priv) { int ret, i; u32 reg_cntl; - tmdev->tm_map = dev_get_regmap(tmdev->dev, NULL); - if (!tmdev->tm_map) + priv->tm_map = dev_get_regmap(priv->dev, NULL); + if (!priv->tm_map) return -ENODEV; /* @@ -177,21 +177,21 @@ static int init_8960(struct tsens_priv *tmdev) * but the control registers stay in the same place, i.e * directly after the first 5 status registers. */ - for (i = 0; i < tmdev->num_sensors; i++) { + for (i = 0; i < priv->num_sensors; i++) { if (i >= 5) - tmdev->sensor[i].status = S0_STATUS_ADDR + 40; - tmdev->sensor[i].status += i * 4; + priv->sensor[i].status = S0_STATUS_ADDR + 40; + priv->sensor[i].status += i * 4; } reg_cntl = SW_RST; - ret = regmap_update_bits(tmdev->tm_map, CNTL_ADDR, SW_RST, reg_cntl); + ret = regmap_update_bits(priv->tm_map, CNTL_ADDR, SW_RST, reg_cntl); if (ret) return ret; - if (tmdev->num_sensors > 1) { + if (priv->num_sensors > 1) { reg_cntl |= SLP_CLK_ENA | (MEASURE_PERIOD << 18); reg_cntl &= ~SW_RST; - ret = regmap_update_bits(tmdev->tm_map, CONFIG_ADDR, + ret = regmap_update_bits(priv->tm_map, CONFIG_ADDR, CONFIG_MASK, CONFIG); } else { reg_cntl |= SLP_CLK_ENA_8660 | (MEASURE_PERIOD << 16); @@ -199,30 +199,30 @@ static int init_8960(struct tsens_priv *tmdev) reg_cntl |= CONFIG_8660 << CONFIG_SHIFT_8660; } - reg_cntl |= GENMASK(tmdev->num_sensors - 1, 0) << SENSOR0_SHIFT; - ret = regmap_write(tmdev->tm_map, CNTL_ADDR, reg_cntl); + reg_cntl |= GENMASK(priv->num_sensors - 1, 0) << SENSOR0_SHIFT; + ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl); if (ret) return ret; reg_cntl |= EN; - ret = regmap_write(tmdev->tm_map, CNTL_ADDR, reg_cntl); + ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl); if (ret) return ret; return 0; } -static int calibrate_8960(struct tsens_priv *tmdev) +static int calibrate_8960(struct tsens_priv *priv) { int i; char *data; - ssize_t num_read = tmdev->num_sensors; - struct tsens_sensor *s = tmdev->sensor; + ssize_t num_read = priv->num_sensors; + struct tsens_sensor *s = priv->sensor; - data = qfprom_read(tmdev->dev, "calib"); + data = qfprom_read(priv->dev, "calib"); if (IS_ERR(data)) - data = qfprom_read(tmdev->dev, "calib_backup"); + data = qfprom_read(priv->dev, "calib_backup"); if (IS_ERR(data)) return PTR_ERR(data); @@ -243,21 +243,21 @@ static inline int code_to_mdegC(u32 adc_code, const struct tsens_sensor *s) return adc_code * slope + offset; } -static int get_temp_8960(struct tsens_priv *tmdev, int id, int *temp) +static int get_temp_8960(struct tsens_priv *priv, int id, int *temp) { int ret; u32 code, trdy; - const struct tsens_sensor *s = &tmdev->sensor[id]; + const struct tsens_sensor *s = &priv->sensor[id]; unsigned long timeout; timeout = jiffies + usecs_to_jiffies(TIMEOUT_US); do { - ret = regmap_read(tmdev->tm_map, INT_STATUS_ADDR, &trdy); + ret = regmap_read(priv->tm_map, INT_STATUS_ADDR, &trdy); if (ret) return ret; if (!(trdy & TRDY_MASK)) continue; - ret = regmap_read(tmdev->tm_map, s->status, &code); + ret = regmap_read(priv->tm_map, s->status, &code); if (ret) return ret; *temp = code_to_mdegC(code, s); diff --git a/drivers/thermal/qcom/tsens-8974.c b/drivers/thermal/qcom/tsens-8974.c index f983f98f2176..303157fd00be 100644 --- a/drivers/thermal/qcom/tsens-8974.c +++ b/drivers/thermal/qcom/tsens-8974.c @@ -91,7 +91,7 @@ #define BIT_APPEND 0x3 -static int calibrate_8974(struct tsens_priv *tmdev) +static int calibrate_8974(struct tsens_priv *priv) { int base1 = 0, base2 = 0, i; u32 p1[11], p2[11]; @@ -99,11 +99,11 @@ static int calibrate_8974(struct tsens_priv *tmdev) u32 *calib, *bkp; u32 calib_redun_sel; - calib = (u32 *)qfprom_read(tmdev->dev, "calib"); + calib = (u32 *)qfprom_read(priv->dev, "calib"); if (IS_ERR(calib)) return PTR_ERR(calib); - bkp = (u32 *)qfprom_read(tmdev->dev, "calib_backup"); + bkp = (u32 *)qfprom_read(priv->dev, "calib_backup"); if (IS_ERR(bkp)) return PTR_ERR(bkp); @@ -184,25 +184,25 @@ static int calibrate_8974(struct tsens_priv *tmdev) switch (mode) { case ONE_PT_CALIB: - for (i = 0; i < tmdev->num_sensors; i++) + for (i = 0; i < priv->num_sensors; i++) p1[i] += (base1 << 2) | BIT_APPEND; break; case TWO_PT_CALIB: - for (i = 0; i < tmdev->num_sensors; i++) { + for (i = 0; i < priv->num_sensors; i++) { p2[i] += base2; p2[i] <<= 2; p2[i] |= BIT_APPEND; } /* Fall through */ case ONE_PT_CALIB2: - for (i = 0; i < tmdev->num_sensors; i++) { + for (i = 0; i < priv->num_sensors; i++) { p1[i] += base1; p1[i] <<= 2; p1[i] |= BIT_APPEND; } break; default: - for (i = 0; i < tmdev->num_sensors; i++) + for (i = 0; i < priv->num_sensors; i++) p2[i] = 780; p1[0] = 502; p1[1] = 509; @@ -218,7 +218,7 @@ static int calibrate_8974(struct tsens_priv *tmdev) break; } - compute_intercept_slope(tmdev, p1, p2, mode); + compute_intercept_slope(priv, p1, p2, mode); return 0; } diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c index 128ee3621b41..af87216ee407 100644 --- a/drivers/thermal/qcom/tsens-common.c +++ b/drivers/thermal/qcom/tsens-common.c @@ -46,18 +46,18 @@ char *qfprom_read(struct device *dev, const char *cname) * and offset values are derived from tz->tzp->slope and tz->tzp->offset * resp. */ -void compute_intercept_slope(struct tsens_priv *tmdev, u32 *p1, +void compute_intercept_slope(struct tsens_priv *priv, u32 *p1, u32 *p2, u32 mode) { int i; int num, den; - for (i = 0; i < tmdev->num_sensors; i++) { - dev_dbg(tmdev->dev, + for (i = 0; i < priv->num_sensors; i++) { + dev_dbg(priv->dev, "sensor%d - data_point1:%#x data_point2:%#x\n", i, p1[i], p2[i]); - tmdev->sensor[i].slope = SLOPE_DEFAULT; + priv->sensor[i].slope = SLOPE_DEFAULT; if (mode == TWO_PT_CALIB) { /* * slope (m) = adc_code2 - adc_code1 (y2 - y1)/ @@ -66,13 +66,13 @@ void compute_intercept_slope(struct tsens_priv *tmdev, u32 *p1, num = p2[i] - p1[i]; num *= SLOPE_FACTOR; den = CAL_DEGC_PT2 - CAL_DEGC_PT1; - tmdev->sensor[i].slope = num / den; + priv->sensor[i].slope = num / den; } - tmdev->sensor[i].offset = (p1[i] * SLOPE_FACTOR) - + priv->sensor[i].offset = (p1[i] * SLOPE_FACTOR) - (CAL_DEGC_PT1 * - tmdev->sensor[i].slope); - dev_dbg(tmdev->dev, "offset:%d\n", tmdev->sensor[i].offset); + priv->sensor[i].slope); + dev_dbg(priv->dev, "offset:%d\n", priv->sensor[i].offset); } } @@ -95,15 +95,15 @@ static inline int code_to_degc(u32 adc_code, const struct tsens_sensor *s) return degc; } -int get_temp_common(struct tsens_priv *tmdev, int id, int *temp) +int get_temp_common(struct tsens_priv *priv, int id, int *temp) { - struct tsens_sensor *s = &tmdev->sensor[id]; + struct tsens_sensor *s = &priv->sensor[id]; u32 code; unsigned int status_reg; int last_temp = 0, ret; - status_reg = tmdev->tm_offset + STATUS_OFFSET + s->hw_id * SN_ADDR_OFFSET; - ret = regmap_read(tmdev->tm_map, status_reg, &code); + status_reg = priv->tm_offset + STATUS_OFFSET + s->hw_id * SN_ADDR_OFFSET; + ret = regmap_read(priv->tm_map, status_reg, &code); if (ret) return ret; last_temp = code & SN_ST_TEMP_MASK; @@ -127,34 +127,34 @@ static const struct regmap_config tsens_srot_config = { .reg_stride = 4, }; -int __init init_common(struct tsens_priv *tmdev) +int __init init_common(struct tsens_priv *priv) { void __iomem *tm_base, *srot_base; struct resource *res; u32 code; int ret; - struct platform_device *op = of_find_device_by_node(tmdev->dev->of_node); - u16 ctrl_offset = tmdev->reg_offsets[SROT_CTRL_OFFSET]; + struct platform_device *op = of_find_device_by_node(priv->dev->of_node); + u16 ctrl_offset = priv->reg_offsets[SROT_CTRL_OFFSET]; if (!op) return -EINVAL; if (op->num_resources > 1) { /* DT with separate SROT and TM address space */ - tmdev->tm_offset = 0; + priv->tm_offset = 0; res = platform_get_resource(op, IORESOURCE_MEM, 1); srot_base = devm_ioremap_resource(&op->dev, res); if (IS_ERR(srot_base)) return PTR_ERR(srot_base); - tmdev->srot_map = devm_regmap_init_mmio(tmdev->dev, srot_base, + priv->srot_map = devm_regmap_init_mmio(priv->dev, srot_base, &tsens_srot_config); - if (IS_ERR(tmdev->srot_map)) - return PTR_ERR(tmdev->srot_map); + if (IS_ERR(priv->srot_map)) + return PTR_ERR(priv->srot_map); } else { /* old DTs where SROT and TM were in a contiguous 2K block */ - tmdev->tm_offset = 0x1000; + priv->tm_offset = 0x1000; } res = platform_get_resource(op, IORESOURCE_MEM, 0); @@ -162,16 +162,16 @@ int __init init_common(struct tsens_priv *tmdev) if (IS_ERR(tm_base)) return PTR_ERR(tm_base); - tmdev->tm_map = devm_regmap_init_mmio(tmdev->dev, tm_base, &tsens_config); - if (IS_ERR(tmdev->tm_map)) - return PTR_ERR(tmdev->tm_map); + priv->tm_map = devm_regmap_init_mmio(priv->dev, tm_base, &tsens_config); + if (IS_ERR(priv->tm_map)) + return PTR_ERR(priv->tm_map); - if (tmdev->srot_map) { - ret = regmap_read(tmdev->srot_map, ctrl_offset, &code); + if (priv->srot_map) { + ret = regmap_read(priv->srot_map, ctrl_offset, &code); if (ret) return ret; if (!(code & TSENS_EN)) { - dev_err(tmdev->dev, "tsens device is not enabled\n"); + dev_err(priv->dev, "tsens device is not enabled\n"); return -ENODEV; } } diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v2.c index d812fd3f4567..8b700772d903 100644 --- a/drivers/thermal/qcom/tsens-v2.c +++ b/drivers/thermal/qcom/tsens-v2.c @@ -12,16 +12,16 @@ #define LAST_TEMP_MASK 0xfff #define STATUS_VALID_BIT BIT(21) -static int get_temp_tsens_v2(struct tsens_priv *tmdev, int id, int *temp) +static int get_temp_tsens_v2(struct tsens_priv *priv, int id, int *temp) { - struct tsens_sensor *s = &tmdev->sensor[id]; + struct tsens_sensor *s = &priv->sensor[id]; u32 code; unsigned int status_reg; u32 last_temp = 0, last_temp2 = 0, last_temp3 = 0; int ret; - status_reg = tmdev->tm_offset + STATUS_OFFSET + s->hw_id * 4; - ret = regmap_read(tmdev->tm_map, status_reg, &code); + status_reg = priv->tm_offset + STATUS_OFFSET + s->hw_id * 4; + ret = regmap_read(priv->tm_map, status_reg, &code); if (ret) return ret; last_temp = code & LAST_TEMP_MASK; @@ -29,7 +29,7 @@ static int get_temp_tsens_v2(struct tsens_priv *tmdev, int id, int *temp) goto done; /* Try a second time */ - ret = regmap_read(tmdev->tm_map, status_reg, &code); + ret = regmap_read(priv->tm_map, status_reg, &code); if (ret) return ret; if (code & STATUS_VALID_BIT) { @@ -40,7 +40,7 @@ static int get_temp_tsens_v2(struct tsens_priv *tmdev, int id, int *temp) } /* Try a third/last time */ - ret = regmap_read(tmdev->tm_map, status_reg, &code); + ret = regmap_read(priv->tm_map, status_reg, &code); if (ret) return ret; if (code & STATUS_VALID_BIT) { diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c index 074fbb4d70f2..4582d2b30e94 100644 --- a/drivers/thermal/qcom/tsens.c +++ b/drivers/thermal/qcom/tsens.c @@ -15,38 +15,38 @@ static int tsens_get_temp(void *data, int *temp) { const struct tsens_sensor *s = data; - struct tsens_priv *tmdev = s->tmdev; + struct tsens_priv *priv = s->priv; - return tmdev->ops->get_temp(tmdev, s->id, temp); + return priv->ops->get_temp(priv, s->id, temp); } static int tsens_get_trend(void *p, int trip, enum thermal_trend *trend) { const struct tsens_sensor *s = p; - struct tsens_priv *tmdev = s->tmdev; + struct tsens_priv *priv = s->priv; - if (tmdev->ops->get_trend) - return tmdev->ops->get_trend(tmdev, s->id, trend); + if (priv->ops->get_trend) + return priv->ops->get_trend(priv, s->id, trend); return -ENOTSUPP; } static int __maybe_unused tsens_suspend(struct device *dev) { - struct tsens_priv *tmdev = dev_get_drvdata(dev); + struct tsens_priv *priv = dev_get_drvdata(dev); - if (tmdev->ops && tmdev->ops->suspend) - return tmdev->ops->suspend(tmdev); + if (priv->ops && priv->ops->suspend) + return priv->ops->suspend(priv); return 0; } static int __maybe_unused tsens_resume(struct device *dev) { - struct tsens_priv *tmdev = dev_get_drvdata(dev); + struct tsens_priv *priv = dev_get_drvdata(dev); - if (tmdev->ops && tmdev->ops->resume) - return tmdev->ops->resume(tmdev); + if (priv->ops && priv->ops->resume) + return priv->ops->resume(priv); return 0; } @@ -76,22 +76,22 @@ static const struct thermal_zone_of_device_ops tsens_of_ops = { .get_trend = tsens_get_trend, }; -static int tsens_register(struct tsens_priv *tmdev) +static int tsens_register(struct tsens_priv *priv) { int i; struct thermal_zone_device *tzd; - for (i = 0; i < tmdev->num_sensors; i++) { - tmdev->sensor[i].tmdev = tmdev; - tmdev->sensor[i].id = i; - tzd = devm_thermal_zone_of_sensor_register(tmdev->dev, i, - &tmdev->sensor[i], + for (i = 0; i < priv->num_sensors; i++) { + priv->sensor[i].priv = priv; + priv->sensor[i].id = i; + tzd = devm_thermal_zone_of_sensor_register(priv->dev, i, + &priv->sensor[i], &tsens_of_ops); if (IS_ERR(tzd)) continue; - tmdev->sensor[i].tzd = tzd; - if (tmdev->ops->enable) - tmdev->ops->enable(tmdev, i); + priv->sensor[i].tzd = tzd; + if (priv->ops->enable) + priv->ops->enable(priv, i); } return 0; } @@ -101,7 +101,7 @@ static int tsens_probe(struct platform_device *pdev) int ret, i; struct device *dev; struct device_node *np; - struct tsens_priv *tmdev; + struct tsens_priv *priv; const struct tsens_plat_data *data; const struct of_device_id *id; u32 num_sensors; @@ -129,55 +129,55 @@ static int tsens_probe(struct platform_device *pdev) return -EINVAL; } - tmdev = devm_kzalloc(dev, - struct_size(tmdev, sensor, num_sensors), + priv = devm_kzalloc(dev, + struct_size(priv, sensor, num_sensors), GFP_KERNEL); - if (!tmdev) + if (!priv) return -ENOMEM; - tmdev->dev = dev; - tmdev->num_sensors = num_sensors; - tmdev->ops = data->ops; - for (i = 0; i < tmdev->num_sensors; i++) { + priv->dev = dev; + priv->num_sensors = num_sensors; + priv->ops = data->ops; + for (i = 0; i < priv->num_sensors; i++) { if (data->hw_ids) - tmdev->sensor[i].hw_id = data->hw_ids[i]; + priv->sensor[i].hw_id = data->hw_ids[i]; else - tmdev->sensor[i].hw_id = i; + priv->sensor[i].hw_id = i; } for (i = 0; i < REG_ARRAY_SIZE; i++) { - tmdev->reg_offsets[i] = data->reg_offsets[i]; + priv->reg_offsets[i] = data->reg_offsets[i]; } - if (!tmdev->ops || !tmdev->ops->init || !tmdev->ops->get_temp) + if (!priv->ops || !priv->ops->init || !priv->ops->get_temp) return -EINVAL; - ret = tmdev->ops->init(tmdev); + ret = priv->ops->init(priv); if (ret < 0) { dev_err(dev, "tsens init failed\n"); return ret; } - if (tmdev->ops->calibrate) { - ret = tmdev->ops->calibrate(tmdev); + if (priv->ops->calibrate) { + ret = priv->ops->calibrate(priv); if (ret < 0) { dev_err(dev, "tsens calibration failed\n"); return ret; } } - ret = tsens_register(tmdev); + ret = tsens_register(priv); - platform_set_drvdata(pdev, tmdev); + platform_set_drvdata(pdev, priv); return ret; } static int tsens_remove(struct platform_device *pdev) { - struct tsens_priv *tmdev = platform_get_drvdata(pdev); + struct tsens_priv *priv = platform_get_drvdata(pdev); - if (tmdev->ops->disable) - tmdev->ops->disable(tmdev); + if (priv->ops->disable) + priv->ops->disable(priv); return 0; } diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index 936bdc7b1bc2..61ca2905ee7a 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -16,7 +16,7 @@ struct tsens_priv; /** * struct tsens_sensor - data for each sensor connected to the tsens device - * @tmdev: tsens device instance that this sensor is connected to + * @priv: tsens device instance that this sensor is connected to * @tzd: pointer to the thermal zone that this sensor is in * @offset: offset of temperature adjustment curve * @id: Sensor ID @@ -25,7 +25,7 @@ struct tsens_priv; * @status: 8960-specific variable to track 8960 and 8660 status register offset */ struct tsens_sensor { - struct tsens_priv *tmdev; + struct tsens_priv *priv; struct thermal_zone_device *tzd; int offset; int id; From patchwork Thu Feb 28 12:20:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 159349 Delivered-To: patch@linaro.org Received: by 2002:a02:5cc1:0:0:0:0:0 with SMTP id w62csp571900jad; Thu, 28 Feb 2019 04:22:07 -0800 (PST) X-Google-Smtp-Source: APXvYqzjtUx0rSR6MZO2fuRAH5ed+ebhbtnjrTN2QKiRwyRtrxzcHwBKWZEdMj2146qUA/fLnCwZ X-Received: by 2002:a17:902:3c5:: with SMTP id d63mr2725252pld.24.1551356527650; Thu, 28 Feb 2019 04:22:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1551356527; cv=none; d=google.com; s=arc-20160816; b=jJ2PR9z37s1P6aWJPCBblZm+pUnpXQg79n/94LMd0LJcd+QDn5WLwtbd0NY4BCCH2a u5/H4sBr4Nl8aOdr0ckW+nFhuTOsBnCzeU1vx2wZpgCIL8w2InnFqGx08imY5Kx+g4Rl e6zYnX/hz0/etrcowSwwPn6IqiSQl0Ms9+5V+9OvZlhrW9cDmgFBem3mzWpxe/BcD46m DuQZqiRYEu7fsSAu3sTHo7ZrQK2vHmJJyN0I1IlaQ79m+qBtttsS9JidQjOM7H62cI2W jGm/Lvl+FoLLWPITFLp9cl7Qr9upBt/a6YBYrHt8pmP7bo+5ZApZi6iMJObbCxyEJIdm ksrw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=081b2WykrwcmfZxREyFy0rYtvIRmQI0giDh8mi53WU0=; b=DU72B90Fbe4vpxoQFbxRdb9i9irO9niB1sIjdSiM78v/4CapBdQunGmNJZp6RPU4iV M61+eBH3cNwK/5qmrxDgSY0jNkBNtdcbtWOG1XZTnpItMjMf+VZq5z/n8r+TAqjoIOv1 GTFlJ70zmeDliDdCVbTSuJufDEPAi3FOGqfFLq7+mPcmT3oM7lONMk7GQHEpuz9adnhU p83ESYy2vCns+eP3W1IHFrqF0OzZrhwJ7n3MspFa5VTzoUOfgs1XsCxW5AlEyCPKZnsk /+8SP4p4AiMrMijOswupb7+ZgHXCsJACe4cVZHqNytwRBQhmdYGQQ3t0cyeYuvwTmZ5y P+rw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SSUDI98J; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j11si7635147pgp.169.2019.02.28.04.22.07; Thu, 28 Feb 2019 04:22:07 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SSUDI98J; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731382AbfB1MWF (ORCPT + 31 others); Thu, 28 Feb 2019 07:22:05 -0500 Received: from mail-wr1-f65.google.com ([209.85.221.65]:37338 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731712AbfB1MWE (ORCPT ); Thu, 28 Feb 2019 07:22:04 -0500 Received: by mail-wr1-f65.google.com with SMTP id w6so18472926wrs.4 for ; Thu, 28 Feb 2019 04:22:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=081b2WykrwcmfZxREyFy0rYtvIRmQI0giDh8mi53WU0=; b=SSUDI98JhBuJYOIQIJckoJiPkFY7IhNnVjf1LzteHJ9oPhs6Lqq6LfibMtXA73rofJ +VVQRZaiAHj0wVf4PWj/xTEvySE1HtT4+lasDMFaDemUjga8AmerGYfyjty2PZX2RRdF uQ8Yx8Q5FZyI6DJUtTsnbhlA4NjJ9zXmlGykZKE3TI5tO5cse3RKq2+OGZORrT2SwUvO oAcN0FQB7GseaQ3ZPvyNrJfmiUEx4gE3GvhhmrMXiu2pD303ft0jNNJATnrM0jOIXf0G nd068Bqo1CVon+QTxhqJNbs6Kg3/m88w0fTNC3E8TcAW/gEK/i54n1RY95i6fczxn5sb mMwQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=081b2WykrwcmfZxREyFy0rYtvIRmQI0giDh8mi53WU0=; b=l+y0qbjRnFHduhYTV9iupGagOSV/Ex6upu97p7rn7NRDYPqgfrYgaSkkWdBrLWNhKm 5bHUuOvr8xGbaKf2f3V+Z0E+xj4ciUtpS0K31mv8Ihhqljzvt7rIdRNcV/JFEHS9TV4Q /8fhyhztX46nsqB/NRXCCNJpRyYI6okMtF61qERWO075shiWFII0GK8p5cEs3n5BA09d FW9cHAK3PYUcstWZjo1Qs0zADhlnvsSIND0fN11I40jOC0LLUT/0pVGtlkYlmBjCa60q tOo6giMpZkjzoJEe4jo8y1dgtq6toaJyx/aVITfQbDyx5FdGcVNR3Wae2mFuUXKpvfMW J3IA== X-Gm-Message-State: APjAAAUHO8GqdZsKQWG+U1lBeUeBEyZUDYHK7W2G/9p6ZVqD1QDZmc4d 0uluknw+gSbtyE5CoYFuXsh6nSENU1s= X-Received: by 2002:a5d:6209:: with SMTP id y9mr6592393wru.140.1551356521970; Thu, 28 Feb 2019 04:22:01 -0800 (PST) Received: from localhost ([49.248.54.130]) by smtp.gmail.com with ESMTPSA id m26sm3601885wmg.13.2019.02.28.04.22.00 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 28 Feb 2019 04:22:01 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, Daniel Lezcano , David Brown , Zhang Rui Cc: linux-pm@vger.kernel.org Subject: [PATCH v2 05/24] drivers: thermal: tsens: Use consistent names for variables Date: Thu, 28 Feb 2019 17:50:55 +0530 Message-Id: <22c775079adc2dae926cd71e6d6ebd429510eeba.1551355503.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org tsens_get_temp() uses the name 'data' for the void pointer, use the same in tsens_get_trend() for consistency. Remove a stray space while we're at it. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c index 4582d2b30e94..0b5be08d515f 100644 --- a/drivers/thermal/qcom/tsens.c +++ b/drivers/thermal/qcom/tsens.c @@ -20,13 +20,13 @@ static int tsens_get_temp(void *data, int *temp) return priv->ops->get_temp(priv, s->id, temp); } -static int tsens_get_trend(void *p, int trip, enum thermal_trend *trend) +static int tsens_get_trend(void *data, int trip, enum thermal_trend *trend) { - const struct tsens_sensor *s = p; + const struct tsens_sensor *s = data; struct tsens_priv *priv = s->priv; if (priv->ops->get_trend) - return priv->ops->get_trend(priv, s->id, trend); + return priv->ops->get_trend(priv, s->id, trend); return -ENOTSUPP; } From patchwork Thu Feb 28 12:20:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 159350 Delivered-To: patch@linaro.org Received: by 2002:a02:5cc1:0:0:0:0:0 with SMTP id w62csp572029jad; Thu, 28 Feb 2019 04:22:14 -0800 (PST) X-Google-Smtp-Source: AHgI3IaaInjlcnvBbKtCeJHOVW3XKueg3bMjFiKYEDanI8HGaoZpKPRMhE9kjHdEYOsMUE14SjqU X-Received: by 2002:a63:1266:: with SMTP id 38mr8152025pgs.388.1551356534433; Thu, 28 Feb 2019 04:22:14 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1551356534; cv=none; d=google.com; s=arc-20160816; b=bnHGZwB3mqBeJZ/9sAw4mnw1fkTphvhq8OFy17DDelnXgd6BHfrJzToSA2UiLCp1+Q p69BXHsvNS5yHsbRmrywDBqs+Z+EscZpdU1j5Cbgr/39PzFqSXUCy4+3K1lou4UMvJpW zkM8PLjm1UJfZ/Y94jZJUDNcUXBjNS8aiB15HAxObZgWYWGTjJZbJ+g7XwoUobNBsboN xC08ajaLXLLskyv6xQ6FuHR5EKL4dlVOjNBENcRnMxuHu6oOloAG5ivK0C4OJ8o6YMNE GBtDurvTA0u6rIJ6IXv9wYVN3sHvC8WVneK4Zw8vVVLl4q4o3Fx7qxsTE/5YaLwHpzY3 N2Bw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=TBXOh+qCZb1AbvhplyZXyYZ1SSUAH9q1meg8o/qp39A=; b=QlVmaSTPHi1AxJtywtTjBq/f4MUWQQFu5gzRbtu5lfA9OHDlr2TPV8LrKCQkG/YgTN Vs66BKg+lSYAxVnmuoGg7xSVQvmTDQdtgIrLjaa26h6k7qO6mDzkbjThh+C/++c6CI81 mmXXkTU2+Hwd03sQG90wf+Mnek7mmB3G+gkcKvHagcubEm7RoTbh2bO5+I64cXMDzRqj 3NkWHAHMKbDD7sbu6a1aXpm/wf79p6EFoYjB5X9tqmM2gn+AqAgbKu7kII6eV/wvdeTg GGJcwN891FLeDH0Is5dPLTGdVoZqbFyHrMq+3pVDOJ6DWkjxFy35ISdkhaF8vFfxnD0K pXbA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YND+ZKL1; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i190si18450314pfc.116.2019.02.28.04.22.14; Thu, 28 Feb 2019 04:22:14 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YND+ZKL1; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731772AbfB1MWM (ORCPT + 31 others); Thu, 28 Feb 2019 07:22:12 -0500 Received: from mail-wr1-f67.google.com ([209.85.221.67]:36438 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731751AbfB1MWK (ORCPT ); Thu, 28 Feb 2019 07:22:10 -0500 Received: by mail-wr1-f67.google.com with SMTP id o17so21746051wrw.3 for ; Thu, 28 Feb 2019 04:22:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=TBXOh+qCZb1AbvhplyZXyYZ1SSUAH9q1meg8o/qp39A=; b=YND+ZKL1El4SaHUXtZf3iLiXMQQOmZ4ljgDODkfErUTUT3v9AfMIN6A3G91lJNOvmW 2pIBfv/Y0GOHUt8Uv0w/pwZUF27yuJPXnkzXmQwp1NewwyY3KPNk3G030Ese5XZoNHdv I9uo5ZrZ8HOuHaW3loRqGy+uZhUH+Vkn1+5eMSJf3GyoYieMXWcoHX5t7EpidH/N7J13 tLLuVcw4ZMFVFn3xph73TTGkTUt4JwG8dtg2IoyD9KJqMHzpAnZY9lnue6JbNCf/rlnA xmCloe1GwY1DyLhgspRrD7P69FnHJoVvic7EbkWZXcpG55tEGZIi1KVMVDlYwgd6dYCC SlWQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=TBXOh+qCZb1AbvhplyZXyYZ1SSUAH9q1meg8o/qp39A=; b=Z3IG4LXLC68viTc05HD0VDPtUsJOwAk9UtzP3X00amDNgy2a/P+rd2KK8wQOrfsSMB GBxpruzqzBttVJpo1Yrt8LvOZhTLGVkF/X3KQyCRUdj6T1kYHAX+p8jbtjCbn4RjCPPc OwY3WbDA14eQeRqgVSASlblPkqSXMpTIThJJIyMoreBY/Xr8tLji8rn3BUknLtlF8R0Z oaN4CwgXCzQnrBFysI0Qb+isL/Or9T4H4UgMSeqSdLGJFzxqadm/sqgmsxegtQJ8W6cR AeKdB/eroAym796Eh7MweZohazXLHoFo+EGnbUVxtGRm6SFHTbeOfu5CXlKmTxJcI5HS XUCw== X-Gm-Message-State: APjAAAUnE/a4qordTnsfyuEy8tIgxjo2cNAtJQTmOTFg5fnKF5pK6hIf AsL7tLx04Mx8Ox7uSqgLowFC2UPoeHg= X-Received: by 2002:a5d:428b:: with SMTP id k11mr6475622wrq.17.1551356528189; Thu, 28 Feb 2019 04:22:08 -0800 (PST) Received: from localhost ([49.248.54.130]) by smtp.gmail.com with ESMTPSA id x74sm7618775wmf.22.2019.02.28.04.22.06 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 28 Feb 2019 04:22:07 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, Daniel Lezcano , David Brown , Zhang Rui Cc: linux-pm@vger.kernel.org Subject: [PATCH v2 06/24] drivers: thermal: tsens: Function prototypes should have argument names Date: Thu, 28 Feb 2019 17:50:56 +0530 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org check_patch complains a lot as follows: WARNING: function definition argument 'struct tsens_priv *' should also have an identifier name + int (*init)(struct tsens_priv *); Fix it. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens.h | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) -- 2.17.1 diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index 61ca2905ee7a..4d6a406f8dca 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -47,15 +47,15 @@ struct tsens_sensor { */ struct tsens_ops { /* mandatory callbacks */ - int (*init)(struct tsens_priv *); - int (*calibrate)(struct tsens_priv *); - int (*get_temp)(struct tsens_priv *, int, int *); + int (*init)(struct tsens_priv *priv); + int (*calibrate)(struct tsens_priv *priv); + int (*get_temp)(struct tsens_priv *priv, int i, int *temp); /* optional callbacks */ - int (*enable)(struct tsens_priv *, int); - void (*disable)(struct tsens_priv *); - int (*suspend)(struct tsens_priv *); - int (*resume)(struct tsens_priv *); - int (*get_trend)(struct tsens_priv *, int, enum thermal_trend *); + int (*enable)(struct tsens_priv *priv, int i); + void (*disable)(struct tsens_priv *priv); + int (*suspend)(struct tsens_priv *priv); + int (*resume)(struct tsens_priv *priv); + int (*get_trend)(struct tsens_priv *priv, int i, enum thermal_trend *trend); }; enum reg_list { @@ -111,10 +111,10 @@ struct tsens_priv { struct tsens_sensor sensor[0]; }; -char *qfprom_read(struct device *, const char *); -void compute_intercept_slope(struct tsens_priv *, u32 *, u32 *, u32); -int init_common(struct tsens_priv *); -int get_temp_common(struct tsens_priv *, int, int *); +char *qfprom_read(struct device *dev, const char *cname); +void compute_intercept_slope(struct tsens_priv *priv, u32 *pt1, u32 *pt2, u32 mode); +int init_common(struct tsens_priv *priv); +int get_temp_common(struct tsens_priv *priv, int i, int *temp); /* TSENS v1 targets */ extern const struct tsens_plat_data data_8916, data_8974, data_8960; From patchwork Thu Feb 28 12:20:57 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 159351 Delivered-To: patch@linaro.org Received: by 2002:a02:5cc1:0:0:0:0:0 with SMTP id w62csp572143jad; Thu, 28 Feb 2019 04:22:20 -0800 (PST) X-Google-Smtp-Source: AHgI3IaKRj1M6p11qRiPL5B+WXt2rCmsRsDqo/ZeuHzXb5ks7WF51549t6mpljbsgK4Z5O2mfnB8 X-Received: by 2002:a63:101c:: with SMTP id f28mr7998663pgl.224.1551356540662; Thu, 28 Feb 2019 04:22:20 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1551356540; cv=none; d=google.com; s=arc-20160816; b=dmWQFcYnZ1cUnvx0LGGkPKg3Qph9IrrTorQZqAAzEuhTo0LA7Qujymx3TuNsvv+2ju 1LBFWXeLeUOnNwcgS6UL7pcb6hiwXV8Bi2OkPmrpVWJ8iG9pYwkzwV5DBRnxd3PmdvG4 GUNYJnP3MoXwiCVGRPEDKcSdcNtfhO207da+hKmjg+gnJEmt61r3VOkpjGdFIXgk/vmz fKQFFamCK+EywLlkmicukQ7hqmd8pbJ6xHxAgMDT2F+6PG/4SjN5DrqXKjXtT5tORNI8 iX1jG/ZDob8pksZ9x7Gin8UgDz4Rp3lfK9vkqimpi4lIpRYjwnmPtKY5BJ5HHe3WkJGP UQ8w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=xvoojo3eKvN4L9IBWkrmUvvE40O1kNL0V6YvK2/qLWI=; b=eQHv+znRnU7qiAVFVT9oYXSdsG81w7BFgH6IYT8NPmv0fkJ4CFw3NKuecmNmtnRzbV oQCY3jLY4ATFC6qhMjUFyMTZPmMucrxEzFDB4IN9lYZzHktP/yZOnCu6a4T1oJyYitcQ XQ9vjtLOXuVTnknvc9a4Amdgio47oJYeefC4jeVCIZlv87E5DS/JuZCQm0Ply+KAV4Cn wo+YcLAE5BmraNlQ1VLPAFNrgXOR5GFFc2mNNVIAt5fjbkpNc5okg8+Ed+U+dLh4D6Fa 7Dot//IIiAaXhUnhA4Q3AqEr6akCwxkTEuPKVv5IZHthbyMj+5muBXoXQfoZ8P+pknTu uJYg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=alAznjjt; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d37si18027945pla.71.2019.02.28.04.22.20; Thu, 28 Feb 2019 04:22:20 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=alAznjjt; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731804AbfB1MWS (ORCPT + 31 others); Thu, 28 Feb 2019 07:22:18 -0500 Received: from mail-wm1-f65.google.com ([209.85.128.65]:54618 "EHLO mail-wm1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731781AbfB1MWQ (ORCPT ); Thu, 28 Feb 2019 07:22:16 -0500 Received: by mail-wm1-f65.google.com with SMTP id a62so9070415wmh.4 for ; Thu, 28 Feb 2019 04:22:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=xvoojo3eKvN4L9IBWkrmUvvE40O1kNL0V6YvK2/qLWI=; b=alAznjjtQ1KMI/tIuggzk0YX+9RfADJ/PPXCFpt+B48IiYVQisU3vf7Qwg4U5LAvAf hNrDjZwVl606qA2ZMqJafnhog1ur09n2ppLg+k2TPKI4HwXKAEkm0GqtVpXcD/tbq4fk 69EU1C0DPu0XKUwqLdQ8Pn98GYKC9DPB2MkbHNl4X35EYYc+D/ds6dbfSBHCNRRlsGQT Bdeth3VrVfveEVIL6fVu/xOts9VT1o6O2m5u47dujJ4srCnsFhx+faip1l0fyHpjh1xf uBKBED32XzGrQ1sJE2BHcF1GxLSJquIdGz3y2rUtHhmysHoDaLvXl8aOOV8GlpnUAtPc vnBw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=xvoojo3eKvN4L9IBWkrmUvvE40O1kNL0V6YvK2/qLWI=; b=AqeiPveyRi76RkU/xAzHEUdRgkIXy4k/KVkBAKolIZcPNEAOzTfPDz1HMstBM/KDpM H4Felev44+uriblEJWfhtdOteXneQvxnCv2wn5Tiz/L3QVL8y03ZSPWeZCK++Lal9Fz4 ZRCERFpJoPhBUaKCggAMIjUb0wxcGSJavjkBbWZm67XWMXTkUfXtVtsn5wmgulbSwqcQ LKe00xMIlRIRsNB6JrrYovnmcbcVScL8PjdjXECyArXIpnLVevZXpXaB757ltaWOv1KH GwDfR75rAr0Nc+fcRianjQKgOnasZ/vme7Hm+uGfnTSh4i4bDIyHrgdoa4wMyVEgUVaF Yd5g== X-Gm-Message-State: AHQUAubYNVorj1QLdA7tnG335IiV+c+qXs5qa7GMqEUnDrPkRKUV3/hO 3f/r4vN6i264voXZMMA2iMrYHT1fi/M= X-Received: by 2002:a05:600c:224c:: with SMTP id a12mr2700481wmm.103.1551356534426; Thu, 28 Feb 2019 04:22:14 -0800 (PST) Received: from localhost ([49.248.54.130]) by smtp.gmail.com with ESMTPSA id c202sm3869561wme.38.2019.02.28.04.22.12 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 28 Feb 2019 04:22:13 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, Daniel Lezcano , David Brown , Zhang Rui Cc: linux-pm@vger.kernel.org Subject: [PATCH v2 07/24] drivers: thermal: tsens: Rename tsens-8916 to prepare to merge with tsens-8974 Date: Thu, 28 Feb 2019 17:50:57 +0530 Message-Id: <00f3091fa0ab3211c831a6be877a627d771b6150.1551355503.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 8916 and 8974 use v0.1.0 of the TSENS IP. Rename tsens-8916 to prepare it for merging with tsens-8974 in a later commit. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/Makefile | 2 +- drivers/thermal/qcom/{tsens-8916.c => tsens-v0_1.c} | 0 2 files changed, 1 insertion(+), 1 deletion(-) rename drivers/thermal/qcom/{tsens-8916.c => tsens-v0_1.c} (100%) -- 2.17.1 diff --git a/drivers/thermal/qcom/Makefile b/drivers/thermal/qcom/Makefile index 717a08600bb5..1f2fafd43dff 100644 --- a/drivers/thermal/qcom/Makefile +++ b/drivers/thermal/qcom/Makefile @@ -1,3 +1,3 @@ obj-$(CONFIG_QCOM_TSENS) += qcom_tsens.o -qcom_tsens-y += tsens.o tsens-common.o tsens-8916.o tsens-8974.o tsens-8960.o tsens-v2.o +qcom_tsens-y += tsens.o tsens-common.o tsens-v0_1.o tsens-8974.o tsens-8960.o tsens-v2.o obj-$(CONFIG_QCOM_SPMI_TEMP_ALARM) += qcom-spmi-temp-alarm.o diff --git a/drivers/thermal/qcom/tsens-8916.c b/drivers/thermal/qcom/tsens-v0_1.c similarity index 100% rename from drivers/thermal/qcom/tsens-8916.c rename to drivers/thermal/qcom/tsens-v0_1.c From patchwork Thu Feb 28 12:21:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 159355 Delivered-To: patch@linaro.org Received: by 2002:a02:5cc1:0:0:0:0:0 with SMTP id w62csp576372jad; Thu, 28 Feb 2019 04:27:05 -0800 (PST) X-Google-Smtp-Source: AHgI3IbNPtgyVCUuC6Ng3Uy30j6U74LycFFJeRGPNsBPZoOgfsIEV9ddyKj4cIy1frdlf3rjmCg4 X-Received: by 2002:a63:6a08:: with SMTP id f8mr8295641pgc.165.1551356825784; Thu, 28 Feb 2019 04:27:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1551356825; cv=none; d=google.com; s=arc-20160816; b=sCajfLf2m9WQnQe8Nj0cSGFvJz9jurSFukVjTTyfqVkiVbKWcbkcYqDCAwc3/jopUz cqFjVfY5Rgf/dbddibtF4M3kaAzbkDRy65U+aJLSjTY3sW5ufkqeyVLQyzqnylKPmZbD JpkfRGNyEKtMT9CtQxtAafJYlpYjVTIcxhptWH8062MGgDGcGpCOsA0D2ar+twst1N1g jZB14/sgrAxZzkOF3/pze3hV9KYUNHiGvgOn/CcAGZbJz5XTSRDm2t3SkSySTT4A0teB 3lP4Jbt4cGVgYXdUBQnD1ulG8d/m9MVF494O14PUkZSlfRbeejFs/OgVm7lOb/li9RfS 8QbQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=DhOH74k9WLUHZ9bc4R59OvEiqm0NxoNRQ6D2mdU8GNA=; b=gs6GURjtrjRnm6cR/T8yzTDWUMNOAiZM9OwOgIpvqTM1+M5x1Yjqx6gyPavN+FJBsJ 08oTHW2TJGK8sB0d7phYgeccJ5uht+IRn9aB2LsysOfBC3XqvrQhXe9vwbVv53hH3dAy jESr/JONBOMSqofqoGunE9snuPcmPeO16mw6Yz/t+z8+feYI2Q97rE900dryAPi148V3 UZxB2WHt8Y1MzF1EY1fSAZPYPHh7/oWD5PqbxM1EOjT06QzcKZ9YAUkNodVMdq6/N9Gg Xk0Dvqd4ihm+08YTIApZmPtKFTf0mIoS68oWpwUjawiEzWlfr/2cTNK+QdZET92Lkrfd FcHg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=irnNzAIp; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s4si17862221pgh.540.2019.02.28.04.27.05; Thu, 28 Feb 2019 04:27:05 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=irnNzAIp; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731283AbfB1M1E (ORCPT + 31 others); Thu, 28 Feb 2019 07:27:04 -0500 Received: from mail-wr1-f65.google.com ([209.85.221.65]:46581 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731218AbfB1M1D (ORCPT ); Thu, 28 Feb 2019 07:27:03 -0500 Received: by mail-wr1-f65.google.com with SMTP id i16so21692587wrs.13 for ; Thu, 28 Feb 2019 04:27:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=DhOH74k9WLUHZ9bc4R59OvEiqm0NxoNRQ6D2mdU8GNA=; b=irnNzAIpeG/Q0pGh4DtzlM80WIT9F4seVwCL3A8RRCFJVmt2gq1QdrN4ogqjZVYHxD JaXpo4aoM3Du5s+zM4S9d5qsO5gRFlhz7XR71CvRD1yq8VcHxrhZWXtsG3HmvZ1pmJYU OCfK4t+P4tp5rgtjmCv+xjtwt8WcEuvLIk92fpDZE7N2Sk5AiqcKKpg4HUxIa0blo0OM 6Ar/pHmQIrbfDeVEM6Kbl8ZtzsQVB3gvINqvMfDPq8/929hpTT7RurhmrWAHKvUD5RVD o/+qx9wN4YDVteKjc+i2+LdOJxhHIxi5FHDQPnnwW5kq+1Fhqsyy08PJrUdXsgtFMHzq 6OAQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=DhOH74k9WLUHZ9bc4R59OvEiqm0NxoNRQ6D2mdU8GNA=; b=Ki88HRjoWKnCcQnogNNBAL621qEv+1CR1rr8nuX2NhxEq8qDCLiN6hN57jB/br/pcJ bFYaFgvVU/8zw+beJwRNpk6DdiySUAeQgyfHtQZ8I7KOyWxoxSVqHeUgiJRTrd929SFB yxJtqLZZVZ+hCD2/+UR7lfhqb1WMR4+hygDMDIKu6bognLMlAphPcp4AJS7490UUh4aU MrbEaLJFkyEMxyYsIogH9sYJWOnvDQCSvekxy1TTBEMCPEdld2gBERmqfi7k1Tzbe23D zLyElRzGmThK8ApOkjmRBuYTeiBd1yMwnb2DC7NMKnM8WltgcPcyYMIorvHq5ZkvHqrg 6ANA== X-Gm-Message-State: APjAAAUG9E3YP/wELk3jPlDs+35C9bgqRms2MjcHRczrgho7vUgzLwKR sCa86hCR/inhQD+SPJxBAiFlurso9aY= X-Received: by 2002:a5d:4702:: with SMTP id y2mr6683446wrq.149.1551356821348; Thu, 28 Feb 2019 04:27:01 -0800 (PST) Received: from localhost ([49.248.54.130]) by smtp.gmail.com with ESMTPSA id c2sm25070024wrt.93.2019.02.28.04.26.59 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 28 Feb 2019 04:27:00 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, Daniel Lezcano , David Brown , Zhang Rui Cc: linux-pm@vger.kernel.org Subject: [PATCH v2 11/24] drivers: thermal: tsens: Save reference to the device pointer and use it Date: Thu, 28 Feb 2019 17:51:01 +0530 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Code cleanup making it easier to read Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-common.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) -- 2.17.1 diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c index a82e4c928a78..aae3d71d7eed 100644 --- a/drivers/thermal/qcom/tsens-common.c +++ b/drivers/thermal/qcom/tsens-common.c @@ -119,6 +119,7 @@ static const struct regmap_config tsens_srot_config = { int __init init_common(struct tsens_priv *priv) { void __iomem *tm_base, *srot_base; + struct device *dev = priv->dev; struct resource *res; u32 enabled; int ret, i, j; @@ -135,7 +136,7 @@ int __init init_common(struct tsens_priv *priv) if (IS_ERR(srot_base)) return PTR_ERR(srot_base); - priv->srot_map = devm_regmap_init_mmio(priv->dev, srot_base, + priv->srot_map = devm_regmap_init_mmio(dev, srot_base, &tsens_srot_config); if (IS_ERR(priv->srot_map)) return PTR_ERR(priv->srot_map); @@ -150,11 +151,11 @@ int __init init_common(struct tsens_priv *priv) if (IS_ERR(tm_base)) return PTR_ERR(tm_base); - priv->tm_map = devm_regmap_init_mmio(priv->dev, tm_base, &tsens_config); + priv->tm_map = devm_regmap_init_mmio(dev, tm_base, &tsens_config); if (IS_ERR(priv->tm_map)) return PTR_ERR(priv->tm_map); - priv->rf[TSENS_EN] = devm_regmap_field_alloc(priv->dev, priv->srot_map, + priv->rf[TSENS_EN] = devm_regmap_field_alloc(dev, priv->srot_map, priv->fields[TSENS_EN]); if (IS_ERR(priv->rf[TSENS_EN])) return PTR_ERR(priv->rf[TSENS_EN]); @@ -162,24 +163,24 @@ int __init init_common(struct tsens_priv *priv) if (ret) return ret; if (!enabled) { - dev_err(priv->dev, "tsens device is not enabled\n"); + dev_err(dev, "tsens device is not enabled\n"); return -ENODEV; } - priv->rf[SENSOR_EN] = devm_regmap_field_alloc(priv->dev, priv->srot_map, + priv->rf[SENSOR_EN] = devm_regmap_field_alloc(dev, priv->srot_map, priv->fields[SENSOR_EN]); if (IS_ERR(priv->rf[SENSOR_EN])) return PTR_ERR(priv->rf[SENSOR_EN]); /* now alloc regmap_fields in tm_map */ for (i = 0, j = LAST_TEMP_0; i < priv->num_sensors; i++, j++) { - priv->rf[j] = devm_regmap_field_alloc(priv->dev, priv->tm_map, + priv->rf[j] = devm_regmap_field_alloc(dev, priv->tm_map, priv->fields[j]); if (IS_ERR(priv->rf[j])) return PTR_ERR(priv->rf[j]); } for (i = 0, j = VALID_0; i < priv->num_sensors; i++, j++) { - priv->rf[j] = devm_regmap_field_alloc(priv->dev, priv->tm_map, + priv->rf[j] = devm_regmap_field_alloc(dev, priv->tm_map, priv->fields[j]); if (IS_ERR(priv->rf[j])) return PTR_ERR(priv->rf[j]); From patchwork Thu Feb 28 12:21:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 159360 Delivered-To: patch@linaro.org Received: by 2002:a02:5cc1:0:0:0:0:0 with SMTP id w62csp576857jad; Thu, 28 Feb 2019 04:27:39 -0800 (PST) X-Google-Smtp-Source: AHgI3Ibc1PUnTyHBGg9MRvPRXr4kO9Dv5ACWTMEd0yIa79XtbZlgcZq+kklURv70yjM4R8dioaxY X-Received: by 2002:a63:1f06:: with SMTP id f6mr8252045pgf.385.1551356859161; Thu, 28 Feb 2019 04:27:39 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1551356859; cv=none; d=google.com; s=arc-20160816; b=tipnunVcoBpjxyawUZrauaXRqgd3ngBsDezwFkZQy3SfT9m/LAqhMk0EykXwvx3KqV IOJmqmNEVL2ANE6UfI65zuegPztpuSF5vVN6BetbE0HYqpA0iQsvzuTlFYWWjV6zIeZ9 BfviilcUEFhswkDble6Xb7aNXtreK+1BJsQwh5BB+GWZeWx4cpQobByi3inP8XFT99Za qoVIWtWfFgusgu7Y2EUQJjLA0H6QXlS0S5JsErtbKeOhQeiYs+I6MjUNinGzz/WLRrTA UAjSGDYx2Gw+EzfP5rHZBtQvgnKbEtCDczm2fkLUFtNEwbkgxy5gplk2a2S0GBYCNN/s VqVg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=CfWghgV1RK0L2tcup/p41zKc8qLLDQNa3EIDdIC0c4k=; b=p69ztW0YHgbJ70sxJvp4ffdXmHGqo51e8eGC0dlBsoYRP3aKf1jEeH729w9zokStvm YRO+s1HGqwfiIWAL/Ji/DOpYbMxFdfEReVKnH9JlZHdA30zadolNdXZTkKZb1Qgdy6Tv iF3dKGjzK9XPznl785nsz25qgj7DOpxq4AyyhmhlCVz+90OFlHeB4E1ZiF+V9f+FSga1 jqDlV7P2S9wt/YcFs4HUxEG+zKuuiPH+N4zy9gKdPxpvDkK5l3lodhuXSYDyDBAtF/4O RL5I8mhVJ0nFpC83QBTqMiY5Die6xl9z6ercM7KecE/7RlV9j04GzXQe25ml5561IKUG wihA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=itToNH34; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c7si4048593pll.17.2019.02.28.04.27.38; Thu, 28 Feb 2019 04:27:39 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=itToNH34; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731808AbfB1M1h (ORCPT + 31 others); Thu, 28 Feb 2019 07:27:37 -0500 Received: from mail-wm1-f66.google.com ([209.85.128.66]:40327 "EHLO mail-wm1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731675AbfB1M1e (ORCPT ); Thu, 28 Feb 2019 07:27:34 -0500 Received: by mail-wm1-f66.google.com with SMTP id g20so7975692wmh.5 for ; Thu, 28 Feb 2019 04:27:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=CfWghgV1RK0L2tcup/p41zKc8qLLDQNa3EIDdIC0c4k=; b=itToNH34dv/FNuiFrwtUZfaVgZuc6mR6JycBLuO6WmYYwFlLdWCap+YxOkoiIvL/Cm Rmbslj+pfTiLu6OYKKMPx6qD/3Gw/dfrFRdlbDFanlqVvGCUsuVvnaFk4pi+mRGObHUX X2Y5/7Xyg49pG++0IPgeF/spcTfhQmG8vuWsz8W2cv0TjmywdHZnEmkhrLWEUjIhe0dO EEJIysryMBqRAyDFXkk2vCMzR/X21/3omezosBN2rsnfsh3P3VdTpMi2DBGtVSUkgZAx ep07YZJ8QWvUHVFwvtq3TTZZ8XYFYMDLY+uoKzeUr84ui7CdoTal9a5eom1F43bZazzi dGmA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=CfWghgV1RK0L2tcup/p41zKc8qLLDQNa3EIDdIC0c4k=; b=Y1+sow2P8TRyHQWNO35IbTI6Q1eaQV1078nkWMljMP43e6ycT9JtbyYie1EIZRjRm6 9dzBZ+Eb/810sLxb3QZQ4aaVy/QSUgbIrz4hYcDDp64hBs3S9IwJkG7YjUo4X4jD9uBY X23DO5QKwIkTZRxZliYEyUSPJ4Tvhn9BL7jVgYqr2jnl/pwLoRm0oAJnTjCIVUMl6+FF a6g1DsfhLzmt9JlGlcFA/BjfDXViywyH01B8+BXOWrea32i9Z/zsgsIRoz2Bl7TM/nUU xQ5H124yKe/ei0ZwcA2XdXmcDLsWxR5nqePdmnatDauKq+5Sy/3nF75Co6JS5w/cRYRv PncQ== X-Gm-Message-State: AHQUAuYcTXQuaKOZWRYmLzDRl1hftfbZ/MDHdNXJA3FmmF2hOZNzeh1T BwGlOvck/PMR427Hs4328HLeZKZkM60= X-Received: by 2002:a1c:790b:: with SMTP id l11mr2711318wme.54.1551356852837; Thu, 28 Feb 2019 04:27:32 -0800 (PST) Received: from localhost ([49.248.54.130]) by smtp.gmail.com with ESMTPSA id d9sm20694097wrn.72.2019.02.28.04.27.30 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 28 Feb 2019 04:27:32 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, Daniel Lezcano , David Brown , Zhang Rui Cc: linux-pm@vger.kernel.org Subject: [PATCH v2 16/24] drivers: thermal: tsens: Introduce IP-specific max_sensor count Date: Thu, 28 Feb 2019 17:51:06 +0530 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The IP can support 'm' sensors while the platform can enable 'n' sensors of the 'm' where n <= m. Track maximum sensors supported by the IP so that we can correctly track what subset of the sensors are supported on the platform. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-common.c | 4 ++-- drivers/thermal/qcom/tsens-v0_1.c | 1 + drivers/thermal/qcom/tsens-v2.c | 1 + drivers/thermal/qcom/tsens.h | 2 ++ 4 files changed, 6 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c index c58ba4c200bc..5f838fd798c3 100644 --- a/drivers/thermal/qcom/tsens-common.c +++ b/drivers/thermal/qcom/tsens-common.c @@ -197,13 +197,13 @@ int __init init_common(struct tsens_priv *priv) return PTR_ERR(priv->rf[SENSOR_EN]); /* now alloc regmap_fields in tm_map */ - for (i = 0, j = LAST_TEMP_0; i < priv->num_sensors; i++, j++) { + for (i = 0, j = LAST_TEMP_0; i < priv->feat->max_sensors; i++, j++) { priv->rf[j] = devm_regmap_field_alloc(dev, priv->tm_map, priv->fields[j]); if (IS_ERR(priv->rf[j])) return PTR_ERR(priv->rf[j]); } - for (i = 0, j = VALID_0; i < priv->num_sensors; i++, j++) { + for (i = 0, j = VALID_0; i < priv->feat->max_sensors; i++, j++) { priv->rf[j] = devm_regmap_field_alloc(dev, priv->tm_map, priv->fields[j]); if (IS_ERR(priv->rf[j])) diff --git a/drivers/thermal/qcom/tsens-v0_1.c b/drivers/thermal/qcom/tsens-v0_1.c index 837e7872e512..03c0f2e11eaf 100644 --- a/drivers/thermal/qcom/tsens-v0_1.c +++ b/drivers/thermal/qcom/tsens-v0_1.c @@ -324,6 +324,7 @@ const struct tsens_features tsens_v0_1_feat = { .crit_int = 0, .adc = 1, .srot_split = 1, + .max_sensors = 11, }; /* v0.1: 8916, 8974 */ diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v2.c index 7346bfc9efe6..55fe00f90b22 100644 --- a/drivers/thermal/qcom/tsens-v2.c +++ b/drivers/thermal/qcom/tsens-v2.c @@ -88,6 +88,7 @@ const struct tsens_features tsens_v2_feat = { .crit_int = 1, .adc = 0, .srot_split = 1, + .max_sensors = 16, }; const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = { diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index a20725b1cc67..eb988c1d17c4 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -297,12 +297,14 @@ enum regfield_ids { * @adc: do the sensors only output adc code (instead of temperature)? * @srot_split: does the IP neatly splits the register space into SROT and TM, * with SROT only being available to secure boot firmware? + * @max_sensors: maximum sensors supported by this version of the IP */ struct tsens_features { unsigned int ver_info:1; unsigned int crit_int:1; unsigned int adc:1; unsigned int srot_split:1; + unsigned int max_sensors; }; /** From patchwork Thu Feb 28 12:21:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 159361 Delivered-To: patch@linaro.org Received: by 2002:a02:5cc1:0:0:0:0:0 with SMTP id w62csp576926jad; Thu, 28 Feb 2019 04:27:44 -0800 (PST) X-Google-Smtp-Source: AHgI3IYr1Z+G7mwczP4OlYyZGJ5ZR+zCeue+ZcfGxxmQx75RvfeLNG8aOCkoPn0dReHsxIY1MnxU X-Received: by 2002:a17:902:8f82:: with SMTP id z2mr7765520plo.163.1551356864432; Thu, 28 Feb 2019 04:27:44 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1551356864; cv=none; d=google.com; s=arc-20160816; b=Fp8mvImBa9R450RF42S3eNMm/aHNGi86H/c/+BacY+4q14KUa2PZCNzoeHwZceS+d5 05d2v8C+PxG50SvX7ZKaACv8MgUEuEzBcQtG7n9KIp77P4ED4ULoaev1tD6FDTp9fC0i KzKvumT/MS9tzCwMm4TEpB0OTSSQYCLim7IkeUcBp7BEEs0Kf88ugWzG18YdcR55Zo1h Ml9jf2U1uPDFRr/pPjr7ZAov61HtLtZWcfBYqAxGiFme8OJZhB9h5ukAc8wWNFSZ8Col ST7vOy+aaolmqF72a0nmqZNF0aGw2gkavKQBeG7DufRWo2c6BCKv2Jpfc+nFHQ8zObUA HX9Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=x3C+xygM5AZc31GHOzRn3x57Ju5ms6bQCpVgVpS9orM=; b=ki5P4Kp2VWJxnf7nRDVimTvfIw4scj4Fp+cdI+26rX0KwKHgeiFOJ+p4P0DG6WqWRr njbRgKUibEMRt/fLLSPsXdfRibawt2XRczz9qv+KrpCNxjt8EOg09DRKhL2Xt6wj1Kv5 XsB+NCmouSIPQve1StXfldbs6g+tPA3Fs1n3xPOhDQLd55BsrtzrPw7N1BifB4hxXad9 ztiFOEyrpe7nV4PO1OkYx9qhhwdEGpuRp4Zu9CwbFBPPmOJxJ4rLCGk8Tch12F1IoB8h HtKDGNtu2wtL+kwSSVwVheZ1vyUk2B8so8Ej9eGbndk2CP/JaGK8ukLdKwuKJQzbPCAr Qrog== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WeJ0+5wX; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i10si4840846pgs.572.2019.02.28.04.27.44; Thu, 28 Feb 2019 04:27:44 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WeJ0+5wX; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731876AbfB1M1m (ORCPT + 31 others); Thu, 28 Feb 2019 07:27:42 -0500 Received: from mail-wr1-f67.google.com ([209.85.221.67]:42042 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731827AbfB1M1l (ORCPT ); Thu, 28 Feb 2019 07:27:41 -0500 Received: by mail-wr1-f67.google.com with SMTP id r5so21719556wrg.9 for ; Thu, 28 Feb 2019 04:27:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=x3C+xygM5AZc31GHOzRn3x57Ju5ms6bQCpVgVpS9orM=; b=WeJ0+5wXhx7ep5PjD4X66XTyI5JDkTe/c+xrYHVHXaVchsvtfACf6yMby2KVCoUyTl Ca7zhMJPvkvbigD8s+437oEx0lNvuFmXd6yxrPblmX42QjHKaUmF7TGjzb5Q/J50D/Ht hWdEtRJfy6jMVf9gCflQC4Spahbd2u8mUgOELuW7NVRKNMKCrUtyGMArjOKrCLFOCdJT DMctVN86V3m0an9vUbj+eykDQvsUOW0Bwu7i3usRZuDJ9EYGSzpa57fUODoaL7wiol4Z HJNbDBbzDOFMU0jTnXaKemWwHhI/Q9Evm5ZMdIxSwR4vLbkL5X/HvojRPVA3q43BP8jh 1Vew== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=x3C+xygM5AZc31GHOzRn3x57Ju5ms6bQCpVgVpS9orM=; b=gwAaLIcifOlcdMwHkjhMrFkxs4GemnbTvXyDzsZpN9VPtQdXaPBYTdymPoe8Z/fYEu W5xuIMPgTqjdCEqXjABjORgDHa9HcUnHvIA0I9rs20uShMfMO0u/K76HiH5igWqu/zEe YLw7rQ6rx2LcKWBklpeKOrxo9T1+gWkIBm+5fFRt6iShmt9f9fbmGzovtU4xjKdLL1qY 7ENoz2XsVEaoHJBEZ5bUB44cF9aJhNQlbVOQxYQ6N7dnCMHunrrrPkzrXVnnOFen3ZBN 0oS6l++030O/blbmzRbj+3DA0H733YAOcIIiPnZoU/KK1msKLkeqCB6Jd8gXfMEhv1SN lVyQ== X-Gm-Message-State: APjAAAW/MT/FF8kpuUl0VQNQFp8zTkSIRlMV9Ns3ZBdKj6QOn7CG1Swj knvPpe9oeFTSijIWK/hkehxseYeAgfE= X-Received: by 2002:adf:9d85:: with SMTP id p5mr6067417wre.215.1551356858934; Thu, 28 Feb 2019 04:27:38 -0800 (PST) Received: from localhost ([49.248.54.130]) by smtp.gmail.com with ESMTPSA id f6sm20292598wrt.87.2019.02.28.04.27.37 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 28 Feb 2019 04:27:38 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, Daniel Lezcano , David Brown , Zhang Rui Cc: linux-pm@vger.kernel.org Subject: [PATCH v2 17/24] drivers: thermal: tsens: simplify get_temp_tsens_v2 routine Date: Thu, 28 Feb 2019 17:51:07 +0530 Message-Id: <854ae4178dffabaec0274127fca1fe59a3be1199.1551355503.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The current implementation is based on an algorithm published in the docs. Instead of reading the temperature thrice w/o any explanation, improve the algorithm. This will become the basis for a common get_temp routine in the future. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-v2.c | 55 ++++++++++----------------------- 1 file changed, 17 insertions(+), 38 deletions(-) -- 2.17.1 diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v2.c index 55fe00f90b22..e180e80f533c 100644 --- a/drivers/thermal/qcom/tsens-v2.c +++ b/drivers/thermal/qcom/tsens-v2.c @@ -25,58 +25,37 @@ #define TM_Sn_STATUS_OFF 0x00a0 #define TM_TRDY_OFF 0x00e4 -#define LAST_TEMP_MASK 0xfff - -static int get_temp_tsens_v2(struct tsens_priv *priv, int id, int *temp) +static int get_temp_tsens_v2(struct tsens_priv *priv, int i, int *temp) { - struct tsens_sensor *s = &priv->sensor[id]; + struct tsens_sensor *s = &priv->sensor[i]; u32 temp_idx = LAST_TEMP_0 + s->hw_id; u32 valid_idx = VALID_0 + s->hw_id; - u32 last_temp = 0, last_temp2 = 0, last_temp3 = 0, valid; + u32 last_temp = 0, valid, mask; int ret; - ret = regmap_field_read(priv->rf[temp_idx], &last_temp); - if (ret) - return ret; - ret = regmap_field_read(priv->rf[valid_idx], &valid); if (ret) return ret; - - if (valid) - goto done; - - /* Try a second time */ - ret = regmap_field_read(priv->rf[valid_idx], &valid); - if (ret) - return ret; - ret = regmap_field_read(priv->rf[temp_idx], &last_temp2); - if (ret) - return ret; - if (valid) { - last_temp = last_temp2; - goto done; + while (!valid) { + /* Valid bit is 0 for 6 AHB clock cycles. + * At 19.2MHz, 1 AHB clock is ~60ns. + * We should enter this loop very, very rarely. + */ + ndelay(400); + ret = regmap_field_read(priv->rf[valid_idx], &valid); + if (ret) + return ret; } - /* Try a third/last time */ - ret = regmap_field_read(priv->rf[valid_idx], &valid); - if (ret) - return ret; - ret = regmap_field_read(priv->rf[temp_idx], &last_temp3); + /* Valid bit is set, OK to read the temperature */ + ret = regmap_field_read(priv->rf[temp_idx], &last_temp); if (ret) return ret; - if (valid) { - last_temp = last_temp3; - goto done; - } - if (last_temp == last_temp2) - last_temp = last_temp2; - else if (last_temp2 == last_temp3) - last_temp = last_temp3; -done: + mask = GENMASK(priv->fields[LAST_TEMP_0].msb, + priv->fields[LAST_TEMP_0].lsb); /* Convert temperature from deciCelsius to milliCelsius */ - *temp = sign_extend32(last_temp, fls(LAST_TEMP_MASK) - 1) * 100; + *temp = sign_extend32(last_temp, fls(mask) - 1) * 100; return 0; } From patchwork Thu Feb 28 12:21:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 159365 Delivered-To: patch@linaro.org Received: by 2002:a02:5cc1:0:0:0:0:0 with SMTP id w62csp577284jad; Thu, 28 Feb 2019 04:28:09 -0800 (PST) X-Google-Smtp-Source: AHgI3IbtNnadwaDbHZab29sKtbzaPj5rWUCXDtyH9IQK74E+cW+Axgze3R1l9s3AJs2bi3C8EIMI X-Received: by 2002:aa7:8497:: with SMTP id u23mr7239799pfn.253.1551356889374; Thu, 28 Feb 2019 04:28:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1551356889; cv=none; d=google.com; s=arc-20160816; b=hc1GIO3I8bdFNQwWYmgUqXkL+YFlDtskHXoEhhY3To1ukXCs92buqVRDhESiv0LuCK oB3Ux0vQnQjAQHYTJfd8leC62w4ysQPjCMbCy5/g6gIca+w3cEGVTdPjYpFgErZAjmsG A8z7IrBw5nuLcKGwNnX9osnkE/eXYtE8/LDbQOwX/c63YNxRBe6oSOIdQ7TpGU7Wh80b LTitNPQER+lYz8kHTWtWkZ7kdqGNQNIs51MjeQiZ0yu3oooohuyxCzaqFV+scIkEwDfJ h0lWY5ewQXITDo/bJwHOyHqLU91RI9qXMAP8vpk8DI7nsjRSPOsm7s8mYY+An97not2p lbQA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=XNk3389iCBf5u7sokbp91gKblB34yjfbY1VaUryvTVM=; b=X1S6eJ90UZHML9M673EveRj9C9B+DhnKQoyxKLqw9/AzmKHXiaKXRCKObdnNj3ZPSi iNTx/gId1Bye8p9MJsUXl+3Ia9Jpj0+7TaE5hY65ziPSwJuVnz6qWChGbSZa/uOW6ru+ IvVvio89lhWz9nYW8FFMhezWKNuOSviVO/Pt9XFd2aFYZN7BiIuc492R9zuxBZOsF02q PEWipMRh5eojceEFKFsGSzMAIu9fyFnjrjC9oUZp5q7+xpU/jo2qEMsL5E+v41UtlEwr gmmg9h3rQ1151uEXkqzSmgUKJTlAM2fvZpXaNYUQOiRrZKZQyzbBTUuNHVqk4WaTdCCM kM3w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=NSGhfGCZ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h189si17321100pge.152.2019.02.28.04.28.08; Thu, 28 Feb 2019 04:28:09 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=NSGhfGCZ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732140AbfB1M2H (ORCPT + 31 others); Thu, 28 Feb 2019 07:28:07 -0500 Received: from mail-wr1-f66.google.com ([209.85.221.66]:40591 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732069AbfB1M2G (ORCPT ); Thu, 28 Feb 2019 07:28:06 -0500 Received: by mail-wr1-f66.google.com with SMTP id q1so21758629wrp.7 for ; Thu, 28 Feb 2019 04:28:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=XNk3389iCBf5u7sokbp91gKblB34yjfbY1VaUryvTVM=; b=NSGhfGCZ99j85DQ1Fp9tj8cKh+jO1S4NDcIsh3W9BbVh30CSH6OTrosa2qWCuOL5gD VacxWHthpTQLB+alAiLJUfueDv6ya7lbVmtTtPm5P1kxjJFN/dah8bL7opE2nzKEeKlC E9T/4LV9vdae5XsLf8Li947TwlZx6NoNsiOMxASBlusVVa/buvouke6Y4/utqbFEpJV5 pMV0NLaM6/xNmV46YDqmA54QcpVZUf7ULB8Oy0F03GUh7Yee8PQFS6Jvgn/G4XZvZxxM X+AZ3AqSrGh0FUlGOJDkMiraL0eDqdjL02vLNMjX+J9shhGXm31607Lx4MTlioNTS7EB aGvA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=XNk3389iCBf5u7sokbp91gKblB34yjfbY1VaUryvTVM=; b=cvUeQOz+qnhJ0FQqexZump2bNJBvjn3rBldY4ri7d6av7FcukJCm9sdfE9Wrbp5B80 e8rcYsaqyhAx7o3kqUs5Ed42mciPzfE2YNSF8rUb+c+gnw2MqM9XMFMrkP7SpdUyXqnX jR5OVSY65PggB4rxU0aWUGBe/k18kt+ZOv+Slva/6E8WIVi4u411RULv5B49hn7mfcTL 44ogySyGh+c1aq+nseUWHquFDuKMbWn9AWj0dU8z81nJAMrmoFCFTj4NxBv/edDUBo8g P36nERhnAEtIFoTve37x9OpOzyu5aMjzllP7RQMyxy9onhuVoRIbJ0cFO74PUbdc39+/ dhCA== X-Gm-Message-State: APjAAAWhGXohom/TMYwFd9IBUBqro3zUGksn9x4CwTX1tzmqlpVtX9V7 Z1cNDSgIflvki1tV+QDbK3O7oLsesXU= X-Received: by 2002:adf:9167:: with SMTP id j94mr6531671wrj.106.1551356883996; Thu, 28 Feb 2019 04:28:03 -0800 (PST) Received: from localhost ([49.248.54.130]) by smtp.gmail.com with ESMTPSA id z16sm12711540wrr.66.2019.02.28.04.28.02 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 28 Feb 2019 04:28:03 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, Daniel Lezcano , David Brown , Zhang Rui Cc: linux-pm@vger.kernel.org Subject: [PATCH v2 21/24] drivers: thermal: tsens: Add generic support for TSENS v1 IP Date: Thu, 28 Feb 2019 17:51:11 +0530 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org qcs404 has a single TSENS IP block with 10 sensors. It uses version 1.4 of the TSENS IP, functionality for which is encapsulated inside the qcom,tsens-v1 compatible. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/Makefile | 4 +- drivers/thermal/qcom/tsens-v1.c | 194 ++++++++++++++++++++++++++++++++ drivers/thermal/qcom/tsens.c | 3 + drivers/thermal/qcom/tsens.h | 3 + 4 files changed, 203 insertions(+), 1 deletion(-) create mode 100644 drivers/thermal/qcom/tsens-v1.c -- 2.17.1 diff --git a/drivers/thermal/qcom/Makefile b/drivers/thermal/qcom/Makefile index 7fa3cadce760..fc6fe50cdde4 100644 --- a/drivers/thermal/qcom/Makefile +++ b/drivers/thermal/qcom/Makefile @@ -1,3 +1,5 @@ obj-$(CONFIG_QCOM_TSENS) += qcom_tsens.o -qcom_tsens-y += tsens.o tsens-common.o tsens-v0_1.o tsens-8960.o tsens-v2.o + +qcom_tsens-y += tsens.o tsens-common.o tsens-v0_1.o \ + tsens-8960.o tsens-v2.o tsens-v1.o obj-$(CONFIG_QCOM_SPMI_TEMP_ALARM) += qcom-spmi-temp-alarm.o diff --git a/drivers/thermal/qcom/tsens-v1.c b/drivers/thermal/qcom/tsens-v1.c new file mode 100644 index 000000000000..5b90b8282806 --- /dev/null +++ b/drivers/thermal/qcom/tsens-v1.c @@ -0,0 +1,194 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2019, Linaro Limited + */ + +#include +#include +#include +#include "tsens.h" + +/* ----- SROT ------ */ +#define SROT_HW_VER_OFF 0x0000 +#define SROT_CTRL_OFF 0x0004 + +/* ----- TM ------ */ +#define TM_INT_EN_OFF 0x0000 +#define TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF 0x0004 +#define TM_Sn_STATUS_OFF 0x0044 +#define TM_TRDY_OFF 0x0084 + +/* eeprom layout data for qcs404/405 (v1) */ +#define BASE0_MASK 0x000007f8 +#define BASE1_MASK 0x0007f800 +#define BASE0_SHIFT 3 +#define BASE1_SHIFT 11 + +#define S0_P1_MASK 0x0000003f +#define S1_P1_MASK 0x0003f000 +#define S2_P1_MASK 0x3f000000 +#define S3_P1_MASK 0x000003f0 +#define S4_P1_MASK 0x003f0000 +#define S5_P1_MASK 0x0000003f +#define S6_P1_MASK 0x0003f000 +#define S7_P1_MASK 0x3f000000 +#define S8_P1_MASK 0x000003f0 +#define S9_P1_MASK 0x003f0000 + +#define S0_P2_MASK 0x00000fc0 +#define S1_P2_MASK 0x00fc0000 +#define S2_P2_MASK_1_0 0xc0000000 +#define S2_P2_MASK_5_2 0x0000000f +#define S3_P2_MASK 0x0000fc00 +#define S4_P2_MASK 0x0fc00000 +#define S5_P2_MASK 0x00000fc0 +#define S6_P2_MASK 0x00fc0000 +#define S7_P2_MASK_1_0 0xc0000000 +#define S7_P2_MASK_5_2 0x0000000f +#define S8_P2_MASK 0x0000fc00 +#define S9_P2_MASK 0x0fc00000 + +#define S0_P1_SHIFT 0 +#define S0_P2_SHIFT 6 +#define S1_P1_SHIFT 12 +#define S1_P2_SHIFT 18 +#define S2_P1_SHIFT 24 +#define S2_P2_SHIFT_1_0 30 + +#define S2_P2_SHIFT_5_2 0 +#define S3_P1_SHIFT 4 +#define S3_P2_SHIFT 10 +#define S4_P1_SHIFT 16 +#define S4_P2_SHIFT 22 + +#define S5_P1_SHIFT 0 +#define S5_P2_SHIFT 6 +#define S6_P1_SHIFT 12 +#define S6_P2_SHIFT 18 +#define S7_P1_SHIFT 24 +#define S7_P2_SHIFT_1_0 30 + +#define S7_P2_SHIFT_5_2 0 +#define S8_P1_SHIFT 4 +#define S8_P2_SHIFT 10 +#define S9_P1_SHIFT 16 +#define S9_P2_SHIFT 22 + +#define CAL_SEL_MASK 7 +#define CAL_SEL_SHIFT 0 + +static int calibrate_v1(struct tsens_priv *priv) +{ + u32 base0 = 0, base1 = 0; + u32 p1[10], p2[10]; + u32 mode = 0, lsb = 0, msb = 0; + u32 *qfprom_cdata; + int i; + + qfprom_cdata = (u32 *)qfprom_read(priv->dev, "calib"); + if (IS_ERR(qfprom_cdata)) + return PTR_ERR(qfprom_cdata); + + mode = (qfprom_cdata[4] & CAL_SEL_MASK) >> CAL_SEL_SHIFT; + dev_dbg(priv->dev, "calibration mode is %d\n", mode); + + switch (mode) { + case TWO_PT_CALIB: + base1 = (qfprom_cdata[4] & BASE1_MASK) >> BASE1_SHIFT; + p2[0] = (qfprom_cdata[0] & S0_P2_MASK) >> S0_P2_SHIFT; + p2[1] = (qfprom_cdata[0] & S1_P2_MASK) >> S1_P2_SHIFT; + /* This value is split over two registers, 2 bits and 4 bits */ + lsb = (qfprom_cdata[0] & S2_P2_MASK_1_0) >> S2_P2_SHIFT_1_0; + msb = (qfprom_cdata[1] & S2_P2_MASK_5_2) >> S2_P2_SHIFT_5_2; + p2[2] = msb << 2 | lsb; + p2[3] = (qfprom_cdata[1] & S3_P2_MASK) >> S3_P2_SHIFT; + p2[4] = (qfprom_cdata[1] & S4_P2_MASK) >> S4_P2_SHIFT; + p2[5] = (qfprom_cdata[2] & S5_P2_MASK) >> S5_P2_SHIFT; + p2[6] = (qfprom_cdata[2] & S6_P2_MASK) >> S6_P2_SHIFT; + /* This value is split over two registers, 2 bits and 4 bits */ + lsb = (qfprom_cdata[2] & S7_P2_MASK_1_0) >> S7_P2_SHIFT_1_0; + msb = (qfprom_cdata[3] & S7_P2_MASK_5_2) >> S7_P2_SHIFT_5_2; + p2[7] = msb << 2 | lsb; + p2[8] = (qfprom_cdata[3] & S8_P2_MASK) >> S8_P2_SHIFT; + p2[9] = (qfprom_cdata[3] & S9_P2_MASK) >> S9_P2_SHIFT; + for (i = 0; i < priv->num_sensors; i++) + p2[i] = ((base1 + p2[i]) << 2); + /* Fall through */ + case ONE_PT_CALIB2: + base0 = (qfprom_cdata[4] & BASE0_MASK) >> BASE0_SHIFT; + p1[0] = (qfprom_cdata[0] & S0_P1_MASK) >> S0_P1_SHIFT; + p1[1] = (qfprom_cdata[0] & S1_P1_MASK) >> S1_P1_SHIFT; + p1[2] = (qfprom_cdata[0] & S2_P1_MASK) >> S2_P1_SHIFT; + p1[3] = (qfprom_cdata[1] & S3_P1_MASK) >> S3_P1_SHIFT; + p1[4] = (qfprom_cdata[1] & S4_P1_MASK) >> S4_P1_SHIFT; + p1[5] = (qfprom_cdata[2] & S5_P1_MASK) >> S5_P1_SHIFT; + p1[6] = (qfprom_cdata[2] & S6_P1_MASK) >> S6_P1_SHIFT; + p1[7] = (qfprom_cdata[2] & S7_P1_MASK) >> S7_P1_SHIFT; + p1[8] = (qfprom_cdata[3] & S8_P1_MASK) >> S8_P1_SHIFT; + p1[9] = (qfprom_cdata[3] & S9_P1_MASK) >> S9_P1_SHIFT; + for (i = 0; i < priv->num_sensors; i++) + p1[i] = (((base0) + p1[i]) << 2); + break; + default: + for (i = 0; i < priv->num_sensors; i++) { + p1[i] = 500; + p2[i] = 780; + } + break; + } + + compute_intercept_slope(priv, p1, p2, mode); + + return 0; +} + +/* v1.x: qcs404,405 */ + +const struct tsens_features tsens_v1_feat = { + .ver_info = 1, + .crit_int = 0, + .adc = 1, + .srot_split = 1, + .max_sensors = 11, +}; + +const struct reg_field tsens_v1_regfields[MAX_REGFIELDS] = { + /* ----- SROT ------ */ + /* VERSION */ + [VER_MAJOR] = REG_FIELD(SROT_HW_VER_OFF, 28, 31), + [VER_MINOR] = REG_FIELD(SROT_HW_VER_OFF, 16, 27), + [VER_STEP] = REG_FIELD(SROT_HW_VER_OFF, 0, 15), + /* CTRL_OFFSET */ + [TSENS_EN] = REG_FIELD(SROT_CTRL_OFF, 0, 0), + [TSENS_SW_RST] = REG_FIELD(SROT_CTRL_OFF, 1, 1), + [SENSOR_EN] = REG_FIELD(SROT_CTRL_OFF, 3, 13), + + /* ----- TM ------ */ + /* UPPER_LOWER_INTERRUPT_CTRL */ + [INT_EN] = REG_FIELD(TM_INT_EN_OFF, 0, 0), + /* Sn_UPPER_LOWER_STATUS_CTRL */ + REG_FIELD_FOR_EACH_SENSOR10(LOW_THRESH, TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF, 0, 9), + REG_FIELD_FOR_EACH_SENSOR10(UP_THRESH, TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF, 10, 19), + /* Sn_STATUS */ + REG_FIELD_FOR_EACH_SENSOR10(LAST_TEMP, TM_Sn_STATUS_OFF, 0, 9), + REG_FIELD_FOR_EACH_SENSOR10(VALID, TM_Sn_STATUS_OFF, 14, 14), + REG_FIELD_FOR_EACH_SENSOR10(MIN_STATUS, TM_Sn_STATUS_OFF, 10, 10), + REG_FIELD_FOR_EACH_SENSOR10(MAX_STATUS, TM_Sn_STATUS_OFF, 13, 13), + REG_FIELD_FOR_EACH_SENSOR10(UPPER_STATUS, TM_Sn_STATUS_OFF, 12, 12), + REG_FIELD_FOR_EACH_SENSOR10(LOWER_STATUS, TM_Sn_STATUS_OFF, 11, 11), + + /* TRDY: 1=ready, 0=in progress */ + [TRDY] = REG_FIELD(TM_TRDY_OFF, 0, 0), +}; + +static const struct tsens_ops ops_generic_v1 = { + .init = init_common, + .calibrate = calibrate_v1, + .get_temp = get_temp_tsens_valid, +}; + +const struct tsens_plat_data data_tsens_v1 = { + .ops = &ops_generic_v1, + .feat = &tsens_v1_feat, + .fields = tsens_v1_regfields, +}; diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c index fc44cac31fa5..36b0b52db524 100644 --- a/drivers/thermal/qcom/tsens.c +++ b/drivers/thermal/qcom/tsens.c @@ -63,6 +63,9 @@ static const struct of_device_id tsens_table[] = { }, { .compatible = "qcom,msm8996-tsens", .data = &data_8996, + }, { + .compatible = "qcom,tsens-v1", + .data = &data_tsens_v1, }, { .compatible = "qcom,tsens-v2", .data = &data_tsens_v2, diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index 1cef2b8431eb..4a37da63afa2 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -373,6 +373,9 @@ extern const struct tsens_plat_data data_8960; /* TSENS v0.1 targets */ extern const struct tsens_plat_data data_8916, data_8974; +/* TSENS v1 targets */ +extern const struct tsens_plat_data data_tsens_v1; + /* TSENS v2 targets */ extern const struct tsens_plat_data data_8996, data_tsens_v2; From patchwork Thu Feb 28 12:21:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 159368 Delivered-To: patch@linaro.org Received: by 2002:a02:5cc1:0:0:0:0:0 with SMTP id w62csp577593jad; Thu, 28 Feb 2019 04:28:32 -0800 (PST) X-Google-Smtp-Source: AHgI3IYVUXrPCuOkV7aUO5QGjZtBOUoqbCHRVFWnt3b6G4AiHX42Scw3izfuRuHPoVFZSFKuWLsO X-Received: by 2002:a63:d453:: with SMTP id i19mr8192369pgj.237.1551356912190; Thu, 28 Feb 2019 04:28:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1551356912; cv=none; d=google.com; s=arc-20160816; b=nfQvloi098LDFjjeXsgTG7p6IxdI17eUJkrAjDdCvNsIHPT7KkqmMv9t2EBgwxPyw8 1J5RXRBFtZ/iNZskM2Jsj3RKaaQ3uUH5eiaKKt/f1sFvG4d9AszXoBTj0dAAMf0dj51I EpEkhFNPYgouRGf2wggcPyvQ4w4HTuBQ4QpaQAaKt2Twy73iPZyhj4idVreKxR4w1eKX EKzdxSvEJNzORjdUNJO9vIfePZqEusBsPalXd84s9SZ6E7IDBxz/kUNSxpbJyCEzTwOB 9CRHHZvTHQSNijtxO3lMmORqC86u3GaHM2nLx7tESShp0gnzRD3nXCBRg96HFNihYw7l XMmg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=z0Pv9W6V6xAvYLrMMAqJDtvisCVEQyxnavBeNRE47KI=; b=kQkI3++3rIaFisjsKudmlN2Z9fQ+hmWRCHs1LaNB22N9wGlaQZU29hFIMPEqABF7YP HEoTDPsWbOOn+omuz6gxwDejj0RB4ANrJp9/+Xgo4TjWOKStl95oCDXErIxw3pLCFcHg 95BV8Hk7AVBw8Cm3M3cF5DoMGsrRbRezJk0OZsL7G1rhAj14Y8V/FS9+opEPlQILXd0w 5kxNTkukbIFNvobK8fEXTwJ0lKRmoUdF1ku7I3zu6mO2k0l6BmHGkN648ecXQHu38fiq UX+zlPxR/Mlu/AQhRpiBZhldHbQuJutSag9Ade33UWim/LC6sDMT6qQ1SEa+N3t98Gf0 trog== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ywD5FOQq; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q77si18356463pfi.220.2019.02.28.04.28.31; Thu, 28 Feb 2019 04:28:32 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ywD5FOQq; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732488AbfB1M23 (ORCPT + 31 others); Thu, 28 Feb 2019 07:28:29 -0500 Received: from mail-wr1-f68.google.com ([209.85.221.68]:40620 "EHLO mail-wr1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732459AbfB1M2Y (ORCPT ); Thu, 28 Feb 2019 07:28:24 -0500 Received: by mail-wr1-f68.google.com with SMTP id q1so21759729wrp.7 for ; Thu, 28 Feb 2019 04:28:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=z0Pv9W6V6xAvYLrMMAqJDtvisCVEQyxnavBeNRE47KI=; b=ywD5FOQqyHAsy5hEya0LE005z0b0ITcXsfVom/AHXpRCx/3zasTFfE5FHi1tiwBdm5 OasMo9oTGyELYXBY87otuAIrCt9g+2VSTjtOO1lfOdXXSDsNbw7JwOp3syYhILOsi1I7 Qu/yINJYHEKhHD1PZYGpUWUZ3abLBF6CEqOLtIhb/f50+2rKu0Oayhhj3tTiIefQYVrO wIOB3tKhlRYR0q4pTGta01gh6O5ISVrPcWYsGPoUHTLdxBpNh8PVABitcxlii2Mxr37m ehKPRTKVX8RhfWJ/YgeqrVh7f9SPpmHyLRBu0yKOzy9d+WCWVuBoa4nPSNr7Vifyp7Gt rk/A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=z0Pv9W6V6xAvYLrMMAqJDtvisCVEQyxnavBeNRE47KI=; b=K9T+24vzR/kiT2BdyWGRhGH/uUTEvrYH1norXB3BjuKSIAEciniIUN/pmF6UoF4cxj k8U3Ak8MedAUVcRuAQFE6fYCnkrvcKwCQMl0nmApttEf4f57ysdcTcUGMrkAWFhSORNu XtHqlcaCYB2sCRS01kzEv8ReXhlS5lnka1b6DmvRQ2Y55AQUTXnHZMVNjx/wm2BdpuYc qJ814PLAS9/L0SrXoHka0mxJz3RtCwW76ic43vK9Rpp4HN5vnkiehVOytJNKVYeLY23G vfHET04JdyA+J21JPhTIn9U7ppQNxSXP1VvHdvPyBAmEeDlir5Szd1uEB+XeQv5Xjc3/ DsxA== X-Gm-Message-State: APjAAAXVYXglOicciquUIbSI7w0dF8zBaxrN/qIofIJNdhFYn/oSfeEJ nkrqzGalGlzxXS9FZaXixxXTORltUIk= X-Received: by 2002:adf:f845:: with SMTP id d5mr6588103wrq.113.1551356902264; Thu, 28 Feb 2019 04:28:22 -0800 (PST) Received: from localhost ([49.248.54.130]) by smtp.gmail.com with ESMTPSA id u134sm4656970wmf.21.2019.02.28.04.28.20 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 28 Feb 2019 04:28:21 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, Daniel Lezcano , David Brown , Zhang Rui Cc: linux-pm@vger.kernel.org Subject: [PATCH v2 24/24] drivers: thermal: tsens: Move calibration constants to header file Date: Thu, 28 Feb 2019 17:51:14 +0530 Message-Id: <0942161bb30c6eb9fb57cd480ac21a31f4ee0c68.1551355503.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This will allow calibration routines to correctly include the constants from anywhere and allow more code sharing. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-common.c | 5 ----- drivers/thermal/qcom/tsens.h | 5 +++++ 2 files changed, 5 insertions(+), 5 deletions(-) -- 2.17.1 diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c index 5db1aa441910..0fcfe6b30c55 100644 --- a/drivers/thermal/qcom/tsens-common.c +++ b/drivers/thermal/qcom/tsens-common.c @@ -12,11 +12,6 @@ #include #include "tsens.h" -#define CAL_DEGC_PT1 30 -#define CAL_DEGC_PT2 120 -#define SLOPE_FACTOR 1000 -#define SLOPE_DEFAULT 3200 - char *qfprom_read(struct device *dev, const char *cname) { struct nvmem_cell *cell; diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index 4a37da63afa2..88d1ccfbc019 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -9,6 +9,11 @@ #define ONE_PT_CALIB 0x1 #define ONE_PT_CALIB2 0x2 #define TWO_PT_CALIB 0x3 +#define CAL_DEGC_PT1 30 +#define CAL_DEGC_PT2 120 +#define SLOPE_FACTOR 1000 +#define SLOPE_DEFAULT 3200 + #include #include