From patchwork Mon Mar 4 08:58:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "\(Exiting\) Baolin Wang" X-Patchwork-Id: 159540 Delivered-To: patch@linaro.org Received: by 2002:a02:5cc1:0:0:0:0:0 with SMTP id w62csp3549820jad; Mon, 4 Mar 2019 00:59:18 -0800 (PST) X-Google-Smtp-Source: APXvYqwWYq2gU+cs82Wz+2vk6cocTeS6zbOfaE9hfgCRnJ46BFMFvbdxMjULlX+DK36JsS74ZjxJ X-Received: by 2002:a63:f407:: with SMTP id g7mr8129714pgi.413.1551689958037; Mon, 04 Mar 2019 00:59:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1551689958; cv=none; d=google.com; s=arc-20160816; b=L1tS7SmOxLIu/0uWC/h9zeMqWphU2vb9Uf6w+Ia7rGHrXRxula/HeDpQsJNTRuqQrY DyVM+a1nvJmB+PQ5NBjwagXONs5lgk82iWF6af6Wk62b5JmXXWJ+h9YN1++pJpp9FWLw PrYXR71j9K2UZ/XzWlEwQ6k70YwKDDGs6ZMP+MFi/wUOYCATbdwCOy7f58HCHi/ku3cf eFb9EeOS7nMzZkEoMkxsK5283trkZL64unXCfE6wW4964hBZPzCCZavIzwPc+8edqGIp 8plcMYEcyfbkv+wuMjD/VBGagqA0v3xixI/R2Kz7Hw1DhPbfaMGcTY/isBbvadkVoRrh 8whw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=erjr86oMLhdwQf8KWy1LxxMQVqAK5fko/hTjOOdELXM=; b=zk/ZwfiBKmgWgAiUXRoqcgXU24+oJQn1sGmWKEX/Yk/Apnt+BmZ6nWztlvj8S5yDLe HErtTzCXstpnkbE6gHKZuHNG6WIMVocpK6CCe4lxvGiyLKW4pBmKK080cZdtNO6JLgnC NTQQP8zal/UPHtARLVXpeIN8l+r0MP6kYFuac7DrHIK2EkrvKJzkycps73l0YEZb3scj YFgAUxVWPoAqPiQ8jylZDWkyUPDMIZl3Tsyx4YlN0/VyZJHwUgsSMQGeyvx7121vN/G2 Y7T6d9YPyOE2bbRwvEx8bgfRCL/O0/FmMoNTC+4Apd1PxxxkeQ/ez6zNdOnfUC4S0ev+ VnEw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cb23GoF1; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q188si5252432pfc.159.2019.03.04.00.59.17; Mon, 04 Mar 2019 00:59:18 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cb23GoF1; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726014AbfCDI7Q (ORCPT + 2 others); Mon, 4 Mar 2019 03:59:16 -0500 Received: from mail-pg1-f196.google.com ([209.85.215.196]:42406 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726249AbfCDI7Q (ORCPT ); Mon, 4 Mar 2019 03:59:16 -0500 Received: by mail-pg1-f196.google.com with SMTP id b2so2607375pgl.9 for ; Mon, 04 Mar 2019 00:59:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=erjr86oMLhdwQf8KWy1LxxMQVqAK5fko/hTjOOdELXM=; b=cb23GoF1rFTCR3NT0z1HHqUH3WdzZ/dCIhy6/WnT5dmwIgz35dDJsZOnHsPbszXzB1 MypgQ9kGA4ucK/5Ha3Lt6JKyLrgSH02NaKXwZNRRokkET1u+qz+a0+jrGqWaNjpqYII1 JItWci+qsRCshGdGqKc1S063Wq+RKB9LjGssGmn06sHUfrv3aN0O74xW1CZDTTXwc3tS 7s/BO7Oz9+q4dIuYK1CC8JWCKMJ1mHBPcOSXkcyCy96uM+O82zswvdRSqBdg67IzsApd FHtybPvmneKWmuAFalmPbORSP0umz4WrbcOBpyM5effr5eEA7zdLZgm+MCHKMKPcntmo ljXw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=erjr86oMLhdwQf8KWy1LxxMQVqAK5fko/hTjOOdELXM=; b=rrvzOHWp2kx9YuK9Q95gmUodpRQqf2VA/z5ItwphpLJqOM8rXRXi96A+HY8o05gIdR P7uNz0VuhSKU7szicFMIpD7iYU8yMCMleeU6Qdi2c51+M3cfXarWpgJj+jrLKk6QLmtD 7AVKSnyznjq88q91igkVxl6FnxTjWcEz9Tf9tMJPfqn9n49EsNw2j3X/10J/8rXkSBic awxByx/nU9Phw7Um6FzQ2xDciaE6RI2OlNNriMb4xC7Plr5MYqp5blQci7ggKzlIcISw mkSz/BJmatB/ZXXSEAhGqidWXJFSqMdSMgJjhH/gMAGAoOaiWnwxhgeyhG/ZZH8R8EOv 74nA== X-Gm-Message-State: APjAAAWKBNX8xGgYAifhUzh5iMdqklvYR0aDo2cfkQ9Qf4XYnU+7Ae8L 3xpFEzRylHC/uy5Ni5aBA6ACqw== X-Received: by 2002:a17:902:b708:: with SMTP id d8mr18875488pls.322.1551689955316; Mon, 04 Mar 2019 00:59:15 -0800 (PST) Received: from baolinwangubtpc.spreadtrum.com ([117.18.48.102]) by smtp.gmail.com with ESMTPSA id k8sm7395523pgg.75.2019.03.04.00.59.10 (version=TLS1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 04 Mar 2019 00:59:14 -0800 (PST) From: Baolin Wang To: gregkh@linuxfoundation.org, jslaby@suse.com, robh+dt@kernel.org, mark.rutland@arm.com, orsonzhai@gmail.com, zhang.lyra@gmail.com Cc: baolin.wang@linaro.org, broonie@kernel.org, lanqing.liu@unisoc.com, linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 1/4] dt-bindings: serial: sprd: Add clocks and clocks-names properties Date: Mon, 4 Mar 2019 16:58:21 +0800 Message-Id: <5ab4cff84b36146cfcdbc0a341a46ac6d9a05dd2.1551689518.git.baolin.wang@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: In-Reply-To: References: Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Lanqing Liu This patch adds clocks and clocks-names properties, which are used to do power management for our UART driver. Reviewed-by: Rob Herring Signed-off-by: Lanqing Liu Signed-off-by: Baolin Wang --- .../devicetree/bindings/serial/sprd-uart.txt | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) -- 1.7.9.5 diff --git a/Documentation/devicetree/bindings/serial/sprd-uart.txt b/Documentation/devicetree/bindings/serial/sprd-uart.txt index cab40f0..6eb5863 100644 --- a/Documentation/devicetree/bindings/serial/sprd-uart.txt +++ b/Documentation/devicetree/bindings/serial/sprd-uart.txt @@ -7,7 +7,13 @@ Required properties: - reg: offset and length of the register set for the device - interrupts: exactly one interrupt specifier -- clocks: phandles to input clocks. +- clock-names: Should contain following entries: + "enable" for UART module enable clock, + "uart" for UART clock, + "source" for UART source (parent) clock. +- clocks: Should contain a clock specifier for each entry in clock-names. + UART clock and source clock are optional properties, but enable clock + is required. Example: uart0: serial@0 { @@ -15,5 +21,6 @@ Example: "sprd,sc9836-uart"; reg = <0x0 0x100>; interrupts = ; - clocks = <&ext_26m>; + clock-names = "enable", "uart", "source"; + clocks = <&clk_ap_apb_gates 9>, <&clk_uart0>, <&ext_26m>; };