From patchwork Wed Oct 19 21:54:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Norris X-Patchwork-Id: 616619 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D1110C433FE for ; Wed, 19 Oct 2022 21:55:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231317AbiJSVzQ (ORCPT ); Wed, 19 Oct 2022 17:55:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52258 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230359AbiJSVzE (ORCPT ); Wed, 19 Oct 2022 17:55:04 -0400 Received: from mail-pj1-x1036.google.com (mail-pj1-x1036.google.com [IPv6:2607:f8b0:4864:20::1036]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B3552108DF1 for ; Wed, 19 Oct 2022 14:55:01 -0700 (PDT) Received: by mail-pj1-x1036.google.com with SMTP id t10-20020a17090a4e4a00b0020af4bcae10so1222763pjl.3 for ; Wed, 19 Oct 2022 14:55:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=IbNbprVwcMSh5axZvXvg/6/Lf17+C73zGfmFV0q4APA=; b=jtc5lQ401QtVqG1hgM5C8nhqiLVLg/sUDSKTS1D2u8U8fBBwlC0CdcdAz0f5osiCdj 2xjAgzGdyS3CHjlU1Sk4hXJybQubvQjcO7XWn3h9H8+wa4RBvF1yedA6C43RCQURquc8 1Kx+U/fZ4Czw7qxoo3ox60jKt3Bdk8T81A02Y= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=IbNbprVwcMSh5axZvXvg/6/Lf17+C73zGfmFV0q4APA=; b=suuJAGqMwc6InOtXr49k2UNm0B6FkHavwVy50+bGSut6v7pcGw3/0Ku2Aeqcjr/HqK vFFynTUhl8pb7oiwYrGdwgpnjf6ord7f59TsRa9p/QHfdHSdt4d8BOiWRBM/lncbqW9l AtSzZlWf0OTjzqdVGzFYo0qoIHvttBXAia2gKi1cTFkwfc8jEKWcXwiRWwLqbVJxxFGH qCU+r4muOWjbVjlEMfRMGv+TElDOuzk28PKkv82mBaOUdVYB6HyQMEyakcXhZuDksXN7 JaY5FhWZF6IB04ky1lcvud2hE2utGSXcab5O2AUnL4wYdAps8xbcfuBEgmkyB3JP1N31 pJGg== X-Gm-Message-State: ACrzQf0vsRvVrigCus4Zn1L2vNISPBblDBFVn890E5tAK31Q1BlkWy3L 7kfzBXenduemjW38nHTE5mQjpw== X-Google-Smtp-Source: AMsMyM6biSOLBTJXDiepLZa0bJF7XTtefUmddHCt+LNdnoBA/Qap1OlbiXCBCai37p9OD4hzq8ZSUw== X-Received: by 2002:a17:902:bd46:b0:17e:8ee5:7b61 with SMTP id b6-20020a170902bd4600b0017e8ee57b61mr10878542plx.44.1666216501002; Wed, 19 Oct 2022 14:55:01 -0700 (PDT) Received: from localhost ([2620:15c:9d:2:57b7:1f0e:44d1:f252]) by smtp.gmail.com with UTF8SMTPSA id q13-20020a170902f34d00b0017680faa1a8sm11113715ple.112.2022.10.19.14.54.59 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 19 Oct 2022 14:55:00 -0700 (PDT) From: Brian Norris To: Ulf Hansson Cc: Shawn Lin , Shawn Guo , Fabio Estevam , Haibo Chen , Broadcom internal kernel review list , NXP Linux Team , Pengutronix Kernel Team , Florian Fainelli , Michal Simek , Faiz Abbas , linux-mmc@vger.kernel.org, Jonathan Hunter , Al Cooper , linux-arm-kernel@lists.infradead.org, Sowjanya Komatineni , linux-kernel@vger.kernel.org, Thierry Reding , Adrian Hunter , Sascha Hauer , Brian Norris , stable@vger.kernel.org Subject: [PATCH v2 1/7] mmc: cqhci: Handle deactivate() when not yet initialized Date: Wed, 19 Oct 2022 14:54:34 -0700 Message-Id: <20221019145246.v2.1.Ie85faa09432bfe1b0890d8c24ff95e17f3097317@changeid> X-Mailer: git-send-email 2.38.0.413.g74048e4d9e-goog In-Reply-To: <20221019215440.277643-1-briannorris@chromium.org> References: <20221019215440.277643-1-briannorris@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Several SDHCI drivers need to deactivate command queueing in their reset hook (see sdhci_cqhci_reset() / sdhci-pci-core.c, for example), and several more are coming. Such drivers also tend to initialize CQHCI support after they've already performed one or more resets. Rather than rely on careful ordering of cqhci_init() within the host setup and reset sequence, let's do a simple NULL check -- deactivating a non-initialized CQHCI instance is harmless. This is an important prerequisite patch for several SDHCI controller bugfixes that follow. Cc: Signed-off-by: Brian Norris --- Changes in v2: - New in v2 drivers/mmc/host/cqhci-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/host/cqhci-core.c b/drivers/mmc/host/cqhci-core.c index b3d7d6d8d654..1fa1d24abb2e 100644 --- a/drivers/mmc/host/cqhci-core.c +++ b/drivers/mmc/host/cqhci-core.c @@ -315,7 +315,7 @@ int cqhci_deactivate(struct mmc_host *mmc) { struct cqhci_host *cq_host = mmc->cqe_private; - if (cq_host->enabled && cq_host->activated) + if (cq_host && cq_host->enabled && cq_host->activated) __cqhci_disable(cq_host); return 0; From patchwork Wed Oct 19 21:54:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Norris X-Patchwork-Id: 616618 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 857D4C433FE for ; Wed, 19 Oct 2022 21:55:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231278AbiJSVzS (ORCPT ); Wed, 19 Oct 2022 17:55:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53216 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230490AbiJSVzP (ORCPT ); Wed, 19 Oct 2022 17:55:15 -0400 Received: from mail-pj1-x102d.google.com (mail-pj1-x102d.google.com [IPv6:2607:f8b0:4864:20::102d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7847212D819 for ; Wed, 19 Oct 2022 14:55:04 -0700 (PDT) Received: by mail-pj1-x102d.google.com with SMTP id p6-20020a17090a748600b002103d1ef63aso1232656pjk.1 for ; Wed, 19 Oct 2022 14:55:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wM2IDLgue12Ad+DXG6n65QaMf2Usako+kvEgT4ayRuw=; b=P9xh6e4apUo13+Bt+rHIp6EuqJMIiUwXM/U5iOlFltsDzYC4M2zMfANe3ac58Df+ky UYxhWgd939/1ubf4zs5WLE0o2W9F3CORrm8/JKY4Or2z15NzJ0BGgH+C6pR3U37vL1UK /KY+ka3bAw4D0/6GDa+0iz80u3IAPzKerGtKQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wM2IDLgue12Ad+DXG6n65QaMf2Usako+kvEgT4ayRuw=; b=fCKsCl02eqGIzp4mYxYQrsyVvke99QZ45vTVFFkGlt7ZWmyw83uhK1Db4VC5k+hDz+ rCyae29X19TJmu4qy57MSe4BIfArJVf2WB/pVDkO5/XUzHU62l3A8622lb9NEmWXBG9/ Q433TOlzlfhsB0G+GzXTTHMrZaEPfN8Kv3HYRnJI57bbeLIh9UgTwcjtMAILgJrDx720 ulTX1OZGWbha7RyPhSZVgG5HvqE3cEMDIQj1jF/1qRDyO3iKGn09RhL1g156+ggvBJgt ql/fmCOWGY8oiFKZrKCW/xg82wmomchEF18T06SQAwtnPUYR5pgjShQpNdKv/lOu/GeX vnEA== X-Gm-Message-State: ACrzQf3SjM78OOBpF5njyVl7tY3eZ7lunJGE4guxk23A7tcszf1UuvAH VHIib+We4ux14tYvtBjJYjt4dQ== X-Google-Smtp-Source: AMsMyM7vUE8Fp5kcHD6AC+bhdyPVFMm4OFEH49dApU6rqHJa/RST4C6r/WJjKQp+vLJkH2kqDi+mFw== X-Received: by 2002:a17:902:b402:b0:179:e5b0:96d3 with SMTP id x2-20020a170902b40200b00179e5b096d3mr10441531plr.142.1666216503892; Wed, 19 Oct 2022 14:55:03 -0700 (PDT) Received: from localhost ([2620:15c:9d:2:57b7:1f0e:44d1:f252]) by smtp.gmail.com with UTF8SMTPSA id z28-20020aa7949c000000b0052d4b0d0c74sm11831033pfk.70.2022.10.19.14.55.01 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 19 Oct 2022 14:55:03 -0700 (PDT) From: Brian Norris To: Ulf Hansson Cc: Shawn Lin , Shawn Guo , Fabio Estevam , Haibo Chen , Broadcom internal kernel review list , NXP Linux Team , Pengutronix Kernel Team , Florian Fainelli , Michal Simek , Faiz Abbas , linux-mmc@vger.kernel.org, Jonathan Hunter , Al Cooper , linux-arm-kernel@lists.infradead.org, Sowjanya Komatineni , linux-kernel@vger.kernel.org, Thierry Reding , Adrian Hunter , Sascha Hauer , Brian Norris , stable@vger.kernel.org Subject: [PATCH v2 2/7] mmc: sdhci-of-arasan: Fix SDHCI_RESET_ALL for CQHCI Date: Wed, 19 Oct 2022 14:54:35 -0700 Message-Id: <20221019145246.v2.2.I29f6a2189e84e35ad89c1833793dca9e36c64297@changeid> X-Mailer: git-send-email 2.38.0.413.g74048e4d9e-goog In-Reply-To: <20221019215440.277643-1-briannorris@chromium.org> References: <20221019215440.277643-1-briannorris@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org SDHCI_RESET_ALL resets will reset the hardware CQE state, but we aren't tracking that properly in software. When out of sync, we may trigger various timeouts. It's not typical to perform resets while CQE is enabled, but one particular case I hit commonly enough: mmc_suspend() -> mmc_power_off(). Typically we will eventually deactivate CQE (cqhci_suspend() -> cqhci_deactivate()), but that's not guaranteed -- in particular, if we perform a partial (e.g., interrupted) system suspend. The same bug was already found and fixed for two other drivers, in v5.7 and v5.9: 5cf583f1fb9c mmc: sdhci-msm: Deactivate CQE during SDHC reset df57d73276b8 mmc: sdhci-pci: Fix SDHCI_RESET_ALL for CQHCI for Intel GLK-based controllers The latter is especially prescient, saying "other drivers using CQHCI might benefit from a similar change, if they also have CQHCI reset by SDHCI_RESET_ALL." So like these other patches, deactivate CQHCI when resetting the controller. Fixes: 84362d79f436 ("mmc: sdhci-of-arasan: Add CQHCI support for arasan,sdhci-5.1") Cc: Signed-off-by: Brian Norris --- Changes in v2: - Rely on cqhci_deactivate() to safely handle (ignore) not-yet-initialized CQE support drivers/mmc/host/sdhci-of-arasan.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c index 3997cad1f793..b30f0d6baf5b 100644 --- a/drivers/mmc/host/sdhci-of-arasan.c +++ b/drivers/mmc/host/sdhci-of-arasan.c @@ -366,6 +366,9 @@ static void sdhci_arasan_reset(struct sdhci_host *host, u8 mask) struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host); + if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL)) + cqhci_deactivate(host->mmc); + sdhci_reset(host, mask); if (sdhci_arasan->quirks & SDHCI_ARASAN_QUIRK_FORCE_CDTEST) { From patchwork Wed Oct 19 21:54:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Norris X-Patchwork-Id: 617019 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 69128C4321E for ; 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Wed, 19 Oct 2022 14:55:06 -0700 (PDT) From: Brian Norris To: Ulf Hansson Cc: Shawn Lin , Shawn Guo , Fabio Estevam , Haibo Chen , Broadcom internal kernel review list , NXP Linux Team , Pengutronix Kernel Team , Florian Fainelli , Michal Simek , Faiz Abbas , linux-mmc@vger.kernel.org, Jonathan Hunter , Al Cooper , linux-arm-kernel@lists.infradead.org, Sowjanya Komatineni , linux-kernel@vger.kernel.org, Thierry Reding , Adrian Hunter , Sascha Hauer , Brian Norris Subject: [PATCH v2 3/7] mmc: sdhci-brcmstb: Fix SDHCI_RESET_ALL for CQHCI Date: Wed, 19 Oct 2022 14:54:36 -0700 Message-Id: <20221019145246.v2.3.I6a715feab6d01f760455865e968ecf0d85036018@changeid> X-Mailer: git-send-email 2.38.0.413.g74048e4d9e-goog In-Reply-To: <20221019215440.277643-1-briannorris@chromium.org> References: <20221019215440.277643-1-briannorris@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org [[ NOTE: this is completely untested by the author, but included solely because, as noted in commit df57d73276b8 ("mmc: sdhci-pci: Fix SDHCI_RESET_ALL for CQHCI for Intel GLK-based controllers"), "other drivers using CQHCI might benefit from a similar change, if they also have CQHCI reset by SDHCI_RESET_ALL." We've now seen the same bug on at least MSM, Arasan, and Intel hardware. ]] SDHCI_RESET_ALL resets will reset the hardware CQE state, but we aren't tracking that properly in software. When out of sync, we may trigger various timeouts. It's not typical to perform resets while CQE is enabled, but this may occur in some suspend or error recovery scenarios. Fixes: d46ba2d17f90 ("mmc: sdhci-brcmstb: Add support for Command Queuing (CQE)") Signed-off-by: Brian Norris --- Changes in v2: - Rely on cqhci_deactivate() to handle NULL cqe_private, instead of moving around CQE capability flags drivers/mmc/host/sdhci-brcmstb.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mmc/host/sdhci-brcmstb.c b/drivers/mmc/host/sdhci-brcmstb.c index aff36a933ebe..d479ca39c987 100644 --- a/drivers/mmc/host/sdhci-brcmstb.c +++ b/drivers/mmc/host/sdhci-brcmstb.c @@ -55,6 +55,9 @@ static void brcmstb_reset(struct sdhci_host *host, u8 mask) struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_brcmstb_priv *priv = sdhci_pltfm_priv(pltfm_host); + if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL)) + cqhci_deactivate(host->mmc); + sdhci_reset(host, mask); /* Reset will clear this, so re-enable it */ From patchwork Wed Oct 19 21:54:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Norris X-Patchwork-Id: 616616 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F16B7C433FE for ; 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Wed, 19 Oct 2022 14:55:08 -0700 (PDT) From: Brian Norris To: Ulf Hansson Cc: Shawn Lin , Shawn Guo , Fabio Estevam , Haibo Chen , Broadcom internal kernel review list , NXP Linux Team , Pengutronix Kernel Team , Florian Fainelli , Michal Simek , Faiz Abbas , linux-mmc@vger.kernel.org, Jonathan Hunter , Al Cooper , linux-arm-kernel@lists.infradead.org, Sowjanya Komatineni , linux-kernel@vger.kernel.org, Thierry Reding , Adrian Hunter , Sascha Hauer , Brian Norris Subject: [PATCH v2 4/7] mms: sdhci-esdhc-imx: Fix SDHCI_RESET_ALL for CQHCI Date: Wed, 19 Oct 2022 14:54:37 -0700 Message-Id: <20221019145246.v2.4.I7d01f9ad11bacdc9213dee61b7918982aea39115@changeid> X-Mailer: git-send-email 2.38.0.413.g74048e4d9e-goog In-Reply-To: <20221019215440.277643-1-briannorris@chromium.org> References: <20221019215440.277643-1-briannorris@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org [[ NOTE: this is completely untested by the author, but included solely because, as noted in commit df57d73276b8 ("mmc: sdhci-pci: Fix SDHCI_RESET_ALL for CQHCI for Intel GLK-based controllers"), "other drivers using CQHCI might benefit from a similar change, if they also have CQHCI reset by SDHCI_RESET_ALL." We've now seen the same bug on at least MSM, Arasan, and Intel hardware. ]] SDHCI_RESET_ALL resets will reset the hardware CQE state, but we aren't tracking that properly in software. When out of sync, we may trigger various timeouts. It's not typical to perform resets while CQE is enabled, but this may occur in some suspend or error recovery scenarios. Fixes: bb6e358169bf ("mmc: sdhci-esdhc-imx: add CMDQ support") Signed-off-by: Brian Norris Reviewed-by: Haibo Chen --- Changes in v2: - Drop unnecessary ESDHC_FLAG_CQHCI check drivers/mmc/host/sdhci-esdhc-imx.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 55981b0f0b10..c07df7b71b22 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -1288,6 +1288,9 @@ static void esdhc_set_uhs_signaling(struct sdhci_host *host, unsigned timing) static void esdhc_reset(struct sdhci_host *host, u8 mask) { + if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL)) + cqhci_deactivate(host->mmc); + sdhci_reset(host, mask); sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); From patchwork Wed Oct 19 21:54:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Norris X-Patchwork-Id: 617018 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A1360C433FE for ; Wed, 19 Oct 2022 21:55:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231296AbiJSVzZ (ORCPT ); Wed, 19 Oct 2022 17:55:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53752 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231386AbiJSVzR (ORCPT ); Wed, 19 Oct 2022 17:55:17 -0400 Received: from mail-pj1-x102d.google.com (mail-pj1-x102d.google.com [IPv6:2607:f8b0:4864:20::102d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8DAA2147D2A for ; Wed, 19 Oct 2022 14:55:12 -0700 (PDT) Received: by mail-pj1-x102d.google.com with SMTP id f9-20020a17090a654900b00210928389f8so1465094pjs.2 for ; Wed, 19 Oct 2022 14:55:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=NYKDq3nQvcWGiMSg+hxeuum9J23X3dmFHWVwl7YaDYc=; b=CfYbZ+nJXXk7KoFnE1sVg2XDbJnWj3hQVyrHcC6PGar9i+6OAIY/BwhB1o8E++95Wq lxcU180XOgaqUAVgRDa9NNPFTsOvZ+KK189p0I1A1jg1II+X4whI4JV1qME/yqC+qRqb x4ksvICFtNq8gEHVfGwf9KMw/70IcLQL2C1ok= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NYKDq3nQvcWGiMSg+hxeuum9J23X3dmFHWVwl7YaDYc=; b=iZ9F6cpjXwh3OVsWKwm3HlnDyD+wVs7ZLC7YaxAITMaKKuW4mX2lee6anNSojFBoGK zW8TqaGCqJhBxCulLYtCdHo+Oh9VrHMyDi0rcrYoCvYLiuBF8bCqWii23+TWLkYndpM3 vDS0IM7SUdbyO9Z+XxweVzdX7udzH6WyVtYW1njyvWvhvWIezb0EPoLAHhPVu1XZAWBW o0dG59tqjIc1DZFxHwZ7grUX/Pq6h3tnninbLJXoClxdTgXflNkLoSuZ18cG3JeBcX0q NfHCEThbW7KoijM/ygm4hspMK2iZh3H1b1NXvb/CfwSdZYB1OVebIbomie4Ex6Q7phKM r7Tw== X-Gm-Message-State: ACrzQf27lTkLtdIyD2gfc/ug3VIyLtQA8YACqLYoqb8flo0HNbuKlMP3 ++R1e8aB3FU2DgGd7JTGEK9knQ== X-Google-Smtp-Source: AMsMyM57I9WXTwCoqZq8IJIrWVZbrfmNmvZU+g7bdf0d/ugyHIFaaJuyFfnLqZW5AS8dO+IXT+trXA== X-Received: by 2002:a17:902:82ca:b0:185:75d:ee2c with SMTP id u10-20020a17090282ca00b00185075dee2cmr10547061plz.145.1666216512060; Wed, 19 Oct 2022 14:55:12 -0700 (PDT) Received: from localhost ([2620:15c:9d:2:57b7:1f0e:44d1:f252]) by smtp.gmail.com with UTF8SMTPSA id w14-20020a17090a5e0e00b0020ad53b5883sm422006pjf.14.2022.10.19.14.55.10 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 19 Oct 2022 14:55:11 -0700 (PDT) From: Brian Norris To: Ulf Hansson Cc: Shawn Lin , Shawn Guo , Fabio Estevam , Haibo Chen , Broadcom internal kernel review list , NXP Linux Team , Pengutronix Kernel Team , Florian Fainelli , Michal Simek , Faiz Abbas , linux-mmc@vger.kernel.org, Jonathan Hunter , Al Cooper , linux-arm-kernel@lists.infradead.org, Sowjanya Komatineni , linux-kernel@vger.kernel.org, Thierry Reding , Adrian Hunter , Sascha Hauer , Brian Norris Subject: [PATCH v2 5/7] mmc: sdhci-tegra: Fix SDHCI_RESET_ALL for CQHCI Date: Wed, 19 Oct 2022 14:54:38 -0700 Message-Id: <20221019145246.v2.5.I418c9eaaf754880fcd2698113e8c3ef821a944d7@changeid> X-Mailer: git-send-email 2.38.0.413.g74048e4d9e-goog In-Reply-To: <20221019215440.277643-1-briannorris@chromium.org> References: <20221019215440.277643-1-briannorris@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org [[ NOTE: this is completely untested by the author, but included solely because, as noted in commit df57d73276b8 ("mmc: sdhci-pci: Fix SDHCI_RESET_ALL for CQHCI for Intel GLK-based controllers"), "other drivers using CQHCI might benefit from a similar change, if they also have CQHCI reset by SDHCI_RESET_ALL." We've now seen the same bug on at least MSM, Arasan, and Intel hardware. ]] SDHCI_RESET_ALL resets will reset the hardware CQE state, but we aren't tracking that properly in software. When out of sync, we may trigger various timeouts. It's not typical to perform resets while CQE is enabled, but this may occur in some suspend or error recovery scenarios. Fixes: 3c4019f97978 ("mmc: tegra: HW Command Queue Support for Tegra SDMMC") Signed-off-by: Brian Norris --- Changes in v2: - Drop unnecessary 'enable_hwcq' check drivers/mmc/host/sdhci-tegra.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index 413925bce0ca..0a80335a42ec 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c @@ -367,6 +367,9 @@ static void tegra_sdhci_reset(struct sdhci_host *host, u8 mask) const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; u32 misc_ctrl, clk_ctrl, pad_ctrl; + if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL)) + cqhci_deactivate(host->mmc); + sdhci_reset(host, mask); if (!(mask & SDHCI_RESET_ALL)) From patchwork Wed Oct 19 21:54:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Norris X-Patchwork-Id: 616617 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CC24EC433FE for ; Wed, 19 Oct 2022 21:55:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231500AbiJSVzh (ORCPT ); Wed, 19 Oct 2022 17:55:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53512 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231433AbiJSVzT (ORCPT ); Wed, 19 Oct 2022 17:55:19 -0400 Received: from mail-pg1-x535.google.com (mail-pg1-x535.google.com [IPv6:2607:f8b0:4864:20::535]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3E27C3743F for ; Wed, 19 Oct 2022 14:55:16 -0700 (PDT) Received: by mail-pg1-x535.google.com with SMTP id q1so17457245pgl.11 for ; Wed, 19 Oct 2022 14:55:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mdWjXp1yQqqnWhAF+f3RrVqI4HKKxf+i6fXlj1bwLGc=; b=dsorLnZ6g7l46LRyLdlp2vDy2D5bxCKpUlzS+ILZbL2KnQEvI9+bHKJsmLlMd5z939 vFlptL1Scv3wg1kkesMKClNuMREJqrHJ2b1uLX9NPxSkw4qQzeJLAYCuENPkiEgsu5qq +DWF967Wz8uWOX1fu5humVdZ0fo80sExLbdRI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mdWjXp1yQqqnWhAF+f3RrVqI4HKKxf+i6fXlj1bwLGc=; b=rau1vrZAVnhpY7ojmWGzK8JdnMOgCdRt0QC8Q9eZBuuoFHR/3JvCwUQAzeJ49jfWmE 30XpE6RXE89WbH+Zr7WDgCUX6vxKEEDC10hMu29XasEoGc6/RBwbFW19x1kfnx0Q3PaQ BGrJ/Sxlp5mIWxKuWQhNVcE2V4+tCm/1n3kTCChXL8hT5egBYHl3fcy2Hq6XIKJHx4ri YBLPqeLIVl7ZfXuRNCHBrs5K5DQ7/dsfjRaIsiihDJiQarxzLxCS8V1vzZSH3rjCODaM A8q2fTr5Qx9e2pWQJRaKrvcQrucy6DHKsrgpCQ0espqUQlhCh+K/ChBBpdu/1zPV9uP1 XQWA== X-Gm-Message-State: ACrzQf0futxJ5Aa/YtzuOA5q9B05A+PntGLZPUMkTcu5N3IdMR4qyAdB NtFInCAiNOlAovSSVXJMpbhZHA== X-Google-Smtp-Source: AMsMyM7ucaMeh7aA0C9osOktHedzsvrEuCvV5oZ+DjVR9lNos2N3qyUSnVuMThWXyLgLD5alo3A/wA== X-Received: by 2002:a05:6a00:408c:b0:565:fc2c:8c71 with SMTP id bw12-20020a056a00408c00b00565fc2c8c71mr10838457pfb.82.1666216514655; Wed, 19 Oct 2022 14:55:14 -0700 (PDT) Received: from localhost ([2620:15c:9d:2:57b7:1f0e:44d1:f252]) by smtp.gmail.com with UTF8SMTPSA id c4-20020a633504000000b0043be67b6304sm10453631pga.0.2022.10.19.14.55.13 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 19 Oct 2022 14:55:14 -0700 (PDT) From: Brian Norris To: Ulf Hansson Cc: Shawn Lin , Shawn Guo , Fabio Estevam , Haibo Chen , Broadcom internal kernel review list , NXP Linux Team , Pengutronix Kernel Team , Florian Fainelli , Michal Simek , Faiz Abbas , linux-mmc@vger.kernel.org, Jonathan Hunter , Al Cooper , linux-arm-kernel@lists.infradead.org, Sowjanya Komatineni , linux-kernel@vger.kernel.org, Thierry Reding , Adrian Hunter , Sascha Hauer , Brian Norris Subject: [PATCH v2 6/7] mmc: sdhci_am654: Fix SDHCI_RESET_ALL for CQHCI Date: Wed, 19 Oct 2022 14:54:39 -0700 Message-Id: <20221019145246.v2.6.I35ca9d6220ba48304438b992a76647ca8e5b126f@changeid> X-Mailer: git-send-email 2.38.0.413.g74048e4d9e-goog In-Reply-To: <20221019215440.277643-1-briannorris@chromium.org> References: <20221019215440.277643-1-briannorris@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org [[ NOTE: this is completely untested by the author, but included solely because, as noted in commit df57d73276b8 ("mmc: sdhci-pci: Fix SDHCI_RESET_ALL for CQHCI for Intel GLK-based controllers"), "other drivers using CQHCI might benefit from a similar change, if they also have CQHCI reset by SDHCI_RESET_ALL." We've now seen the same bug on at least MSM, Arasan, and Intel hardware. ]] SDHCI_RESET_ALL resets will reset the hardware CQE state, but we aren't tracking that properly in software. When out of sync, we may trigger various timeouts. It's not typical to perform resets while CQE is enabled, but this may occur in some suspend or error recovery scenarios. Fixes: f545702b74f9 ("mmc: sdhci_am654: Add Support for Command Queuing Engine to J721E") Signed-off-by: Brian Norris --- (no changes since v1) drivers/mmc/host/sdhci_am654.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mmc/host/sdhci_am654.c b/drivers/mmc/host/sdhci_am654.c index 8f1023480e12..187a21086791 100644 --- a/drivers/mmc/host/sdhci_am654.c +++ b/drivers/mmc/host/sdhci_am654.c @@ -378,6 +378,9 @@ static void sdhci_am654_reset(struct sdhci_host *host, u8 mask) struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_am654_data *sdhci_am654 = sdhci_pltfm_priv(pltfm_host); + if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL)) + cqhci_deactivate(host->mmc); + sdhci_reset(host, mask); if (sdhci_am654->quirks & SDHCI_AM654_QUIRK_FORCE_CDTEST) { From patchwork Wed Oct 19 21:54:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Norris X-Patchwork-Id: 617017 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F476C4332F for ; Wed, 19 Oct 2022 21:55:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230006AbiJSVzj (ORCPT ); Wed, 19 Oct 2022 17:55:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54338 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231331AbiJSVzW (ORCPT ); Wed, 19 Oct 2022 17:55:22 -0400 Received: from mail-pj1-x102c.google.com (mail-pj1-x102c.google.com [IPv6:2607:f8b0:4864:20::102c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E54E716655C for ; Wed, 19 Oct 2022 14:55:17 -0700 (PDT) Received: by mail-pj1-x102c.google.com with SMTP id t12-20020a17090a3b4c00b0020b04251529so1215835pjf.5 for ; Wed, 19 Oct 2022 14:55:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=V8XIt+LggyNBDoRO5DPqQzHUIRS3Q64oYXaRetbeVDU=; b=ONOmRF0mDJlMUUgoZfpOOcJhHDL43tb1DR59Cn86BKCS9C+k1S/KxZwH6mZiMrJ+kU Ottj80CTOFsteLCq01PVaE/3uKcb90AUR5vyhlIznDrj6/+XeVgkPIWwOQsJiu39aLtQ 4JpFsES+9Qe7QYXOq8gf+kAgwQasVt69wrtgc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=V8XIt+LggyNBDoRO5DPqQzHUIRS3Q64oYXaRetbeVDU=; b=cKP3piBWI/JIJwmgYU5rVVG6oUxGkzzDmsN91TvcYOL+0CoasjKWwHFUktBs+J0l3J XrGHawTz4uBqCznlWA04L4ELPslxtZi9RFa2B7w0Q0IB5tR+2zyDofKj/AD/5chuIIVN gp67J21cJ6Eshkv9EoBoxjJADVg3nAmhy5UgKqyTv9AyD/BcDmf473WIxzR0edyeX906 +OKWKDakAhCi7RNH1M1chUFZszqUSTMhVu6hBBm1IvQeJt3nLME2fLFZ8mz4zVzBiZ6e Y+ALvvca7h7r8NUm24OQdVhgGxzP6k9ijtvutUwRy7oeqZFLVJg8gDkPv1uHNm38C44H y7wQ== X-Gm-Message-State: ACrzQf1iMBimaiHfrS95TXzesjRf9DpELRu81ycfnt5S8eXE1VrEZbQu lP6HO7JpWOsh6GM81p0t+rzeNw== X-Google-Smtp-Source: AMsMyM6mWW1NA845EmugIF+u48eK7uRHNgk0VuFucq2yhcYYRzx/GflrLlfIxne9eONc9g0FrfwbVQ== X-Received: by 2002:a17:90b:4d0d:b0:1fb:a86d:e752 with SMTP id mw13-20020a17090b4d0d00b001fba86de752mr12030955pjb.120.1666216517374; Wed, 19 Oct 2022 14:55:17 -0700 (PDT) Received: from localhost ([2620:15c:9d:2:57b7:1f0e:44d1:f252]) by smtp.gmail.com with UTF8SMTPSA id h12-20020a170902680c00b00178bd916c64sm11161877plk.265.2022.10.19.14.55.15 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 19 Oct 2022 14:55:16 -0700 (PDT) From: Brian Norris To: Ulf Hansson Cc: Shawn Lin , Shawn Guo , Fabio Estevam , Haibo Chen , Broadcom internal kernel review list , NXP Linux Team , Pengutronix Kernel Team , Florian Fainelli , Michal Simek , Faiz Abbas , linux-mmc@vger.kernel.org, Jonathan Hunter , Al Cooper , linux-arm-kernel@lists.infradead.org, Sowjanya Komatineni , linux-kernel@vger.kernel.org, Thierry Reding , Adrian Hunter , Sascha Hauer , Brian Norris Subject: [PATCH v2 7/7] mmc: sdhci-pci-*: Drop redundant ->cqe_private check Date: Wed, 19 Oct 2022 14:54:40 -0700 Message-Id: <20221019145246.v2.7.Ia91f031f5f770af7bd2ff3e28b398f277606d970@changeid> X-Mailer: git-send-email 2.38.0.413.g74048e4d9e-goog In-Reply-To: <20221019215440.277643-1-briannorris@chromium.org> References: <20221019215440.277643-1-briannorris@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org An earlier patch ("mmc: cqhci: Handle deactivate() when not yet initialized") makes these redundant. I keep these as a separate patch, since the earlier patch is a prerequisite to some important bugfixes that need to be backported via linux-stable. Signed-off-by: Brian Norris --- Changes in v2: - New in v2 drivers/mmc/host/sdhci-pci-core.c | 3 +-- drivers/mmc/host/sdhci-pci-gli.c | 3 +-- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/sdhci-pci-core.c b/drivers/mmc/host/sdhci-pci-core.c index 169b84761041..63d62a9228d7 100644 --- a/drivers/mmc/host/sdhci-pci-core.c +++ b/drivers/mmc/host/sdhci-pci-core.c @@ -236,8 +236,7 @@ static void sdhci_pci_dumpregs(struct mmc_host *mmc) static void sdhci_cqhci_reset(struct sdhci_host *host, u8 mask) { - if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL) && - host->mmc->cqe_private) + if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL)) cqhci_deactivate(host->mmc); sdhci_reset(host, mask); } diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c index 4d509f656188..5a13fe961620 100644 --- a/drivers/mmc/host/sdhci-pci-gli.c +++ b/drivers/mmc/host/sdhci-pci-gli.c @@ -924,8 +924,7 @@ static int gl9763e_add_host(struct sdhci_pci_slot *slot) static void sdhci_gl9763e_reset(struct sdhci_host *host, u8 mask) { - if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL) && - host->mmc->cqe_private) + if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL)) cqhci_deactivate(host->mmc); sdhci_reset(host, mask); }