From patchwork Wed Nov 2 09:00:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 620909 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C958BC4332F for ; Wed, 2 Nov 2022 09:01:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230219AbiKBJBH (ORCPT ); Wed, 2 Nov 2022 05:01:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34096 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231217AbiKBJA5 (ORCPT ); Wed, 2 Nov 2022 05:00:57 -0400 Received: from mail-pg1-x532.google.com (mail-pg1-x532.google.com [IPv6:2607:f8b0:4864:20::532]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ED94427FD8 for ; Wed, 2 Nov 2022 02:00:55 -0700 (PDT) Received: by mail-pg1-x532.google.com with SMTP id b5so15687028pgb.6 for ; Wed, 02 Nov 2022 02:00:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=m+9klCMfCtlwSDu8IssCNi2V+YH/l+jRl6TW+nponcw=; b=VNXGSjTd4iulS7vgWrJEpL/PcmlPXoe5GjctycTC0nsxFvQLr/JoqXw13/X9s3QKQ1 tF1AurKRPEcmgTjypvh5lDUoarDWsPtoqMMpa90jLYdoJ/1iE+1Fjb2yWE7ZfHYwlkAk uPKynRKKn1pizM+ckGKtEq4mGZjx8hZnivVyOXytpbDVWGZLnPQwn4x77DzhzObeOMZm goj+TO+IGm/XIRTEAdy+xyCx4YGlYCG9hn5imZHY64EH+ilNjc3zkETQld9Ch0R3dK1I vi1OZqhv5yap/AsZbU7kEAoyEkzpmVlZs1S1BWziNqPy4Qa5nUxJyXNMThaTfpzON1y/ IpHQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=m+9klCMfCtlwSDu8IssCNi2V+YH/l+jRl6TW+nponcw=; b=VDbOpNkfO45u7OZ9+7AUnnWDGvTZkbNEWC/CGYZZJGHAiZ0j+SAEfdW4yzlf85alyv Juo/pcZ01pJD/iRg9BTe6Gf0fkGEULRIpdbUMWwNsboqsc7tUm2mHbJd4MAYlZcJj5N9 bpiMPVFEbQzyY8dlGWpnfEJ1DxpxjJvL02MfyXpJAJIhaZcCexQz9Ypkrxbj9AggGBUC Z6cPwDr2Hbj4vjbwykgP5nNoGHGcD/7aIerB0e0p2BCp4E86enzMtUe5Bekvy0xE+/6s Qjut7BikeGxTchBgCpsQHKWnF9/O00pyEEKMj9t3UQ9WqRMUsn1Tn/S8dhHPlK5EGeAl 7FjA== X-Gm-Message-State: ACrzQf1Wv2yA/tjGhfHRnZANnLDYddaUtfqpLHWQ/s9G/UOwu2UMZ4b2 P0ZZeSYjcQnbMLnFYI5mbCgS X-Google-Smtp-Source: AMsMyM4Qg7xu+k9vYdNVTqkjUMbAKMeBT/psyGpFtL4qJRp2RmgBYQPnqb4V8wq7VPySeXQQWEBcVw== X-Received: by 2002:a63:e153:0:b0:439:2fa3:74d1 with SMTP id h19-20020a63e153000000b004392fa374d1mr20474631pgk.85.1667379655404; Wed, 02 Nov 2022 02:00:55 -0700 (PDT) Received: from localhost.localdomain ([117.193.209.178]) by smtp.gmail.com with ESMTPSA id z10-20020a63d00a000000b0046f7b0f504esm7136389pgf.58.2022.11.02.02.00.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Nov 2022 02:00:54 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org, viresh.kumar@linaro.org, rafael@kernel.org Cc: johan@kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH v2 1/3] cpufreq: qcom-hw: Allocate qcom_cpufreq_data during probe Date: Wed, 2 Nov 2022 14:30:36 +0530 Message-Id: <20221102090038.64541-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221102090038.64541-1-manivannan.sadhasivam@linaro.org> References: <20221102090038.64541-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org qcom_cpufreq_data is allocated based on the number of frequency domains defined in DT which is static and won't change during runtime. There is no real reason to allocate it during the CPU init() callback and deallocate it during exit(). Hence, move the allocation to probe() and use the allocated memory during init(). This also allows us to use devm_platform_get_and_ioremap_resource() helper for acquiring the freq-domain resources from DT. Signed-off-by: Manivannan Sadhasivam --- drivers/cpufreq/qcom-cpufreq-hw.c | 86 +++++++++++++------------------ 1 file changed, 37 insertions(+), 49 deletions(-) diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c index 61850d75e82f..25951a32b9d5 100644 --- a/drivers/cpufreq/qcom-cpufreq-hw.c +++ b/drivers/cpufreq/qcom-cpufreq-hw.c @@ -61,6 +61,10 @@ struct qcom_cpufreq_data { struct freq_qos_request throttle_freq_req; }; +static struct { + struct qcom_cpufreq_data *data; +} qcom_cpufreq; + static unsigned long cpu_hw_rate, xo_rate; static bool icc_scaling_enabled; @@ -503,8 +507,6 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy) struct of_phandle_args args; struct device_node *cpu_np; struct device *cpu_dev; - struct resource *res; - void __iomem *base; struct qcom_cpufreq_data *data; int ret, index; @@ -526,43 +528,16 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy) return ret; index = args.args[0]; - - res = platform_get_resource(pdev, IORESOURCE_MEM, index); - if (!res) { - dev_err(dev, "failed to get mem resource %d\n", index); - return -ENODEV; - } - - if (!request_mem_region(res->start, resource_size(res), res->name)) { - dev_err(dev, "failed to request resource %pR\n", res); - return -EBUSY; - } - - base = ioremap(res->start, resource_size(res)); - if (!base) { - dev_err(dev, "failed to map resource %pR\n", res); - ret = -ENOMEM; - goto release_region; - } - - data = kzalloc(sizeof(*data), GFP_KERNEL); - if (!data) { - ret = -ENOMEM; - goto unmap_base; - } - data->soc_data = of_device_get_match_data(&pdev->dev); - data->base = base; - data->res = res; + data = &qcom_cpufreq.data[index]; /* HW should be in enabled state to proceed */ - if (!(readl_relaxed(base + data->soc_data->reg_enable) & 0x1)) { + if (!(readl_relaxed(data->base + data->soc_data->reg_enable) & 0x1)) { dev_err(dev, "Domain-%d cpufreq hardware not enabled\n", index); - ret = -ENODEV; - goto error; + return -ENODEV; } - if (readl_relaxed(base + data->soc_data->reg_dcvs_ctrl) & 0x1) + if (readl_relaxed(data->base + data->soc_data->reg_dcvs_ctrl) & 0x1) data->per_core_dcvs = true; qcom_get_related_cpus(index, policy->cpus); @@ -573,14 +548,13 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy) ret = qcom_cpufreq_hw_read_lut(cpu_dev, policy); if (ret) { dev_err(dev, "Domain-%d failed to read LUT\n", index); - goto error; + return ret; } ret = dev_pm_opp_get_opp_count(cpu_dev); if (ret <= 0) { dev_err(cpu_dev, "Failed to add OPPs\n"); - ret = -ENODEV; - goto error; + return -ENODEV; } if (policy_has_boost_freq(policy)) { @@ -589,18 +563,7 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy) dev_warn(cpu_dev, "failed to enable boost: %d\n", ret); } - ret = qcom_cpufreq_hw_lmh_init(policy, index); - if (ret) - goto error; - - return 0; -error: - kfree(data); -unmap_base: - iounmap(base); -release_region: - release_mem_region(res->start, resource_size(res)); - return ret; + return qcom_cpufreq_hw_lmh_init(policy, index); } static int qcom_cpufreq_hw_cpu_exit(struct cpufreq_policy *policy) @@ -657,7 +620,7 @@ static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev) { struct device *cpu_dev; struct clk *clk; - int ret; + int ret, i, num_domains; clk = clk_get(&pdev->dev, "xo"); if (IS_ERR(clk)) @@ -684,6 +647,31 @@ static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev) if (ret) return ret; + /* Allocate qcom_cpufreq_data based on the available frequency domains in DT */ + num_domains = of_property_count_elems_of_size(pdev->dev.of_node, "reg", sizeof(u32) * 4); + if (num_domains <= 0) + return num_domains; + + qcom_cpufreq.data = devm_kzalloc(&pdev->dev, sizeof(struct qcom_cpufreq_data) * num_domains, + GFP_KERNEL); + if (!qcom_cpufreq.data) + return -ENOMEM; + + for (i = 0; i < num_domains; i++) { + struct qcom_cpufreq_data *data = &qcom_cpufreq.data[i]; + struct resource *res; + void __iomem *base; + + base = devm_platform_get_and_ioremap_resource(pdev, i, &res); + if (IS_ERR(base)) { + dev_err(&pdev->dev, "Failed to map resource %pR\n", res); + return PTR_ERR(base); + } + + data->base = base; + data->res = res; + } + ret = cpufreq_register_driver(&cpufreq_qcom_hw_driver); if (ret) dev_err(&pdev->dev, "CPUFreq HW driver failed to register\n"); From patchwork Wed Nov 2 09:00:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 621505 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 315D4C433FE for ; Wed, 2 Nov 2022 09:01:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231264AbiKBJBR (ORCPT ); Wed, 2 Nov 2022 05:01:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34116 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230188AbiKBJBG (ORCPT ); Wed, 2 Nov 2022 05:01:06 -0400 Received: from mail-pg1-x52c.google.com (mail-pg1-x52c.google.com [IPv6:2607:f8b0:4864:20::52c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A591C27FFB for ; Wed, 2 Nov 2022 02:01:00 -0700 (PDT) Received: by mail-pg1-x52c.google.com with SMTP id v3so727992pgh.4 for ; Wed, 02 Nov 2022 02:01:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=T4icR5rrMlbnmLSHVx88xxoNFuB2MV+Zjs91Y6tbEUk=; b=T3DvZJsHZQjtgjAfTE2nvPaLd85CAsBY3bscddRny4i4YWvOojadfu4TA/gt/y5hDJ 2JAGp1hiMC8XAeBX46ZCS/DX9I0alyp/MUMQ2BkEwju/H08shAbCbeBvdmBQdFrWvSXq MQM/MNk4FYMIyul/6O81kRim/29Mg8TJfxCSABiwdJcdJEHotr8MKUTrNOSchk9SRLA2 QhCau9l2m5o0LvlGr2thRST3AyqFxRymIbhQ75aUuaoUWQkRaB2FWZO1m772f5D/ABYT XODCWnMZWehX1PMj66+E29f3ilcOmQZjO9TrJGPL10/5NCaijK+xbLLcF0kgrlhvVhzh PKqg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=T4icR5rrMlbnmLSHVx88xxoNFuB2MV+Zjs91Y6tbEUk=; b=yQZtxOr90hqwtH5hW7svUN9BcUidyho2UTj+QN3Y2nvNQJphtOFpQBq5gDxT6Pc/17 6evOtQcvEQsQLn8a8Abe6YZgQM1IWqmIf0K0IjphJScgY8RD+CzKB8ZJBlcGP5f5x/KV Uu5/KCY3pVHbAzd3ZuLh6QuIDn6GIXDbsQ4iBAGA+2pY9RY88K4dKK5sZcipBOU52VRW f5Y+MpwVcU80Pf/4nMK/9ssZWuePU0vS3xNs+wXzWQIwcZWgBj9Rjv6o3gh5WYfl/j+5 jwgLRP7eHJOwWOJj7hpbRnB0336TBpPesk2gOLIrvRacjG+72KgHSywB87bq1Cber/dU QmnA== X-Gm-Message-State: ACrzQf1awA9JSx1YwfrSpR8pni+kMxFrdsnoc3LmnHei2icEZuXZc1yq +2Qfd1xWQkQZO9u3R9Qz2rY9 X-Google-Smtp-Source: AMsMyM4bole62R9yeNLFEehA28dZezHCL/oEoRoe34yyJGkBuzWTtYXYAGeuag/0C+/d9BaGOG63QQ== X-Received: by 2002:a63:4f4c:0:b0:46f:c464:9f66 with SMTP id p12-20020a634f4c000000b0046fc4649f66mr12163079pgl.247.1667379660027; Wed, 02 Nov 2022 02:01:00 -0700 (PDT) Received: from localhost.localdomain ([117.193.209.178]) by smtp.gmail.com with ESMTPSA id z10-20020a63d00a000000b0046f7b0f504esm7136389pgf.58.2022.11.02.02.00.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Nov 2022 02:00:59 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org, viresh.kumar@linaro.org, rafael@kernel.org Cc: johan@kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH v2 2/3] cpufreq: qcom-hw: Use cached dev pointer in probe() Date: Wed, 2 Nov 2022 14:30:37 +0530 Message-Id: <20221102090038.64541-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221102090038.64541-1-manivannan.sadhasivam@linaro.org> References: <20221102090038.64541-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org There are multiple instances of dev pointer used in the probe() function. Instead of referencing pdev->dev all the time, let's use a cached dev pointer to simplify the code. Signed-off-by: Manivannan Sadhasivam --- drivers/cpufreq/qcom-cpufreq-hw.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c index 25951a32b9d5..6d807956aaf6 100644 --- a/drivers/cpufreq/qcom-cpufreq-hw.c +++ b/drivers/cpufreq/qcom-cpufreq-hw.c @@ -618,18 +618,19 @@ static struct cpufreq_driver cpufreq_qcom_hw_driver = { static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev) { + struct device *dev = &pdev->dev; struct device *cpu_dev; struct clk *clk; int ret, i, num_domains; - clk = clk_get(&pdev->dev, "xo"); + clk = clk_get(dev, "xo"); if (IS_ERR(clk)) return PTR_ERR(clk); xo_rate = clk_get_rate(clk); clk_put(clk); - clk = clk_get(&pdev->dev, "alternate"); + clk = clk_get(dev, "alternate"); if (IS_ERR(clk)) return PTR_ERR(clk); @@ -648,11 +649,11 @@ static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev) return ret; /* Allocate qcom_cpufreq_data based on the available frequency domains in DT */ - num_domains = of_property_count_elems_of_size(pdev->dev.of_node, "reg", sizeof(u32) * 4); + num_domains = of_property_count_elems_of_size(dev->of_node, "reg", sizeof(u32) * 4); if (num_domains <= 0) return num_domains; - qcom_cpufreq.data = devm_kzalloc(&pdev->dev, sizeof(struct qcom_cpufreq_data) * num_domains, + qcom_cpufreq.data = devm_kzalloc(dev, sizeof(struct qcom_cpufreq_data) * num_domains, GFP_KERNEL); if (!qcom_cpufreq.data) return -ENOMEM; @@ -664,7 +665,7 @@ static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev) base = devm_platform_get_and_ioremap_resource(pdev, i, &res); if (IS_ERR(base)) { - dev_err(&pdev->dev, "Failed to map resource %pR\n", res); + dev_err(dev, "Failed to map resource %pR\n", res); return PTR_ERR(base); } @@ -674,9 +675,9 @@ static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev) ret = cpufreq_register_driver(&cpufreq_qcom_hw_driver); if (ret) - dev_err(&pdev->dev, "CPUFreq HW driver failed to register\n"); + dev_err(dev, "CPUFreq HW driver failed to register\n"); else - dev_dbg(&pdev->dev, "QCOM CPUFreq HW driver initialized\n"); + dev_dbg(dev, "QCOM CPUFreq HW driver initialized\n"); return ret; } From patchwork Wed Nov 2 09:00:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 620908 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 230DAC4332F for ; Wed, 2 Nov 2022 09:01:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231220AbiKBJBZ (ORCPT ); Wed, 2 Nov 2022 05:01:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34304 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231238AbiKBJBI (ORCPT ); Wed, 2 Nov 2022 05:01:08 -0400 Received: from mail-pl1-x62e.google.com (mail-pl1-x62e.google.com [IPv6:2607:f8b0:4864:20::62e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2A3A6286C7 for ; Wed, 2 Nov 2022 02:01:05 -0700 (PDT) Received: by mail-pl1-x62e.google.com with SMTP id y4so15969913plb.2 for ; Wed, 02 Nov 2022 02:01:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=TCbesr7t22BH12koAKaq07PLsfL/CZLX5cbu8l4PC8k=; b=MDGtYph3exFjeCg9VqNZzVzu3Vumc0ZwkNtXfKqvGqA0BSAzU1mop8s97+EujGQVla BNZJxwW1pPWMa4xpHTzHj0o3RJDIcYEOoM4r/XpG2AY2z1Af5t+GA3ASTdPsSvdAmhLF KH2v8yLW13suU86jRHH5EmYzpVX0TArdHKs70YhEYsoVB66y1XZKpNpf7JfujxTehMdz lDT+2gmlRAjjycDhG46ZhhwShvUlYruDZbimedwd5yDh0/Ao4xoamKioRjItIVlhv2WB kNP7nGE2cVidcRSGdr/lCmIcmbL3m+qvr8sNBxeXRSSVRsCVS6UxPCCPVT8qmLDnzldr Re4Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=TCbesr7t22BH12koAKaq07PLsfL/CZLX5cbu8l4PC8k=; b=IDJQiqh2QupvHr9T0zQG9TEeCKfMF4FTC+EcJ9ClmnT+IpAWRWGPoIuBCX7EvZqIrU QLf4ZF0fPjneLEdVmH4sbqzOwHE0C3uqx626ut6KSFDUkUz+0VmqW/URwaa2vqaQskZL j51XGQdNDtCDj+Nk+BjFbk34diCcxNZdVmkY/FYuqvmZsXYeg1Sz8KyDx14DwpCmbrL3 MaK1omthgiVcEZiJ0TxLWo+V15XCI/Kdm1Vfs+tAhDsvaLyF4SH/ig9Ma+qFQDluXasW CkYs03vS00tv2j4WoM/eOkRqcpBDz66h46h6fCMgg6NQqh3/zhOYpnfYmzyur3fezqv0 ziRA== X-Gm-Message-State: ACrzQf1Y6TkVUvZU2VE2EC4mynEmK8en9y+NDe7KVzHGH35r97dwX+cv v2NYaGxmja8nxlPr3oUvZu7P X-Google-Smtp-Source: AMsMyM7kWzjgmWgi2JYTCNHRGMGFCkgT5IlBpTNmkAhrr2N7dB+zScr1peUE1BOXig/x7+qWL8z6+A== X-Received: by 2002:a17:903:444:b0:187:428:1317 with SMTP id iw4-20020a170903044400b0018704281317mr23647290plb.151.1667379664568; Wed, 02 Nov 2022 02:01:04 -0700 (PDT) Received: from localhost.localdomain ([117.193.209.178]) by smtp.gmail.com with ESMTPSA id z10-20020a63d00a000000b0046f7b0f504esm7136389pgf.58.2022.11.02.02.01.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Nov 2022 02:01:03 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org, viresh.kumar@linaro.org, rafael@kernel.org Cc: johan@kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH v2 3/3] cpufreq: qcom-hw: Move soc_data to struct qcom_cpufreq Date: Wed, 2 Nov 2022 14:30:38 +0530 Message-Id: <20221102090038.64541-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221102090038.64541-1-manivannan.sadhasivam@linaro.org> References: <20221102090038.64541-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org soc_data is a static info of the driver and thus no need to cache it inside the qcom_cpufreq_data struct which is allocated per frequency domain. So, move it inside qcom_cpufreq struct. Signed-off-by: Manivannan Sadhasivam --- drivers/cpufreq/qcom-cpufreq-hw.c | 27 ++++++++++++++------------- 1 file changed, 14 insertions(+), 13 deletions(-) diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c index 6d807956aaf6..5e0598730a04 100644 --- a/drivers/cpufreq/qcom-cpufreq-hw.c +++ b/drivers/cpufreq/qcom-cpufreq-hw.c @@ -43,7 +43,6 @@ struct qcom_cpufreq_soc_data { struct qcom_cpufreq_data { void __iomem *base; struct resource *res; - const struct qcom_cpufreq_soc_data *soc_data; /* * Mutex to synchronize between de-init sequence and re-starting LMh @@ -63,6 +62,7 @@ struct qcom_cpufreq_data { static struct { struct qcom_cpufreq_data *data; + const struct qcom_cpufreq_soc_data *soc_data; } qcom_cpufreq; static unsigned long cpu_hw_rate, xo_rate; @@ -113,7 +113,7 @@ static int qcom_cpufreq_hw_target_index(struct cpufreq_policy *policy, unsigned int index) { struct qcom_cpufreq_data *data = policy->driver_data; - const struct qcom_cpufreq_soc_data *soc_data = data->soc_data; + const struct qcom_cpufreq_soc_data *soc_data = qcom_cpufreq.soc_data; unsigned long freq = policy->freq_table[index].frequency; unsigned int i; @@ -141,7 +141,7 @@ static unsigned int qcom_cpufreq_hw_get(unsigned int cpu) return 0; data = policy->driver_data; - soc_data = data->soc_data; + soc_data = qcom_cpufreq.soc_data; index = readl_relaxed(data->base + soc_data->reg_perf_state); index = min(index, LUT_MAX_ENTRIES - 1); @@ -153,7 +153,7 @@ static unsigned int qcom_cpufreq_hw_fast_switch(struct cpufreq_policy *policy, unsigned int target_freq) { struct qcom_cpufreq_data *data = policy->driver_data; - const struct qcom_cpufreq_soc_data *soc_data = data->soc_data; + const struct qcom_cpufreq_soc_data *soc_data = qcom_cpufreq.soc_data; unsigned int index; unsigned int i; @@ -177,7 +177,7 @@ static int qcom_cpufreq_hw_read_lut(struct device *cpu_dev, unsigned long rate; int ret; struct qcom_cpufreq_data *drv_data = policy->driver_data; - const struct qcom_cpufreq_soc_data *soc_data = drv_data->soc_data; + const struct qcom_cpufreq_soc_data *soc_data = qcom_cpufreq.soc_data; table = kcalloc(LUT_MAX_ENTRIES + 1, sizeof(*table), GFP_KERNEL); if (!table) @@ -294,10 +294,10 @@ static unsigned long qcom_lmh_get_throttle_freq(struct qcom_cpufreq_data *data) { unsigned int lval; - if (data->soc_data->reg_current_vote) - lval = readl_relaxed(data->base + data->soc_data->reg_current_vote) & 0x3ff; + if (qcom_cpufreq.soc_data->reg_current_vote) + lval = readl_relaxed(data->base + qcom_cpufreq.soc_data->reg_current_vote) & 0x3ff; else - lval = readl_relaxed(data->base + data->soc_data->reg_domain_state) & 0xff; + lval = readl_relaxed(data->base + qcom_cpufreq.soc_data->reg_domain_state) & 0xff; return lval * xo_rate; } @@ -371,9 +371,9 @@ static irqreturn_t qcom_lmh_dcvs_handle_irq(int irq, void *data) disable_irq_nosync(c_data->throttle_irq); schedule_delayed_work(&c_data->throttle_work, 0); - if (c_data->soc_data->reg_intr_clr) + if (qcom_cpufreq.soc_data->reg_intr_clr) writel_relaxed(GT_IRQ_STATUS, - c_data->base + c_data->soc_data->reg_intr_clr); + c_data->base + qcom_cpufreq.soc_data->reg_intr_clr); return IRQ_HANDLED; } @@ -528,16 +528,15 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy) return ret; index = args.args[0]; - data->soc_data = of_device_get_match_data(&pdev->dev); data = &qcom_cpufreq.data[index]; /* HW should be in enabled state to proceed */ - if (!(readl_relaxed(data->base + data->soc_data->reg_enable) & 0x1)) { + if (!(readl_relaxed(data->base + qcom_cpufreq.soc_data->reg_enable) & 0x1)) { dev_err(dev, "Domain-%d cpufreq hardware not enabled\n", index); return -ENODEV; } - if (readl_relaxed(data->base + data->soc_data->reg_dcvs_ctrl) & 0x1) + if (readl_relaxed(data->base + qcom_cpufreq.soc_data->reg_dcvs_ctrl) & 0x1) data->per_core_dcvs = true; qcom_get_related_cpus(index, policy->cpus); @@ -658,6 +657,8 @@ static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev) if (!qcom_cpufreq.data) return -ENOMEM; + qcom_cpufreq.soc_data = of_device_get_match_data(dev); + for (i = 0; i < num_domains; i++) { struct qcom_cpufreq_data *data = &qcom_cpufreq.data[i]; struct resource *res;