From patchwork Fri Nov 11 18:43:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 624663 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9BE97C43219 for ; Fri, 11 Nov 2022 18:43:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234375AbiKKSnU (ORCPT ); Fri, 11 Nov 2022 13:43:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46542 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234074AbiKKSnN (ORCPT ); Fri, 11 Nov 2022 13:43:13 -0500 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2F9BF10DE; Fri, 11 Nov 2022 10:43:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668192192; x=1699728192; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=/5ATWhqQrc1DZJ4f0j7ZyUNBHQXbdLiioN7qk5/mljI=; b=V2lHhM3/8IKWBNlb/uxz6te0myWl+2emBlPmpikg4MH3zdUUQ87d8Xud UsGUnYCj8veQhc8eyVCkis9H7V/F7EVbBvwyuuGAuU6H4w7QoRVBGtn7V QawpiKLP8pQrQDxW8+F6OnThKFRZJUO6XDuSJ04HCkdA3IHrtK8iXxiUX YhpkbDuUOIVebCJRSGEN5o/vE5m6j6dIC5FD6Veh8SdwVbxB6OYVQONtD CUMDkGT8DJS1+oF7Wmja92bnWoNGpQtSI9soNYNjRMKkM3OTTgfGZ4+4J p5eDb9+hcvO+z+fr+I4Z2dYTN9UEhKUA7Vb7JfL+HYH/Sq4YinGdybG2N g==; X-IronPort-AV: E=McAfee;i="6500,9779,10528"; a="299162181" X-IronPort-AV: E=Sophos;i="5.96,157,1665471600"; d="scan'208";a="299162181" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2022 10:43:10 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10528"; a="812517791" X-IronPort-AV: E=Sophos;i="5.96,157,1665471600"; d="scan'208";a="812517791" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga005.jf.intel.com with ESMTP; 11 Nov 2022 10:43:08 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 13900B7; Fri, 11 Nov 2022 20:43:32 +0200 (EET) From: Andy Shevchenko To: Andy Shevchenko , Mika Westerberg , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Hans de Goede , linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pwm@vger.kernel.org Cc: Andy Shevchenko , Linus Walleij Subject: [PATCH v3 1/6] pwm: Add a stub for devm_pwmchip_add() Date: Fri, 11 Nov 2022 20:43:23 +0200 Message-Id: <20221111184328.58108-2-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221111184328.58108-1-andriy.shevchenko@linux.intel.com> References: <20221111184328.58108-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The devm_pwmchip_add() can be called by a module that optionally instantiates PWM chip. In the case of CONFIG_PWM=n, the compilation can't be performed. Hence, add a necessary stub. Signed-off-by: Andy Shevchenko Acked-by: Thierry Reding Reviewed-by: Mika Westerberg Acked-by: Uwe Kleine-König --- include/linux/pwm.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/include/linux/pwm.h b/include/linux/pwm.h index d70c6e5a839d..bba492eea96c 100644 --- a/include/linux/pwm.h +++ b/include/linux/pwm.h @@ -478,6 +478,11 @@ static inline int pwmchip_remove(struct pwm_chip *chip) return -EINVAL; } +static inline int devm_pwmchip_add(struct device *dev, struct pwm_chip *chip) +{ + return -EINVAL; +} + static inline struct pwm_device *pwm_request_from_chip(struct pwm_chip *chip, unsigned int index, const char *label) From patchwork Fri Nov 11 18:43:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 624665 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A605CC433FE for ; Fri, 11 Nov 2022 18:43:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233958AbiKKSnQ (ORCPT ); Fri, 11 Nov 2022 13:43:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46218 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234055AbiKKSnM (ORCPT ); Fri, 11 Nov 2022 13:43:12 -0500 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 62A781B7A4; Fri, 11 Nov 2022 10:43:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668192191; x=1699728191; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=gGDtImubOcSLVP60+TzwKMDasoMDqFJiSB9lXa2+0Eg=; b=EmU+LWuqPyBIA7FqRJnwLeOXs9kYFHjxGmnhDJ57GZcyRsSq6OtWQyl3 HtWQTNWDg+pZ1JnLeYxZL/CYnjMzRAmCbCOFS1sxBwpP81kksFP6Kb9VT /3lZ2Pc3/8gbvU1zefFaXpZOn58iO9A1GfHIlKLhZ9H7x56oEx0FEIKsv 0Hzxw4nj6E5n2pJuN7w7OJsCeB1Y04BIuhv5DPlwvnbOdzUMooqU2d/gh njuKKlltcHjfPrtxUd95ZwvZsbs10kDZntYqFBOSY9MzCtAVNNnlzCKNl o1E7QVBHM8cD7jtJOXMDx9H3JOcUxYvT89V9hacFc8tFfabRZJmWkN9Sw A==; X-IronPort-AV: E=McAfee;i="6500,9779,10528"; a="309274047" X-IronPort-AV: E=Sophos;i="5.96,157,1665471600"; d="scan'208";a="309274047" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2022 10:43:11 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10528"; a="632103056" X-IronPort-AV: E=Sophos;i="5.96,157,1665471600"; d="scan'208";a="632103056" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga007.jf.intel.com with ESMTP; 11 Nov 2022 10:43:08 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 27B3315C; Fri, 11 Nov 2022 20:43:32 +0200 (EET) From: Andy Shevchenko To: Andy Shevchenko , Mika Westerberg , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Hans de Goede , linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pwm@vger.kernel.org Cc: Andy Shevchenko , Linus Walleij Subject: [PATCH v3 2/6] pwm: lpss: Rename MAX_PWMS --> LPSS_MAX_PWMS Date: Fri, 11 Nov 2022 20:43:24 +0200 Message-Id: <20221111184328.58108-3-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221111184328.58108-1-andriy.shevchenko@linux.intel.com> References: <20221111184328.58108-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The MAX_PWMS definition is already being used by the PWM core. Using the same name in the certain driver confuses people and potentially can clash with it. Hence, rename it by adding LPSS prefix. Reported-by: Uwe Kleine-König Signed-off-by: Andy Shevchenko Acked-by: Thierry Reding Reviewed-by: Mika Westerberg Reviewed-by: Uwe Kleine-König --- drivers/pwm/pwm-lpss.c | 2 +- drivers/pwm/pwm-lpss.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lpss.c index accdef5dd58e..b8739cd2c235 100644 --- a/drivers/pwm/pwm-lpss.c +++ b/drivers/pwm/pwm-lpss.c @@ -252,7 +252,7 @@ struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, void __iomem *base, int i, ret; u32 ctrl; - if (WARN_ON(info->npwm > MAX_PWMS)) + if (WARN_ON(info->npwm > LPSS_MAX_PWMS)) return ERR_PTR(-ENODEV); lpwm = devm_kzalloc(dev, sizeof(*lpwm), GFP_KERNEL); diff --git a/drivers/pwm/pwm-lpss.h b/drivers/pwm/pwm-lpss.h index 8e82eb5a7e00..2c746c51b883 100644 --- a/drivers/pwm/pwm-lpss.h +++ b/drivers/pwm/pwm-lpss.h @@ -13,7 +13,7 @@ #include #include -#define MAX_PWMS 4 +#define LPSS_MAX_PWMS 4 struct pwm_lpss_chip { struct pwm_chip chip; From patchwork Fri Nov 11 18:43:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 624664 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0FA10C43217 for ; Fri, 11 Nov 2022 18:43:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234255AbiKKSnR (ORCPT ); Fri, 11 Nov 2022 13:43:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46530 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233695AbiKKSnM (ORCPT ); Fri, 11 Nov 2022 13:43:12 -0500 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2F8CBF69; Fri, 11 Nov 2022 10:43:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668192192; x=1699728192; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=hBRMuBSSbtGLeszkWGLvZmNwu94+mL8SqSvJtb11lV8=; b=DzuFodkT1wkZLlSHGxYQHcXLi80LiZnjAaz9SNftH66YoU+/2KP2jzQ3 lZ+wK+OEN/bFImdTFtk66aoHQs3lWWsnO8Ny8SrksYvm6EaSVN67MftR9 ZLdkK5fLzzhpnkCIVQ1NczI65EQOGEKNsdVofaXSeBtB4ZV97mBCAE8KX TxpvuPMqyVpFGQKBCRZUJGQpSeqxQWjnrNUp65f3uB5WLhK+EwxhWEy/h T/R9TBs1C+bnSOLQZRcUQo0G7Tm4gGVcsKaDkIXqPwYfxGkZ/GX6CD83a D/0T7Q8B67TSKbvQSzHvA5CuvaP1pHMZpSIyyIJLRGPIB3PW3MbES7IUz g==; X-IronPort-AV: E=McAfee;i="6500,9779,10528"; a="309274048" X-IronPort-AV: E=Sophos;i="5.96,157,1665471600"; d="scan'208";a="309274048" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2022 10:43:11 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10528"; a="632103057" X-IronPort-AV: E=Sophos;i="5.96,157,1665471600"; d="scan'208";a="632103057" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga007.jf.intel.com with ESMTP; 11 Nov 2022 10:43:08 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 2D9E2155; Fri, 11 Nov 2022 20:43:32 +0200 (EET) From: Andy Shevchenko To: Andy Shevchenko , Mika Westerberg , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Hans de Goede , linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pwm@vger.kernel.org Cc: Andy Shevchenko , Linus Walleij Subject: [PATCH v3 3/6] pwm: lpss: Include headers we are the direct user of Date: Fri, 11 Nov 2022 20:43:25 +0200 Message-Id: <20221111184328.58108-4-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221111184328.58108-1-andriy.shevchenko@linux.intel.com> References: <20221111184328.58108-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org For the sake of integrity, include headers we are the direct user of. Replace the inclusion of device.h by a forward declaration of struct device plus a (cheaper) of types.h as device.h is an expensive include (measured in compiler effort). While at it, move the struct pwm_lpss_chip to be after the struct pwm_lpss_boardinfo as the former uses pointer to the latter. Signed-off-by: Andy Shevchenko Acked-by: Thierry Reding Reviewed-by: Mika Westerberg Reviewed-by: Hans de Goede --- drivers/pwm/pwm-lpss.h | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/pwm/pwm-lpss.h b/drivers/pwm/pwm-lpss.h index 2c746c51b883..4561d229b27d 100644 --- a/drivers/pwm/pwm-lpss.h +++ b/drivers/pwm/pwm-lpss.h @@ -10,16 +10,12 @@ #ifndef __PWM_LPSS_H #define __PWM_LPSS_H -#include #include +#include -#define LPSS_MAX_PWMS 4 +struct device; -struct pwm_lpss_chip { - struct pwm_chip chip; - void __iomem *regs; - const struct pwm_lpss_boardinfo *info; -}; +#define LPSS_MAX_PWMS 4 struct pwm_lpss_boardinfo { unsigned long clk_rate; @@ -43,6 +39,12 @@ extern const struct pwm_lpss_boardinfo pwm_lpss_bsw_info; extern const struct pwm_lpss_boardinfo pwm_lpss_bxt_info; extern const struct pwm_lpss_boardinfo pwm_lpss_tng_info; +struct pwm_lpss_chip { + struct pwm_chip chip; + void __iomem *regs; + const struct pwm_lpss_boardinfo *info; +}; + struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, void __iomem *base, const struct pwm_lpss_boardinfo *info); From patchwork Fri Nov 11 18:43:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 624086 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 126AFC4321E for ; Fri, 11 Nov 2022 18:43:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234148AbiKKSnR (ORCPT ); Fri, 11 Nov 2022 13:43:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46520 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233980AbiKKSnM (ORCPT ); Fri, 11 Nov 2022 13:43:12 -0500 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 10FF81F9DD; Fri, 11 Nov 2022 10:43:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668192191; x=1699728191; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=tc2JPC4Ucwzjez+ObJHFyVfZGmoZxVkh4qEL5MEhM04=; b=nNlcDDuGfKgx/Tj4+icZCPDCksMXSMt9CAr/LWb+dHSaGTAkPpau3nFh 09mZw+yxIVZ4dapPtsz5wyEEodhZYpNsYsFU8wX/DZRsD1DrjZR6BSG9T bfI13mSbjDuSIjPmJKYbGmDINQCCogr6k4j6qaEbQ6UBNq1WDI0YwrOZo FgqihuguLMpfTXUncSlKS376EsFgfViGUbGeEy6AGc7f9UxhWXWjfgz/L TcOYCHRhLZWvypdQg2Eo3ty1ykF1f7oaS5eU2pARx02HydO3VWKmcerY5 4MEiTXb4MMTDfALGWzkUyXM+1sHGksPU/RdxJpnUK7HzGeyl7fTs2CE+s Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10528"; a="299162180" X-IronPort-AV: E=Sophos;i="5.96,157,1665471600"; d="scan'208";a="299162180" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2022 10:43:10 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10528"; a="812517790" X-IronPort-AV: E=Sophos;i="5.96,157,1665471600"; d="scan'208";a="812517790" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga005.jf.intel.com with ESMTP; 11 Nov 2022 10:43:07 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 3DFA529D; Fri, 11 Nov 2022 20:43:32 +0200 (EET) From: Andy Shevchenko To: Andy Shevchenko , Mika Westerberg , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Hans de Goede , linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pwm@vger.kernel.org Cc: Andy Shevchenko , Linus Walleij Subject: [PATCH v3 4/6] pwm: lpss: Allow other drivers to enable PWM LPSS Date: Fri, 11 Nov 2022 20:43:26 +0200 Message-Id: <20221111184328.58108-5-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221111184328.58108-1-andriy.shevchenko@linux.intel.com> References: <20221111184328.58108-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The PWM LPSS device can be embedded in another device. In order to enable it, allow that drivers to probe a corresponding device. Signed-off-by: Andy Shevchenko Acked-by: Thierry Reding Reviewed-by: Mika Westerberg Reviewed-by: Hans de Goede --- drivers/pwm/pwm-lpss.h | 22 +-------------- .../linux/platform_data/x86}/pwm-lpss.h | 28 ++++--------------- 2 files changed, 6 insertions(+), 44 deletions(-) copy {drivers/pwm => include/linux/platform_data/x86}/pwm-lpss.h (53%) diff --git a/drivers/pwm/pwm-lpss.h b/drivers/pwm/pwm-lpss.h index 4561d229b27d..b721532c6c3c 100644 --- a/drivers/pwm/pwm-lpss.h +++ b/drivers/pwm/pwm-lpss.h @@ -13,27 +13,10 @@ #include #include -struct device; +#include #define LPSS_MAX_PWMS 4 -struct pwm_lpss_boardinfo { - unsigned long clk_rate; - unsigned int npwm; - unsigned long base_unit_bits; - /* - * Some versions of the IP may stuck in the state machine if enable - * bit is not set, and hence update bit will show busy status till - * the reset. For the rest it may be otherwise. - */ - bool bypass; - /* - * On some devices the _PS0/_PS3 AML code of the GPU (GFX0) device - * messes with the PWM0 controllers state, - */ - bool other_devices_aml_touches_pwm_regs; -}; - extern const struct pwm_lpss_boardinfo pwm_lpss_byt_info; extern const struct pwm_lpss_boardinfo pwm_lpss_bsw_info; extern const struct pwm_lpss_boardinfo pwm_lpss_bxt_info; @@ -45,7 +28,4 @@ struct pwm_lpss_chip { const struct pwm_lpss_boardinfo *info; }; -struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, void __iomem *base, - const struct pwm_lpss_boardinfo *info); - #endif /* __PWM_LPSS_H */ diff --git a/drivers/pwm/pwm-lpss.h b/include/linux/platform_data/x86/pwm-lpss.h similarity index 53% copy from drivers/pwm/pwm-lpss.h copy to include/linux/platform_data/x86/pwm-lpss.h index 4561d229b27d..296bd837ddbb 100644 --- a/drivers/pwm/pwm-lpss.h +++ b/include/linux/platform_data/x86/pwm-lpss.h @@ -1,21 +1,14 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Intel Low Power Subsystem PWM controller driver - * - * Copyright (C) 2014, Intel Corporation - * - * Derived from the original pwm-lpss.c - */ +/* Intel Low Power Subsystem PWM controller driver */ -#ifndef __PWM_LPSS_H -#define __PWM_LPSS_H +#ifndef __PLATFORM_DATA_X86_PWM_LPSS_H +#define __PLATFORM_DATA_X86_PWM_LPSS_H -#include #include struct device; -#define LPSS_MAX_PWMS 4 +struct pwm_lpss_chip; struct pwm_lpss_boardinfo { unsigned long clk_rate; @@ -34,18 +27,7 @@ struct pwm_lpss_boardinfo { bool other_devices_aml_touches_pwm_regs; }; -extern const struct pwm_lpss_boardinfo pwm_lpss_byt_info; -extern const struct pwm_lpss_boardinfo pwm_lpss_bsw_info; -extern const struct pwm_lpss_boardinfo pwm_lpss_bxt_info; -extern const struct pwm_lpss_boardinfo pwm_lpss_tng_info; - -struct pwm_lpss_chip { - struct pwm_chip chip; - void __iomem *regs; - const struct pwm_lpss_boardinfo *info; -}; - struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, void __iomem *base, const struct pwm_lpss_boardinfo *info); -#endif /* __PWM_LPSS_H */ +#endif /* __PLATFORM_DATA_X86_PWM_LPSS_H */ From patchwork Fri Nov 11 18:43:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 624662 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0D998C4321E for ; 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X-IronPort-AV: E=McAfee;i="6500,9779,10528"; a="309274056" X-IronPort-AV: E=Sophos;i="5.96,157,1665471600"; d="scan'208";a="309274056" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2022 10:43:14 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10528"; a="632103063" X-IronPort-AV: E=Sophos;i="5.96,157,1665471600"; d="scan'208";a="632103063" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga007.jf.intel.com with ESMTP; 11 Nov 2022 10:43:11 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 490CB2B7; Fri, 11 Nov 2022 20:43:32 +0200 (EET) From: Andy Shevchenko To: Andy Shevchenko , Mika Westerberg , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Hans de Goede , linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pwm@vger.kernel.org Cc: Andy Shevchenko , Linus Walleij Subject: [PATCH v3 5/6] pwm: lpss: Add pwm_lpss_probe() stub Date: Fri, 11 Nov 2022 20:43:27 +0200 Message-Id: <20221111184328.58108-6-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221111184328.58108-1-andriy.shevchenko@linux.intel.com> References: <20221111184328.58108-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org In case the PWM LPSS module is not provided, allow users to be compiled with the help of the pwm_lpss_probe() stub. Signed-off-by: Andy Shevchenko Acked-by: Thierry Reding Reviewed-by: Mika Westerberg --- include/linux/platform_data/x86/pwm-lpss.h | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/include/linux/platform_data/x86/pwm-lpss.h b/include/linux/platform_data/x86/pwm-lpss.h index 296bd837ddbb..c868b396ed2c 100644 --- a/include/linux/platform_data/x86/pwm-lpss.h +++ b/include/linux/platform_data/x86/pwm-lpss.h @@ -4,6 +4,8 @@ #ifndef __PLATFORM_DATA_X86_PWM_LPSS_H #define __PLATFORM_DATA_X86_PWM_LPSS_H +#include +#include #include struct device; @@ -27,7 +29,16 @@ struct pwm_lpss_boardinfo { bool other_devices_aml_touches_pwm_regs; }; +#if IS_REACHABLE(CONFIG_PWM_LPSS) struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, void __iomem *base, const struct pwm_lpss_boardinfo *info); +#else +static inline +struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, void __iomem *base, + const struct pwm_lpss_boardinfo *info) +{ + return ERR_PTR(-ENODEV); +} +#endif /* CONFIG_PWM_LPSS */ #endif /* __PLATFORM_DATA_X86_PWM_LPSS_H */ From patchwork Fri Nov 11 18:43:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 624084 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65B8BC433FE for ; Fri, 11 Nov 2022 18:43:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234421AbiKKSnW (ORCPT ); Fri, 11 Nov 2022 13:43:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46510 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233937AbiKKSnP (ORCPT ); Fri, 11 Nov 2022 13:43:15 -0500 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9A5AE13EA9; Fri, 11 Nov 2022 10:43:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668192194; x=1699728194; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=JkhCDlfC4G8PjgtwMiU9aSAo1nZwhhcu2HF+orAPBSg=; b=gsjHtjmWvXeeprcIBLz/WLRt8JQDlgkavbk3uRq11VuZJk/vszGaerg6 nJfXwoTLFkb46z9KEMCgPXKNBiZ14Xr01lQwyBwbxGuBPBinQxeQYiYkY 8b3Wl7z2NNIMJcft9FSNHv18uh42fAoeTJwrnwx3lRJaVD6bAWZhaQmJH slkAkzJCDV9LrvVP2OW7l/5xYORxj8GEOiY/9KAOc+fFpDOq9oNChmIbV t1dRQ969oVQSAEO5i/TzEabspnu784esnOY1FYryoTDtWg2U7O67BiJrZ 6PNfSncVrCFr4eVe3E26hAkhYa0h8JevjQfm79amF1INsJGq0TV6zYfeD g==; X-IronPort-AV: E=McAfee;i="6500,9779,10528"; a="299162196" X-IronPort-AV: E=Sophos;i="5.96,157,1665471600"; d="scan'208";a="299162196" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2022 10:43:14 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10528"; a="812517804" X-IronPort-AV: E=Sophos;i="5.96,157,1665471600"; d="scan'208";a="812517804" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga005.jf.intel.com with ESMTP; 11 Nov 2022 10:43:11 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 5394B4B5; Fri, 11 Nov 2022 20:43:32 +0200 (EET) From: Andy Shevchenko To: Andy Shevchenko , Mika Westerberg , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Hans de Goede , linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pwm@vger.kernel.org Cc: Andy Shevchenko , Linus Walleij Subject: [PATCH v3 6/6] pinctrl: intel: Enumerate PWM device when community has a capability Date: Fri, 11 Nov 2022 20:43:28 +0200 Message-Id: <20221111184328.58108-7-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221111184328.58108-1-andriy.shevchenko@linux.intel.com> References: <20221111184328.58108-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Some of the Communities may have PWM capability. In such cases, enumerate the PWM device via respective driver. User is still responsible for setting correct pin muxing for the line that needs to output the signal. Signed-off-by: Andy Shevchenko Acked-by: Thierry Reding Reviewed-by: Mika Westerberg Acked-by: Linus Walleij --- drivers/pinctrl/intel/pinctrl-intel.c | 32 +++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c index 52ecd66ce357..3ebdf5589bd6 100644 --- a/drivers/pinctrl/intel/pinctrl-intel.c +++ b/drivers/pinctrl/intel/pinctrl-intel.c @@ -21,6 +21,8 @@ #include #include +#include + #include "../core.h" #include "pinctrl-intel.h" @@ -46,6 +48,8 @@ #define PADOWN_MASK(p) (GENMASK(3, 0) << PADOWN_SHIFT(p)) #define PADOWN_GPP(p) ((p) / 8) +#define PWMC 0x204 + /* Offset from pad_regs */ #define PADCFG0 0x000 #define PADCFG0_RXEVCFG_SHIFT 25 @@ -1499,6 +1503,30 @@ static int intel_pinctrl_pm_init(struct intel_pinctrl *pctrl) return 0; } +static int intel_pinctrl_probe_pwm(struct intel_pinctrl *pctrl, + struct intel_community *community) +{ + static const struct pwm_lpss_boardinfo info = { + .clk_rate = 19200000, + .npwm = 1, + .base_unit_bits = 22, + .bypass = true, + }; + struct pwm_lpss_chip *pwm; + + if (!(community->features & PINCTRL_FEATURE_PWM)) + return 0; + + if (!IS_REACHABLE(CONFIG_PWM_LPSS)) + return 0; + + pwm = pwm_lpss_probe(pctrl->dev, community->regs + PWMC, &info); + if (IS_ERR(pwm)) + return PTR_ERR(pwm); + + return 0; +} + static int intel_pinctrl_probe(struct platform_device *pdev, const struct intel_pinctrl_soc_data *soc_data) { @@ -1584,6 +1612,10 @@ static int intel_pinctrl_probe(struct platform_device *pdev, ret = intel_pinctrl_add_padgroups_by_size(pctrl, community); if (ret) return ret; + + ret = intel_pinctrl_probe_pwm(pctrl, community); + if (ret) + return ret; } irq = platform_get_irq(pdev, 0);