From patchwork Thu Jan 26 13:07:23 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 92517 Delivered-To: patch@linaro.org Received: by 10.182.3.34 with SMTP id 2csp188766obz; Thu, 26 Jan 2017 05:07:57 -0800 (PST) X-Received: by 10.223.139.142 with SMTP id o14mr2649964wra.6.1485436077507; Thu, 26 Jan 2017 05:07:57 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id 77si3018657wmj.34.2017.01.26.05.07.57; Thu, 26 Jan 2017 05:07:57 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=ti.com Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 213204AB68; Thu, 26 Jan 2017 14:07:52 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 2e0TtNPRuaLY; Thu, 26 Jan 2017 14:07:51 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DDF534ABEE; Thu, 26 Jan 2017 14:07:46 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2FB3C4A07B for ; Thu, 26 Jan 2017 14:07:42 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id xjEwIDafr57P for ; Thu, 26 Jan 2017 14:07:42 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from fllnx210.ext.ti.com (fllnx210.ext.ti.com [198.47.19.17]) by theia.denx.de (Postfix) with ESMTPS id 935AF4A030 for ; Thu, 26 Jan 2017 14:07:37 +0100 (CET) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id v0QD7ZeR021151; Thu, 26 Jan 2017 07:07:35 -0600 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v0QD7Z5m012310; Thu, 26 Jan 2017 07:07:35 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.294.0; Thu, 26 Jan 2017 07:07:34 -0600 Received: from lta0400828d.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v0QD7VeX003113; Thu, 26 Jan 2017 07:07:33 -0600 From: Roger Quadros To: , Date: Thu, 26 Jan 2017 15:07:23 +0200 Message-ID: <1485436049-19754-2-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1485436049-19754-1-git-send-email-rogerq@ti.com> References: <1485436049-19754-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 1/7] ARM: OMAP5+: GPIO: Add GPIO_TO_PIN() macro X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" GPIO_TO_PIN(bank, bank_gpio) returns the GPIO index from the GPIO bank number and bank's GPIO offset number. Signed-off-by: Roger Quadros --- arch/arm/include/asm/arch-omap5/gpio.h | 4 ++++ 1 file changed, 4 insertions(+) -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot Reviewed-by: Tom Rini diff --git a/arch/arm/include/asm/arch-omap5/gpio.h b/arch/arm/include/asm/arch-omap5/gpio.h index 9dd03c9..48e8ca5 100644 --- a/arch/arm/include/asm/arch-omap5/gpio.h +++ b/arch/arm/include/asm/arch-omap5/gpio.h @@ -34,4 +34,8 @@ #define OMAP54XX_GPIO7_BASE 0x48051000 #define OMAP54XX_GPIO8_BASE 0x48053000 + +/* Get the GPIO index from the given bank number and bank gpio */ +#define GPIO_TO_PIN(bank, bank_gpio) (32 * (bank - 1) + (bank_gpio)) + #endif /* _GPIO_OMAP5_H */ From patchwork Thu Jan 26 13:07:24 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 92516 Delivered-To: patch@linaro.org Received: by 10.182.3.34 with SMTP id 2csp188685obz; Thu, 26 Jan 2017 05:07:48 -0800 (PST) X-Received: by 10.223.160.14 with SMTP id k14mr2926907wrk.69.1485436067905; Thu, 26 Jan 2017 05:07:47 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id f187si3028729wma.9.2017.01.26.05.07.47; Thu, 26 Jan 2017 05:07:47 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=ti.com Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1AE344A08A; Thu, 26 Jan 2017 14:07:45 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id TWVWQ7Dfo9cM; Thu, 26 Jan 2017 14:07:44 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A5EA04A05E; Thu, 26 Jan 2017 14:07:44 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1C1204A06E for ; Thu, 26 Jan 2017 14:07:42 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id vO_xpdSQNkeA for ; Thu, 26 Jan 2017 14:07:42 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from fllnx210.ext.ti.com (fllnx210.ext.ti.com [198.47.19.17]) by theia.denx.de (Postfix) with ESMTPS id 95D544A05E for ; Thu, 26 Jan 2017 14:07:39 +0100 (CET) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id v0QD7boL021157; Thu, 26 Jan 2017 07:07:37 -0600 Received: from DLEE70.ent.ti.com (dlemailx.itg.ti.com [157.170.170.113]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v0QD7bR6010134; Thu, 26 Jan 2017 07:07:37 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.294.0; Thu, 26 Jan 2017 07:07:36 -0600 Received: from lta0400828d.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v0QD7VeY003113; Thu, 26 Jan 2017 07:07:35 -0600 From: Roger Quadros To: , Date: Thu, 26 Jan 2017 15:07:24 +0200 Message-ID: <1485436049-19754-3-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1485436049-19754-1-git-send-email-rogerq@ti.com> References: <1485436049-19754-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 2/7] ti: common: board_detect: commodify ethaddr environment setting code X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" As Keystone platforms also need this let's move this function to the common board_detect code. Signed-off-by: Roger Quadros --- board/ti/common/board_detect.c | 57 ++++++++++++++++++++++++++++++++++++++++++ board/ti/common/board_detect.h | 12 +++++++++ 2 files changed, 69 insertions(+) -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/board/ti/common/board_detect.c b/board/ti/common/board_detect.c index a5dba94..40315e6 100644 --- a/board/ti/common/board_detect.c +++ b/board/ti/common/board_detect.c @@ -314,3 +314,60 @@ void __maybe_unused set_board_info_env(char *name) else setenv("board_serial", unknown); } + +static u64 mac_to_u64(u8 mac[6]) +{ + int i; + u64 addr = 0; + + for (i = 0; i < 6; i++) { + addr <<= 8; + addr |= mac[i]; + } + + return addr; +} + +static void u64_to_mac(u64 addr, u8 mac[6]) +{ + mac[5] = addr; + mac[4] = addr >> 8; + mac[3] = addr >> 16; + mac[2] = addr >> 24; + mac[1] = addr >> 32; + mac[0] = addr >> 40; +} + +void __maybe_unused board_ti_set_ethaddr(int index) +{ + uint8_t mac_addr[6]; + int i; + u64 mac1, mac2; + u8 mac_addr1[6], mac_addr2[6]; + int num_macs; + /* + * Export any Ethernet MAC addresses from EEPROM. + * The 2 MAC addresses in EEPROM define the address range. + */ + board_ti_get_eth_mac_addr(0, mac_addr1); + board_ti_get_eth_mac_addr(1, mac_addr2); + + if (is_valid_ethaddr(mac_addr1) && is_valid_ethaddr(mac_addr2)) { + mac1 = mac_to_u64(mac_addr1); + mac2 = mac_to_u64(mac_addr2); + + /* must contain an address range */ + num_macs = mac2 - mac1 + 1; + /* <= 50 to protect against user programming error */ + if (num_macs > 0 && num_macs <= 50) { + for (i = 0; i < num_macs; i++) { + u64_to_mac(mac1 + i, mac_addr); + if (is_valid_ethaddr(mac_addr)) { + eth_setenv_enetaddr_by_index("eth", + i + index, + mac_addr); + } + } + } + } +} diff --git a/board/ti/common/board_detect.h b/board/ti/common/board_detect.h index 343fcb4..fc15910 100644 --- a/board/ti/common/board_detect.h +++ b/board/ti/common/board_detect.h @@ -193,4 +193,16 @@ u64 board_ti_get_emif2_size(void); */ void set_board_info_env(char *name); +/** + * board_ti_set_ethaddr- Sets the ethaddr environment from EEPROM + * @index: The first ethaddr environment variable to set + * + * EEPROM should be already read before calling this function. + * The EEPROM contains 2 MAC addresses which define the MAC address + * range (i.e. first and last MAC address). + * This function sets the ethaddr environment variable for all + * the available MAC addresses starting from ethaddr. + */ +void __maybe_unused board_ti_set_ethaddr(int index); + #endif /* __BOARD_DETECT_H */ From patchwork Thu Jan 26 13:07:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 92518 Delivered-To: patch@linaro.org Received: by 10.182.3.34 with SMTP id 2csp188828obz; Thu, 26 Jan 2017 05:08:07 -0800 (PST) X-Received: by 10.28.210.139 with SMTP id j133mr25854082wmg.67.1485436087772; Thu, 26 Jan 2017 05:08:07 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id b62si1967463wrd.98.2017.01.26.05.08.07; Thu, 26 Jan 2017 05:08:07 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=ti.com Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A94604ACF9; Thu, 26 Jan 2017 14:07:57 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id gAA0QlpimQ5g; Thu, 26 Jan 2017 14:07:57 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3B3124B578; Thu, 26 Jan 2017 14:07:56 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id EF6464AF4C for ; Thu, 26 Jan 2017 14:07:48 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id KPK-ZE91-nPy for ; Thu, 26 Jan 2017 14:07:48 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from lelnx193.ext.ti.com (lelnx193.ext.ti.com [198.47.27.77]) by theia.denx.de (Postfix) with ESMTPS id B000C4AA12 for ; Thu, 26 Jan 2017 14:07:41 +0100 (CET) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id v0QD7dbO025975; Thu, 26 Jan 2017 07:07:39 -0600 Received: from DLEE70.ent.ti.com (dlemailx.itg.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v0QD7d57012337; Thu, 26 Jan 2017 07:07:39 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.294.0; Thu, 26 Jan 2017 07:07:38 -0600 Received: from lta0400828d.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v0QD7VeZ003113; Thu, 26 Jan 2017 07:07:37 -0600 From: Roger Quadros To: , Date: Thu, 26 Jan 2017 15:07:25 +0200 Message-ID: <1485436049-19754-4-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1485436049-19754-1-git-send-email-rogerq@ti.com> References: <1485436049-19754-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 3/7] board: ti: am571x-idk: Support 6 port Ethernet or 4 port Ethernet with LCD X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The board can support either ICSS1 Ethernet ports or LCD based on J51 jumper. Factory default is ICSS1 Ethernet ports (i.e. Jumper not populated). Use the GPIO to detect the jumper setting and configure the pinmux accordingly. Also select the right DT blob based on the chosen configuration. J51 absent -> ICSS1 Ethernet, no LCD on VOUT -> am571x-idk.dtb J51 present -> LCD on VOUT, no ICSS1 Ethernet -> am571x-idk-lcd-osd.dtb At present we only support the assume it is the Legacy LCD. LCD detection mechanism needs to be added later to differentiate between legacy vs new LCD. For ICSS1 Ethernet pins use the following convention to set the pinmux as PMT data is not yet finalized. - If pin is output, set as PIN_OUTPUT - If pin is input and external pull resistor present set as PIN_INPUT - If pin is input and external pull resistor absent, set pull to same as that of the external PHY's internall pull. - Do not use SLEW_CONTROLon any pin. [nm@ti.com] Fix wrong dtb selection caused by a typo ';' Cc: Nishanth Menon Signed-off-by: Roger Quadros --- board/ti/am57xx/board.c | 40 +++++++++++++++ board/ti/am57xx/mux_data.h | 104 +++++++++++++++++++++++++------------- include/configs/ti_omap5_common.h | 4 +- 3 files changed, 112 insertions(+), 36 deletions(-) -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot Reviewed-by: Tom Rini diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c index 5f2d4df..81ad86c 100644 --- a/board/ti/am57xx/board.c +++ b/board/ti/am57xx/board.c @@ -50,6 +50,7 @@ DECLARE_GLOBAL_DATA_PTR; +#define GPIO_ETH_LCD GPIO_TO_PIN(2, 22) /* GPIO 7_11 */ #define GPIO_DDR_VTT_EN 203 @@ -449,6 +450,21 @@ void hw_data_init(void) *ctrl = &dra7xx_ctrl; } +bool am571x_idk_needs_lcd(void) +{ + bool needs_lcd; + + gpio_request(GPIO_ETH_LCD, "nLCD_Detect"); + if (gpio_get_value(GPIO_ETH_LCD)) + needs_lcd = false; + else + needs_lcd = true; + + gpio_free(GPIO_ETH_LCD); + + return needs_lcd; +} + int board_init(void) { gpmc_init(); @@ -459,6 +475,8 @@ int board_init(void) int board_late_init(void) { + char *idk_lcd; + setup_board_eeprom_env(); u8 val; @@ -487,6 +505,17 @@ int board_late_init(void) palmas_i2c_write_u8(TPS65903X_CHIP_P1, TPS65903X_PRIMARY_SECONDARY_PAD2, val); + /* TBD: Add LCD panel detection once information is available */ + if (am571x_idk_needs_lcd()) + idk_lcd = "osd101t2045"; /* Default to legacy LCD */ + else + idk_lcd = "no"; + setenv("idk_lcd", idk_lcd); + +#if !defined(CONFIG_SPL_BUILD) + board_ti_set_ethaddr(2); +#endif + return 0; } @@ -549,6 +578,17 @@ void recalibrate_iodelay(void) do_set_mux32((*ctrl)->control_padconf_core_base, pconf, pconf_sz); } + if (board_is_am571x_idk()) { + if (am571x_idk_needs_lcd()) { + pconf = core_padconf_array_vout_am571x_idk; + pconf_sz = ARRAY_SIZE(core_padconf_array_vout_am571x_idk); + } else { + pconf = core_padconf_array_icss1eth_am571x_idk; + pconf_sz = ARRAY_SIZE(core_padconf_array_icss1eth_am571x_idk); + } + do_set_mux32((*ctrl)->control_padconf_core_base, pconf, pconf_sz); + } + /* Setup IOdelay configuration */ ret = do_set_iodelay((*ctrl)->iodelay_config_base, iod, iod_sz); err: diff --git a/board/ti/am57xx/mux_data.h b/board/ti/am57xx/mux_data.h index 2f5243e..ff0e517 100644 --- a/board/ti/am57xx/mux_data.h +++ b/board/ti/am57xx/mux_data.h @@ -549,13 +549,6 @@ const struct pad_conf_entry core_padconf_array_essential_am571x_idk[] = { {VIN2A_D0, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d0.pr1_uart0_rxd */ {VIN2A_D1, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d1.pr1_uart0_txd */ {VIN2A_D2, (M10 | PIN_INPUT_PULLDOWN)}, /* vin2a_d2.eCAP1_in_PWM1_out */ - {VIN2A_D3, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d3.pr1_mi1_col */ - {VIN2A_D4, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d4.pr1_mii1_txd1 */ - {VIN2A_D5, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d5.pr1_mii1_txd0 */ - {VIN2A_D6, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d6.pr1_mii_mt1_clk */ - {VIN2A_D7, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d7.pr1_mii1_txen */ - {VIN2A_D8, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d8.pr1_mii1_txd3 */ - {VIN2A_D9, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d9.pr1_mii1_txd2 */ {VIN2A_D10, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d10.pr1_mdio_mdclk */ {VIN2A_D11, (M11 | PIN_INPUT_PULLUP)}, /* vin2a_d11.pr1_mdio_data */ {VIN2A_D12, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d12.rgmii1_txc */ @@ -570,35 +563,7 @@ const struct pad_conf_entry core_padconf_array_essential_am571x_idk[] = { {VIN2A_D21, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d21.rgmii1_rxd2 */ {VIN2A_D22, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d22.rgmii1_rxd1 */ {VIN2A_D23, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d23.rgmii1_rxd0 */ - {VOUT1_CLK, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_clk.vout1_clk */ - {VOUT1_DE, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_de.vout1_de */ {VOUT1_FLD, (M14 | PIN_INPUT_PULLUP)}, /* vout1_fld.gpio4_21 */ - {VOUT1_HSYNC, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_hsync.vout1_hsync */ - {VOUT1_VSYNC, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_vsync.vout1_vsync */ - {VOUT1_D0, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d0.vout1_d0 */ - {VOUT1_D1, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d1.vout1_d1 */ - {VOUT1_D2, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d2.vout1_d2 */ - {VOUT1_D3, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d3.vout1_d3 */ - {VOUT1_D4, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d4.vout1_d4 */ - {VOUT1_D5, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d5.vout1_d5 */ - {VOUT1_D6, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d6.vout1_d6 */ - {VOUT1_D7, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d7.vout1_d7 */ - {VOUT1_D8, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d8.vout1_d8 */ - {VOUT1_D9, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d9.vout1_d9 */ - {VOUT1_D10, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d10.vout1_d10 */ - {VOUT1_D11, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d11.vout1_d11 */ - {VOUT1_D12, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d12.vout1_d12 */ - {VOUT1_D13, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d13.vout1_d13 */ - {VOUT1_D14, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d14.vout1_d14 */ - {VOUT1_D15, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d15.vout1_d15 */ - {VOUT1_D16, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d16.vout1_d16 */ - {VOUT1_D17, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d17.vout1_d17 */ - {VOUT1_D18, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d18.vout1_d18 */ - {VOUT1_D19, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d19.vout1_d19 */ - {VOUT1_D20, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d20.vout1_d20 */ - {VOUT1_D21, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d21.vout1_d21 */ - {VOUT1_D22, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d22.vout1_d22 */ - {VOUT1_D23, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d23.vout1_d23 */ {MDIO_MCLK, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mdio_mclk.mdio_mclk */ {MDIO_D, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mdio_d.mdio_d */ {RMII_MHZ_50_CLK, (M13 | PIN_INPUT_PULLDOWN)}, /* RMII_MHZ_50_CLK.pr2_pru1_gpo2 */ @@ -727,6 +692,75 @@ const struct pad_conf_entry core_padconf_array_essential_am571x_idk[] = { {RSTOUTN, (M0 | PIN_OUTPUT_PULLDOWN)}, /* rstoutn.rstoutn */ }; +const struct pad_conf_entry core_padconf_array_icss1eth_am571x_idk[] = { + /* PR1 MII0 */ + {VOUT1_D8, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d8.pr1_mii_mt0_clk */ + {VOUT1_D9, (M13 | PIN_OUTPUT)}, /* vout1_d9.pr1_mii0_txd3 */ + {VOUT1_D10, (M13 | PIN_OUTPUT)}, /* vout1_d10.pr1_mii0_txd2 */ + {VOUT1_D11, (M13 | PIN_OUTPUT)}, /* vout1_d11.pr1_mii0_txen */ + {VOUT1_D12, (M13 | PIN_OUTPUT)}, /* vout1_d12.pr1_mii0_txd1 */ + {VOUT1_D13, (M13 | PIN_OUTPUT)}, /* vout1_d13.pr1_mii0_txd0 */ + {VOUT1_D14, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d14.pr1_mii_mr0_clk */ + {VOUT1_D15, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d15.pr1_mii0_rxdv */ + {VOUT1_D16, (M12 | PIN_INPUT)}, /* vout1_d16.pr1_mii0_rxd3 */ + {VOUT1_D17, (M12 | PIN_INPUT)}, /* vout1_d17.pr1_mii0_rxd2 */ + {VOUT1_D18, (M12 | PIN_INPUT)}, /* vout1_d18.pr1_mii0_rxd1 */ + {VOUT1_D19, (M12 | PIN_INPUT)}, /* vout1_d19.pr1_mii0_rxd0 */ + {VOUT1_D20, (M12 | PIN_INPUT_PULLUP)}, /* vout1_d20.pr1_mii0_rxer */ + {VOUT1_D21, (M12 | PIN_INPUT)}, /* vout1_d21.pr1_mii0_rxlink */ + {VOUT1_D22, (M12 | PIN_INPUT)}, /* vout1_d22.pr1_mii0_col */ + {VOUT1_D23, (M12 | PIN_INPUT_PULLUP)}, /* vout1_d23.pr1_mii0_crs */ + + /* PR1 MII1 */ + {VIN2A_D3, (M12 | PIN_INPUT)}, /* vin2a_d3.pr1_mi1_col */ + {VIN2A_D4, (M13 | PIN_OUTPUT)}, /* vin2a_d4.pr1_mii1_txd1 */ + {VIN2A_D5, (M13 | PIN_OUTPUT)}, /* vin2a_d5.pr1_mii1_txd0 */ + {VIN2A_D6, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d6.pr1_mii_mt1_clk */ + {VIN2A_D7, (M11 | PIN_OUTPUT)}, /* vin2a_d7.pr1_mii1_txen */ + {VIN2A_D8, (M11 | PIN_OUTPUT)}, /* vin2a_d8.pr1_mii1_txd3 */ + {VIN2A_D9, (M11 | PIN_OUTPUT)}, /* vin2a_d9.pr1_mii1_txd2 */ + {VOUT1_VSYNC, (M12 | PIN_INPUT_PULLUP)}, /* vout1_vsync.pr1_mii1_rxer */ + {VOUT1_D0, (M12 | PIN_INPUT)}, /* vout1_d0.pr1_mii1_rxlink */ + {VOUT1_D1, (M12 | PIN_INPUT_PULLUP)}, /* vout1_d1.pr1_mii1_crs */ + {VOUT1_D2, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d2.pr1_mii_mr1_clk */ + {VOUT1_D3, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d3.pr1_mii1_rxdv */ + {VOUT1_D4, (M12 | PIN_INPUT)}, /* vout1_d4.pr1_mii1_rxd3 */ + {VOUT1_D5, (M12 | PIN_INPUT)}, /* vout1_d5.pr1_mii1_rxd2 */ + {VOUT1_D6, (M12 | PIN_INPUT)}, /* vout1_d6.pr1_mii1_rxd1 */ + {VOUT1_D7, (M12 | PIN_INPUT)}, /* vout1_d7.pr1_mii1_rxd0 */ +}; + +const struct pad_conf_entry core_padconf_array_vout_am571x_idk[] = { + {VOUT1_CLK, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_clk.vout1_clk */ + {VOUT1_DE, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_de.vout1_de */ + {VOUT1_HSYNC, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_hsync.vout1_hsync */ + {VOUT1_VSYNC, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_vsync.vout1_vsync */ + {VOUT1_D0, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d0.vout1_d0 */ + {VOUT1_D1, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d1.vout1_d1 */ + {VOUT1_D2, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d2.vout1_d2 */ + {VOUT1_D3, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d3.vout1_d3 */ + {VOUT1_D4, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d4.vout1_d4 */ + {VOUT1_D5, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d5.vout1_d5 */ + {VOUT1_D6, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d6.vout1_d6 */ + {VOUT1_D7, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d7.vout1_d7 */ + {VOUT1_D8, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d8.vout1_d8 */ + {VOUT1_D9, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d9.vout1_d9 */ + {VOUT1_D10, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d10.vout1_d10 */ + {VOUT1_D11, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d11.vout1_d11 */ + {VOUT1_D12, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d12.vout1_d12 */ + {VOUT1_D13, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d13.vout1_d13 */ + {VOUT1_D14, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d14.vout1_d14 */ + {VOUT1_D15, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d15.vout1_d15 */ + {VOUT1_D16, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d16.vout1_d16 */ + {VOUT1_D17, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d17.vout1_d17 */ + {VOUT1_D18, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d18.vout1_d18 */ + {VOUT1_D19, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d19.vout1_d19 */ + {VOUT1_D20, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d20.vout1_d20 */ + {VOUT1_D21, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d21.vout1_d21 */ + {VOUT1_D22, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d22.vout1_d22 */ + {VOUT1_D23, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d23.vout1_d23 */ +}; + const struct pad_conf_entry early_padconf[] = { {UART2_CTSN, (M2 | PIN_INPUT_SLEW)}, /* uart2_ctsn.uart3_rxd */ {UART2_RTSN, (M1 | PIN_INPUT_SLEW)}, /* uart2_rtsn.uart3_txd */ diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index 37d6565..6de19c2 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -97,8 +97,10 @@ "setenv fdtfile am57xx-beagle-x15.dtb; fi;" \ "if test $board_name = am57xx_evm_reva3; then " \ "setenv fdtfile am57xx-beagle-x15.dtb; fi;" \ - "if test $board_name = am571x_idk; then " \ + "if test $board_name = am571x_idk && test $idk_lcd = no; then " \ "setenv fdtfile am571x-idk.dtb; fi;" \ + "if test $board_name = am571x_idk && test $idk_lcd = osd101t2045; then " \ + "setenv fdtfile am571x-idk-lcd-osd.dtb; fi;" \ "if test $fdtfile = undefined; then " \ "echo WARNING: Could not determine device tree to use; fi; \0" \ DFUARGS \ From patchwork Thu Jan 26 13:07:26 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 92519 Delivered-To: patch@linaro.org Received: by 10.182.3.34 with SMTP id 2csp188940obz; Thu, 26 Jan 2017 05:08:20 -0800 (PST) X-Received: by 10.28.189.134 with SMTP id n128mr25358418wmf.77.1485436100340; Thu, 26 Jan 2017 05:08:20 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id 88si1956054wrl.144.2017.01.26.05.08.20; Thu, 26 Jan 2017 05:08:20 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=ti.com Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2155C4B578; Thu, 26 Jan 2017 14:08:04 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id KtfH4DwiJS-9; Thu, 26 Jan 2017 14:08:03 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 672E04B55F; Thu, 26 Jan 2017 14:07:58 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AE9A14AA0D for ; Thu, 26 Jan 2017 14:07:51 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id L1L5q4HIey_h for ; Thu, 26 Jan 2017 14:07:51 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from lelnx193.ext.ti.com (lelnx193.ext.ti.com [198.47.27.77]) by theia.denx.de (Postfix) with ESMTPS id 484C84A030 for ; Thu, 26 Jan 2017 14:07:43 +0100 (CET) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id v0QD7fov025985; Thu, 26 Jan 2017 07:07:41 -0600 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v0QD7fRc010198; Thu, 26 Jan 2017 07:07:41 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.294.0; Thu, 26 Jan 2017 07:07:40 -0600 Received: from lta0400828d.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v0QD7Vea003113; Thu, 26 Jan 2017 07:07:39 -0600 From: Roger Quadros To: , Date: Thu, 26 Jan 2017 15:07:26 +0200 Message-ID: <1485436049-19754-5-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1485436049-19754-1-git-send-email-rogerq@ti.com> References: <1485436049-19754-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 4/7] board: ti: am571x-idk: Update pinmux for ICSS2 Ethernet X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Use the same convention that was used for ICSS1 Ethernet - If pin is output, set as PIN_OUTPUT - If pin is input and external pull resistor present set as PIN_INPUT - If pin is input and external pull resistor absent, set pull to same as that of the external PHY's internall pull. Signed-off-by: Roger Quadros --- board/ti/am57xx/mux_data.h | 62 +++++++++++++++++++++++----------------------- 1 file changed, 31 insertions(+), 31 deletions(-) -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot Reviewed-by: Tom Rini diff --git a/board/ti/am57xx/mux_data.h b/board/ti/am57xx/mux_data.h index ff0e517..5485212 100644 --- a/board/ti/am57xx/mux_data.h +++ b/board/ti/am57xx/mux_data.h @@ -586,46 +586,46 @@ const struct pad_conf_entry core_padconf_array_essential_am571x_idk[] = { {GPIO6_14, (M14 | PIN_INPUT_PULLUP)}, /* gpio6_14.gpio6_14 */ {GPIO6_15, (M14 | PIN_INPUT_PULLUP)}, /* gpio6_15.gpio6_15 */ {GPIO6_16, (M14 | PIN_INPUT_PULLDOWN)}, /* gpio6_16.gpio6_16 */ - {XREF_CLK0, (M11 | PIN_INPUT_PULLDOWN)}, /* xref_clk0.pr2_mii1_col */ - {XREF_CLK1, (M11 | PIN_INPUT_PULLDOWN)}, /* xref_clk1.pr2_mii1_crs */ + {XREF_CLK0, (M11 | PIN_INPUT)}, /* xref_clk0.pr2_mii1_col */ + {XREF_CLK1, (M11 | PIN_INPUT_PULLUP)}, /* xref_clk1.pr2_mii1_crs */ {XREF_CLK2, (M14 | PIN_INPUT_PULLDOWN)}, /* xref_clk2.gpio6_19 */ {XREF_CLK3, (M15 | PIN_INPUT_PULLDOWN)}, /* xref_clk3.Driveroff */ {MCASP1_ACLKX, (M11 | PIN_INPUT_PULLDOWN)}, /* mcasp1_aclkx.pr2_mdio_mdclk */ {MCASP1_FSX, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_fsx.pr2_mdio_data */ {MCASP1_ACLKR, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_aclkr.gpio5_0 */ {MCASP1_FSR, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_fsr.gpio5_1 */ - {MCASP1_AXR0, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr0.pr2_mii0_rxer */ - {MCASP1_AXR1, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr1.pr2_mii_mt0_clk */ + {MCASP1_AXR0, (M11 | PIN_INPUT_PULLUP)}, /* mcasp1_axr0.pr2_mii0_rxer */ + {MCASP1_AXR1, (M11 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr1.pr2_mii_mt0_clk */ {MCASP1_AXR2, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr2.gpio5_4 */ {MCASP1_AXR3, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_axr3.gpio5_5 */ {MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr4.gpio5_6 */ {MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr5.gpio5_7 */ {MCASP1_AXR6, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_axr6.gpio5_8 */ {MCASP1_AXR7, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_axr7.gpio5_9 */ - {MCASP1_AXR8, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr8.pr2_mii0_txen */ - {MCASP1_AXR9, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr9.pr2_mii0_txd3 */ - {MCASP1_AXR10, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr10.pr2_mii0_txd2 */ - {MCASP1_AXR11, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr11.pr2_mii0_txd1 */ - {MCASP1_AXR12, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr12.pr2_mii0_txd0 */ - {MCASP1_AXR13, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr13.pr2_mii_mr0_clk */ - {MCASP1_AXR14, (M11 | PIN_INPUT_PULLDOWN | SLEWCONTROL)}, /* mcasp1_axr14.pr2_mii0_rxdv */ - {MCASP1_AXR15, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr15.pr2_mii0_rxd3 */ - {MCASP2_ACLKX, (M11 | PIN_INPUT_SLEW)}, /* mcasp2_aclkx.pr2_mii0_rxd2 */ - {MCASP2_FSX, (M11 | PIN_INPUT_SLEW)}, /* mcasp2_fsx.pr2_mii0_rxd1 */ + {MCASP1_AXR8, (M11 | PIN_OUTPUT)}, /* mcasp1_axr8.pr2_mii0_txen */ + {MCASP1_AXR9, (M11 | PIN_OUTPUT)}, /* mcasp1_axr9.pr2_mii0_txd3 */ + {MCASP1_AXR10, (M11 | PIN_OUTPUT)}, /* mcasp1_axr10.pr2_mii0_txd2 */ + {MCASP1_AXR11, (M11 | PIN_OUTPUT)}, /* mcasp1_axr11.pr2_mii0_txd1 */ + {MCASP1_AXR12, (M11 | PIN_OUTPUT)}, /* mcasp1_axr12.pr2_mii0_txd0 */ + {MCASP1_AXR13, (M11 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr13.pr2_mii_mr0_clk */ + {MCASP1_AXR14, (M11 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr14.pr2_mii0_rxdv */ + {MCASP1_AXR15, (M11 | PIN_INPUT)}, /* mcasp1_axr15.pr2_mii0_rxd3 */ + {MCASP2_ACLKX, (M11 | PIN_INPUT)}, /* mcasp2_aclkx.pr2_mii0_rxd2 */ + {MCASP2_FSX, (M11 | PIN_INPUT)}, /* mcasp2_fsx.pr2_mii0_rxd1 */ {MCASP2_ACLKR, (M15 | PIN_INPUT_PULLDOWN)}, /* mcasp2_aclkr.Driveroff */ {MCASP2_FSR, (M15 | PIN_INPUT_PULLDOWN)}, /* mcasp2_fsr.Driveroff */ {MCASP2_AXR0, (M15 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr0.Driveroff */ {MCASP2_AXR1, (M15 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr1.Driveroff */ - {MCASP2_AXR2, (M11 | PIN_INPUT_SLEW)}, /* mcasp2_axr2.pr2_mii0_rxd0 */ - {MCASP2_AXR3, (M11 | PIN_INPUT_PULLDOWN | SLEWCONTROL)}, /* mcasp2_axr3.pr2_mii0_rxlink */ + {MCASP2_AXR2, (M11 | PIN_INPUT)}, /* mcasp2_axr2.pr2_mii0_rxd0 */ + {MCASP2_AXR3, (M11 | PIN_INPUT)}, /* mcasp2_axr3.pr2_mii0_rxlink */ {MCASP2_AXR4, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr4.gpio1_4 */ {MCASP2_AXR5, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr5.gpio6_7 */ {MCASP2_AXR6, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr6.gpio2_29 */ {MCASP2_AXR7, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr7.gpio1_5 */ - {MCASP3_ACLKX, (M11 | PIN_INPUT_PULLDOWN)}, /* mcasp3_aclkx.pr2_mii0_crs */ - {MCASP3_FSX, (M11 | PIN_INPUT_SLEW)}, /* mcasp3_fsx.pr2_mii0_col */ - {MCASP3_AXR0, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp3_axr0.pr2_mii1_rxer */ - {MCASP3_AXR1, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp3_axr1.pr2_mii1_rxlink */ + {MCASP3_ACLKX, (M11 | PIN_INPUT_PULLUP)}, /* mcasp3_aclkx.pr2_mii0_crs */ + {MCASP3_FSX, (M11 | PIN_INPUT)}, /* mcasp3_fsx.pr2_mii0_col */ + {MCASP3_AXR0, (M11 | PIN_INPUT_PULLUP)}, /* mcasp3_axr0.pr2_mii1_rxer */ + {MCASP3_AXR1, (M11 | PIN_INPUT)}, /* mcasp3_axr1.pr2_mii1_rxlink */ {MCASP4_ACLKX, (M2 | PIN_INPUT_PULLDOWN)}, /* mcasp4_aclkx.spi3_sclk */ {MCASP4_FSX, (M2 | PIN_INPUT_PULLDOWN)}, /* mcasp4_fsx.spi3_d1 */ {MCASP4_AXR0, (M15 | PIN_INPUT_PULLDOWN)}, /* mcasp4_axr0.Driveroff */ @@ -642,18 +642,18 @@ const struct pad_conf_entry core_padconf_array_essential_am571x_idk[] = { {MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat3.mmc1_dat3 */ {MMC1_SDCD, (M14 | PIN_INPUT_PULLUP)}, /* mmc1_sdcd.gpio6_27 */ {MMC1_SDWP, (M0 | PIN_OUTPUT)}, /* mmc1_sdwp.mmc1_sdwp */ - {GPIO6_10, (M11 | PIN_INPUT_PULLUP)}, /* gpio6_10.pr2_mii_mt1_clk */ - {GPIO6_11, (M11 | PIN_INPUT_PULLUP)}, /* gpio6_11.pr2_mii1_txen */ - {MMC3_CLK, (M11 | PIN_INPUT_PULLUP)}, /* mmc3_clk.pr2_mii1_txd3 */ - {MMC3_CMD, (M11 | PIN_INPUT_PULLUP)}, /* mmc3_cmd.pr2_mii1_txd2 */ - {MMC3_DAT0, (M11 | PIN_INPUT_PULLUP)}, /* mmc3_dat0.pr2_mii1_txd1 */ - {MMC3_DAT1, (M11 | PIN_INPUT_PULLUP)}, /* mmc3_dat1.pr2_mii1_txd0 */ - {MMC3_DAT2, (M11 | PIN_INPUT_PULLUP)}, /* mmc3_dat2.pr2_mii_mr1_clk */ + {GPIO6_10, (M11 | PIN_INPUT_PULLDOWN)}, /* gpio6_10.pr2_mii_mt1_clk */ + {GPIO6_11, (M11 | PIN_OUTPUT)}, /* gpio6_11.pr2_mii1_txen */ + {MMC3_CLK, (M11 | PIN_OUTPUT)}, /* mmc3_clk.pr2_mii1_txd3 */ + {MMC3_CMD, (M11 | PIN_OUTPUT)}, /* mmc3_cmd.pr2_mii1_txd2 */ + {MMC3_DAT0, (M11 | PIN_OUTPUT)}, /* mmc3_dat0.pr2_mii1_txd1 */ + {MMC3_DAT1, (M11 | PIN_OUTPUT)}, /* mmc3_dat1.pr2_mii1_txd0 */ + {MMC3_DAT2, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat2.pr2_mii_mr1_clk */ {MMC3_DAT3, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat3.pr2_mii1_rxdv */ - {MMC3_DAT4, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat4.pr2_mii1_rxd3 */ - {MMC3_DAT5, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat5.pr2_mii1_rxd2 */ - {MMC3_DAT6, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat6.pr2_mii1_rxd1 */ - {MMC3_DAT7, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat7.pr2_mii1_rxd0 */ + {MMC3_DAT4, (M11 | PIN_INPUT)}, /* mmc3_dat4.pr2_mii1_rxd3 */ + {MMC3_DAT5, (M11 | PIN_INPUT)}, /* mmc3_dat5.pr2_mii1_rxd2 */ + {MMC3_DAT6, (M11 | PIN_INPUT)}, /* mmc3_dat6.pr2_mii1_rxd1 */ + {MMC3_DAT7, (M11 | PIN_INPUT)}, /* mmc3_dat7.pr2_mii1_rxd0 */ {SPI1_SCLK, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_sclk.gpio7_7 */ {SPI1_D1, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_d1.gpio7_8 */ {SPI1_D0, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_d0.gpio7_9 */ From patchwork Thu Jan 26 13:07:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 92521 Delivered-To: patch@linaro.org Received: by 10.182.3.34 with SMTP id 2csp189136obz; Thu, 26 Jan 2017 05:08:44 -0800 (PST) X-Received: by 10.28.46.74 with SMTP id u71mr2430221wmu.136.1485436124547; Thu, 26 Jan 2017 05:08:44 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id w84si26483547wmg.121.2017.01.26.05.08.44; Thu, 26 Jan 2017 05:08:44 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=ti.com Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 977554ACA6; Thu, 26 Jan 2017 14:08:24 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id J7iZgl0DtnvO; Thu, 26 Jan 2017 14:08:24 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id F14604A07B; Thu, 26 Jan 2017 14:08:23 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E9BCC4ACF9 for ; Thu, 26 Jan 2017 14:08:18 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id icxsIlTYYWon for ; Thu, 26 Jan 2017 14:08:18 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from fllnx209.ext.ti.com (fllnx209.ext.ti.com [198.47.19.16]) by theia.denx.de (Postfix) with ESMTPS id 75C9B4AA12 for ; Thu, 26 Jan 2017 14:08:15 +0100 (CET) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id v0QD7mma016615; Thu, 26 Jan 2017 07:07:48 -0600 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v0QD7hSr012386; Thu, 26 Jan 2017 07:07:43 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.294.0; Thu, 26 Jan 2017 07:07:42 -0600 Received: from lta0400828d.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v0QD7Veb003113; Thu, 26 Jan 2017 07:07:41 -0600 From: Roger Quadros To: , Date: Thu, 26 Jan 2017 15:07:27 +0200 Message-ID: <1485436049-19754-6-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1485436049-19754-1-git-send-email-rogerq@ti.com> References: <1485436049-19754-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 5/7] board: ti: am57xx-idk: Auto detect LCD Panel X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Nishanth Menon AM571x IDK and AM572x IDK have optional LCD Kits that can be purchased. These can be one of OSD101T2045 or the newer OSD101T2587. The LCD panel itself has no registers that can be used to identify the panel, however, the touchscreen controllers on the panels are different. Hence to ease user experience, we can use the touch screen controller's ID information to detect what kind of panel we use and select the appropriate kernel dtb for the platform configuration. NOTE: AM572x IDK default configuration is for LCD Connectivity, however the AM571x IDK has a jumper (J51) that needs to be mounted for the IDK to operate with LCD (Vs two PRUSS ethernet port option). Touchscreen ID information is documented in: http://www.osddisplays.com/TI/OSD101T2587-53TS_A.1.pdf Acked-by: Lokesh Vutla Signed-off-by: Nishanth Menon Signed-off-by: Lokesh Vutla Signed-off-by: Roger Quadros --- board/ti/am57xx/board.c | 78 +++++++++++++++++++++++++++++++++++---- include/configs/ti_omap5_common.h | 10 ++++- 2 files changed, 78 insertions(+), 10 deletions(-) -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot Reviewed-by: Tom Rini diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c index 81ad86c..9ec0448 100644 --- a/board/ti/am57xx/board.c +++ b/board/ti/am57xx/board.c @@ -54,6 +54,19 @@ DECLARE_GLOBAL_DATA_PTR; /* GPIO 7_11 */ #define GPIO_DDR_VTT_EN 203 +/* Touch screen controller to identify the LCD */ +#define OSD_TS_FT_BUS_ADDRESS 0 +#define OSD_TS_FT_CHIP_ADDRESS 0x38 +#define OSD_TS_FT_REG_ID 0xA3 +/* + * Touchscreen IDs for various OSD panels + * Ref: http://www.osddisplays.com/TI/OSD101T2587-53TS_A.1.pdf + */ +/* Used on newer osd101t2587 Panels */ +#define OSD_TS_FT_ID_5x46 0x54 +/* Used on older osd101t2045 Panels */ +#define OSD_TS_FT_ID_5606 0x08 + #define SYSINFO_BOARD_NAME_MAX_LEN 45 #define TPS65903X_PRIMARY_SECONDARY_PAD2 0xFB @@ -473,10 +486,64 @@ int board_init(void) return 0; } -int board_late_init(void) +void am57x_idk_lcd_detect(void) { - char *idk_lcd; + int r = -ENODEV; + char *idk_lcd = "no"; + uint8_t buf = 0; + + /* Only valid for IDKs */ + if (board_is_x15() || board_is_am572x_evm()) + return; + + /* Only AM571x IDK has gpio control detect.. so check that */ + if (board_is_am571x_idk() && !am571x_idk_needs_lcd()) + goto out; + + r = i2c_set_bus_num(OSD_TS_FT_BUS_ADDRESS); + if (r) { + printf("%s: Failed to set bus address to %d: %d\n", + __func__, OSD_TS_FT_BUS_ADDRESS, r); + goto out; + } + r = i2c_probe(OSD_TS_FT_CHIP_ADDRESS); + if (r) { + /* AM572x IDK has no explicit settings for optional LCD kit */ + if (board_is_am571x_idk()) { + printf("%s: Touch screen detect failed: %d!\n", + __func__, r); + } + goto out; + } + + /* Read FT ID */ + r = i2c_read(OSD_TS_FT_CHIP_ADDRESS, OSD_TS_FT_REG_ID, 1, &buf, 1); + if (r) { + printf("%s: Touch screen ID read %d:0x%02x[0x%02x] failed:%d\n", + __func__, OSD_TS_FT_BUS_ADDRESS, OSD_TS_FT_CHIP_ADDRESS, + OSD_TS_FT_REG_ID, r); + goto out; + } + + switch (buf) { + case OSD_TS_FT_ID_5606: + idk_lcd = "osd101t2045"; + break; + case OSD_TS_FT_ID_5x46: + idk_lcd = "osd101t2587"; + break; + default: + printf("%s: Unidentifed Touch screen ID 0x%02x\n", + __func__, buf); + /* we will let default be "no lcd" */ + } +out: + setenv("idk_lcd", idk_lcd); + return; +} +int board_late_init(void) +{ setup_board_eeprom_env(); u8 val; @@ -505,12 +572,7 @@ int board_late_init(void) palmas_i2c_write_u8(TPS65903X_CHIP_P1, TPS65903X_PRIMARY_SECONDARY_PAD2, val); - /* TBD: Add LCD panel detection once information is available */ - if (am571x_idk_needs_lcd()) - idk_lcd = "osd101t2045"; /* Default to legacy LCD */ - else - idk_lcd = "no"; - setenv("idk_lcd", idk_lcd); + am57x_idk_lcd_detect(); #if !defined(CONFIG_SPL_BUILD) board_ti_set_ethaddr(2); diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index 6de19c2..1fa2f82 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -91,16 +91,22 @@ "setenv fdtfile am57xx-beagle-x15.dtb; fi;" \ "if test $board_name = beagle_x15_revb1; then " \ "setenv fdtfile am57xx-beagle-x15-revb1.dtb; fi;" \ - "if test $board_name = am572x_idk; then " \ - "setenv fdtfile am572x-idk.dtb; fi;" \ "if test $board_name = am57xx_evm; then " \ "setenv fdtfile am57xx-beagle-x15.dtb; fi;" \ "if test $board_name = am57xx_evm_reva3; then " \ "setenv fdtfile am57xx-beagle-x15.dtb; fi;" \ + "if test $board_name = am572x_idk && test $idk_lcd = no; then " \ + "setenv fdtfile am572x-idk.dtb; fi;" \ + "if test $board_name = am572x_idk && test $idk_lcd = osd101t2045; then " \ + "setenv fdtfile am572x-idk-lcd-osd.dtb; fi;" \ + "if test $board_name = am572x_idk && test $idk_lcd = osd101t2587; then " \ + "setenv fdtfile am572x-idk-lcd-osd101t2587.dtb; fi;" \ "if test $board_name = am571x_idk && test $idk_lcd = no; then " \ "setenv fdtfile am571x-idk.dtb; fi;" \ "if test $board_name = am571x_idk && test $idk_lcd = osd101t2045; then " \ "setenv fdtfile am571x-idk-lcd-osd.dtb; fi;" \ + "if test $board_name = am571x_idk && test $idk_lcd = osd101t2587; then " \ + "setenv fdtfile am571x-idk-lcd-osd101t2587.dtb; fi;" \ "if test $fdtfile = undefined; then " \ "echo WARNING: Could not determine device tree to use; fi; \0" \ DFUARGS \ From patchwork Thu Jan 26 13:07:28 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 92522 Delivered-To: patch@linaro.org Received: by 10.182.3.34 with SMTP id 2csp189225obz; Thu, 26 Jan 2017 05:08:56 -0800 (PST) X-Received: by 10.223.174.183 with SMTP id y52mr2890463wrc.112.1485436136263; Thu, 26 Jan 2017 05:08:56 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id g18si1954734wrc.171.2017.01.26.05.08.55; Thu, 26 Jan 2017 05:08:56 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=ti.com Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4067B4B578; Thu, 26 Jan 2017 14:08:31 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 7C4FN2Yt6hs0; Thu, 26 Jan 2017 14:08:31 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 963E34B63D; Thu, 26 Jan 2017 14:08:26 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9EB2B4ACF9 for ; Thu, 26 Jan 2017 14:08:20 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id BvYd1Qt5wHL0 for ; Thu, 26 Jan 2017 14:08:20 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from fllnx209.ext.ti.com (fllnx209.ext.ti.com [198.47.19.16]) by theia.denx.de (Postfix) with ESMTPS id 271DB4AA12 for ; Thu, 26 Jan 2017 14:08:16 +0100 (CET) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id v0QD7oFt016616; Thu, 26 Jan 2017 07:07:50 -0600 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v0QD7jfT010248; Thu, 26 Jan 2017 07:07:45 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.294.0; Thu, 26 Jan 2017 07:07:44 -0600 Received: from lta0400828d.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v0QD7Vec003113; Thu, 26 Jan 2017 07:07:43 -0600 From: Roger Quadros To: , Date: Thu, 26 Jan 2017 15:07:28 +0200 Message-ID: <1485436049-19754-7-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1485436049-19754-1-git-send-email-rogerq@ti.com> References: <1485436049-19754-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 6/7] ARM: k2g: setup PRU ethernet MAC addresses X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" PRU ethernet MAC address range is present in the board EEPROM. Parse it and setup eth?addr environment variables. Signed-off-by: Roger Quadros --- board/ti/ks2_evm/board_k2g.c | 19 +++++++++++++++++++ include/configs/k2g_evm.h | 4 ++++ 2 files changed, 23 insertions(+) -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c index 40edbaa..64a62e0 100644 --- a/board/ti/ks2_evm/board_k2g.c +++ b/board/ti/ks2_evm/board_k2g.c @@ -12,6 +12,7 @@ #include #include #include "mux-k2g.h" +#include "../common/board_detect.h" #define SYS_CLK 24000000 @@ -149,6 +150,24 @@ int board_early_init_f(void) } #endif +#ifdef CONFIG_BOARD_LATE_INIT +int board_late_init(void) +{ + __maybe_unused int rc; + +#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_TI_I2C_BOARD_DETECT) + rc = ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS, + CONFIG_EEPROM_CHIP_ADDRESS); + if (rc) + printf("ti_i2c_eeprom_init failed %d\n", rc); + + board_ti_set_ethaddr(1); +#endif + + return 0; +} +#endif + #ifdef CONFIG_SPL_BUILD void spl_init_keystone_plls(void) { diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h index 81da8ff..f37dbfd 100644 --- a/include/configs/k2g_evm.h +++ b/include/configs/k2g_evm.h @@ -53,6 +53,10 @@ /* NAND Configuration */ #define CONFIG_SYS_NAND_PAGE_2K +/* Board Detection EEPROM */ +#define CONFIG_EEPROM_BUS_ADDRESS 0 +#define CONFIG_EEPROM_CHIP_ADDRESS 0x50 + /* Network */ #define CONFIG_KSNET_NETCP_V1_5 #define CONFIG_KSNET_CPSW_NUM_PORTS 2 From patchwork Thu Jan 26 13:07:29 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 92520 Delivered-To: patch@linaro.org Received: by 10.182.3.34 with SMTP id 2csp189013obz; Thu, 26 Jan 2017 05:08:32 -0800 (PST) X-Received: by 10.28.48.7 with SMTP id w7mr2532016wmw.78.1485436112164; Thu, 26 Jan 2017 05:08:32 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id 57si1978671wrv.17.2017.01.26.05.08.31; Thu, 26 Jan 2017 05:08:32 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=ti.com Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1A8D14AF41; Thu, 26 Jan 2017 14:08:10 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id TKuZomL_TD24; Thu, 26 Jan 2017 14:08:09 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B9E394B646; Thu, 26 Jan 2017 14:08:06 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id ED20B4AD1F for ; Thu, 26 Jan 2017 14:07:56 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id TrQJkR3SqvEG for ; Thu, 26 Jan 2017 14:07:56 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from lelnx193.ext.ti.com (lelnx193.ext.ti.com [198.47.27.77]) by theia.denx.de (Postfix) with ESMTPS id 263384AF4C for ; Thu, 26 Jan 2017 14:07:48 +0100 (CET) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id v0QD7lLx025995; Thu, 26 Jan 2017 07:07:47 -0600 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v0QD7lsS010257; Thu, 26 Jan 2017 07:07:47 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.294.0; Thu, 26 Jan 2017 07:07:46 -0600 Received: from lta0400828d.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v0QD7Ved003113; Thu, 26 Jan 2017 07:07:45 -0600 From: Roger Quadros To: , Date: Thu, 26 Jan 2017 15:07:29 +0200 Message-ID: <1485436049-19754-8-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1485436049-19754-1-git-send-email-rogerq@ti.com> References: <1485436049-19754-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 7/7] ti: common: board_detect: Rename EEPROM scratch start macro X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Lokesh Vutla Non OMAP platforms i.e. Keystone will also need to use the board EEPROM helpers so let's make the macro platform independent. Signed-off-by: Roger Quadros Signed-off-by: Lokesh Vutla --- arch/arm/include/asm/omap_common.h | 8 +++++--- board/ti/common/board_detect.h | 2 +- 2 files changed, 6 insertions(+), 4 deletions(-) -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index 2034a5e..c1a70b1 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -767,9 +767,11 @@ static inline u8 is_dra72x(void) #define OMAP_SRAM_SCRATCH_VCORES_PTR (SRAM_SCRATCH_SPACE_ADDR + 0x1C) #define OMAP_SRAM_SCRATCH_SYS_CTRL (SRAM_SCRATCH_SPACE_ADDR + 0x20) #define OMAP_SRAM_SCRATCH_BOOT_PARAMS (SRAM_SCRATCH_SPACE_ADDR + 0x24) -#define OMAP_SRAM_SCRATCH_BOARD_EEPROM_START (SRAM_SCRATCH_SPACE_ADDR + 0x28) -#define OMAP_SRAM_SCRATCH_BOARD_EEPROM_END (SRAM_SCRATCH_SPACE_ADDR + 0x200) -#define OMAP_SRAM_SCRATCH_SPACE_END (OMAP_SRAM_SCRATCH_BOARD_EEPROM_END) +#ifndef TI_SRAM_SCRATCH_BOARD_EEPROM_START +#define TI_SRAM_SCRATCH_BOARD_EEPROM_START (SRAM_SCRATCH_SPACE_ADDR + 0x28) +#define TI_SRAM_SCRATCH_BOARD_EEPROM_END (SRAM_SCRATCH_SPACE_ADDR + 0x200) +#endif +#define OMAP_SRAM_SCRATCH_SPACE_END (TI_SRAM_SCRATCH_BOARD_EEPROM_END) /* Boot parameters */ #define DEVICE_DATA_OFFSET 0x18 diff --git a/board/ti/common/board_detect.h b/board/ti/common/board_detect.h index fc15910..8576004 100644 --- a/board/ti/common/board_detect.h +++ b/board/ti/common/board_detect.h @@ -98,7 +98,7 @@ struct ti_common_eeprom { }; #define TI_EEPROM_DATA ((struct ti_common_eeprom *)\ - OMAP_SRAM_SCRATCH_BOARD_EEPROM_START) + TI_SRAM_SCRATCH_BOARD_EEPROM_START) /** * ti_i2c_eeprom_am_get() - Consolidated eeprom data collection for AM* TI EVMs