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Thu, 28 Mar 2019 13:52:20 +0000 (GMT) X-AuditID: cbfec7f2-f13ff700000010ca-31-5c9cd194a90a Received: from eusync1.samsung.com ( [203.254.199.211]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id 85.0C.04146.491DC9C5; Thu, 28 Mar 2019 13:52:20 +0000 (GMT) Received: from AMDC2765.DIGITAL.local ([106.120.51.73]) by eusync1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0PP200M69X74R640@eusync1.samsung.com>; Thu, 28 Mar 2019 13:52:20 +0000 (GMT) From: Marek Szyprowski To: linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz Subject: [PATCH] soc: samsung: Fix Exynos4412 ISP CMU reset in AFTR mode Date: Thu, 28 Mar 2019 14:51:53 +0100 Message-id: <20190328135153.7641-1-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.17.1 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrJLMWRmVeSWpSXmKPExsWy7djP87pTL86JMbi5mcli44z1rBbnz29g t5hxfh+Txdojd9kdWDw2repk8+jbsorR4/MmuQDmKC6blNSczLLUIn27BK6Mg41drAVdPBUv v99nbmD8wNnFyMkhIWAisaJ/LiOILSSwglHizpzELkYuIPszo8SkT6/ZYYoutSxjgkgsY5R4 d2UTG4Tzn1Hi0MxeNpAqNgFDia63XWC2iICqxOe2BewgRcwCfYwS1/fOZQZJCAt4SNxe8pcF xGYBKuq88ZUVxOYVsJFYfe4WI8Q6eYnVGw4wgzRLCBxllXj95hfUHS4S8w4cZ4GwZSQ6Ow4y QRQ1M0o8PLeWHcLpYZS43DQDapS1xOHjF8FWMAvwSUzaNh1oLAdQnFeio00IosRDYtWGjdAQ iJWYsHsyywRG8QWMDKsYxVNLi3PTU4sN81LL9YoTc4tL89L1kvNzNzECI+T0v+OfdjB+vZR0 iFGAg1GJh3fWzjkxQqyJZcWVuYcYJTiYlUR4b60ECvGmJFZWpRblxxeV5qQWH2KU5mBREuet ZngQLSSQnliSmp2aWpBaBJNl4uCUamBkY2Tbzfu+TH6jzpLMKblKSp0aKlGxdbHqHs8z3V5s tDbL2O50pv7Aotzrv+ZaOIgnNN1g9up5O+nimeS9abfVFzy79N/Eb/7kR+uYL+csPnQ2Tssk 5eWMuZ3+Gb/ktDdvVC5aZPv8xNwMrQdXBd56XFz3YFUys0bH33WMHDFfdhgWfUnW97yuxFKc kWioxVxUnAgARYGp8YwCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrOJMWRmVeSWpSXmKPExsVy+t/xy7pTLs6JMViwS95i44z1rBbnz29g t5hxfh+Txdojd9kdWDw2repk8+jbsorR4/MmuQDmKC6blNSczLLUIn27BK6Mg41drAVdPBUv v99nbmD8wNnFyMkhIWAicallGVMXIxeHkMASRonze/sZIZxGJokFX6czg1SxCRhKdL3tYgOx RQRUJT63LWAHKWIWmMAosXrhLFaQhLCAh8TtJX9ZQGwWoKLOG1/B4rwCNhKrz91ihFgnL7F6 wwHmCYxcCxgZVjGKpJYW56bnFhvqFSfmFpfmpesl5+duYgR6d9uxn5t3MF7aGHyIUYCDUYmH 98PuOTFCrIllxZW5hxglOJiVRHhvrQQK8aYkVlalFuXHF5XmpBYfYpTmYFES5z1vUBklJJCe WJKanZpakFoEk2Xi4JRqYGQrsVSsXOP6JN336/u6QraKzVyXl827XLBKKTQ9vWA2S7qsvfpi wSdn/wQwKdUVuC555/67NqFqsnce+229qZLl0ifOxf36FyMh2P7i5dvtF/wDBEQbA9hmHvzz OTY9d3rjkzm6ywOvWTfxl/0IUmOISxQInHTbT4j5xmuPlSueW7eWBTTaK7EUZyQaajEXFScC AL0r2e7qAQAA X-CMS-MailID: 20190328135220eucas1p1eb57991be6e9cf90837c2754f24d1ec6 CMS-TYPE: 201P X-CMS-RootMailID: 20190328135220eucas1p1eb57991be6e9cf90837c2754f24d1ec6 References: Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org When CPUidle enters C1 (AFTR) mode on Exynos4412, the operation of ISP power domain fails. This can be observed by the following messages: Power domain ISP disable failed in the kernel log after using any of the ISP related device. This is caused by enforcing low power state on the ISP CMU, which is a part of the ISP power domain by the PMU driver during entering AFTR state. This however fails, because the ISP power domain may be already turned off by the Exynos power domain driver. To fix this disable forcing low-power mode of the ISP domain from the PMU driver. Fixes: bfce552d0b10 ("drivers: soc: Add support for Exynos PMU driver") Signed-off-by: Marek Szyprowski --- drivers/soc/samsung/exynos4-pmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.17.1 diff --git a/drivers/soc/samsung/exynos4-pmu.c b/drivers/soc/samsung/exynos4-pmu.c index a7cdbf1aac0c..62dcc68ada59 100644 --- a/drivers/soc/samsung/exynos4-pmu.c +++ b/drivers/soc/samsung/exynos4-pmu.c @@ -131,7 +131,7 @@ static const struct exynos_pmu_conf exynos4412_pmu_config[] = { { S5P_CMU_RESET_MFC_LOWPWR, { 0x1, 0x0, 0x0 } }, { S5P_CMU_RESET_G3D_LOWPWR, { 0x1, 0x0, 0x0 } }, { S5P_CMU_RESET_LCD0_LOWPWR, { 0x1, 0x0, 0x0 } }, - { S5P_CMU_RESET_ISP_LOWPWR, { 0x1, 0x0, 0x0 } }, + { S5P_CMU_RESET_ISP_LOWPWR, { 0x0, 0x0, 0x0 } }, { S5P_CMU_RESET_MAUDIO_LOWPWR, { 0x1, 0x1, 0x0 } }, { S5P_CMU_RESET_GPS_LOWPWR, { 0x1, 0x0, 0x0 } }, { S5P_TOP_BUS_LOWPWR, { 0x3, 0x0, 0x0 } },