From patchwork Tue Dec 20 11:34:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 635444 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp2860162pvb; Tue, 20 Dec 2022 03:37:35 -0800 (PST) X-Google-Smtp-Source: AMrXdXuIVPWJaT271W4WPnj/fSkfwUQ1/WafoKQOKpesq+gOKnL7o4PepHR6mgyjEW8xWd3qGxp4 X-Received: by 2002:ac8:5646:0:b0:3a9:7d1a:ff0c with SMTP id 6-20020ac85646000000b003a97d1aff0cmr18191429qtt.62.1671536255683; Tue, 20 Dec 2022 03:37:35 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671536255; cv=none; d=google.com; s=arc-20160816; b=Z41bR000itPmChy3vMtC6fl3THM+pthm0Y0CaXEKO1n3RQWSit9parfE5VvDsF4vTQ EXjaz+5BUU0Tq2cTwKSLJX0MFTgadjBRMXsqW1g1mXyNX+NdfG64yuBLZ+jyMH0wbL2x 6tYaelr6cPGQCzOOfN5ZoVMIzJiV+4/ipgjY8h9xMW+/AAwYj7bqF9CUuD/xevtL10L9 AOIX1Y6KnnPLJ9I7FCTBDfhWKQkY7hwWgbSeEPSh0KlZQqg05PInp8x1YjdWH9UY9YfU nHS6UWyWp+h0NpfrbY78stLfc8/OOufoN/PG9P5MA6s9w6BK5UqK66Bekfuwn9pek8ex bIug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=bGCOa5oMG6crU1pmMt6tVFXX/xHui00CJSxQwvzSIuo=; b=atejWel84RUPqleycv+BRvZqBQe3mmiEIbRC+GPZC+jeVygjXfF8/xTauIcJ8XravR CoL9EXqvUOmUDOUefLawhaO2l8cb9avNvCSiOZYyF3k274/K2WX+lOdvlDCetaWl6MkO dxw6Kr7Ph0cQq4GBbjiGvgSedtLuSYHKNOBHj7dWLdD9Z3GpnLwEpT+WXB3YCYGVoKcB FUmPS/Ue/vxhbqdVEtiAVHrUbjbiWucxUMSUPy63T05ggWO2Es+WEpAcoQxJ+xwbUt9J oIgoJq9kSGJO58bKiIqAZLgLVCsQ/IiTs7uE1Y3LhkYiawb3Kb+A3l/B8Uq3HXFsbjAZ v5aA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FBxpo4uh; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id g10-20020ac84b6a000000b003a818d38522si4912833qts.11.2022.12.20.03.37.35 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Dec 2022 03:37:35 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FBxpo4uh; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p7atY-00043O-93; Tue, 20 Dec 2022 06:34:52 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p7atU-000417-Uv for qemu-devel@nongnu.org; Tue, 20 Dec 2022 06:34:50 -0500 Received: from mail-wr1-x432.google.com ([2a00:1450:4864:20::432]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p7atT-0007yK-Cj for qemu-devel@nongnu.org; Tue, 20 Dec 2022 06:34:48 -0500 Received: by mail-wr1-x432.google.com with SMTP id bx10so11495304wrb.0 for ; Tue, 20 Dec 2022 03:34:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=bGCOa5oMG6crU1pmMt6tVFXX/xHui00CJSxQwvzSIuo=; b=FBxpo4uh6lgCOnPobDxJkJ4ejL13b4KMQuhmkDQHaE73TWjYJr4cXsVM0DgbPf4vDq q3Enjm7Z8s/2QOdL09MhtU52cTC3M7GNp5GXZrK2bjBSujNsW1yYvUaoBqeWgF96IqLv hZ5vQihXhKxbDST9Yf/JZRPlMYiiEwidNsUm9yvuujmVpmdq3CwRIiryOBL89dmH57HY p8qmmCbigf/7U6PM2VGSI72BTYDCjfcso+VLAXhfKo+GDJ8r6bZx2EsyT17nTcCsATgu cb0Ou8Wye4hgHBrx8Ra4LRDnNa6HotzVRBdfR5mNvsgA8Ym4k+Vu8l2nqML+AUbH8VFf Ve5Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=bGCOa5oMG6crU1pmMt6tVFXX/xHui00CJSxQwvzSIuo=; b=5hbVG+AjQkjXkt0a0ZjXpTaHGMewDDh99lHdKq0YuN/Udt9indICUcyi86yp+b1uQJ TsjcWvSLSt44jxuqWVww5gOmFIOHdIgVqfSzHSrAQ6cgrK3MA0oSLF2CVT1XwhqS9GfS Ro7s7moOrJ220GZmCj1M/a5pJEOFOKIdlzFbq3wo0Dl7nEHSARJFVagj9ca9dALNdWzm GKSs1ZjU3pJQVCZO7R6enyHdxlKAmj2G335NTq1IC1h50itgHS5EO0ibdaakKIoDv/vu /wUTSNeHAmd0fIF9xCLtKLFQLPSW+xEB2gJXy6XY36wA1t6hl7RTNWRLDRSzmT2q+fZs 9Oog== X-Gm-Message-State: AFqh2kquvFyxu347ticH6lhMyD5LgU98Yi4kNKhM16R/devHdQalKfVA +fT/ds9X1f5eLggx4BMId4ClhaYHjSGP8uoHLfw= X-Received: by 2002:a5d:504d:0:b0:242:68fb:da2a with SMTP id h13-20020a5d504d000000b0024268fbda2amr1187187wrt.39.1671536084543; Tue, 20 Dec 2022 03:34:44 -0800 (PST) Received: from localhost.localdomain ([81.0.6.76]) by smtp.gmail.com with ESMTPSA id c10-20020a5d4cca000000b0024278304ef6sm12425651wrt.13.2022.12.20.03.34.43 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 20 Dec 2022 03:34:43 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Jiaxun Yang , Thomas Huth , Aurelien Jarno , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Bernhard Beschow , Richard Henderson Subject: [PATCH v2 1/7] hw/mips/Kconfig: Introduce CONFIG_GT64120 to select gt64xxx_pci.c Date: Tue, 20 Dec 2022 12:34:30 +0100 Message-Id: <20221220113436.14299-2-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221220113436.14299-1-philmd@linaro.org> References: <20221220113436.14299-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=philmd@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bernhard Beschow Message-Id: <20221209151533.69516-2-philmd@linaro.org> Reviewed-by: Richard Henderson --- hw/mips/Kconfig | 6 ++++++ hw/mips/meson.build | 3 ++- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/hw/mips/Kconfig b/hw/mips/Kconfig index 725525358d..d6bbbe7069 100644 --- a/hw/mips/Kconfig +++ b/hw/mips/Kconfig @@ -1,5 +1,6 @@ config MALTA bool + select GT64120 select ISA_SUPERIO config MIPSSIM @@ -59,3 +60,8 @@ config MIPS_BOSTON config FW_CFG_MIPS bool + +config GT64120 + bool + select PCI + select I8259 diff --git a/hw/mips/meson.build b/hw/mips/meson.build index dd0101ad4d..6ccd385df0 100644 --- a/hw/mips/meson.build +++ b/hw/mips/meson.build @@ -2,7 +2,8 @@ mips_ss = ss.source_set() mips_ss.add(files('bootloader.c', 'mips_int.c')) mips_ss.add(when: 'CONFIG_FW_CFG_MIPS', if_true: files('fw_cfg.c')) mips_ss.add(when: 'CONFIG_LOONGSON3V', if_true: files('loongson3_bootp.c', 'loongson3_virt.c')) -mips_ss.add(when: 'CONFIG_MALTA', if_true: files('gt64xxx_pci.c', 'malta.c')) +mips_ss.add(when: 'CONFIG_MALTA', if_true: files('malta.c')) +mips_ss.add(when: 'CONFIG_GT64120', if_true: files('gt64xxx_pci.c')) mips_ss.add(when: 'CONFIG_MIPS_CPS', if_true: files('cps.c')) if 'CONFIG_TCG' in config_all From patchwork Tue Dec 20 11:34:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 635447 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp2860792pvb; Tue, 20 Dec 2022 03:39:22 -0800 (PST) X-Google-Smtp-Source: AMrXdXun96OWDkZFAmSh/y41SKnSfy28oHWA/UfD/8+GIIxGkeHpBWEVhgPwTMdiudN1jJtzrvJm X-Received: by 2002:a05:622a:5a85:b0:3a9:7332:3f74 with SMTP id fz5-20020a05622a5a8500b003a973323f74mr24436785qtb.19.1671536362133; Tue, 20 Dec 2022 03:39:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671536362; cv=none; d=google.com; s=arc-20160816; b=evgtdFZfx6QwVzNks5IyMyBwUP5hsCfE5LPyPB43p5Kg2JVMXpt+6SBNp1M2i7MmKm oEXAE/ewFRMLccJmJ6A2Jefof3EDCsBH4X8X/AJCfoG/dfaUrK4LGc7YeSghMrB7S4tq QzTMKKtjzoOxY8cjVTvus7V09I6hVYotmTcWCO+CC91IfX2PhqBUJnqet8rhWHR3FGLV n2lW+mgrxihNypjuBHjAu4cqbKMRIrTCORNVf8f3xrQfWDysEWroojT3jk6eGsPWvvET eN5lx3tdrMGXtH5tvFI/WCW/VoUiYLCmO0I0zA0MtebSj3rkRJys/x1KD9XGrCEKJb18 omsw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=xwQz7LfMVtzoHUrBPaHv4lNXbKHJnpkJXHPaGfYBvc0=; b=lPEkdoZwhEsxUR4ujkxUN4ByQvqkLNY+oWEa5TFNVl7E8DaE305VjP9P+t87X5gn7T 8rSG6R1WFVqKkppPLrjhu+Quu79qQal9jqgLPD7dJ4wAC2npwl5BnP1F3sEAOG8s1oOM WqGbCdFz4bvUnxemf3zFbC6pJ8cIHmaunLl3emp/+jTH7QYAu0LSzROgLGs3ek+wJVUS 1O3eslLKfDlsGBSkdKyVcgI4Zhy2uccepilGGTa1yRDGpEFE7yQodBlOXiEnEfh2rV3x EcximTnzuDcNLujLumzbPUJ+gZnaZmf6SCyBQyVzyRCOqBCiiRr5I2s5Td44HlamHzg+ i/kw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=aHB2jpMI; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id b10-20020ac8540a000000b0035d43b31782si3473167qtq.389.2022.12.20.03.39.22 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Dec 2022 03:39:22 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=aHB2jpMI; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p7atc-00047q-Rh; Tue, 20 Dec 2022 06:34:56 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p7atZ-000458-Nt for qemu-devel@nongnu.org; Tue, 20 Dec 2022 06:34:55 -0500 Received: from mail-wm1-x334.google.com ([2a00:1450:4864:20::334]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p7atX-000807-QA for qemu-devel@nongnu.org; Tue, 20 Dec 2022 06:34:53 -0500 Received: by mail-wm1-x334.google.com with SMTP id h8-20020a1c2108000000b003d1efd60b65so10922506wmh.0 for ; Tue, 20 Dec 2022 03:34:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xwQz7LfMVtzoHUrBPaHv4lNXbKHJnpkJXHPaGfYBvc0=; b=aHB2jpMIHhBJDFKG9VVvlyD8Poxkq6XiNS8rXhLSRKUW+tiJ9xSsLcKfQ5mhEs+zh9 /7dZIJEOgVLTYsNpNWeNSFXhhD8xQ1De9VgyoqXhhe9pAz8RkeCl4foMifNrJ2D2UlB3 dNqGgZ8JtopMzpEooXDNsRagn0wWM+Z4wIiQ8VZocVzXxn0KHElomBUIz+slJ4xHj4+T CZcNCNmpkDEIV9tu/GAO0iwDBUU1hcRt0/GhSE4s6oLf2KyQt65W2HmPHwoXluTFHk/g Bsfz5JkoXKhWr+wieW54PR/U6TRN/Y4qc3unpLV4pcy6/JP/GLOTfekE8mwt2Oh3ArH+ pW9Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xwQz7LfMVtzoHUrBPaHv4lNXbKHJnpkJXHPaGfYBvc0=; b=40EQN/d0Wynd7eR8pQphsEyCxoyD5X3KuDG1C7WmQeuGeu2cD91/dWsflqbhHznb79 UO0HPuCUR5UMrPfevGqS75pg5/VSt4SJFtFPTxSMdBvsnPP+OtFSHX6IHRWvScaC4WFQ R4l0ND1DV8m5bhiidjsguyBGNEw5RSumlWh6kBJxFvqNPCuo4GXiHrHISnvjYRGBzUfc F5oHlvvkuPsWnjtz8OMByvM4kO8N0Yckk1AU7NMvkBpI6QHlaC5G786n4UOs4Q2+aoQw pX6cEVHhFCiHz+VVo6potwhHYb/D6N+L4LAgHqYx5+tmbKWEdEJctdSSo+P+urWBrlS8 etew== X-Gm-Message-State: AFqh2krUbrL4hHqPVXjQ/Qqdkyc3HnqhLCcy3MtpH5Q1yKarNbDTYSD0 hHd51+D/b7uV3aX1WaHTFr547TZDEArtgGzGbDI= X-Received: by 2002:a05:600c:3644:b0:3d2:39dc:4ab9 with SMTP id y4-20020a05600c364400b003d239dc4ab9mr1379200wmq.13.1671536090239; Tue, 20 Dec 2022 03:34:50 -0800 (PST) Received: from localhost.localdomain ([81.0.6.76]) by smtp.gmail.com with ESMTPSA id f24-20020a05600c491800b003c6bbe910fdsm25284213wmp.9.2022.12.20.03.34.48 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 20 Dec 2022 03:34:49 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Jiaxun Yang , Thomas Huth , Aurelien Jarno , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Richard Henderson Subject: [PATCH v2 2/7] hw/mips/gt64xxx_pci: Let the GT64120 manage the lower 512MiB hole Date: Tue, 20 Dec 2022 12:34:31 +0100 Message-Id: <20221220113436.14299-3-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221220113436.14299-1-philmd@linaro.org> References: <20221220113436.14299-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=philmd@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé Per the comment in the Malta board, the [0x0000.0000-0x2000.0000] range is decoded by the GT64120, so move the "empty_slot" there. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20221209151533.69516-3-philmd@linaro.org> Reviewed-by: Richard Henderson --- configs/devices/mips-softmmu/common.mak | 1 - hw/mips/Kconfig | 1 + hw/mips/gt64xxx_pci.c | 8 ++++++++ hw/mips/malta.c | 7 ------- 4 files changed, 9 insertions(+), 8 deletions(-) diff --git a/configs/devices/mips-softmmu/common.mak b/configs/devices/mips-softmmu/common.mak index 416161f833..c2b5f322fc 100644 --- a/configs/devices/mips-softmmu/common.mak +++ b/configs/devices/mips-softmmu/common.mak @@ -26,7 +26,6 @@ CONFIG_IDE_ISA=y CONFIG_PFLASH_CFI01=y CONFIG_I8259=y CONFIG_MC146818RTC=y -CONFIG_EMPTY_SLOT=y CONFIG_MIPS_CPS=y CONFIG_MIPS_ITU=y CONFIG_MALTA=y diff --git a/hw/mips/Kconfig b/hw/mips/Kconfig index d6bbbe7069..8f7bce38fb 100644 --- a/hw/mips/Kconfig +++ b/hw/mips/Kconfig @@ -64,4 +64,5 @@ config FW_CFG_MIPS config GT64120 bool select PCI + select EMPTY_SLOT select I8259 diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 19d0d9889f..1b9ac7f792 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -28,6 +28,7 @@ #include "qemu/log.h" #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" +#include "hw/misc/empty_slot.h" #include "migration/vmstate.h" #include "hw/intc/i8259.h" #include "hw/irq.h" @@ -1162,6 +1163,13 @@ static void gt64120_realize(DeviceState *dev, Error **errp) PCI_DEVFN(18, 0), TYPE_PCI_BUS); pci_create_simple(phb->bus, PCI_DEVFN(0, 0), "gt64120_pci"); + + /* + * The whole address space decoded by the GT-64120A doesn't generate + * exception when accessing invalid memory. Create an empty slot to + * emulate this feature. + */ + empty_slot_init("GT64120", 0, 0x20000000); } static void gt64120_pci_realize(PCIDevice *d, Error **errp) diff --git a/hw/mips/malta.c b/hw/mips/malta.c index c0a2e0ab04..ba92022f87 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -53,7 +53,6 @@ #include "sysemu/runstate.h" #include "qapi/error.h" #include "qemu/error-report.h" -#include "hw/misc/empty_slot.h" #include "sysemu/kvm.h" #include "semihosting/semihost.h" #include "hw/mips/cps.h" @@ -1393,12 +1392,6 @@ void mips_malta_init(MachineState *machine) /* Northbridge */ dev = sysbus_create_simple("gt64120", -1, NULL); pci_bus = PCI_BUS(qdev_get_child_bus(dev, "pci")); - /* - * The whole address space decoded by the GT-64120A doesn't generate - * exception when accessing invalid memory. Create an empty slot to - * emulate this feature. - */ - empty_slot_init("GT64120", 0, 0x20000000); /* Southbridge */ piix4 = pci_create_simple_multifunction(pci_bus, PCI_DEVFN(10, 0), true, From patchwork Tue Dec 20 11:34:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 635445 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp2860208pvb; Tue, 20 Dec 2022 03:37:43 -0800 (PST) X-Google-Smtp-Source: AA0mqf7BPsNZGQT7y2xkRHZV1lIIWhefXlMDp+uhlHat3zy3YBv4cnD+fvf5k7NuEMHLgmCRxTTX X-Received: by 2002:ad4:4d42:0:b0:4bb:783e:f008 with SMTP id m2-20020ad44d42000000b004bb783ef008mr60890025qvm.3.1671536263256; Tue, 20 Dec 2022 03:37:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671536263; cv=none; d=google.com; s=arc-20160816; b=FV4lEtIp3Y243RnX1Vq6wPvVjkIl2KjiMuQ1/zfj9UsWGtwgM1wgHbbM7LjmObJ7D5 S34P0hiIpvuCp+0NpRGiLn3/tjTaDrYGOd8H7NQPahkqYxtCKVUtWIjGh7ncPGU6LAkU D2NHdjGvNN9bbBVPhg5oC6pMf5ury5rGe2YrEBVgt+crZUWC2a3ODtIFU/XSR7hqU8J5 OKxLEkUdGTANKEGyOSrEivtunpWXdwgcH2V6tg+LGevicl0AG3XKTMessJW5aU0RTY0b TW/6Il8xAXhQSzEYgtSz7QY02bSF4nUJG8ai/1C5mU2F7gDx0KydI1f8obHjGWh1Ebfc UTag== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=ZM6SdCAnwA4ZL3m+yseAtDWjOQrZEuleB9DCwJGkl6E=; b=MArZqiok2g/tbzKVYqlxnaDwb2t90pCGdSJiTvzugHaamZipF0jBDbPIh1xZRZad17 TsXZOQuhRUEwC4Wx/AZHiHGzjXTukPMGcF9AFRVaFRmg8y29ipVL5MXDH6Bka2DbXsCi uZu2fbOHV/sIio2s2H2B5sTSmSdLU/9eL/rFHQUnzDD5N8iawQAzuFUptg5jyObMczGs +ZoQadBFgibeodsoJzbGilT25EpNw0JtufHTqk3wftbMBkF9bCwKEcr8FqhHL0DwsJA7 EEyDjlg+rSVPQwP3bObaK4JR3I09OafU0Ymxq9mf5wBYJQWmSj09d47zjdfeZHUVFI7k wcMQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="q+JPw3/q"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id t12-20020ad45bcc000000b004bbf102de7fsi5184412qvt.249.2022.12.20.03.37.43 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Dec 2022 03:37:43 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="q+JPw3/q"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p7atm-0004Bs-Cn; Tue, 20 Dec 2022 06:35:06 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p7ate-0004AK-O2 for qemu-devel@nongnu.org; Tue, 20 Dec 2022 06:34:59 -0500 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p7atd-00080P-0L for qemu-devel@nongnu.org; Tue, 20 Dec 2022 06:34:58 -0500 Received: by mail-wr1-x435.google.com with SMTP id h10so11447084wrx.3 for ; Tue, 20 Dec 2022 03:34:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ZM6SdCAnwA4ZL3m+yseAtDWjOQrZEuleB9DCwJGkl6E=; b=q+JPw3/qVAtJ4a8VCmJyw6vK0lZN26ylrZV3PCUg394s7q5/YEevH8v8KQQXk0/ABp esKUG1LrQFUNNStE+d4WQSjvCWpSd/v+h6HP3ViXMIfD8ZNdoMfbMYrJBSWRr9pxm5L+ QJ3dpo9h6W5rrxgShXcZr0TVnsCF5povYl4YBpTFAabRETAMxXcJBXjMqeAFYccerDI1 5vfmibgfdK2kYcmK+RI5WJqMGNAdZZ45oPw8I0EY9wsMn2LVA7fmXoYFdaLSZYCno8Tm Wh7Wr0JEL9VhAd7Id26LOdxUNPH+kLU2yTLql/vhrAWEs/HQqd2BiSJdRRo2zQ0LnJ5s jH9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZM6SdCAnwA4ZL3m+yseAtDWjOQrZEuleB9DCwJGkl6E=; b=qIvOfz8+KP84/wJ3GAAL5JhA6MZHnDVDcWh6iMBeITrV9ihmS3W2oHUiqPXgVJSP55 Buw//kcxg+5pbTY/cS1AQfD4RCZAbQM4AYBpR3FwwWFCqRb0+3bqoYRQ/eZwd/myb6co sHXfCewH6se1mUKFWsBDmHYJbjvhnJGovtSEfJnQwXCX2inNzUaXqc8i1L81J0xmh8xa AWE4OQoWIGyLHMFY0KzWPKr6BGaIUw/TD91NNx87/V1efZ8Gqv+e03ZoxI+FVF4YLKDm iUT5kK6c7G5oJ7VFD57zSerqzLz++zUjEz6EGKlGdKMay5HT0S7UnS4FS+mxHv4oAKAj OgUQ== X-Gm-Message-State: ANoB5pkrTP+kim+1St+iph/2QovnCbqIHk6HZ+g3xAh4Fhb1T+K1Fm7E rx3GX6H/ydJHTFbmVrtOWFkQV9CVL+zR6gwLP/w= X-Received: by 2002:adf:a743:0:b0:242:1c1a:37ec with SMTP id e3-20020adfa743000000b002421c1a37ecmr27524659wrd.17.1671536095380; Tue, 20 Dec 2022 03:34:55 -0800 (PST) Received: from localhost.localdomain ([81.0.6.76]) by smtp.gmail.com with ESMTPSA id ck5-20020a5d5e85000000b00257795ffcc8sm12596264wrb.73.2022.12.20.03.34.54 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 20 Dec 2022 03:34:54 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Jiaxun Yang , Thomas Huth , Aurelien Jarno , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v2 3/7] hw/mips/gt64xxx_pci: Manage endian bits with the RegisterFields API Date: Tue, 20 Dec 2022 12:34:32 +0100 Message-Id: <20221220113436.14299-4-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221220113436.14299-1-philmd@linaro.org> References: <20221220113436.14299-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=philmd@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20221209151533.69516-4-philmd@linaro.org> Reviewed-by: Richard Henderson --- hw/mips/gt64xxx_pci.c | 38 +++++++++++++++++++++++--------------- 1 file changed, 23 insertions(+), 15 deletions(-) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 1b9ac7f792..f6fa309ef7 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -26,6 +26,7 @@ #include "qapi/error.h" #include "qemu/units.h" #include "qemu/log.h" +#include "hw/registerfields.h" #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" #include "hw/misc/empty_slot.h" @@ -41,6 +42,9 @@ #define GT_CPU (0x000 >> 2) #define GT_MULTI (0x120 >> 2) +REG32(GT_CPU, 0x000) +FIELD(GT_CPU, Endianness, 12, 1) + /* CPU Address Decode */ #define GT_SCS10LD (0x008 >> 2) #define GT_SCS10HD (0x010 >> 2) @@ -210,6 +214,17 @@ #define GT_PCI0_CFGADDR (0xcf8 >> 2) #define GT_PCI0_CFGDATA (0xcfc >> 2) +REG32(GT_PCI0_CMD, 0xc00) +FIELD(GT_PCI0_CMD, MByteSwap, 0, 1) +FIELD(GT_PCI0_CMD, SByteSwap, 16, 1) +#define R_GT_PCI0_CMD_ByteSwap_MASK \ + (R_GT_PCI0_CMD_MByteSwap_MASK | R_GT_PCI0_CMD_SByteSwap_MASK) +REG32(GT_PCI1_CMD, 0xc80) +FIELD(GT_PCI1_CMD, MByteSwap, 0, 1) +FIELD(GT_PCI1_CMD, SByteSwap, 16, 1) +#define R_GT_PCI1_CMD_ByteSwap_MASK \ + (R_GT_PCI1_CMD_MByteSwap_MASK | R_GT_PCI1_CMD_SByteSwap_MASK) + /* Interrupts */ #define GT_INTRCAUSE (0xc18 >> 2) #define GT_INTRMASK (0xc1c >> 2) @@ -983,15 +998,16 @@ static const MemoryRegionOps isd_mem_ops = { static void gt64120_reset(DeviceState *dev) { GT64120State *s = GT64120_PCI_HOST_BRIDGE(dev); +#if TARGET_BIG_ENDIAN + bool cpu_little_endian = false; +#else + bool cpu_little_endian = true; +#endif /* FIXME: Malta specific hw assumptions ahead */ /* CPU Configuration */ -#if TARGET_BIG_ENDIAN - s->regs[GT_CPU] = 0x00000000; -#else - s->regs[GT_CPU] = 0x00001000; -#endif + s->regs[GT_CPU] = cpu_little_endian ? R_GT_CPU_Endianness_MASK : 0; s->regs[GT_MULTI] = 0x00000003; /* CPU Address decode */ @@ -1098,11 +1114,7 @@ static void gt64120_reset(DeviceState *dev) s->regs[GT_TC_CONTROL] = 0x00000000; /* PCI Internal */ -#if TARGET_BIG_ENDIAN - s->regs[GT_PCI0_CMD] = 0x00000000; -#else - s->regs[GT_PCI0_CMD] = 0x00010001; -#endif + s->regs[GT_PCI0_CMD] = cpu_little_endian ? R_GT_PCI0_CMD_ByteSwap_MASK : 0; s->regs[GT_PCI0_TOR] = 0x0000070f; s->regs[GT_PCI0_BS_SCS10] = 0x00fff000; s->regs[GT_PCI0_BS_SCS32] = 0x00fff000; @@ -1119,11 +1131,7 @@ static void gt64120_reset(DeviceState *dev) s->regs[GT_PCI0_SSCS10_BAR] = 0x00000000; s->regs[GT_PCI0_SSCS32_BAR] = 0x01000000; s->regs[GT_PCI0_SCS3BT_BAR] = 0x1f000000; -#if TARGET_BIG_ENDIAN - s->regs[GT_PCI1_CMD] = 0x00000000; -#else - s->regs[GT_PCI1_CMD] = 0x00010001; -#endif + s->regs[GT_PCI1_CMD] = cpu_little_endian ? R_GT_PCI1_CMD_ByteSwap_MASK : 0; s->regs[GT_PCI1_TOR] = 0x0000070f; s->regs[GT_PCI1_BS_SCS10] = 0x00fff000; s->regs[GT_PCI1_BS_SCS32] = 0x00fff000; From patchwork Tue Dec 20 11:34:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 635451 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp2865643pvb; Tue, 20 Dec 2022 03:52:14 -0800 (PST) X-Google-Smtp-Source: AMrXdXtExK9D2owfYVA+rmBi6kVishWCUK7VJsnfZjoMzxKcOqiWVV8Ah7rTeNM+JuIhUwdqshDj X-Received: by 2002:a05:6214:3d02:b0:51a:464f:b317 with SMTP id ol2-20020a0562143d0200b0051a464fb317mr6545546qvb.16.1671537134136; Tue, 20 Dec 2022 03:52:14 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671537134; cv=none; d=google.com; s=arc-20160816; b=ZsQIAe7G11AyGcCnfQPxt94yMGoMHkJu590eNYxqG7xZCgM0LQdNTVFFhhYCjRLeL0 p60DHNMoquKKoxPxFWxCxbeHF6AbXD6iZ2kktEKP53qbNnYcJb8m32j5dP0PxPDdyCHd nxOfnAqmYIjBjdWjRFG+bmNgSjihc2mgpq0swhkekc0NM0jbNNrFpdC7fH/GcQky228D 9N1a7k6b5fh+5z1cW1EwcR0N+jmAb9kZ9+EatEo+trib6XxlXGgQasUCRm2+BvtHzncD 3ykojSVLi43V/igZ+eOEkwchZ7he3QFS6XJsNycK78Yn5YMEPSwyy62hxJvlkTF+9LtB qOow== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=oug+yyfnrjJxQPmigf/yq+rALBMZ7d2PLfBytRZUvRA=; b=MeNnJC4C7ww1xtNH0ELOtmlrZxMUB2S2xjoLOmL6ynSK2LIxt/KtXMF9JmDmSA4niT P35BUGd9VEigEJ3fVHmRRCanbZBwtkxSK9sCpvUcj3n2de+6ETVG1OT9oWIa6Mi0sK2h j1uDyt9wlciJmJcWYe2RHc/PfWntB7Qjki3AOucNvHzrOrkGIxMmP2E7pBTPc/7YIJ7K Y39X4wY99owcDQ0q9rdZYgIMlR3crEOKUsQ4TY2Ngiie1swI0/7EqqWy7lK8DPWPRHDy /ilRhRk2fwh5ust29N47pCS9BY3n/iG0G8c/qLNXU7N5YYex5Gu6nJMQeFnTuRdtvr95 FDjQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UjYSTfQx; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id f10-20020a05620a408a00b006cfa81f5df9si4053027qko.103.2022.12.20.03.52.14 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Dec 2022 03:52:14 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UjYSTfQx; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p7atn-0004Ei-TE; Tue, 20 Dec 2022 06:35:07 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p7atl-0004Cc-As for qemu-devel@nongnu.org; Tue, 20 Dec 2022 06:35:06 -0500 Received: from mail-wm1-x32d.google.com ([2a00:1450:4864:20::32d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p7ati-00081s-PF for qemu-devel@nongnu.org; Tue, 20 Dec 2022 06:35:04 -0500 Received: by mail-wm1-x32d.google.com with SMTP id o5-20020a05600c510500b003d21f02fbaaso10872973wms.4 for ; Tue, 20 Dec 2022 03:35:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=oug+yyfnrjJxQPmigf/yq+rALBMZ7d2PLfBytRZUvRA=; b=UjYSTfQxscRpDeqRHP3c2/GeRj+b30kTaBmRJv1beC9r+O9adwH9PijuxbnBviYEEA fnJmfBKDvjU1oSgGLqMFC0/FouzKICf01KR5onNmUJPc0E0cTN6kXUX9dm6X891sD0g5 xM9Yh/KvJfCgWXZ9u6V7jUlSPtPzn13Wsnv+L1CvI/I4ihN5MsXKNIE5zVAHkUnkPr+i lewrqV2M9EJVGzR5Ijlq+FStZC8wD7r1uXIOb9ChtwW0xq2sjNwKLWwaajtil33gcfjl UfSPPPYJAflXQcJD+fS0BLNqqfNb/Y70kMhWlu1NUWazroNEWopNBhqAFbtkAyxBtfzQ ZmoA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=oug+yyfnrjJxQPmigf/yq+rALBMZ7d2PLfBytRZUvRA=; b=cwGPOCnUd+yeBDmH2fIp2E4R/NS3FXuUlHo3gEjuA09L5xLtv8imeZbsSuXHiCmfSr yt7Ldmlb9pBlDa4Hs7VFgFb22eblOZgCb3DM1mtNtKzrYO+M7oNGyQ4cAPzMWgvYqpT8 0+YCLycyoy+Yru9vNn5bvR2Arhlvz52CpFzaZxylsFHqIBD8laby3/b/I63u4Io0jMXE jmVCebDLIy3aLfQqberOM2QCTfsCYuzcx9F8dqznu86uR0wUeFdHWGjlfz5vLfIMdPkC EBT3MX59dWxGG+PAp9yPPLWdJVfSpEkybJKIVRx67DcEzS/c10xEGTtmvUoluKYbxYxv Zrcw== X-Gm-Message-State: AFqh2koeYR5QA5/lbZuImJmOj4Xly1v32Wq+RYydm0cjC0THVALDnFOD 7/ysKI6Tp2qguMjlGoDZPgdp4cPk7mwh5IqGtKs= X-Received: by 2002:a05:600c:5010:b0:3d3:55ad:a114 with SMTP id n16-20020a05600c501000b003d355ada114mr6833486wmr.38.1671536100963; Tue, 20 Dec 2022 03:35:00 -0800 (PST) Received: from localhost.localdomain ([81.0.6.76]) by smtp.gmail.com with ESMTPSA id m4-20020a05600c3b0400b003c6b7f5567csm2781414wms.0.2022.12.20.03.34.59 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 20 Dec 2022 03:34:59 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Jiaxun Yang , Thomas Huth , Aurelien Jarno , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v2 4/7] hw/mips/gt64xxx_pci: Add a 'cpu-little-endian' qdev property Date: Tue, 20 Dec 2022 12:34:33 +0100 Message-Id: <20221220113436.14299-5-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221220113436.14299-1-philmd@linaro.org> References: <20221220113436.14299-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=philmd@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé This device does not have to be TARGET-dependent. Add a 'cpu_big_endian' property which sets the byte-swapping options if required. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20221209151533.69516-5-philmd@linaro.org> Reviewed-by: Richard Henderson --- hw/mips/gt64xxx_pci.c | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index f6fa309ef7..4cafc76a23 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -26,6 +26,7 @@ #include "qapi/error.h" #include "qemu/units.h" #include "qemu/log.h" +#include "hw/qdev-properties.h" #include "hw/registerfields.h" #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" @@ -256,6 +257,9 @@ struct GT64120State { PCI_MAPPING_ENTRY(ISD); MemoryRegion pci0_mem; AddressSpace pci0_mem_as; + + /* properties */ + bool cpu_little_endian; }; /* Adjust range to avoid touching space which isn't mappable via PCI */ @@ -998,16 +1002,11 @@ static const MemoryRegionOps isd_mem_ops = { static void gt64120_reset(DeviceState *dev) { GT64120State *s = GT64120_PCI_HOST_BRIDGE(dev); -#if TARGET_BIG_ENDIAN - bool cpu_little_endian = false; -#else - bool cpu_little_endian = true; -#endif /* FIXME: Malta specific hw assumptions ahead */ /* CPU Configuration */ - s->regs[GT_CPU] = cpu_little_endian ? R_GT_CPU_Endianness_MASK : 0; + s->regs[GT_CPU] = s->cpu_little_endian ? R_GT_CPU_Endianness_MASK : 0; s->regs[GT_MULTI] = 0x00000003; /* CPU Address decode */ @@ -1114,7 +1113,7 @@ static void gt64120_reset(DeviceState *dev) s->regs[GT_TC_CONTROL] = 0x00000000; /* PCI Internal */ - s->regs[GT_PCI0_CMD] = cpu_little_endian ? R_GT_PCI0_CMD_ByteSwap_MASK : 0; + s->regs[GT_PCI0_CMD] = s->cpu_little_endian ? R_GT_PCI0_CMD_ByteSwap_MASK : 0; s->regs[GT_PCI0_TOR] = 0x0000070f; s->regs[GT_PCI0_BS_SCS10] = 0x00fff000; s->regs[GT_PCI0_BS_SCS32] = 0x00fff000; @@ -1131,7 +1130,7 @@ static void gt64120_reset(DeviceState *dev) s->regs[GT_PCI0_SSCS10_BAR] = 0x00000000; s->regs[GT_PCI0_SSCS32_BAR] = 0x01000000; s->regs[GT_PCI0_SCS3BT_BAR] = 0x1f000000; - s->regs[GT_PCI1_CMD] = cpu_little_endian ? R_GT_PCI1_CMD_ByteSwap_MASK : 0; + s->regs[GT_PCI1_CMD] = s->cpu_little_endian ? R_GT_PCI1_CMD_ByteSwap_MASK : 0; s->regs[GT_PCI1_TOR] = 0x0000070f; s->regs[GT_PCI1_BS_SCS10] = 0x00fff000; s->regs[GT_PCI1_BS_SCS32] = 0x00fff000; @@ -1224,11 +1223,18 @@ static const TypeInfo gt64120_pci_info = { }, }; +static Property gt64120_properties[] = { + DEFINE_PROP_BOOL("cpu-little-endian", GT64120State, + cpu_little_endian, !TARGET_BIG_ENDIAN), + DEFINE_PROP_END_OF_LIST(), +}; + static void gt64120_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); + device_class_set_props(dc, gt64120_properties); dc->realize = gt64120_realize; dc->reset = gt64120_reset; dc->vmsd = &vmstate_gt64120; From patchwork Tue Dec 20 11:34:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 635450 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp2864935pvb; Tue, 20 Dec 2022 03:50:31 -0800 (PST) X-Google-Smtp-Source: AMrXdXs4oFhN+iilgZthoQwsLWwpLRDbjndKlH/niNcYMlxaAJTbzvBUhydo0Z1P0E0cdIQsHq1r X-Received: by 2002:a05:622a:2518:b0:3a9:8b17:d090 with SMTP id cm24-20020a05622a251800b003a98b17d090mr9750654qtb.36.1671537031202; Tue, 20 Dec 2022 03:50:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671537031; cv=none; d=google.com; s=arc-20160816; b=TKEZjYizZE4MYrRBKBtPZYt+4GSZwWXsAhMDOiDt4RxKM81aJTq+4dC4+YQkM0hzZ6 zlcoUI6z/g2uCq3admM0dGESeyQJ3zRyfpqVjzq1ew5uoc4DnyKYRv9yIdPbnbcs7Ujm WpRXU//Hh7zJq48A9pNI+pFhRv31d51cyaAUiy7Q8b51dCypoGqvd6dHFb8MG9fHnw6B Qr+Anu5G1tnIdfakAwXmfpZ5mKZwSv/uIPHp0U84qDRHbsxRKz9WrAYcGLFOhsUGRHwG Ed5Rt5VzmL4bMMXjTYu4i2tJTz4kkSIb8fSmthyAqgFvRRS2sAceTGLwU6JFsAKYWqEe aL+A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=sC9vcF9yGetREijhhbohBEV83L0zPyCxXlEChBylbPg=; b=ygC80zms0y2AoPeZRESG7lhgWzq8bWvQEK1bCynpg91btJzzXB0f1PDKsro/aecP4d yvEFzGFjhBTYH91oVhtmTgovYaxw6f6TMtqBN0f6/KgLzDMrsrrbRTqjOIGMCRcbJb3U aHvpjOnEky+/c8o2AQbsGL5KagBSGFAlQF86zqcmsaIQ5BWk40lkOg+d8dc73SyMfq6P FZeuCLvzTP/16rzQR2dFhFIWbGMxXZbruwYxa3EYKpXNYJd5CQAS4B9m2oHmm/im4BbJ 617VD2KAt04SuWM5r2MjnolDew/ogbW+E3LNDOfVxSNBRD3V9IuTtFd1cErJHvWJlSyF bTlA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=MBwjdhtx; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id c30-20020a05620a201e00b006fec601fc23si4924705qka.477.2022.12.20.03.50.31 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Dec 2022 03:50:31 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=MBwjdhtx; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p7ats-0004Jo-PC; Tue, 20 Dec 2022 06:35:12 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p7atq-0004HQ-SL for qemu-devel@nongnu.org; Tue, 20 Dec 2022 06:35:10 -0500 Received: from mail-wm1-x336.google.com ([2a00:1450:4864:20::336]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p7ato-0008FD-8O for qemu-devel@nongnu.org; Tue, 20 Dec 2022 06:35:10 -0500 Received: by mail-wm1-x336.google.com with SMTP id m19so8448913wms.5 for ; Tue, 20 Dec 2022 03:35:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=sC9vcF9yGetREijhhbohBEV83L0zPyCxXlEChBylbPg=; b=MBwjdhtxi8akSlhfS+nXC8mWZF/z7is8fMbZe/0+rcMXKy60YYW1ua6VfeHXs8Wq3+ UClONpDl/7x/MjszNq/qyC+tRBQbGryFOuKOWbJS36FrYFtld/pZk3ou2YWpY/hOLGgS z2mTi/LPDcMUk+ob9Dl1bOQ4ZmhGjbM15+4XfSpBf9qPqByQVYEjUWgP3VhKUj7x7+36 GSIpGXe5bBRp4LQlrsjfNmDWM7fhFUyhENjG0IT+AVyquSuQ4Ke5lQsHRzwuq1Ij7Xv1 W2/S19N50knjuuEAdJ/8iTYv9Myt+Orm0UKOLB20GOsU1VsYQHqVkGq6wta62gB2vYdp ItyA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sC9vcF9yGetREijhhbohBEV83L0zPyCxXlEChBylbPg=; b=cFxPijZdu1fs+wjwc+ScykrNEl+G1rQJigY1LK+qr2Ua7d0cSY0HTExiCWNXT3pElg aSiROi9N+2CaC5S39FOXwu9R9+HSvAJEt7fKaKIRRSfzNn69IZhTOruOdUTCAyGZdDO0 XL2GV6K4yYGb1IAt3xKcMYlBxB7JMAN/db1Y7HqdvcPhqTwKGMqzfenyhBAYbdotP2G0 2QezOQtcMITMwC8G9vzKdfij7cdlM7NjE90j8Lc3NMoG7voSHMh5ftGQ1xRHFCmCuxc8 HpSvwA2qvZzRTPyEYq6rY7RO9MMggmlLLeCkyZIbgdFB+UY6yxbm+PEhzhWtraAOg3qF f9lw== X-Gm-Message-State: ANoB5pkzujJ1UuJRH7pil1ZI1JjoFE9yCsIaW91jhgFQOYcKCOc/FY4D 6b2O/qkpB9JQtiFNqoh/TSaltDLu8iTI1K9nwWA= X-Received: by 2002:a05:600c:3d19:b0:3c6:edc0:5170 with SMTP id bh25-20020a05600c3d1900b003c6edc05170mr35534880wmb.25.1671536106537; Tue, 20 Dec 2022 03:35:06 -0800 (PST) Received: from localhost.localdomain ([81.0.6.76]) by smtp.gmail.com with ESMTPSA id t16-20020a1c7710000000b003c21ba7d7d6sm15288232wmi.44.2022.12.20.03.35.05 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 20 Dec 2022 03:35:05 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Jiaxun Yang , Thomas Huth , Aurelien Jarno , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Richard Henderson Subject: [PATCH v2 5/7] hw/mips/malta: Explicit GT64120 endianness upon device creation Date: Tue, 20 Dec 2022 12:34:34 +0100 Message-Id: <20221220113436.14299-6-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221220113436.14299-1-philmd@linaro.org> References: <20221220113436.14299-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Propagate the controller endianess from the machine, setting the "cpu-little-endian" property. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20221209151533.69516-6-philmd@linaro.org> Reviewed-by: Richard Henderson --- hw/mips/malta.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/hw/mips/malta.c b/hw/mips/malta.c index ba92022f87..1f4e0c7acc 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -1390,7 +1390,9 @@ void mips_malta_init(MachineState *machine) stl_p(memory_region_get_ram_ptr(bios_copy) + 0x10, 0x00000420); /* Northbridge */ - dev = sysbus_create_simple("gt64120", -1, NULL); + dev = qdev_new("gt64120"); + qdev_prop_set_bit(dev, "cpu-little-endian", !be); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); pci_bus = PCI_BUS(qdev_get_child_bus(dev, "pci")); /* Southbridge */ From patchwork Tue Dec 20 11:34:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 635449 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp2862271pvb; Tue, 20 Dec 2022 03:43:14 -0800 (PST) X-Google-Smtp-Source: AA0mqf7znoZG2tTMHQWlCMX10NtD66Z6+4PCKk4j0jr3AR6/fjkWMlsYW0XAd0Ffwq+PHYNVqDJW X-Received: by 2002:a05:622a:4c8d:b0:3a7:ff9c:31da with SMTP id ez13-20020a05622a4c8d00b003a7ff9c31damr64296289qtb.68.1671536594747; Tue, 20 Dec 2022 03:43:14 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671536594; cv=none; d=google.com; s=arc-20160816; b=p2kDSYMW3uM4bsBxrugj34nkpwhhFFypaphCIAPaD0LQcR0RryjKdfRxvuW6ra8ovz Ur3gp1XdVmBkb4pTlnc8bA2cgzraePygWi20WuJutEbdMwCDuu0CSMwYGXZLMlZsTGfD sqzkwAQH/A/C53yToz7WR84wL71hrAh+0pER/uZbex+XAXiPmA/m/FcD+z0n6iT75f5f srwlaTLNHCop5WiB6D0uzJYhQAbZ8ue00riSVIxVSP+QOYOJRcEkJXxxKQdg8KHzwFaO AENhwqODtStWYmSSB+YL66jX7b3b9CTHCLgPE7Zaze7uIXN0U/7l+q53rEv3UFZtZpeg RR5Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=gdzWWvFAVV4+oivj4DPQg6Xuoez6wnGV8qup6moGHTI=; b=cB18XREh1SU/9i8IMYeBvzXzzFkpEcFpIz6ym7SaHB253NVpvRSuWYPLLmIbcf1M68 Sxanq+7Wm3JI4OnP3v8FdDBGWLy7HqIWi5rk/oWtti8eok/aaM1HS30P5q6Y25wmCwFU KX8ZNbrjGaPnv29NUj5Qm6Iqt9tkAb8feDQCBs7Dwf8LDpO1xbqgyChEmv8UaqqWfrPz baoA66Nts8fIAfG/+jJNyFRYHMXMPiW+NnDjim8EEplhjVgUbndV8ZFvjTyx/sZ7z7fj kuBFLfvrPj/xHZDylTh1kf0Z2c09jVibiD8wA2wC7QdoHhNObXS6Z7/BM+fUWFwLpntu 02IQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TibMRcw6; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id bl30-20020a05620a1a9e00b006ec51ee19dbsi2819862qkb.346.2022.12.20.03.43.14 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Dec 2022 03:43:14 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TibMRcw6; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p7atw-0004Q5-QH; Tue, 20 Dec 2022 06:35:16 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p7atv-0004Ok-Gz for qemu-devel@nongnu.org; Tue, 20 Dec 2022 06:35:15 -0500 Received: from mail-wr1-x430.google.com ([2a00:1450:4864:20::430]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p7att-0008HX-QS for qemu-devel@nongnu.org; Tue, 20 Dec 2022 06:35:15 -0500 Received: by mail-wr1-x430.google.com with SMTP id i7so11429964wrv.8 for ; Tue, 20 Dec 2022 03:35:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=gdzWWvFAVV4+oivj4DPQg6Xuoez6wnGV8qup6moGHTI=; b=TibMRcw6KIonfwEwI185xxkO/Wxp9F20ociO+vaTQT1Y6+8kxmgYM87L6YfyW79s6Q zWBBmU3m++FqzJUb4YcBCcqEiNHQ8nEKcgHRb9HqzMLXbxJ/rkiqK356LQyV2Eexv/0U Z2u5JkFU9Q2FjYc1WA/AvwsquZBbM7ANUnutNvfeUFSw+NZhijbyRZ1x1TJV1A+5pn18 o39BRmeDa1P6HTu60f8L9Plxwulkswl9j7xHX8T5w42pD+2YoSgVvrdoTBv/fAQsy+Y8 c/No7AUmrYbZrG7gtfitZGTYQ2X6p65dG8T3n7BxzwNITlmjoARSUsOT6CkOkL13Hmuo UD2g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=gdzWWvFAVV4+oivj4DPQg6Xuoez6wnGV8qup6moGHTI=; b=h7pkC6Ht8T0gF+GPddMYrY1bs0JZARXVGznnBuMD/q40U1iJZPjYSRtWpNLRK4D4Bx A9evbRWMMTjPa/KtxHOyRUGrs1LhtYpZr6Ey/d+2kGA0nUnVtq/sBTZJie2l69pQaQj4 zN05WlSkoAHdIvDA8e32Ae0u8d9y9yx+vwOwb3R3FKXWSO6T+hyZzM2bVotUnHFeTC+Z PI1jD2ZTAht+hO+jFVcKMCbK24gyiWjt7I1ij0w597ejWZ1cKdq2zdG4JmdjKEx493bI 60PScVFv1O3vNy+qIBtKHuftyc5AQN1lakLolrIbuOpeD9xmTGP3SlqSs89LR5SkQ/WT xVLA== X-Gm-Message-State: ANoB5plWIlW5WredH6F1a2bhRAd6FmlEIbPayBWARNDSYNxfwLkCDdza 4d7UL78M6k7phULqEw3IoDp5CWmJyYebJDC7Cpw= X-Received: by 2002:a5d:48cf:0:b0:236:751a:9cb9 with SMTP id p15-20020a5d48cf000000b00236751a9cb9mr26499991wrs.71.1671536112149; Tue, 20 Dec 2022 03:35:12 -0800 (PST) Received: from localhost.localdomain ([81.0.6.76]) by smtp.gmail.com with ESMTPSA id m16-20020adfe0d0000000b0025d9d13c7e1sm9283739wri.105.2022.12.20.03.35.10 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 20 Dec 2022 03:35:11 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Jiaxun Yang , Thomas Huth , Aurelien Jarno , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Richard Henderson Subject: [PATCH v2 6/7] hw/mips/meson: Make gt64xxx_pci.c endian-agnostic Date: Tue, 20 Dec 2022 12:34:35 +0100 Message-Id: <20221220113436.14299-7-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221220113436.14299-1-philmd@linaro.org> References: <20221220113436.14299-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=philmd@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé The single machine using this device explicitly sets its endianness. We don't need to set a default. This allow us to remove the target specificity from the build system. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20221209151533.69516-7-philmd@linaro.org> Reviewed-by: Richard Henderson --- hw/mips/gt64xxx_pci.c | 2 +- hw/mips/meson.build | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 4cafc76a23..bd0e23d2d8 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -1225,7 +1225,7 @@ static const TypeInfo gt64120_pci_info = { static Property gt64120_properties[] = { DEFINE_PROP_BOOL("cpu-little-endian", GT64120State, - cpu_little_endian, !TARGET_BIG_ENDIAN), + cpu_little_endian, false), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/mips/meson.build b/hw/mips/meson.build index 6ccd385df0..152103f15f 100644 --- a/hw/mips/meson.build +++ b/hw/mips/meson.build @@ -3,7 +3,7 @@ mips_ss.add(files('bootloader.c', 'mips_int.c')) mips_ss.add(when: 'CONFIG_FW_CFG_MIPS', if_true: files('fw_cfg.c')) mips_ss.add(when: 'CONFIG_LOONGSON3V', if_true: files('loongson3_bootp.c', 'loongson3_virt.c')) mips_ss.add(when: 'CONFIG_MALTA', if_true: files('malta.c')) -mips_ss.add(when: 'CONFIG_GT64120', if_true: files('gt64xxx_pci.c')) +softmmu_ss.add(when: 'CONFIG_GT64120', if_true: files('gt64xxx_pci.c')) mips_ss.add(when: 'CONFIG_MIPS_CPS', if_true: files('cps.c')) if 'CONFIG_TCG' in config_all From patchwork Tue Dec 20 11:34:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 635448 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp2861367pvb; Tue, 20 Dec 2022 03:40:52 -0800 (PST) X-Google-Smtp-Source: AA0mqf4GvbNsemwfJ+bCTh7tuGIzPGgKLzNkwIdna60PoZTyqYziFJnlETnp3ik0ZRqoIY3DXwww X-Received: by 2002:a05:6214:2402:b0:4b4:a3d5:8ce8 with SMTP id fv2-20020a056214240200b004b4a3d58ce8mr90324433qvb.10.1671536452642; Tue, 20 Dec 2022 03:40:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671536452; cv=none; d=google.com; s=arc-20160816; b=AbvYwLFaRu7d7FESKNxDuxlsnMewdKKwxwZgn0JZvJtdULD+aoOtfUXCwJIvSV9+Xc iq9D18RiHr75F3ZCMqOg/K2WMGP/spQH9/ZD1cXNLhTcY6TtLalO1Ad3ZeWYnYgU6g+l AWWIbs6+T8a/T1wTopf4FaI9ntv5K0hqFlxNp1fPBR5PhWGGLymtza7/9K8sODQ7pjoo yuzaxPfHhndodDLeKrmfaLPdltNOpyhvIbgRycRKueBIHSpUHL0xNYMdP6AqL+uwSXFH snkU3bj3x7TAZKJysjMUWDWcws9Bh1Pmf4jt10KpXRvxY4OPbbsCVo0CIJ/y7PS1hXhs zl9w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Vk/whBQgrLogRuMeDznhdsB4d2/C+GGXdWjL9HmDhwE=; b=RPCDi4S9x+30Xu1IVoJ+gikQJU8CBaOigjxmRoz8L6H3vSEv2uT50l+LzWIhcmeo+B GQMov/WV0o8FmupSpXM/HvIsymldNHrXaeCINq5u/WMWv+AojQGJXeERN8SBkPKgpHaz 6M9sbjiwHcWaENObiM+TtmgusL4xOebKUz+8Kmz6urhuVCQ0titUR78YqjnioUJ7gq3n xC5ny6x7GXZq620gSZFD0zmixIAoP8/Vxhs7txtf7mZ1O6kCpBwbrBdCm5M5YOelsyCG RY7zZeVGKd32EdiARvgqc3HIdfHXCB5XPnpL/jNkFAcTXgf21xSZjeTv58gVep4dxtt8 QI9A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=nKOWlxHS; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id f13-20020a05620a408d00b006ebcaee80a0si5454998qko.385.2022.12.20.03.40.52 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Dec 2022 03:40:52 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=nKOWlxHS; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p7au1-0004Zx-Tm; Tue, 20 Dec 2022 06:35:21 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p7au1-0004Yj-1w for qemu-devel@nongnu.org; Tue, 20 Dec 2022 06:35:21 -0500 Received: from mail-wm1-x333.google.com ([2a00:1450:4864:20::333]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p7atz-0008JS-01 for qemu-devel@nongnu.org; Tue, 20 Dec 2022 06:35:20 -0500 Received: by mail-wm1-x333.google.com with SMTP id o15so8454448wmr.4 for ; Tue, 20 Dec 2022 03:35:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Vk/whBQgrLogRuMeDznhdsB4d2/C+GGXdWjL9HmDhwE=; b=nKOWlxHSTZWtW/z3cqNWRj692c1Mh+0o4O/fPGMtl94/fT58CGb3dkfm//Tm7uSBkz 2/+52pUibMoXssHDBs2ajbgDXHFmHKkoAKffe0+PmhleOXrBgUybpLVbVsVVFNmomUG+ GFGB2AKLkCYy9M8dJ45rrTJ7TXOOpYr25Q8vN5afAFdYa6phujEdRuI/tMz/y+4hgAlJ f+usCVrnvDR6QzqfyXAuI87QhMKC0OXQ5PX/7lSFxnMHeNPHtrfHRSF9g5eBLfdds2g3 3YnThHlboCnZGnj503VN/kEjI8nlRcyefVdd0+q+cWDUxV1m4Km0XS0Yu96bL8OWgLXS 2CbQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Vk/whBQgrLogRuMeDznhdsB4d2/C+GGXdWjL9HmDhwE=; b=K1U8THcyp7t2Qr0LVjRUJYg5RPdSKgchQkJr68YWbQQxfUybUcmUhiPfQ1wwnvtL35 DrJ6FIgyubE4fk/JVKZ1r7HCEmmtn0q4XYIplnh9cOg3Z4QKdaC23nPl63LWo65w0lxD u/eo0mmb6VslZnj+SFssNFD1jDRxtynvIuhzqsz977axNuwg/hCutOr8qx+j0dWIQhvH 0DxFpPclAprK519ioUdQ1z/NO247pDUO/40JvpbU9DFLua2VbExYwWC13H1dPPRDMKAt w+kbNBcvEYO/iyWV/aTQS/ENwJwer5rojv4s5tsCytF8AOBCH/+9WoiyeKbwKxXkztXP ieUg== X-Gm-Message-State: AFqh2kozHrbcOmNxPXOGRI09nz7Jkf61UCpr8uh/b+YxRCkx7k6ZDlKt 0PY1UNDl6RVnbSShZHT5tvyPnoc4mVePGEhbV6M= X-Received: by 2002:a05:600c:1f07:b0:3d3:56e6:4f0d with SMTP id bd7-20020a05600c1f0700b003d356e64f0dmr6448527wmb.7.1671536117199; Tue, 20 Dec 2022 03:35:17 -0800 (PST) Received: from localhost.localdomain ([81.0.6.76]) by smtp.gmail.com with ESMTPSA id n11-20020a056000170b00b0024258722a7fsm12632176wrc.37.2022.12.20.03.35.16 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 20 Dec 2022 03:35:16 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Jiaxun Yang , Thomas Huth , Aurelien Jarno , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Richard Henderson Subject: [PATCH v2 7/7] hw/mips/gt64xxx_pci: Move it to hw/pci-host/ Date: Tue, 20 Dec 2022 12:34:36 +0100 Message-Id: <20221220113436.14299-8-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221220113436.14299-1-philmd@linaro.org> References: <20221220113436.14299-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé The GT-64120 is a north-bridge, and it is not MIPS specific. Move it with the other north-bridge devices. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20221209151533.69516-8-philmd@linaro.org> Reviewed-by: Richard Henderson --- MAINTAINERS | 2 +- hw/mips/Kconfig | 6 ------ hw/mips/meson.build | 1 - hw/mips/trace-events | 6 ------ hw/pci-host/Kconfig | 6 ++++++ hw/{mips/gt64xxx_pci.c => pci-host/gt64120.c} | 0 hw/pci-host/meson.build | 1 + hw/pci-host/trace-events | 7 +++++++ meson.build | 1 - 9 files changed, 15 insertions(+), 15 deletions(-) delete mode 100644 hw/mips/trace-events rename hw/{mips/gt64xxx_pci.c => pci-host/gt64120.c} (100%) diff --git a/MAINTAINERS b/MAINTAINERS index 716d5a24ad..8c32d82b47 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1240,7 +1240,7 @@ S: Odd Fixes F: hw/isa/piix4.c F: hw/acpi/piix4.c F: hw/mips/malta.c -F: hw/mips/gt64xxx_pci.c +F: hw/pci-host/gt64120.c F: include/hw/southbridge/piix.h F: tests/avocado/linux_ssh_mips_malta.py F: tests/avocado/machine_mips_malta.py diff --git a/hw/mips/Kconfig b/hw/mips/Kconfig index 8f7bce38fb..7a55143f8a 100644 --- a/hw/mips/Kconfig +++ b/hw/mips/Kconfig @@ -60,9 +60,3 @@ config MIPS_BOSTON config FW_CFG_MIPS bool - -config GT64120 - bool - select PCI - select EMPTY_SLOT - select I8259 diff --git a/hw/mips/meson.build b/hw/mips/meson.build index 152103f15f..900613fc08 100644 --- a/hw/mips/meson.build +++ b/hw/mips/meson.build @@ -3,7 +3,6 @@ mips_ss.add(files('bootloader.c', 'mips_int.c')) mips_ss.add(when: 'CONFIG_FW_CFG_MIPS', if_true: files('fw_cfg.c')) mips_ss.add(when: 'CONFIG_LOONGSON3V', if_true: files('loongson3_bootp.c', 'loongson3_virt.c')) mips_ss.add(when: 'CONFIG_MALTA', if_true: files('malta.c')) -softmmu_ss.add(when: 'CONFIG_GT64120', if_true: files('gt64xxx_pci.c')) mips_ss.add(when: 'CONFIG_MIPS_CPS', if_true: files('cps.c')) if 'CONFIG_TCG' in config_all diff --git a/hw/mips/trace-events b/hw/mips/trace-events deleted file mode 100644 index 13ee731a48..0000000000 --- a/hw/mips/trace-events +++ /dev/null @@ -1,6 +0,0 @@ -# gt64xxx_pci.c -gt64120_read(uint64_t addr, uint64_t value) "gt64120 read 0x%03"PRIx64" value:0x%08" PRIx64 -gt64120_write(uint64_t addr, uint64_t value) "gt64120 write 0x%03"PRIx64" value:0x%08" PRIx64 -gt64120_read_intreg(const char *regname, unsigned size, uint64_t value) "gt64120 read %s size:%u value:0x%08" PRIx64 -gt64120_write_intreg(const char *regname, unsigned size, uint64_t value) "gt64120 write %s size:%u value:0x%08" PRIx64 -gt64120_isd_remap(uint64_t from_length, uint64_t from_addr, uint64_t to_length, uint64_t to_addr) "ISD: 0x%08" PRIx64 "@0x%08" PRIx64 " -> 0x%08" PRIx64 "@0x%08" PRIx64 diff --git a/hw/pci-host/Kconfig b/hw/pci-host/Kconfig index 38fd2ee8f3..a07070eddf 100644 --- a/hw/pci-host/Kconfig +++ b/hw/pci-host/Kconfig @@ -81,3 +81,9 @@ config MV64361 config DINO bool select PCI + +config GT64120 + bool + select PCI + select EMPTY_SLOT + select I8259 diff --git a/hw/mips/gt64xxx_pci.c b/hw/pci-host/gt64120.c similarity index 100% rename from hw/mips/gt64xxx_pci.c rename to hw/pci-host/gt64120.c diff --git a/hw/pci-host/meson.build b/hw/pci-host/meson.build index e832babc9d..9a813d552e 100644 --- a/hw/pci-host/meson.build +++ b/hw/pci-host/meson.build @@ -1,6 +1,7 @@ pci_ss = ss.source_set() pci_ss.add(when: 'CONFIG_PAM', if_true: files('pam.c')) pci_ss.add(when: 'CONFIG_PCI_BONITO', if_true: files('bonito.c')) +pci_ss.add(when: 'CONFIG_GT64120', if_true: files('gt64120.c')) pci_ss.add(when: 'CONFIG_PCI_EXPRESS_DESIGNWARE', if_true: files('designware.c')) pci_ss.add(when: 'CONFIG_PCI_EXPRESS_GENERIC_BRIDGE', if_true: files('gpex.c')) pci_ss.add(when: ['CONFIG_PCI_EXPRESS_GENERIC_BRIDGE', 'CONFIG_ACPI'], if_true: files('gpex-acpi.c')) diff --git a/hw/pci-host/trace-events b/hw/pci-host/trace-events index 437e66ff50..9d216bb89f 100644 --- a/hw/pci-host/trace-events +++ b/hw/pci-host/trace-events @@ -6,6 +6,13 @@ bonito_spciconf_small_access(uint64_t addr, unsigned size) "PCI config address i # grackle.c grackle_set_irq(int irq_num, int level) "set_irq num %d level %d" +# gt64120.c +gt64120_read(uint64_t addr, uint64_t value) "gt64120 read 0x%03"PRIx64" value:0x%08" PRIx64 +gt64120_write(uint64_t addr, uint64_t value) "gt64120 write 0x%03"PRIx64" value:0x%08" PRIx64 +gt64120_read_intreg(const char *regname, unsigned size, uint64_t value) "gt64120 read %s size:%u value:0x%08" PRIx64 +gt64120_write_intreg(const char *regname, unsigned size, uint64_t value) "gt64120 write %s size:%u value:0x%08" PRIx64 +gt64120_isd_remap(uint64_t from_length, uint64_t from_addr, uint64_t to_length, uint64_t to_addr) "ISD: 0x%08" PRIx64 "@0x%08" PRIx64 " -> 0x%08" PRIx64 "@0x%08" PRIx64 + # mv64361.c mv64361_region_map(const char *name, uint64_t poffs, uint64_t size, uint64_t moffs) "Mapping %s 0x%"PRIx64"+0x%"PRIx64" @ 0x%"PRIx64 mv64361_region_enable(const char *op, int num) "Should %s region %d" diff --git a/meson.build b/meson.build index 5c6b5a1c75..bd5774f32f 100644 --- a/meson.build +++ b/meson.build @@ -2944,7 +2944,6 @@ if have_system 'hw/intc', 'hw/isa', 'hw/mem', - 'hw/mips', 'hw/misc', 'hw/misc/macio', 'hw/net',