From patchwork Tue Dec 27 12:09:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Lu X-Patchwork-Id: 637211 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 950CAC4708E for ; Tue, 27 Dec 2022 12:09:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231563AbiL0MJd (ORCPT ); Tue, 27 Dec 2022 07:09:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51526 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229632AbiL0MJa (ORCPT ); Tue, 27 Dec 2022 07:09:30 -0500 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 72CD31F7; Tue, 27 Dec 2022 04:09:24 -0800 (PST) X-UUID: 7d1c07a9fcc6484ba22d1dbaf26ce911-20221227 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=ehDXbWE7c2/1x4Hvq0je5a3soIAyc70ylWW5qGoa4JM=; b=N+w5nxQUltUUlZiGWyDMUamNrPa4wB+N4Vtrrto9Ubf2ov5QG5EZcEi4krvqj6sht52Kk/yPe2NdPwgOXNeFcc9FBtUTFxS8jJPQBAEmIPkZALEtRw2ghIJENLxWUYOYep+lgGgsqWCtgIYN+fjTxDFQGrv4OFmppGfBeLrcZPY=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.14, REQID:f4834809-8552-48e3-878d-c29f1c661b28, IP:0, U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:90 X-CID-INFO: VERSION:1.1.14, REQID:f4834809-8552-48e3-878d-c29f1c661b28, IP:0, URL :0,TC:0,Content:-5,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTIO N:quarantine,TS:90 X-CID-META: VersionHash:dcaaed0, CLOUDID:ab94898a-8530-4eff-9f77-222cf6e2895b, B ulkID:221226174310TJMZNJJF,BulkQuantity:16,Recheck:0,SF:38|28|17|19|48,TC: nil,Content:0,EDM:-3,IP:nil,URL:11|1,File:nil,Bulk:41,QS:nil,BEC:nil,COL:0 X-UUID: 7d1c07a9fcc6484ba22d1dbaf26ce911-20221227 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1283313003; Tue, 27 Dec 2022 20:09:18 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Tue, 27 Dec 2022 20:09:17 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 27 Dec 2022 20:09:17 +0800 From: Roger Lu To: Matthias Brugger , Enric Balletbo Serra , Kevin Hilman , Nicolas Boichat CC: Fan Chen , Roger Lu , Jia-wei Chang , , , , , , , Ricardo Ribalda Subject: [PATCH v2 01/13] soc: mediatek: mtk-svs: enable the IRQ later Date: Tue, 27 Dec 2022 20:09:02 +0800 Message-ID: <20221227120914.11346-2-roger.lu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221227120914.11346-1-roger.lu@mediatek.com> References: <20221227120914.11346-1-roger.lu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Ricardo Ribalda If the system does not come from reset (like when is booted via kexec(), the peripheral might trigger an IRQ before the data structures are initialized. Fixes: [ 0.227710] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000f08 [ 0.227913] Call trace: [ 0.227918] svs_isr+0x8c/0x538 Signed-off-by: Ricardo Ribalda Signed-off-by: Roger Lu --- drivers/soc/mediatek/mtk-svs.c | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/soc/mediatek/mtk-svs.c b/drivers/soc/mediatek/mtk-svs.c index 0469c9dfeb04..91e06f43969d 100644 --- a/drivers/soc/mediatek/mtk-svs.c +++ b/drivers/soc/mediatek/mtk-svs.c @@ -2379,20 +2379,6 @@ static int svs_probe(struct platform_device *pdev) goto svs_probe_free_resource; } - svsp_irq = platform_get_irq(pdev, 0); - if (svsp_irq < 0) { - ret = svsp_irq; - goto svs_probe_free_resource; - } - - ret = devm_request_threaded_irq(svsp->dev, svsp_irq, NULL, svs_isr, - IRQF_ONESHOT, svsp->name, svsp); - if (ret) { - dev_err(svsp->dev, "register irq(%d) failed: %d\n", - svsp_irq, ret); - goto svs_probe_free_resource; - } - svsp->main_clk = devm_clk_get(svsp->dev, "main"); if (IS_ERR(svsp->main_clk)) { dev_err(svsp->dev, "failed to get clock: %ld\n", @@ -2414,6 +2400,20 @@ static int svs_probe(struct platform_device *pdev) goto svs_probe_clk_disable; } + svsp_irq = platform_get_irq(pdev, 0); + if (svsp_irq < 0) { + ret = svsp_irq; + goto svs_probe_iounmap; + } + + ret = devm_request_threaded_irq(svsp->dev, svsp_irq, NULL, svs_isr, + IRQF_ONESHOT, svsp->name, svsp); + if (ret) { + dev_err(svsp->dev, "register irq(%d) failed: %d\n", + svsp_irq, ret); + goto svs_probe_iounmap; + } + ret = svs_start(svsp); if (ret) { dev_err(svsp->dev, "svs start fail: %d\n", ret); From patchwork Tue Dec 27 12:09:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Lu X-Patchwork-Id: 637209 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65F46C10F1B for ; Tue, 27 Dec 2022 12:09:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231557AbiL0MJj (ORCPT ); Tue, 27 Dec 2022 07:09:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51536 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231395AbiL0MJa (ORCPT ); Tue, 27 Dec 2022 07:09:30 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CB79628F; Tue, 27 Dec 2022 04:09:25 -0800 (PST) X-UUID: 2aa9b36cc57b43368f97cdac77da3ddd-20221227 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=khWND1a5Rv67qi9vjLgUZ2TaIXGaU8aXZECDx6Aj8Jo=; b=VFQiHc8PwqfNVd3Ew7YqARazSzQJtytUUSqIldcIzgNEyTvmVN0GjhV+C9WkHvCnUsg/5YyFQvc7sUF/PQ1ltkaTvTlHRI8PKWNxiWFL9p7pO3EKQMWt0gHC5KDjO7ZuSfEkNCdo5mNcvP0FPPa6M9KzSoCDLpNzb/h8wF4jMjY=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.14, REQID:08312a25-bdc9-4eaf-af15-fb59e645ee7f, IP:0, U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:dcaaed0, CLOUDID:dd9bee52-dd49-462e-a4be-2143a3ddc739, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: 2aa9b36cc57b43368f97cdac77da3ddd-20221227 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 111388742; Tue, 27 Dec 2022 20:09:18 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Tue, 27 Dec 2022 20:09:17 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 27 Dec 2022 20:09:17 +0800 From: Roger Lu To: Matthias Brugger , Enric Balletbo Serra , Kevin Hilman , Nicolas Boichat CC: Fan Chen , Roger Lu , Jia-wei Chang , , , , , , , Shang XiaoJing Subject: [PATCH v2 02/13] soc: mediatek: mtk-svs: Use pm_runtime_resume_and_get() in svs_init01() Date: Tue, 27 Dec 2022 20:09:03 +0800 Message-ID: <20221227120914.11346-3-roger.lu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221227120914.11346-1-roger.lu@mediatek.com> References: <20221227120914.11346-1-roger.lu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Shang XiaoJing svs_init01() calls pm_runtime_get_sync() and added fail path as svs_init01_finish to put usage_counter. However, pm_runtime_get_sync() will increment usage_counter even it failed. Fix it by replacing it with pm_runtime_resume_and_get() to keep usage counter balanced. Fixes: 681a02e95000 ("soc: mediatek: SVS: introduce MTK SVS engine") Signed-off-by: Shang XiaoJing Signed-off-by: Roger Lu --- drivers/soc/mediatek/mtk-svs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/soc/mediatek/mtk-svs.c b/drivers/soc/mediatek/mtk-svs.c index 91e06f43969d..465b60a5cedc 100644 --- a/drivers/soc/mediatek/mtk-svs.c +++ b/drivers/soc/mediatek/mtk-svs.c @@ -1324,7 +1324,7 @@ static int svs_init01(struct svs_platform *svsp) svsb->pm_runtime_enabled_count++; } - ret = pm_runtime_get_sync(svsb->opp_dev); + ret = pm_runtime_resume_and_get(svsb->opp_dev); if (ret < 0) { dev_err(svsb->dev, "mtcmos on fail: %d\n", ret); goto svs_init01_resume_cpuidle; From patchwork Tue Dec 27 12:09:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Lu X-Patchwork-Id: 637779 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2D08C4167B for ; Tue, 27 Dec 2022 12:09:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231582AbiL0MJe (ORCPT ); Tue, 27 Dec 2022 07:09:34 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51532 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231370AbiL0MJa (ORCPT ); Tue, 27 Dec 2022 07:09:30 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C9D2C22F; Tue, 27 Dec 2022 04:09:24 -0800 (PST) X-UUID: 8acde2fddc0649bc9b569fa67fe110d2-20221227 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=vf6IcfalnyFtEwcYPBgscSxhCUGC67GQz9ghXYhk16o=; b=qFeccW6lFSAIiGJu4jLLOIVZyxnZjEOCsjNVNIqmco8S7RltwXA01qMRQnwTc3PB3UT7SVsu+NmzfUumM2Mq35gJNcgwJcHJ8fYDIp7tkQrs1BM+cflMQjdqG5Ko/fDqAK6xHaYiQ+c3QUyjj4cks6QNq1wFZXx1TiRU84GSoH0=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.14, REQID:3574c50b-0c24-4709-aaad-56e109398a6b, IP:0, U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:dcaaed0, CLOUDID:de9bee52-dd49-462e-a4be-2143a3ddc739, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: 8acde2fddc0649bc9b569fa67fe110d2-20221227 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 173508327; Tue, 27 Dec 2022 20:09:18 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Tue, 27 Dec 2022 20:09:17 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 27 Dec 2022 20:09:17 +0800 From: Roger Lu To: Matthias Brugger , Enric Balletbo Serra , Kevin Hilman , Nicolas Boichat CC: Fan Chen , Roger Lu , Jia-wei Chang , , , , , , Subject: [PATCH v2 03/13] soc: mediatek: mtk-svs: clean up platform probing Date: Tue, 27 Dec 2022 20:09:04 +0800 Message-ID: <20221227120914.11346-4-roger.lu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221227120914.11346-1-roger.lu@mediatek.com> References: <20221227120914.11346-1-roger.lu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Matthias Brugger We only ever call the SoC specific probe function from svs_platform_probe. No need to carry that function in a global datastructure around. Signed-off-by: Matthias Brugger Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Roger Lu --- drivers/soc/mediatek/mtk-svs.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/soc/mediatek/mtk-svs.c b/drivers/soc/mediatek/mtk-svs.c index 465b60a5cedc..5abf94aafbac 100644 --- a/drivers/soc/mediatek/mtk-svs.c +++ b/drivers/soc/mediatek/mtk-svs.c @@ -319,7 +319,6 @@ static const u32 svs_regs_v2[] = { * @banks: svs banks that svs platform supports * @rst: svs platform reset control * @efuse_parsing: svs platform efuse parsing function pointer - * @probe: svs platform probe function pointer * @efuse_max: total number of svs efuse * @tefuse_max: total number of thermal efuse * @regs: svs platform registers map @@ -336,7 +335,6 @@ struct svs_platform { struct svs_bank *banks; struct reset_control *rst; bool (*efuse_parsing)(struct svs_platform *svsp); - int (*probe)(struct svs_platform *svsp); size_t efuse_max; size_t tefuse_max; const u32 *regs; @@ -2347,11 +2345,10 @@ static struct svs_platform *svs_platform_probe(struct platform_device *pdev) svsp->name = svsp_data->name; svsp->banks = svsp_data->banks; svsp->efuse_parsing = svsp_data->efuse_parsing; - svsp->probe = svsp_data->probe; svsp->regs = svsp_data->regs; svsp->bank_max = svsp_data->bank_max; - ret = svsp->probe(svsp); + ret = svsp_data->probe(svsp); if (ret) return ERR_PTR(ret); From patchwork Tue Dec 27 12:09:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Lu X-Patchwork-Id: 637212 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65A03C4167B for ; Tue, 27 Dec 2022 12:09:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231154AbiL0MJa (ORCPT ); Tue, 27 Dec 2022 07:09:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51508 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229488AbiL0MJ3 (ORCPT ); Tue, 27 Dec 2022 07:09:29 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 931211A0; Tue, 27 Dec 2022 04:09:23 -0800 (PST) X-UUID: ae4ae6ddf6b94eb093efaa50d43a5222-20221227 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=6Sq/sAfTpgkWc7ZeE72qhux4vsS2w/D6it6j/hKEQAs=; b=kTj/pecpWA7ASJRjMQ301kn1hUYkd1btFe49v0vVHhfqBhyEMoeSOzxTzbpVCCM1Go8Ql9lDdrowBKNO0zFzFGYAvpaG+s8rHtZDllZouXmobws03+hya8dzgBp891ygsbFZPrgUIRTxwzgEpmh09b3I3FDdNrYMKNWXioYlJS4=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.14, REQID:8f852f10-9fff-49ab-a904-409f497ac8d4, IP:0, U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:-5 X-CID-META: VersionHash:dcaaed0, CLOUDID:df9bee52-dd49-462e-a4be-2143a3ddc739, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: ae4ae6ddf6b94eb093efaa50d43a5222-20221227 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 2081007595; Tue, 27 Dec 2022 20:09:18 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Tue, 27 Dec 2022 20:09:17 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 27 Dec 2022 20:09:17 +0800 From: Roger Lu To: Matthias Brugger , Enric Balletbo Serra , Kevin Hilman , Nicolas Boichat CC: Fan Chen , Roger Lu , Jia-wei Chang , , , , , , Subject: [PATCH v2 04/13] soc: mediatek: mtk-svs: improve readability of platform_probe Date: Tue, 27 Dec 2022 20:09:05 +0800 Message-ID: <20221227120914.11346-5-roger.lu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221227120914.11346-1-roger.lu@mediatek.com> References: <20221227120914.11346-1-roger.lu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Matthias Brugger If a compatible misses a match data entry, then something is wrong in the development phase, we don't need to check for that at runtime. Signed-off-by: Matthias Brugger Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Roger Lu --- drivers/soc/mediatek/mtk-svs.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/soc/mediatek/mtk-svs.c b/drivers/soc/mediatek/mtk-svs.c index 5abf94aafbac..7fea1a5bb842 100644 --- a/drivers/soc/mediatek/mtk-svs.c +++ b/drivers/soc/mediatek/mtk-svs.c @@ -2332,10 +2332,6 @@ static struct svs_platform *svs_platform_probe(struct platform_device *pdev) int ret; svsp_data = of_device_get_match_data(&pdev->dev); - if (!svsp_data) { - dev_err(&pdev->dev, "no svs platform data?\n"); - return ERR_PTR(-EPERM); - } svsp = devm_kzalloc(&pdev->dev, sizeof(*svsp), GFP_KERNEL); if (!svsp) From patchwork Tue Dec 27 12:09:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Lu X-Patchwork-Id: 637780 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D70C4C10F1B for ; Tue, 27 Dec 2022 12:09:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231516AbiL0MJb (ORCPT ); Tue, 27 Dec 2022 07:09:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51510 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229550AbiL0MJ3 (ORCPT ); Tue, 27 Dec 2022 07:09:29 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CCA981E2; Tue, 27 Dec 2022 04:09:23 -0800 (PST) X-UUID: 3c0e6b7a7cf746c7bb798728393846b2-20221227 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=4gNcF7vsUH3TomKrULGmuoGv4uA8ZyTj2XFNqGbNkWo=; b=MW1lBboZRr8ZsLsulQ4ESBJqbK7rfdhBBxk0d/BQYsGnRTVvFFvZu6M7kBrSFQsXnoLHwN+Ij+I738Javq2ZtskzarJkqHiUpaDUV+A4bxUcVPvodI/d+69sLWaIQNbULe2+urIpgmxM5KoBRNlxqwij+VtzZthNNYVjpsFVWUc=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.14, REQID:751c4b5a-ada0-4bc3-a545-be4774de426a, IP:0, U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:dcaaed0, CLOUDID:e09bee52-dd49-462e-a4be-2143a3ddc739, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: 3c0e6b7a7cf746c7bb798728393846b2-20221227 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1699107896; Tue, 27 Dec 2022 20:09:18 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Tue, 27 Dec 2022 20:09:17 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 27 Dec 2022 20:09:17 +0800 From: Roger Lu To: Matthias Brugger , Enric Balletbo Serra , Kevin Hilman , Nicolas Boichat CC: Fan Chen , Roger Lu , Jia-wei Chang , , , , , , Subject: [PATCH v2 05/13] soc: mediatek: mtk-svs: move svs_platform_probe into probe Date: Tue, 27 Dec 2022 20:09:06 +0800 Message-ID: <20221227120914.11346-6-roger.lu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221227120914.11346-1-roger.lu@mediatek.com> References: <20221227120914.11346-1-roger.lu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Matthias Brugger Moving svs_platform_probe into driver probe function will allow us to reduce svs_platform members. This will be done in a follow-up patch. Signed-off-by: Matthias Brugger Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Roger Lu --- drivers/soc/mediatek/mtk-svs.c | 20 ++++---------------- 1 file changed, 4 insertions(+), 16 deletions(-) diff --git a/drivers/soc/mediatek/mtk-svs.c b/drivers/soc/mediatek/mtk-svs.c index 7fea1a5bb842..bbec96696c55 100644 --- a/drivers/soc/mediatek/mtk-svs.c +++ b/drivers/soc/mediatek/mtk-svs.c @@ -2325,17 +2325,17 @@ static const struct of_device_id svs_of_match[] = { }, }; -static struct svs_platform *svs_platform_probe(struct platform_device *pdev) +static int svs_probe(struct platform_device *pdev) { struct svs_platform *svsp; const struct svs_platform_data *svsp_data; - int ret; + int ret, svsp_irq; svsp_data = of_device_get_match_data(&pdev->dev); svsp = devm_kzalloc(&pdev->dev, sizeof(*svsp), GFP_KERNEL); if (!svsp) - return ERR_PTR(-ENOMEM); + return -ENOMEM; svsp->dev = &pdev->dev; svsp->name = svsp_data->name; @@ -2346,19 +2346,7 @@ static struct svs_platform *svs_platform_probe(struct platform_device *pdev) ret = svsp_data->probe(svsp); if (ret) - return ERR_PTR(ret); - - return svsp; -} - -static int svs_probe(struct platform_device *pdev) -{ - struct svs_platform *svsp; - int svsp_irq, ret; - - svsp = svs_platform_probe(pdev); - if (IS_ERR(svsp)) - return PTR_ERR(svsp); + return ret; if (!svs_is_efuse_data_correct(svsp)) { dev_notice(svsp->dev, "efuse data isn't correct\n"); From patchwork Tue Dec 27 12:09:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Lu X-Patchwork-Id: 637778 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AB06DC5479D for ; Tue, 27 Dec 2022 12:09:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231623AbiL0MJi (ORCPT ); Tue, 27 Dec 2022 07:09:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51534 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231343AbiL0MJa (ORCPT ); Tue, 27 Dec 2022 07:09:30 -0500 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2A14D28E; Tue, 27 Dec 2022 04:09:24 -0800 (PST) X-UUID: b577b09f170e4a47b15f5bf7bf6e3c1a-20221227 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=ZYhjIXpUxLFLAxdNKrtJBR6ZBD1h3ZRO4PIhBpFBTnM=; b=f8Sfn4ap8N+FevHT8+MLt9yNpqdpMda9VOe0HIXr2gmhVgX7EpUoasCg8OG+DQdp/iAITpCFqqXbSzcmfiyCnyIzYWred7Hfo87tvG9Old/oaR6nJ6NecHQ1saEy1uqFuN/3UBJ5pr7IBQ1Iqnj/tsXeFpKJELSzDDRJpuVoC3Y=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.14, REQID:5e83e1e5-2ce0-4812-a485-307be4f61c77, IP:0, U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:-5 X-CID-META: VersionHash:dcaaed0, CLOUDID:da3c18f4-ff42-4fb0-b929-626456a83c14, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: b577b09f170e4a47b15f5bf7bf6e3c1a-20221227 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 403926579; Tue, 27 Dec 2022 20:09:18 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Tue, 27 Dec 2022 20:09:17 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 27 Dec 2022 20:09:17 +0800 From: Roger Lu To: Matthias Brugger , Enric Balletbo Serra , Kevin Hilman , Nicolas Boichat CC: Fan Chen , Roger Lu , Jia-wei Chang , , , , , , Subject: [PATCH v2 06/13] soc: mediatek: mtk-svs: delete superfluous platform data entries Date: Tue, 27 Dec 2022 20:09:07 +0800 Message-ID: <20221227120914.11346-7-roger.lu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221227120914.11346-1-roger.lu@mediatek.com> References: <20221227120914.11346-1-roger.lu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Matthias Brugger The platform name and efuse parsing function pointer are only used while probing the device. Use them from the svs_platform_data struct instead. Signed-off-by: Matthias Brugger Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Roger Lu --- drivers/soc/mediatek/mtk-svs.c | 22 ++++++++++++---------- 1 file changed, 12 insertions(+), 10 deletions(-) diff --git a/drivers/soc/mediatek/mtk-svs.c b/drivers/soc/mediatek/mtk-svs.c index bbec96696c55..308cd36a23fc 100644 --- a/drivers/soc/mediatek/mtk-svs.c +++ b/drivers/soc/mediatek/mtk-svs.c @@ -311,14 +311,12 @@ static const u32 svs_regs_v2[] = { /** * struct svs_platform - svs platform control - * @name: svs platform name * @base: svs platform register base * @dev: svs platform device * @main_clk: main clock for svs bank * @pbank: svs bank pointer needing to be protected by spin_lock section * @banks: svs banks that svs platform supports * @rst: svs platform reset control - * @efuse_parsing: svs platform efuse parsing function pointer * @efuse_max: total number of svs efuse * @tefuse_max: total number of thermal efuse * @regs: svs platform registers map @@ -327,14 +325,12 @@ static const u32 svs_regs_v2[] = { * @tefuse: thermal efuse data received from NVMEM framework */ struct svs_platform { - char *name; void __iomem *base; struct device *dev; struct clk *main_clk; struct svs_bank *pbank; struct svs_bank *banks; struct reset_control *rst; - bool (*efuse_parsing)(struct svs_platform *svsp); size_t efuse_max; size_t tefuse_max; const u32 *regs; @@ -2009,7 +2005,7 @@ static bool svs_is_efuse_data_correct(struct svs_platform *svsp) svsp->efuse_max /= sizeof(u32); nvmem_cell_put(cell); - return svsp->efuse_parsing(svsp); + return true; } static struct device *svs_get_subsys_device(struct svs_platform *svsp, @@ -2338,9 +2334,7 @@ static int svs_probe(struct platform_device *pdev) return -ENOMEM; svsp->dev = &pdev->dev; - svsp->name = svsp_data->name; svsp->banks = svsp_data->banks; - svsp->efuse_parsing = svsp_data->efuse_parsing; svsp->regs = svsp_data->regs; svsp->bank_max = svsp_data->bank_max; @@ -2351,6 +2345,12 @@ static int svs_probe(struct platform_device *pdev) if (!svs_is_efuse_data_correct(svsp)) { dev_notice(svsp->dev, "efuse data isn't correct\n"); ret = -EPERM; + goto svs_probe_free_efuse; + } + + if (!svsp_data->efuse_parsing(svsp)) { + dev_err(svsp->dev, "efuse data parsing failed\n"); + ret = -EPERM; goto svs_probe_free_resource; } @@ -2388,7 +2388,7 @@ static int svs_probe(struct platform_device *pdev) } ret = devm_request_threaded_irq(svsp->dev, svsp_irq, NULL, svs_isr, - IRQF_ONESHOT, svsp->name, svsp); + IRQF_ONESHOT, svsp_data->name, svsp); if (ret) { dev_err(svsp->dev, "register irq(%d) failed: %d\n", svsp_irq, ret); @@ -2416,11 +2416,13 @@ static int svs_probe(struct platform_device *pdev) clk_disable_unprepare(svsp->main_clk); svs_probe_free_resource: - if (!IS_ERR_OR_NULL(svsp->efuse)) - kfree(svsp->efuse); if (!IS_ERR_OR_NULL(svsp->tefuse)) kfree(svsp->tefuse); +svs_probe_free_efuse: + if (!IS_ERR_OR_NULL(svsp->efuse)) + kfree(svsp->efuse); + return ret; } From patchwork Tue Dec 27 12:09:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Lu X-Patchwork-Id: 637775 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0256C4708E for ; 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Tue, 27 Dec 2022 20:09:18 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Tue, 27 Dec 2022 20:09:18 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 27 Dec 2022 20:09:18 +0800 From: Roger Lu To: Matthias Brugger , Enric Balletbo Serra , Kevin Hilman , Nicolas Boichat CC: Fan Chen , Roger Lu , Jia-wei Chang , , , , , , Subject: [PATCH v2 07/13] soc: mtk-svs: mt8183: refactor o_slope calculation Date: Tue, 27 Dec 2022 20:09:08 +0800 Message-ID: <20221227120914.11346-8-roger.lu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221227120914.11346-1-roger.lu@mediatek.com> References: <20221227120914.11346-1-roger.lu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The o_slope value is dependent of the o_slope_sign, refactor code to get rid of unnecessary if constructs. Signed-off-by: Matthias Brugger Signed-off-by: Roger Lu --- drivers/soc/mediatek/mtk-svs.c | 51 +++++++++++++++------------------- 1 file changed, 22 insertions(+), 29 deletions(-) diff --git a/drivers/soc/mediatek/mtk-svs.c b/drivers/soc/mediatek/mtk-svs.c index 308cd36a23fc..9578baf3d9a7 100644 --- a/drivers/soc/mediatek/mtk-svs.c +++ b/drivers/soc/mediatek/mtk-svs.c @@ -1893,26 +1893,27 @@ static bool svs_mt8183_efuse_parsing(struct svs_platform *svsp) o_slope_sign = (svsp->tefuse[0] >> 7) & BIT(0); ts_id = (svsp->tefuse[1] >> 9) & BIT(0); - o_slope = (svsp->tefuse[0] >> 26) & GENMASK(5, 0); - - if (adc_cali_en_t == 1) { - if (!ts_id) - o_slope = 0; - - if (adc_ge_t < 265 || adc_ge_t > 758 || - adc_oe_t < 265 || adc_oe_t > 758 || - o_vtsmcu[0] < -8 || o_vtsmcu[0] > 484 || - o_vtsmcu[1] < -8 || o_vtsmcu[1] > 484 || - o_vtsmcu[2] < -8 || o_vtsmcu[2] > 484 || - o_vtsmcu[3] < -8 || o_vtsmcu[3] > 484 || - o_vtsmcu[4] < -8 || o_vtsmcu[4] > 484 || - o_vtsabb < -8 || o_vtsabb > 484 || - degc_cali < 1 || degc_cali > 63) { - dev_err(svsp->dev, "bad thermal efuse, no mon mode\n"); - goto remove_mt8183_svsb_mon_mode; - } + if (!ts_id) { + o_slope = 1534; } else { - dev_err(svsp->dev, "no thermal efuse, no mon mode\n"); + o_slope = (svsp->tefuse[0] >> 26) & GENMASK(5, 0); + if (!o_slope_sign) + o_slope = 1534 + o_slope * 10; + else + o_slope = 1534 - o_slope * 10; + } + + if (adc_cali_en_t == 0 || + adc_ge_t < 265 || adc_ge_t > 758 || + adc_oe_t < 265 || adc_oe_t > 758 || + o_vtsmcu[0] < -8 || o_vtsmcu[0] > 484 || + o_vtsmcu[1] < -8 || o_vtsmcu[1] > 484 || + o_vtsmcu[2] < -8 || o_vtsmcu[2] > 484 || + o_vtsmcu[3] < -8 || o_vtsmcu[3] > 484 || + o_vtsmcu[4] < -8 || o_vtsmcu[4] > 484 || + o_vtsabb < -8 || o_vtsabb > 484 || + degc_cali < 1 || degc_cali > 63) { + dev_err(svsp->dev, "bad thermal efuse, no mon mode\n"); goto remove_mt8183_svsb_mon_mode; } @@ -1931,11 +1932,7 @@ static bool svs_mt8183_efuse_parsing(struct svs_platform *svsp) x_roomt[i] = (((format[i] * 10000) / 4096) * 10000) / gain; temp0 = (10000 * 100000 / gain) * 15 / 18; - - if (!o_slope_sign) - mts = (temp0 * 10) / (1534 + o_slope * 10); - else - mts = (temp0 * 10) / (1534 - o_slope * 10); + mts = (temp0 * 10) / o_slope; for (idx = 0; idx < svsp->bank_max; idx++) { svsb = &svsp->banks[idx]; @@ -1962,11 +1959,7 @@ static bool svs_mt8183_efuse_parsing(struct svs_platform *svsp) temp0 = (degc_cali * 10 / 2); temp1 = ((10000 * 100000 / 4096 / gain) * oe + tb_roomt * 10) * 15 / 18; - - if (!o_slope_sign) - temp2 = temp1 * 100 / (1534 + o_slope * 10); - else - temp2 = temp1 * 100 / (1534 - o_slope * 10); + temp2 = temp1 * 100 / o_slope; svsb->bts = (temp0 + temp2 - 250) * 4 / 10; } From patchwork Tue Dec 27 12:09:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Lu X-Patchwork-Id: 637774 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7225EC46467 for ; Tue, 27 Dec 2022 12:09:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231721AbiL0MJr (ORCPT ); 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Tue, 27 Dec 2022 20:09:18 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Tue, 27 Dec 2022 20:09:18 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 27 Dec 2022 20:09:18 +0800 From: Roger Lu To: Matthias Brugger , Enric Balletbo Serra , Kevin Hilman , Nicolas Boichat CC: Fan Chen , Roger Lu , Jia-wei Chang , , , , , , Subject: [PATCH v2 08/13] soc: mediatek: mtk-svs: use svs get efuse common function Date: Tue, 27 Dec 2022 20:09:09 +0800 Message-ID: <20221227120914.11346-9-roger.lu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221227120914.11346-1-roger.lu@mediatek.com> References: <20221227120914.11346-1-roger.lu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org SVS might need to read both svs efuse and thermal efuse on the probe flow. Therefore, add a common efuse read function to remove the superfluous codes. Signed-off-by: Roger Lu --- drivers/soc/mediatek/mtk-svs.c | 69 ++++++++++++---------------------- 1 file changed, 24 insertions(+), 45 deletions(-) diff --git a/drivers/soc/mediatek/mtk-svs.c b/drivers/soc/mediatek/mtk-svs.c index 9578baf3d9a7..70f87715a084 100644 --- a/drivers/soc/mediatek/mtk-svs.c +++ b/drivers/soc/mediatek/mtk-svs.c @@ -1701,26 +1701,28 @@ static int svs_bank_resource_setup(struct svs_platform *svsp) return 0; } -static int svs_thermal_efuse_get_data(struct svs_platform *svsp) +static int svs_get_efuse_data(struct svs_platform *svsp, + const char *nvmem_cell_name, + u32 **svsp_efuse, size_t *svsp_efuse_max) { struct nvmem_cell *cell; - /* Thermal efuse parsing */ - cell = nvmem_cell_get(svsp->dev, "t-calibration-data"); + cell = nvmem_cell_get(svsp->dev, nvmem_cell_name); if (IS_ERR_OR_NULL(cell)) { - dev_err(svsp->dev, "no \"t-calibration-data\"? %ld\n", PTR_ERR(cell)); + dev_err(svsp->dev, "no \"%s\"? %ld\n", + nvmem_cell_name, PTR_ERR(cell)); return PTR_ERR(cell); } - svsp->tefuse = nvmem_cell_read(cell, &svsp->tefuse_max); - if (IS_ERR(svsp->tefuse)) { - dev_err(svsp->dev, "cannot read thermal efuse: %ld\n", - PTR_ERR(svsp->tefuse)); + *svsp_efuse = nvmem_cell_read(cell, svsp_efuse_max); + if (IS_ERR(*svsp_efuse)) { + dev_err(svsp->dev, "cannot read \"%s\" efuse: %ld\n", + nvmem_cell_name, PTR_ERR(*svsp_efuse)); nvmem_cell_put(cell); - return PTR_ERR(svsp->tefuse); + return PTR_ERR(*svsp_efuse); } - svsp->tefuse_max /= sizeof(u32); + *svsp_efuse_max /= sizeof(u32); nvmem_cell_put(cell); return 0; @@ -1768,7 +1770,8 @@ static bool svs_mt8192_efuse_parsing(struct svs_platform *svsp) svsb->vmax += svsb->dvt_fixed; } - ret = svs_thermal_efuse_get_data(svsp); + ret = svs_get_efuse_data(svsp, "t-calibration-data", + &svsp->tefuse, &svsp->tefuse_max); if (ret) return false; @@ -1873,7 +1876,8 @@ static bool svs_mt8183_efuse_parsing(struct svs_platform *svsp) } } - ret = svs_thermal_efuse_get_data(svsp); + ret = svs_get_efuse_data(svsp, "t-calibration-data", + &svsp->tefuse, &svsp->tefuse_max); if (ret) return false; @@ -1975,32 +1979,6 @@ static bool svs_mt8183_efuse_parsing(struct svs_platform *svsp) return true; } -static bool svs_is_efuse_data_correct(struct svs_platform *svsp) -{ - struct nvmem_cell *cell; - - /* Get svs efuse by nvmem */ - cell = nvmem_cell_get(svsp->dev, "svs-calibration-data"); - if (IS_ERR(cell)) { - dev_err(svsp->dev, "no \"svs-calibration-data\"? %ld\n", - PTR_ERR(cell)); - return false; - } - - svsp->efuse = nvmem_cell_read(cell, &svsp->efuse_max); - if (IS_ERR(svsp->efuse)) { - dev_err(svsp->dev, "cannot read svs efuse: %ld\n", - PTR_ERR(svsp->efuse)); - nvmem_cell_put(cell); - return false; - } - - svsp->efuse_max /= sizeof(u32); - nvmem_cell_put(cell); - - return true; -} - static struct device *svs_get_subsys_device(struct svs_platform *svsp, const char *node_name) { @@ -2335,8 +2313,9 @@ static int svs_probe(struct platform_device *pdev) if (ret) return ret; - if (!svs_is_efuse_data_correct(svsp)) { - dev_notice(svsp->dev, "efuse data isn't correct\n"); + ret = svs_get_efuse_data(svsp, "svs-calibration-data", + &svsp->efuse, &svsp->efuse_max); + if (ret) { ret = -EPERM; goto svs_probe_free_efuse; } @@ -2344,13 +2323,13 @@ static int svs_probe(struct platform_device *pdev) if (!svsp_data->efuse_parsing(svsp)) { dev_err(svsp->dev, "efuse data parsing failed\n"); ret = -EPERM; - goto svs_probe_free_resource; + goto svs_probe_free_tefuse; } ret = svs_bank_resource_setup(svsp); if (ret) { dev_err(svsp->dev, "svs bank resource setup fail: %d\n", ret); - goto svs_probe_free_resource; + goto svs_probe_free_tefuse; } svsp->main_clk = devm_clk_get(svsp->dev, "main"); @@ -2358,13 +2337,13 @@ static int svs_probe(struct platform_device *pdev) dev_err(svsp->dev, "failed to get clock: %ld\n", PTR_ERR(svsp->main_clk)); ret = PTR_ERR(svsp->main_clk); - goto svs_probe_free_resource; + goto svs_probe_free_tefuse; } ret = clk_prepare_enable(svsp->main_clk); if (ret) { dev_err(svsp->dev, "cannot enable main clk: %d\n", ret); - goto svs_probe_free_resource; + goto svs_probe_free_tefuse; } svsp->base = of_iomap(svsp->dev->of_node, 0); @@ -2408,7 +2387,7 @@ static int svs_probe(struct platform_device *pdev) svs_probe_clk_disable: clk_disable_unprepare(svsp->main_clk); -svs_probe_free_resource: +svs_probe_free_tefuse: if (!IS_ERR_OR_NULL(svsp->tefuse)) kfree(svsp->tefuse); From patchwork Tue Dec 27 12:09:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Lu X-Patchwork-Id: 637776 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 67347C4332F for ; Tue, 27 Dec 2022 12:09:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231678AbiL0MJn (ORCPT ); Tue, 27 Dec 2022 07:09:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51538 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231489AbiL0MJb (ORCPT ); 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Tue, 27 Dec 2022 20:09:18 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Tue, 27 Dec 2022 20:09:18 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 27 Dec 2022 20:09:18 +0800 From: Roger Lu To: Matthias Brugger , Enric Balletbo Serra , Kevin Hilman , Nicolas Boichat CC: Fan Chen , Roger Lu , Jia-wei Chang , , , , , , Subject: [PATCH v2 09/13] soc: mediatek: mtk-svs: use svs clk control APIs Date: Tue, 27 Dec 2022 20:09:10 +0800 Message-ID: <20221227120914.11346-10-roger.lu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221227120914.11346-1-roger.lu@mediatek.com> References: <20221227120914.11346-1-roger.lu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org In MediaTek HW design, svs and thermal both use the same clk source. It means that svs clk reference count from CCF includes thermal control counts. That makes svs driver confuse whether it disabled svs's main clk or not from CCF's perspective and lead to turn off their shared clk unexpectedly. Therefore, we add svs clk control APIs to make sure svs's main clk is controlled well by svs driver itself. Here is a NG example. Rely on CCF's reference count and cause problem. thermal probe (clk ref = 1) -> svs probe (clk ref = 2) -> svs suspend (clk ref = 1) -> thermal suspend (clk ref = 0) -> thermal resume (clk ref = 1) -> svs resume (encounter error, clk ref = 1) -> svs suspend (clk ref = 0) -> thermal suspend (Fail here, thermal HW control w/o clk) Signed-off-by: Roger Lu --- drivers/soc/mediatek/mtk-svs.c | 54 +++++++++++++++++++++++++++------- 1 file changed, 43 insertions(+), 11 deletions(-) diff --git a/drivers/soc/mediatek/mtk-svs.c b/drivers/soc/mediatek/mtk-svs.c index 70f87715a084..ee663cfd4483 100644 --- a/drivers/soc/mediatek/mtk-svs.c +++ b/drivers/soc/mediatek/mtk-svs.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #include #include @@ -323,6 +324,7 @@ static const u32 svs_regs_v2[] = { * @bank_max: total number of svs banks * @efuse: svs efuse data received from NVMEM framework * @tefuse: thermal efuse data received from NVMEM framework + * @clk_cnt: clock count shows the clk enable/disable times by svs driver */ struct svs_platform { void __iomem *base; @@ -337,6 +339,7 @@ struct svs_platform { u32 bank_max; u32 *efuse; u32 *tefuse; + s32 clk_cnt; }; struct svs_platform_data { @@ -496,6 +499,32 @@ static void svs_switch_bank(struct svs_platform *svsp) svs_writel_relaxed(svsp, svsb->core_sel, CORESEL); } +static bool svs_is_clk_enabled(struct svs_platform *svsp) +{ + return svsp->clk_cnt > 0 ? true : false; +} + +static int svs_clk_enable(struct svs_platform *svsp) +{ + int ret; + + ret = clk_prepare_enable(svsp->main_clk); + if (ret) { + dev_err(svsp->dev, "cannot enable main_clk: %d\n", ret); + return ret; + } + + svsp->clk_cnt++; + + return 0; +} + +static void svs_clk_disable(struct svs_platform *svsp) +{ + clk_disable_unprepare(svsp->main_clk); + svsp->clk_cnt--; +} + static u32 svs_bank_volt_to_opp_volt(u32 svsb_volt, u32 svsb_volt_step, u32 svsb_volt_base) { @@ -1543,6 +1572,12 @@ static int svs_suspend(struct device *dev) int ret; u32 idx; + if (!svs_is_clk_enabled(svsp)) { + dev_err(svsp->dev, "svs clk is disabled already (%d)\n", + svsp->clk_cnt); + return 0; + } + for (idx = 0; idx < svsp->bank_max; idx++) { svsb = &svsp->banks[idx]; @@ -1564,7 +1599,7 @@ static int svs_suspend(struct device *dev) return ret; } - clk_disable_unprepare(svsp->main_clk); + svs_clk_disable(svsp); return 0; } @@ -1574,11 +1609,9 @@ static int svs_resume(struct device *dev) struct svs_platform *svsp = dev_get_drvdata(dev); int ret; - ret = clk_prepare_enable(svsp->main_clk); - if (ret) { - dev_err(svsp->dev, "cannot enable main_clk, disable svs\n"); + ret = svs_clk_enable(svsp); + if (ret) return ret; - } ret = reset_control_deassert(svsp->rst); if (ret) { @@ -1595,7 +1628,8 @@ static int svs_resume(struct device *dev) return 0; out_of_resume: - clk_disable_unprepare(svsp->main_clk); + svs_clk_disable(svsp); + return ret; } @@ -2340,11 +2374,9 @@ static int svs_probe(struct platform_device *pdev) goto svs_probe_free_tefuse; } - ret = clk_prepare_enable(svsp->main_clk); - if (ret) { - dev_err(svsp->dev, "cannot enable main clk: %d\n", ret); + ret = svs_clk_enable(svsp); + if (ret) goto svs_probe_free_tefuse; - } svsp->base = of_iomap(svsp->dev->of_node, 0); if (IS_ERR_OR_NULL(svsp->base)) { @@ -2385,7 +2417,7 @@ static int svs_probe(struct platform_device *pdev) iounmap(svsp->base); svs_probe_clk_disable: - clk_disable_unprepare(svsp->main_clk); + svs_clk_disable(svsp); svs_probe_free_tefuse: if (!IS_ERR_OR_NULL(svsp->tefuse)) From patchwork Tue Dec 27 12:09:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Lu X-Patchwork-Id: 637207 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 187E8C46467 for ; Tue, 27 Dec 2022 12:09:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231686AbiL0MJn (ORCPT ); Tue, 27 Dec 2022 07:09:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51544 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231499AbiL0MJb (ORCPT ); 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Tue, 27 Dec 2022 20:09:19 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Tue, 27 Dec 2022 20:09:18 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 27 Dec 2022 20:09:18 +0800 From: Roger Lu To: Matthias Brugger , Enric Balletbo Serra , Kevin Hilman , Nicolas Boichat CC: Fan Chen , Roger Lu , Jia-wei Chang , , , , , , Subject: [PATCH v2 10/13] soc: mediatek: mtk-svs: use common function to disable restore voltages Date: Tue, 27 Dec 2022 20:09:11 +0800 Message-ID: <20221227120914.11346-11-roger.lu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221227120914.11346-1-roger.lu@mediatek.com> References: <20221227120914.11346-1-roger.lu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The timing of disabling SVS bank and restore default voltage is more than one place. Therefore, add a common function to use for removing the superfluous codes. Signed-off-by: Roger Lu --- drivers/soc/mediatek/mtk-svs.c | 44 +++++++++++++++++----------------- 1 file changed, 22 insertions(+), 22 deletions(-) diff --git a/drivers/soc/mediatek/mtk-svs.c b/drivers/soc/mediatek/mtk-svs.c index ee663cfd4483..6cda1e93c77a 100644 --- a/drivers/soc/mediatek/mtk-svs.c +++ b/drivers/soc/mediatek/mtk-svs.c @@ -651,6 +651,26 @@ static int svs_adjust_pm_opp_volts(struct svs_bank *svsb) return ret; } +static void svs_bank_disable_and_restore_default_volts(struct svs_platform *svsp, + struct svs_bank *svsb) +{ + unsigned long flags; + + if (svsb->mode_support == SVSB_MODE_ALL_DISABLE) + return; + + /* This spinlock might wait for svs_isr() process */ + spin_lock_irqsave(&svs_lock, flags); + svsp->pbank = svsb; + svs_switch_bank(svsp); + svs_writel_relaxed(svsp, SVSB_PTPEN_OFF, SVSEN); + svs_writel_relaxed(svsp, SVSB_INTSTS_VAL_CLEAN, INTSTS); + spin_unlock_irqrestore(&svs_lock, flags); + + svsb->phase = SVSB_PHASE_ERROR; + svs_adjust_pm_opp_volts(svsb); +} + static int svs_dump_debug_show(struct seq_file *m, void *p) { struct svs_platform *svsp = (struct svs_platform *)m->private; @@ -726,7 +746,6 @@ static ssize_t svs_enable_debug_write(struct file *filp, { struct svs_bank *svsb = file_inode(filp)->i_private; struct svs_platform *svsp = dev_get_drvdata(svsb->dev); - unsigned long flags; int enabled, ret; char *buf = NULL; @@ -742,16 +761,8 @@ static ssize_t svs_enable_debug_write(struct file *filp, return ret; if (!enabled) { - spin_lock_irqsave(&svs_lock, flags); - svsp->pbank = svsb; + svs_bank_disable_and_restore_default_volts(svsp, svsb); svsb->mode_support = SVSB_MODE_ALL_DISABLE; - svs_switch_bank(svsp); - svs_writel_relaxed(svsp, SVSB_PTPEN_OFF, SVSEN); - svs_writel_relaxed(svsp, SVSB_INTSTS_VAL_CLEAN, INTSTS); - spin_unlock_irqrestore(&svs_lock, flags); - - svsb->phase = SVSB_PHASE_ERROR; - svs_adjust_pm_opp_volts(svsb); } kfree(buf); @@ -1568,7 +1579,6 @@ static int svs_suspend(struct device *dev) { struct svs_platform *svsp = dev_get_drvdata(dev); struct svs_bank *svsb; - unsigned long flags; int ret; u32 idx; @@ -1580,17 +1590,7 @@ static int svs_suspend(struct device *dev) for (idx = 0; idx < svsp->bank_max; idx++) { svsb = &svsp->banks[idx]; - - /* This might wait for svs_isr() process */ - spin_lock_irqsave(&svs_lock, flags); - svsp->pbank = svsb; - svs_switch_bank(svsp); - svs_writel_relaxed(svsp, SVSB_PTPEN_OFF, SVSEN); - svs_writel_relaxed(svsp, SVSB_INTSTS_VAL_CLEAN, INTSTS); - spin_unlock_irqrestore(&svs_lock, flags); - - svsb->phase = SVSB_PHASE_ERROR; - svs_adjust_pm_opp_volts(svsb); + svs_bank_disable_and_restore_default_volts(svsp, svsb); } ret = reset_control_assert(svsp->rst); From patchwork Tue Dec 27 12:09:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Lu X-Patchwork-Id: 637777 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 934FFC53210 for ; Tue, 27 Dec 2022 12:09:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231652AbiL0MJm (ORCPT ); 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Tue, 27 Dec 2022 20:09:19 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Tue, 27 Dec 2022 20:09:18 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 27 Dec 2022 20:09:18 +0800 From: Roger Lu To: Matthias Brugger , Enric Balletbo Serra , Kevin Hilman , Nicolas Boichat CC: Fan Chen , Roger Lu , Jia-wei Chang , , , , , , Subject: [PATCH v2 11/13] soc: mediatek: mtk-svs: restore default voltages when svs_init02() fail Date: Tue, 27 Dec 2022 20:09:12 +0800 Message-ID: <20221227120914.11346-12-roger.lu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221227120914.11346-1-roger.lu@mediatek.com> References: <20221227120914.11346-1-roger.lu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org If svs init02 fail, it means we cannot rely on svs bank voltages anymore. We need to disable svs function and restore DVFS opp voltages back to the default voltages for making sure we have enough DVFS voltages. Signed-off-by: Roger Lu --- drivers/soc/mediatek/mtk-svs.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/soc/mediatek/mtk-svs.c b/drivers/soc/mediatek/mtk-svs.c index 6cda1e93c77a..b3a345205319 100644 --- a/drivers/soc/mediatek/mtk-svs.c +++ b/drivers/soc/mediatek/mtk-svs.c @@ -1495,6 +1495,7 @@ static int svs_init02(struct svs_platform *svsp) { struct svs_bank *svsb; unsigned long flags, time_left; + int ret; u32 idx; for (idx = 0; idx < svsp->bank_max; idx++) { @@ -1513,7 +1514,8 @@ static int svs_init02(struct svs_platform *svsp) msecs_to_jiffies(5000)); if (!time_left) { dev_err(svsb->dev, "init02 completion timeout\n"); - return -EBUSY; + ret = -EBUSY; + goto out_of_init02; } } @@ -1531,12 +1533,21 @@ static int svs_init02(struct svs_platform *svsp) if (svsb->type == SVSB_HIGH || svsb->type == SVSB_LOW) { if (svs_sync_bank_volts_from_opp(svsb)) { dev_err(svsb->dev, "sync volt fail\n"); - return -EPERM; + ret = -EPERM; + goto out_of_init02; } } } return 0; + +out_of_init02: + for (idx = 0; idx < svsp->bank_max; idx++) { + svsb = &svsp->banks[idx]; + svs_bank_disable_and_restore_default_volts(svsp, svsb); + } + + return ret; } static void svs_mon_mode(struct svs_platform *svsp) From patchwork Tue Dec 27 12:09:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Lu X-Patchwork-Id: 637208 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E429FC4708E for ; Tue, 27 Dec 2022 12:09:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231618AbiL0MJk (ORCPT ); Tue, 27 Dec 2022 07:09:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51532 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231469AbiL0MJb (ORCPT ); Tue, 27 Dec 2022 07:09:31 -0500 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2C182B5F; Tue, 27 Dec 2022 04:09:27 -0800 (PST) X-UUID: 03b380e0126541db8c4855748f62af57-20221227 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=9iS+nH2LBA+8rn4XT1tikMIpjMEnG6FbgKg3ABg2His=; b=Upon4E6AHXrvlU2KXkTSg633/eDXWsZXinVAOFAnau7Nlab3QZCBgd/GZDIHfpsgaYd9oNCYf/R2od3Z/xtrX6BagktJhWFHEesU9Zdzyvnphf/zFesVFvYcGP8c2zjYPI86BObJHmxxV1TXwLiaKNjjZT+b5GvdcqJvlWmzgtM=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.14, REQID:b849a567-5910-4cc4-b29d-536fbd61b45b, IP:0, U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:dcaaed0, CLOUDID:d394898a-8530-4eff-9f77-222cf6e2895b, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: 03b380e0126541db8c4855748f62af57-20221227 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 736925038; Tue, 27 Dec 2022 20:09:20 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Tue, 27 Dec 2022 20:09:18 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 27 Dec 2022 20:09:18 +0800 From: Roger Lu To: Matthias Brugger , Enric Balletbo Serra , Kevin Hilman , Nicolas Boichat CC: Fan Chen , Roger Lu , Jia-wei Chang , , , , , , Subject: [PATCH v2 12/13] soc: mediatek: mtk-svs: add thermal voltage compensation if needed Date: Tue, 27 Dec 2022 20:09:13 +0800 Message-ID: <20221227120914.11346-13-roger.lu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221227120914.11346-1-roger.lu@mediatek.com> References: <20221227120914.11346-1-roger.lu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Some extreme test environment may keep IC temperature very low or very high during system boot stage. For stability concern, we add thermal voltage compenstation if needed no matter svs bank phase is in init02 or mon mode. Signed-off-by: Roger Lu --- drivers/soc/mediatek/mtk-svs.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/drivers/soc/mediatek/mtk-svs.c b/drivers/soc/mediatek/mtk-svs.c index b3a345205319..8ef330175d39 100644 --- a/drivers/soc/mediatek/mtk-svs.c +++ b/drivers/soc/mediatek/mtk-svs.c @@ -585,7 +585,7 @@ static int svs_adjust_pm_opp_volts(struct svs_bank *svsb) } /* Get thermal effect */ - if (svsb->phase == SVSB_PHASE_MON) { + if (!IS_ERR_OR_NULL(svsb->tzd)) { ret = thermal_zone_get_temp(svsb->tzd, &tzone_temp); if (ret || (svsb->temp > SVSB_TEMP_UPPER_BOUND && svsb->temp < SVSB_TEMP_LOWER_BOUND)) { @@ -600,7 +600,8 @@ static int svs_adjust_pm_opp_volts(struct svs_bank *svsb) temp_voffset += svsb->tzone_ltemp_voffset; /* 2-line bank update all opp volts when running mon mode */ - if (svsb->type == SVSB_HIGH || svsb->type == SVSB_LOW) { + if (svsb->phase == SVSB_PHASE_MON && (svsb->type == SVSB_HIGH || + svsb->type == SVSB_LOW)) { opp_start = 0; opp_stop = svsb->opp_count; } @@ -616,11 +617,6 @@ static int svs_adjust_pm_opp_volts(struct svs_bank *svsb) /* do nothing */ goto unlock_mutex; case SVSB_PHASE_INIT02: - svsb_volt = max(svsb->volt[i], svsb->vmin); - opp_volt = svs_bank_volt_to_opp_volt(svsb_volt, - svsb->volt_step, - svsb->volt_base); - break; case SVSB_PHASE_MON: svsb_volt = max(svsb->volt[i] + temp_voffset, svsb->vmin); opp_volt = svs_bank_volt_to_opp_volt(svsb_volt, @@ -1710,7 +1706,7 @@ static int svs_bank_resource_setup(struct svs_platform *svsp) } } - if (svsb->mode_support & SVSB_MODE_MON) { + if (!IS_ERR_OR_NULL(svsb->tzone_name)) { svsb->tzd = thermal_zone_get_zone_by_name(svsb->tzone_name); if (IS_ERR(svsb->tzd)) { dev_err(svsb->dev, "cannot get \"%s\" thermal zone\n", @@ -2154,6 +2150,7 @@ static struct svs_bank svs_mt8192_banks[] = { .type = SVSB_LOW, .set_freq_pct = svs_set_bank_freq_pct_v3, .get_volts = svs_get_bank_volts_v3, + .tzone_name = "gpu1", .volt_flags = SVSB_REMOVE_DVTFIXED_VOLT, .mode_support = SVSB_MODE_INIT02, .opp_count = MAX_OPP_ENTRIES, @@ -2171,6 +2168,10 @@ static struct svs_bank svs_mt8192_banks[] = { .core_sel = 0x0fff0100, .int_st = BIT(0), .ctl0 = 0x00540003, + .tzone_htemp = 85000, + .tzone_htemp_voffset = 0, + .tzone_ltemp = 25000, + .tzone_ltemp_voffset = 7, }, { .sw_id = SVSB_GPU, From patchwork Tue Dec 27 12:09:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Lu X-Patchwork-Id: 637206 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DFC4FC10F1B for ; Tue, 27 Dec 2022 12:09:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229579AbiL0MJq (ORCPT ); Tue, 27 Dec 2022 07:09:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51548 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231510AbiL0MJb (ORCPT ); Tue, 27 Dec 2022 07:09:31 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D0F72C74; Tue, 27 Dec 2022 04:09:29 -0800 (PST) X-UUID: b35a70be08d4479691b14978edd7a41f-20221227 DKIM-Signature: v=1; a=rsa-sha256; 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Tue, 27 Dec 2022 20:09:20 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Tue, 27 Dec 2022 20:09:19 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 27 Dec 2022 20:09:18 +0800 From: Roger Lu To: Matthias Brugger , Enric Balletbo Serra , Kevin Hilman , Nicolas Boichat CC: Fan Chen , Roger Lu , Jia-wei Chang , , , , , , Subject: [PATCH v2 13/13] soc: mediatek: mtk-svs: keep svs alive even though debug cmd create fail Date: Tue, 27 Dec 2022 20:09:14 +0800 Message-ID: <20221227120914.11346-14-roger.lu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221227120914.11346-1-roger.lu@mediatek.com> References: <20221227120914.11346-1-roger.lu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Some projects might not support DEBUG_FS but still needs svs to be supported. Therefore, keep svs alive even though debug cmd create fail. Signed-off-by: Roger Lu --- drivers/soc/mediatek/mtk-svs.c | 18 ++++++------------ 1 file changed, 6 insertions(+), 12 deletions(-) diff --git a/drivers/soc/mediatek/mtk-svs.c b/drivers/soc/mediatek/mtk-svs.c index 8ef330175d39..89579276c09c 100644 --- a/drivers/soc/mediatek/mtk-svs.c +++ b/drivers/soc/mediatek/mtk-svs.c @@ -806,7 +806,7 @@ static int svs_status_debug_show(struct seq_file *m, void *v) debug_fops_ro(status); -static int svs_create_debug_cmds(struct svs_platform *svsp) +static void svs_create_debug_cmds(struct svs_platform *svsp) { struct svs_bank *svsb; struct dentry *svs_dir, *svsb_dir, *file_entry; @@ -831,7 +831,7 @@ static int svs_create_debug_cmds(struct svs_platform *svsp) if (IS_ERR(svs_dir)) { dev_err(svsp->dev, "cannot create %s: %ld\n", d, PTR_ERR(svs_dir)); - return PTR_ERR(svs_dir); + return; } for (i = 0; i < ARRAY_SIZE(svs_entries); i++) { @@ -841,7 +841,7 @@ static int svs_create_debug_cmds(struct svs_platform *svsp) if (IS_ERR(file_entry)) { dev_err(svsp->dev, "cannot create %s/%s: %ld\n", d, svs_entries[i].name, PTR_ERR(file_entry)); - return PTR_ERR(file_entry); + return; } } @@ -855,7 +855,7 @@ static int svs_create_debug_cmds(struct svs_platform *svsp) if (IS_ERR(svsb_dir)) { dev_err(svsp->dev, "cannot create %s/%s: %ld\n", d, svsb->name, PTR_ERR(svsb_dir)); - return PTR_ERR(svsb_dir); + return; } for (i = 0; i < ARRAY_SIZE(svsb_entries); i++) { @@ -866,12 +866,10 @@ static int svs_create_debug_cmds(struct svs_platform *svsp) dev_err(svsp->dev, "no %s/%s/%s?: %ld\n", d, svsb->name, svsb_entries[i].name, PTR_ERR(file_entry)); - return PTR_ERR(file_entry); + return; } } } - - return 0; } static u32 interpolate(u32 f0, u32 f1, u32 v0, u32 v1, u32 fx) @@ -2417,11 +2415,7 @@ static int svs_probe(struct platform_device *pdev) goto svs_probe_iounmap; } - ret = svs_create_debug_cmds(svsp); - if (ret) { - dev_err(svsp->dev, "svs create debug cmds fail: %d\n", ret); - goto svs_probe_iounmap; - } + svs_create_debug_cmds(svsp); return 0;