From patchwork Thu Apr 18 17:26:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 162508 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp1013514jan; Thu, 18 Apr 2019 10:26:28 -0700 (PDT) X-Google-Smtp-Source: APXvYqyG5EGz1fCuo/FYDC4ajUG/7oc5Ppbiz2smUJv7lV8U4kE9vjpG5osS9G40V07D2q833vGm X-Received: by 2002:a17:902:263:: with SMTP id 90mr43802414plc.257.1555608387942; Thu, 18 Apr 2019 10:26:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1555608387; cv=none; d=google.com; s=arc-20160816; b=aDGbrm9JQTZy7AfurDPA9FpmvmJznAKJg8X75RMIa5cIajf8Sth6QEN394c2x9B8Ss 2gkv7F0iPad6LM0KoGtiyQGoV5BLCSWxaHkiv0HVvIObICWdEBEldxjlyGjOUC9kBhgn vd6an4ZP+LUTfZStbRSirZlzEGmicpxcr8RQiSPcwuGIHt8ATf+FygF0GDZCAzJqGvXP VLYGRyf4qjqI/JqyzWIgFDSd4jsww3gzt2berfDSBEvqRcMF4ojyiG0IiEKt/ZVrzvBj 8pD+9eYxvevQaJPNafgmKY0wPSBJupJiqCH0mxs+wmM55aTlQOVuumYdlIwWu43k1HET eGGw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=rt48lGQ09H92LmV3kHxSdTiClsiJUaMbQSG7qf7zVJQ=; b=qxjPJV0H+djdPRVSvbu6n1XLWNiSnD2mIst1JPxGR1PI4Nj9zqBCdM+6fe9TaxzKkw VLSXOBmbZAAjITinkr7G26HbDcd2aNa4z2Y8JBV5Hyqm3VWOVl4XdLYFttXGrfWMjyRy XplbAQE2vYC7h3f44ePAqK44A75v8slfdobCv3PiZhybYnxw+Wyp+XpxnM6LzGCd/Z5Z Vle2VuzGtYW+OPJx14OCdFMhHffgVEqpQMvjH5Yb1H34X+ULDXzBp0MtIXFTZK+kJ/PG oivuikMYsV6YFKaEWXTnX6acLR7ngnXJVGzlpy42xWvHrpyhaiqQ+H00szsFol8fG5L5 6Wzw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d8si2566052plo.157.2019.04.18.10.26.27; Thu, 18 Apr 2019 10:26:27 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389829AbfDRR00 (ORCPT + 30 others); Thu, 18 Apr 2019 13:26:26 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:38048 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731317AbfDRR0Y (ORCPT ); Thu, 18 Apr 2019 13:26:24 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 97BA71688; Thu, 18 Apr 2019 10:26:23 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 604463F557; Thu, 18 Apr 2019 10:26:21 -0700 (PDT) From: Julien Grall To: linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org Cc: logang@deltatee.com, douliyangs@gmail.com, miquel.raynal@bootlin.com, marc.zyngier@arm.com, jason@lakedaemon.net, tglx@linutronix.de, joro@8bytes.org, robin.murphy@arm.com, bigeasy@linutronix.de, linux-rt-users@vger.kernel.org, Julien Grall Subject: [PATCH 1/7] genirq/msi: Add a new field in msi_desc to store an IOMMU cookie Date: Thu, 18 Apr 2019 18:26:05 +0100 Message-Id: <20190418172611.21561-2-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190418172611.21561-1-julien.grall@arm.com> References: <20190418172611.21561-1-julien.grall@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org When an MSI doorbell is located downstream of an IOMMU, it is required to swizzle the physical address with an appropriately-mapped IOVA for any device attached to one of our DMA ops domain. At the moment, the allocation of the mapping may be done when composing the message. However, the composing may be done in non-preemtible context while the allocation requires to be called from preemptible context. A follow-up patch will split the current logic in two functions requiring to keep an IOMMU cookie per MSI. This patch introduces a new field in msi_desc to store an IOMMU cookie when CONFIG_IOMMU_DMA is selected. Signed-off-by: Julien Grall --- include/linux/msi.h | 3 +++ 1 file changed, 3 insertions(+) -- 2.11.0 diff --git a/include/linux/msi.h b/include/linux/msi.h index 7e9b81c3b50d..d7907feef1bb 100644 --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -77,6 +77,9 @@ struct msi_desc { struct device *dev; struct msi_msg msg; struct irq_affinity_desc *affinity; +#ifdef CONFIG_IOMMU_DMA + const void *iommu_cookie; +#endif union { /* PCI MSI/X specific data */ From patchwork Thu Apr 18 17:26:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 162510 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp1013597jan; Thu, 18 Apr 2019 10:26:32 -0700 (PDT) X-Google-Smtp-Source: APXvYqymPw6p8OEnxuBw+pLzaNi6apgMiPqQPh5LuLbAMuoeW4r7QMwVrRGyXHTSe3Pj7QkRatF8 X-Received: by 2002:a17:902:442:: with SMTP id 60mr97697277ple.107.1555608392691; Thu, 18 Apr 2019 10:26:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1555608392; cv=none; d=google.com; s=arc-20160816; b=fxd1nxEM1ECbo3NDvZ69jeOH10mwyhwhky66TSOUKOud8fYafnh0rgX9rNT9Qd4/qU 8skCFngyKhtioqtdBqr1aRCdhBBXqgw+8htrd+NA9ebYZV57ydpeTZe5PNvgNhvdwOXD tCQUGbINk5Z2mdQMw7uFHL8RMBiNNsyAmwxBgvb5YlrnKxZBNYIIfW/4ZJHTgt+prOMZ w0bx7KsBeVPfl+Vq/Lsex1T9lmmCqb5H3GZpx+JaypdJoftL4nDcNR8zpfrYL0WZCOrN 2+Zd+C9PXINuHqWeo83RI67lMiVmUFz7xHY8GPv0pbtlJ/Kj1eh7f7xtNBo5abE917p/ qpeQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=Irtig9TKUvmintWUz2Hf9Y4P6x83TxNzcS5xAQZQ0bc=; b=Z09evpdbQ1AIJBq8IIt6cAwax1Z7nbmnmpcjdqBK/8kevrOILWWHOkuAmx1A/SxcDo wZpqRNFSnMrq8C04c7Z2XUctdAGnlvdYky6T2AI1SP/gbHpMYj63gQLu+d/QD5huQNb3 UbpznZVYxk2Hdf8pPAvGCe9ffU5PX/V74NCGa1JbRJYk/xfhqadIs5Vg4ySm1HU/zYze DNkw3r2D+KzbvhaJAzLBM22PBn7NsOj260si+2rX+K8SmNSuPwsNagLODB2xbf4sNVcO hEGYQgxpuNiaC/xK5WwoT2I3fnkDd+x4n7uMs/6k0jxUXkb4SRICzT0ZaQctRDYWqlI6 Y7Mg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d8si2566052plo.157.2019.04.18.10.26.32; Thu, 18 Apr 2019 10:26:32 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389858AbfDRR0b (ORCPT + 30 others); Thu, 18 Apr 2019 13:26:31 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:38084 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389841AbfDRR03 (ORCPT ); Thu, 18 Apr 2019 13:26:29 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8FB4516A3; Thu, 18 Apr 2019 10:26:28 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 57B6C3F557; Thu, 18 Apr 2019 10:26:26 -0700 (PDT) From: Julien Grall To: linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org Cc: logang@deltatee.com, douliyangs@gmail.com, miquel.raynal@bootlin.com, marc.zyngier@arm.com, jason@lakedaemon.net, tglx@linutronix.de, joro@8bytes.org, robin.murphy@arm.com, bigeasy@linutronix.de, linux-rt-users@vger.kernel.org, Julien Grall Subject: [PATCH 3/7] irqchip/gicv2m: Don't map the MSI page in gicv2m_compose_msi_msg Date: Thu, 18 Apr 2019 18:26:07 +0100 Message-Id: <20190418172611.21561-4-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190418172611.21561-1-julien.grall@arm.com> References: <20190418172611.21561-1-julien.grall@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The function gicv2m_compose_msi_msg may be called from non-preemptible context. However, on RT, iommu_dma_map_msi_msg requires to be called from a preemptible context. A recent patch split the function iommu_dma_map_msi_msg in 2 functions: one that should be called in preemptible context, the other does not have any requirement. This patch reworks the gicv2m driver to avoid executing preemptible code in non-preemptible context by preparing the MSI mapping when allocating the MSI interrupt. Signed-off-by: Julien Grall --- drivers/irqchip/irq-gic-v2m.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) -- 2.11.0 diff --git a/drivers/irqchip/irq-gic-v2m.c b/drivers/irqchip/irq-gic-v2m.c index f5fe0100f9ff..e5372acd92c9 100644 --- a/drivers/irqchip/irq-gic-v2m.c +++ b/drivers/irqchip/irq-gic-v2m.c @@ -110,7 +110,7 @@ static void gicv2m_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) if (v2m->flags & GICV2M_NEEDS_SPI_OFFSET) msg->data -= v2m->spi_offset; - iommu_dma_map_msi_msg(data->irq, msg); + iommu_dma_compose_msi_msg(data->irq, msg); } static struct irq_chip gicv2m_irq_chip = { @@ -167,6 +167,7 @@ static void gicv2m_unalloc_msi(struct v2m_data *v2m, unsigned int hwirq, static int gicv2m_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, unsigned int nr_irqs, void *args) { + msi_alloc_info_t *info = args; struct v2m_data *v2m = NULL, *tmp; int hwirq, offset, i, err = 0; @@ -186,6 +187,11 @@ static int gicv2m_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, hwirq = v2m->spi_start + offset; + err = iommu_dma_prepare_msi(info->desc, + v2m->res.start + V2M_MSI_SETSPI_NS); + if (err) + return err; + for (i = 0; i < nr_irqs; i++) { err = gicv2m_irq_gic_domain_alloc(domain, virq + i, hwirq + i); if (err) From patchwork Thu Apr 18 17:26:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 162511 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp1013624jan; Thu, 18 Apr 2019 10:26:34 -0700 (PDT) X-Google-Smtp-Source: APXvYqw+vVSExO2baae5TMOCop2BF9UMrBIIaWdP0hjOy6CqFODWug0Ajh5C/uNqpFbJ/etjjgKP X-Received: by 2002:a63:5511:: with SMTP id j17mr6810718pgb.449.1555608394237; Thu, 18 Apr 2019 10:26:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1555608394; cv=none; d=google.com; s=arc-20160816; b=sdYmm2hE9XnjYsRZcrqLUG2RrDgLxxhX3zINwF496RxoYifNKqiY+D3GlamDKEtcZb yEiM0JlbfrYyG5LaJBPhbC7aHNyqScugbD4MKeETbMczl4EKvLzu4WQ1Fo8HN5XmKWeA 3PgjjA4w1Cn2spvOXIFmyXBStyLIZT70HN+wTAr76WTgovAVZcAFJ3ebsJPaxAZ8mcJY u1/eUL/ytLwov0kYYVPuxVe5EsX7CP6ebo3WJBZiWkqsKQBxFJ8d8CO0I889birQgfh6 lqh4MEENJJdLio/UOtAifme4Lu6fO/ntCkHyoIKkwomX4PGcsKNeWfNEXsD32gSRlEnt xxSQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=DkuAo2FPtKsFHGaxurxp3u9bAm1qg7ThklpdM7f4dpI=; b=KQaeX4Iz+WG6awXfafMX5eeSJpbSxdywRNPzFhweYMV+bzaL3bApRhcPnXSLLjaDo+ vHqGHk3oBtjFpUakq/IOTXaaPz49vhMCh18Ugp/HHEoLd7OwRiRbn6Gn9Ue6axJT76Ji bSPxGOWVY1eQw4EzpsLALtCSlVk9aDNNoT9TCLzTz58eOOGNp+FTkMyxt6mmphCR7t1w 3iVLP55W0gU5RKZzmVrinr8/aRB45Xi/3yAkbeJZJGPu8AzXoO2Mdei2K0LEMiLEjq1o Nm+QKOkTq360YbPjKLOBpFeyyXrZy+18ZBBxIt6kb8EydTBEwvMGyXThB15/TFsumBAw 4FYQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i37si2416807pgb.436.2019.04.18.10.26.33; Thu, 18 Apr 2019 10:26:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389871AbfDRR0c (ORCPT + 30 others); Thu, 18 Apr 2019 13:26:32 -0400 Received: from foss.arm.com ([217.140.101.70]:38102 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389856AbfDRR0b (ORCPT ); Thu, 18 Apr 2019 13:26:31 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1300580D; Thu, 18 Apr 2019 10:26:31 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CE0E93F557; Thu, 18 Apr 2019 10:26:28 -0700 (PDT) From: Julien Grall To: linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org Cc: logang@deltatee.com, douliyangs@gmail.com, miquel.raynal@bootlin.com, marc.zyngier@arm.com, jason@lakedaemon.net, tglx@linutronix.de, joro@8bytes.org, robin.murphy@arm.com, bigeasy@linutronix.de, linux-rt-users@vger.kernel.org, Julien Grall Subject: [PATCH 4/7] irqchip/gic-v3-its: Don't map the MSI page in its_irq_compose_msi_msg Date: Thu, 18 Apr 2019 18:26:08 +0100 Message-Id: <20190418172611.21561-5-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190418172611.21561-1-julien.grall@arm.com> References: <20190418172611.21561-1-julien.grall@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The function its_irq_compose_msi_msg may be called from non-preemptible context. However, on RT, iommu_dma_map_msi_msg requires to be called from a preemptible context. A recent patch split the function iommu_dma_map_msi_msg in 2 functions: one that should be called in preemptible context, the other does not have any requirement. This patch reworks the GICv3 ITS driver to avoid executing preemptible code in non-preemptible context by preparing the MSI mapping when allocating the MSI interrupt. Signed-off-by: Julien Grall --- drivers/irqchip/irq-gic-v3-its.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) -- 2.11.0 diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index 7577755bdcf4..1e8e01797d9b 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -1179,7 +1179,7 @@ static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) msg->address_hi = upper_32_bits(addr); msg->data = its_get_event_id(d); - iommu_dma_map_msi_msg(d->irq, msg); + iommu_dma_compose_msi_msg(d->irq, msg); } static int its_irq_set_irqchip_state(struct irq_data *d, @@ -2566,6 +2566,7 @@ static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, { msi_alloc_info_t *info = args; struct its_device *its_dev = info->scratchpad[0].ptr; + struct its_node *its = its_dev->its; irq_hw_number_t hwirq; int err; int i; @@ -2574,6 +2575,8 @@ static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, if (err) return err; + err = iommu_dma_prepare_msi(info->desc, its->get_msi_base(its_dev)); + for (i = 0; i < nr_irqs; i++) { err = its_irq_gic_domain_alloc(domain, virq + i, hwirq + i); if (err) From patchwork Thu Apr 18 17:26:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 162513 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp1013780jan; Thu, 18 Apr 2019 10:26:42 -0700 (PDT) X-Google-Smtp-Source: APXvYqwTFyfrIk/tuHp5cWR9AyfgG4j4um5FUFWhzi0xs73TtyvzBHp3AI351868dA+v0/oIhdTL X-Received: by 2002:a63:5a05:: with SMTP id o5mr2829889pgb.366.1555608402601; Thu, 18 Apr 2019 10:26:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1555608402; cv=none; d=google.com; s=arc-20160816; b=jYoB7m7FUkfACJn1lHaGrrLNyauoF5hIPzCxUr0djuYS4F08u1534J6qzUntcbDplZ Hg4e6YViwOxZ7U251dUHB6hx8qDDDpc+KMXTnc0Sx/peBHPjonQodVnDzfVIK1dyIe1A e0fOnZgLVGO7dZIVhFWXGmTaR96dq7S6oh5PNvFrfoNHBJhn8fL3wKAhwMFsZTMpMtZv VX6Bd8S4N1JFzcmgeyFVqj8nypXAkGeys2X0y6wcY3hzrwz9os0U1ldAR0uNJ+Ecyhgf 3cvM55TlIF3rM64517teX9fmaNoU8y/n2G8FIw5UbLKbh4VDB7SSnzlFioWyHESmCdN0 kBuw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=gbOuErGQg7KTYOu1kjoc5w9S3YvTNk1VWi7/xX2Dq28=; b=osAMCUjLUdJ8SUUf1j64iu/VPzapHwTd7UsrWuNYznS3WPVAo3frG9Myp1fsVSVpfw 1d//grv3ZUkvvmn5p1Ew3/32fOYtfXk9L2HlDpjzGtUKvdvdUx6J0nTk8mTBcbUEiWMQ rQ7E1TovU2I1HZJSis4wq/IE5INxzPTeEqXVUy4/1l2Ufk11kNRp29EBhJ9bbIp0wNLS 7/GZysbFnKW39SDWPu+oHmPi7Yis3qWC0Yo7sh3/jR5/OqD5PpMbVbS8k3int631YVGG Q8asUS1DC3kik4sayzbe+QceSOuPvzKK9WT2VxVQdk5P8oCOpciran29LDBiVL1Y4SpW 4rng== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id bj1si2596071plb.214.2019.04.18.10.26.42; Thu, 18 Apr 2019 10:26:42 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389898AbfDRR0k (ORCPT + 30 others); Thu, 18 Apr 2019 13:26:40 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:38138 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389881AbfDRR0g (ORCPT ); Thu, 18 Apr 2019 13:26:36 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0BCBA169E; Thu, 18 Apr 2019 10:26:36 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C6FCD3F557; Thu, 18 Apr 2019 10:26:33 -0700 (PDT) From: Julien Grall To: linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org Cc: logang@deltatee.com, douliyangs@gmail.com, miquel.raynal@bootlin.com, marc.zyngier@arm.com, jason@lakedaemon.net, tglx@linutronix.de, joro@8bytes.org, robin.murphy@arm.com, bigeasy@linutronix.de, linux-rt-users@vger.kernel.org, Julien Grall Subject: [PATCH 6/7] irqchip/gic-v3-mbi: Don't map the MSI page in mbi_compose_m{b, s}i_msg Date: Thu, 18 Apr 2019 18:26:10 +0100 Message-Id: <20190418172611.21561-7-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190418172611.21561-1-julien.grall@arm.com> References: <20190418172611.21561-1-julien.grall@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The functions mbi_compose_m{b, s}i_msg may be called from non-preemptible context. However, on RT, iommu_dma_map_msi_msg requires to be called from a preemptible context. A recent patch split the function iommu_dma_map_msi_msg in 2 functions: one that should be called in preemptible context, the other does not have any requirement. This patch reworks the GICv3 MBI driver to avoid executing preemptible code in non-preemptible context by preparing the MSI mappings when allocating the MSI interrupt. Signed-off-by: Julien Grall --- drivers/irqchip/irq-gic-v3-mbi.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) -- 2.11.0 diff --git a/drivers/irqchip/irq-gic-v3-mbi.c b/drivers/irqchip/irq-gic-v3-mbi.c index fbfa7ff6deb1..c812b80e3ce9 100644 --- a/drivers/irqchip/irq-gic-v3-mbi.c +++ b/drivers/irqchip/irq-gic-v3-mbi.c @@ -84,6 +84,7 @@ static void mbi_free_msi(struct mbi_range *mbi, unsigned int hwirq, static int mbi_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, unsigned int nr_irqs, void *args) { + msi_alloc_info_t *info = args; struct mbi_range *mbi = NULL; int hwirq, offset, i, err = 0; @@ -104,6 +105,16 @@ static int mbi_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, hwirq = mbi->spi_start + offset; + err = iommu_dma_prepare_msi(info->desc, + mbi_phys_base + GICD_CLRSPI_NSR); + if (err) + return err; + + err = iommu_dma_prepare_msi(info->desc, + mbi_phys_base + GICD_SETSPI_NSR); + if (err) + return err; + for (i = 0; i < nr_irqs; i++) { err = mbi_irq_gic_domain_alloc(domain, virq + i, hwirq + i); if (err) @@ -142,7 +153,7 @@ static void mbi_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) msg[0].address_lo = lower_32_bits(mbi_phys_base + GICD_SETSPI_NSR); msg[0].data = data->parent_data->hwirq; - iommu_dma_map_msi_msg(data->irq, msg); + iommu_dma_compose_msi_msg(data->irq, msg); } #ifdef CONFIG_PCI_MSI @@ -202,7 +213,7 @@ static void mbi_compose_mbi_msg(struct irq_data *data, struct msi_msg *msg) msg[1].address_lo = lower_32_bits(mbi_phys_base + GICD_CLRSPI_NSR); msg[1].data = data->parent_data->hwirq; - iommu_dma_map_msi_msg(data->irq, &msg[1]); + iommu_dma_compose_msi_msg(data->irq, &msg[1]); } /* Platform-MSI specific irqchip */ From patchwork Thu Apr 18 17:26:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 162514 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp1013838jan; Thu, 18 Apr 2019 10:26:45 -0700 (PDT) X-Google-Smtp-Source: APXvYqyWr0VD3YmSuR9byB3072JYGBS1OnnGU7lvGugBhXmqo7haEMWItBA3nVEvWEYIeKBdI67+ X-Received: by 2002:a17:902:e4:: with SMTP id a91mr78255247pla.2.1555608405744; Thu, 18 Apr 2019 10:26:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1555608405; cv=none; d=google.com; s=arc-20160816; b=cJ9Izx1MeyAxQEV84NhtmDzUTTE3wwX0FZBAbYt2OHoBhtEnbcN70LQ/0cCaRwpLYH yNg21uP6LIiHXa0S49NGJ52KE5MwD2kdWd2JDaYU6hlaXEZZCwhqrfrLu1m+n/GUwT9M wtgp93k8wXQObXtTNN2FUDEbHidGZYMFLMKGyfzrBLF11NAU2uClQdGsldGHDpIiHG8T gq7TNkB/xO0ypAYN6p2JlaP9S5Jo65J+0W2jWIZd3mZLhN8ytF2Z0+T8ZVvoK6xqQrQg V43Tmd4sFXAXrBcADp5zvUD2t6emWE6b7RHWYXAzHe1HYvk69DZIKOChlwFXRnC2kE8w 7+8Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=qS5Uf3QTrWqYRlwI/gBTPLS/7pyASIybkUR9qrVS77w=; b=fuNHEPuh32JxBrbG4hxHVg9ga2IBm/wp+Usp4edDhDBO83Tzr+nmc6fNlBAz3aImI1 Vmq7euhKHVx6z7kVWiPmVMCmcuUwEMlvZ2mj80IIpF84KszBU1kqYbp5rUHl+TUBK7V7 Y5/bMEaUa2wtDdVV9tTkV0a4MCE3TCN1w/WR1TBCk1ouJ2OaB6fsxOAtrGVpDTj8i/GH +DkGYcby+ZnqoUP+z6fstlajl7jg49s6QJt9J2TITzeTLZZ2JkF59TAAK8l7NaAKPwqU gOrTZb/XADwb3D2b2ALT66HYcE84y+xC6GPAIGMgnUQkq3e4jEC9Lotr8EOjzuCF5bAC PdOA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s9si2593950plr.17.2019.04.18.10.26.45; Thu, 18 Apr 2019 10:26:45 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389905AbfDRR0o (ORCPT + 30 others); Thu, 18 Apr 2019 13:26:44 -0400 Received: from foss.arm.com ([217.140.101.70]:38158 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389775AbfDRR0i (ORCPT ); Thu, 18 Apr 2019 13:26:38 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 812D080D; Thu, 18 Apr 2019 10:26:38 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 49BEC3F557; Thu, 18 Apr 2019 10:26:36 -0700 (PDT) From: Julien Grall To: linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org Cc: logang@deltatee.com, douliyangs@gmail.com, miquel.raynal@bootlin.com, marc.zyngier@arm.com, jason@lakedaemon.net, tglx@linutronix.de, joro@8bytes.org, robin.murphy@arm.com, bigeasy@linutronix.de, linux-rt-users@vger.kernel.org, Julien Grall Subject: [PATCH 7/7] iommu/dma-iommu: Remove iommu_dma_map_msi_msg() Date: Thu, 18 Apr 2019 18:26:11 +0100 Message-Id: <20190418172611.21561-8-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190418172611.21561-1-julien.grall@arm.com> References: <20190418172611.21561-1-julien.grall@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org A recent patch introduced two new functions to replace iommu_dma_map_msi_msg() to avoid executing preemptible code in non-preemptible context. All the existings callers are now using the two new functions, so iommu_dma_map_msi_msg() can be removed. Signed-off-by: Julien Grall --- drivers/iommu/dma-iommu.c | 20 -------------------- include/linux/dma-iommu.h | 5 ----- 2 files changed, 25 deletions(-) -- 2.11.0 diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index f5c1f1685095..fdc8ded62e87 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -928,23 +928,3 @@ void iommu_dma_compose_msi_msg(int irq, struct msi_msg *msg) msg->address_lo &= cookie_msi_granule(domain->iova_cookie) - 1; msg->address_lo += lower_32_bits(msi_page->iova); } - -void iommu_dma_map_msi_msg(int irq, struct msi_msg *msg) -{ - struct msi_desc *desc = irq_get_msi_desc(irq); - phys_addr_t msi_addr = (u64)msg->address_hi << 32 | msg->address_lo; - - if (WARN_ON(iommu_dma_prepare_msi(desc, msi_addr))) { - /* - * We're called from a void callback, so the best we can do is - * 'fail' by filling the message with obviously bogus values. - * Since we got this far due to an IOMMU being present, it's - * not like the existing address would have worked anyway... - */ - msg->address_hi = ~0U; - msg->address_lo = ~0U; - msg->data = ~0U; - } else { - iommu_dma_compose_msi_msg(irq, msg); - } -} diff --git a/include/linux/dma-iommu.h b/include/linux/dma-iommu.h index 2f4b2c2cc859..4fe2b2fb19bf 100644 --- a/include/linux/dma-iommu.h +++ b/include/linux/dma-iommu.h @@ -81,7 +81,6 @@ int iommu_dma_prepare_msi(struct msi_desc *desc, phys_addr_t msi_addr); /* Update the MSI message if required. */ void iommu_dma_compose_msi_msg(int irq, struct msi_msg *msg); -void iommu_dma_map_msi_msg(int irq, struct msi_msg *msg); void iommu_dma_get_resv_regions(struct device *dev, struct list_head *list); #else @@ -120,10 +119,6 @@ static inline void iommu_dma_compose_msi_msg(int irq, struct msi_msg *msg) { } -static inline void iommu_dma_map_msi_msg(int irq, struct msi_msg *msg) -{ -} - static inline void iommu_dma_get_resv_regions(struct device *dev, struct list_head *list) { }