From patchwork Thu Jan 26 11:08:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 648277 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A1F09C54E94 for ; Thu, 26 Jan 2023 11:09:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236902AbjAZLJU (ORCPT ); Thu, 26 Jan 2023 06:09:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55340 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236057AbjAZLJT (ORCPT ); Thu, 26 Jan 2023 06:09:19 -0500 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E97103E628; Thu, 26 Jan 2023 03:09:16 -0800 (PST) Received: from toolbox.toradex.int ([31.10.206.125]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0Lx9WJ-1ob9iP2moj-016g4t; Thu, 26 Jan 2023 12:08:53 +0100 From: Marcel Ziswiler To: devicetree@vger.kernel.org Cc: linux-imx@nxp.com, Liu Ying , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Philippe Schenker , Max Krummenacher , Marcel Ziswiler , Fabio Estevam , Frank Li , Krzysztof Kozlowski , Peng Fan , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo Subject: [PATCH v5 01/10] arm64: dts: freescale: imx8-ss-lsio: add support for lsio_pwm0-3 Date: Thu, 26 Jan 2023 12:08:24 +0100 Message-Id: <20230126110833.264439-2-marcel@ziswiler.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230126110833.264439-1-marcel@ziswiler.com> References: <20230126110833.264439-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:DYzAsXLYntW0PlxYbyCZaZMvE1st9DvQVP946Oz8OMXgeRrza65 sU10WjYLNQ64+tS1f1c/Z0rj/xGAyfvxy/m8biUul5v/iKtBFuQSvXqceBUq/dJp0fV5Ynj 1xaCBiTBm2/z4Z8TZ6yA8nKHsaodhEa1c0j8CWI5ZKeIYToEhvebidm4qHZSbaVQ88C0cpJ zLxgzLVdkZpr3W1ELBv3A== UI-OutboundReport: notjunk:1;M01:P0:qq8kEcB8Zko=;bCqKU9Plx1welAuRyTP1PyOwW/y gN1XKoVwbJsLQE8POp/4Fdfyq4MDmyP42JJvdso4iTGarwxoGtsF5ZHYIgUP8uOxcgInj/Ios HIzSprR3LR46L7RZ781HQDPzLxF8KDhOWboc7PjtthON3B2xkKF2tiedNgmLFFtGoyOq2i4LB IAjHN+43FyjbC8DE6/NBYGJskfIIFVWZHY1w4sjMeOvGOkZRElGSjypu3dU30tove7T+HKaKh iaFJcEoECna1//ep9mNCKpaOxy3PmBGidQmN8Dx6tMLMj/vv32EJV4dvPlPMi1l+QfYsTWyVE kDgtVWLHXXlD/UCIj7uXma9OYIOx0Mm8NNlF4iFs+8uFeIi2wTtTQYZfkQWfDFMSs7dmqevU3 WTbP6oCQQQDUcEw7QgQb7ZKNzptsk0F1MZSaI18mGTpfWFecMG94L1JMUgdCUQ04Ny9rYTDJI G0nr2JkmPt+9b5Rbprpgaqa+vFRzv3H0alOcFzKWRcORkxNfg/xe7pMi2iX7AwV0KMmkjIX/0 ctfAPmoc3g/4E43ndT3nfyhANF5T1a3c9HGBW+D2RGLbq1brjtYXeCWDvgK4qRKS5QeRMGzD5 HrgZx4KDsE2uT/VxF8ibCA5AGB1DOuYDHfjnjO6Oessy9wZPZgC9kt6hyniWwjBkRc+RpTIgb XgMsB9/7YEqJAapErvQt6U6ZYXVo58serTHfgU1iHg== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Philippe Schenker Add support for lsio_pwm0-3. Signed-off-by: Philippe Schenker Signed-off-by: Max Krummenacher Signed-off-by: Marcel Ziswiler --- (no changes since v1) .../boot/dts/freescale/imx8-ss-lsio.dtsi | 48 +++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi index 1f3d225e64ec..62b7f7a3e1bc 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi @@ -28,6 +28,54 @@ lsio_bus_clk: clock-lsio-bus { clock-output-names = "lsio_bus_clk"; }; + lsio_pwm0: pwm@5d000000 { + compatible = "fsl,imx27-pwm"; + reg = <0x5d000000 0x10000>; + clock-names = "ipg", "per"; + clocks = <&pwm0_lpcg 4>, + <&pwm0_lpcg 1>; + assigned-clocks = <&clk IMX_SC_R_PWM_0 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <24000000>; + #pwm-cells = <2>; + status = "disabled"; + }; + + lsio_pwm1: pwm@5d010000 { + compatible = "fsl,imx27-pwm"; + reg = <0x5d010000 0x10000>; + clock-names = "ipg", "per"; + clocks = <&pwm1_lpcg 4>, + <&pwm1_lpcg 1>; + assigned-clocks = <&clk IMX_SC_R_PWM_1 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <24000000>; + #pwm-cells = <2>; + status = "disabled"; + }; + + lsio_pwm2: pwm@5d020000 { + compatible = "fsl,imx27-pwm"; + reg = <0x5d020000 0x10000>; + clock-names = "ipg", "per"; + clocks = <&pwm2_lpcg 4>, + <&pwm2_lpcg 1>; + assigned-clocks = <&clk IMX_SC_R_PWM_2 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <24000000>; + #pwm-cells = <2>; + status = "disabled"; + }; + + lsio_pwm3: pwm@5d030000 { + compatible = "fsl,imx27-pwm"; + reg = <0x5d030000 0x10000>; + clock-names = "ipg", "per"; + clocks = <&pwm3_lpcg 4>, + <&pwm3_lpcg 1>; + assigned-clocks = <&clk IMX_SC_R_PWM_3 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <24000000>; + #pwm-cells = <2>; + status = "disabled"; + }; + lsio_gpio0: gpio@5d080000 { reg = <0x5d080000 0x10000>; interrupts = ; From patchwork Thu Jan 26 11:08:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 648278 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3A73DC05027 for ; Thu, 26 Jan 2023 11:09:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236312AbjAZLJT (ORCPT ); Thu, 26 Jan 2023 06:09:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55332 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229620AbjAZLJS (ORCPT ); Thu, 26 Jan 2023 06:09:18 -0500 Received: from mout.perfora.net (mout.perfora.net [74.208.4.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 509EC3E0BA; Thu, 26 Jan 2023 03:09:16 -0800 (PST) Received: from toolbox.toradex.int ([31.10.206.125]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MTRrt-1pCz6N2Yj9-00SQNF; Thu, 26 Jan 2023 12:08:57 +0100 From: Marcel Ziswiler To: devicetree@vger.kernel.org Cc: linux-imx@nxp.com, Liu Ying , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Max Krummenacher , Philippe Schenker , Marcel Ziswiler , Fabio Estevam , Frank Li , Joakim Zhang , Krzysztof Kozlowski , Peng Fan , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo Subject: [PATCH v5 02/10] arm64: dts: imx8-ss-dma: add io-channel-cells to adc nodes Date: Thu, 26 Jan 2023 12:08:25 +0100 Message-Id: <20230126110833.264439-3-marcel@ziswiler.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230126110833.264439-1-marcel@ziswiler.com> References: <20230126110833.264439-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:TqowiqmeLKwSnxtcWA6HCPQj032KaJFjew20ZdS2KX+YgiedgUm eVoHwir07g7g0REKnfHDq1VlS5Te5OF619npoY/gpcmxiThrYgkQI1QZdoFzl4PNhdrGc8K EF5D5Lz9A5Dp+L9NAKIxZ8p5xe9RSlq1PLpYfjYzT37e1hwdfp2ZBRnvChbMbA+7caDCm7k 8uQZU4AB2lidwHcGahncw== UI-OutboundReport: notjunk:1;M01:P0:9RMIB8OrtEk=;fpxKQ+ksOavLCiKgMvBIFL8ftGB dG5xvOeIAoBN5mLenXJSqb8dT7e97kwgKHoIcrfSiVXhWCPhDHmnCqA6Tb6ZYdVpKh2Gy0xXC tEpS+Wv1554XuybI2AdkfFBoC4ab9keARGeA9dPxyzrgY/iFgl20NsY7R60xW/uzV/2QVe51i AxYMUz7PQL4ELwbugqNIuKDI5+t/ptPqu5ATQpYvLgVktyOkzZvcfnJpaBj5NagqZQ2oYYK6O 11xixo4Q/Ke2nQx3xGIbb2b9yUkdpeT/ZOY0zLAE7nfeIU3oTUakDrOiERkxqnq+03u0eHpnG gZ3TAHWRw0Bm0jPERd0MuFjeG0n1UWhPHhzfoa2eMMwNOrZp9QYErpE4XN006+J63I+I1WCCW vSpP7nMUGo1FSxMQMV81fUoxWkXn3fYvkJ2Pfd/h2bip4Ph7GifH1nHxKAJG7xYedMTjuaLy9 jcBZXpX7TnVsP4ksPwpgTAC++Yzy/HqVSzFhnn0JPFsAxM6M0TPRURjtJsaAzS6vob+50/Dj3 arRI0ewXoPuoCHKIpdQGLkZmP0BAeLetdw01dO9/CNCIxX2MMAwpB8Ewa3YiA53+lEOeLaAtn 6KfOVC6A9NMPlC/Zln7LhMsRZBVJ88rs6whKDoW2HhsNeAiE1WVxXdYBP6oJDI2+bN/U6mKog 5nCUMnqzj4Xk0CMMIwMDYpMp3NfQGfXOA0VE0v45rw== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Max Krummenacher This commit adds io-channel-cells property to the ADC nodes. This property is required in order for an IIO consumer driver to work. Especially required for Apalis iMX8 QM, as the touchscreen driver uses ADC channels with the ADC driver based on IIO framework. Signed-off-by: Philippe Schenker Signed-off-by: Max Krummenacher Signed-off-by: Marcel Ziswiler Acked-by: Alexander Stein --- (no changes since v3) Changes in v3: - Fix subject as pointed out by Shawn. Thanks! arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi index a943a1e2797f..6e5ef8b69bf8 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi @@ -270,6 +270,7 @@ i2c3: i2c@5a830000 { adc0: adc@5a880000 { compatible = "nxp,imx8qxp-adc"; + #io-channel-cells = <1>; reg = <0x5a880000 0x10000>; interrupts = ; interrupt-parent = <&gic>; @@ -284,6 +285,7 @@ adc0: adc@5a880000 { adc1: adc@5a890000 { compatible = "nxp,imx8qxp-adc"; + #io-channel-cells = <1>; reg = <0x5a890000 0x10000>; interrupts = ; interrupt-parent = <&gic>; From patchwork Thu Jan 26 11:08:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 648276 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 513A2C54EAA for ; Thu, 26 Jan 2023 11:09:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237161AbjAZLJc (ORCPT ); Thu, 26 Jan 2023 06:09:32 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55594 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237117AbjAZLJZ (ORCPT ); Thu, 26 Jan 2023 06:09:25 -0500 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A39A0410A0; Thu, 26 Jan 2023 03:09:23 -0800 (PST) Received: from toolbox.toradex.int ([31.10.206.125]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0LdHBn-1ov36z12NF-00iR7n; Thu, 26 Jan 2023 12:09:08 +0100 From: Marcel Ziswiler To: devicetree@vger.kernel.org Cc: linux-imx@nxp.com, Liu Ying , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Joakim Zhang , Marcel Ziswiler , Fabio Estevam , Frank Li , Krzysztof Kozlowski , Max Krummenacher , Peng Fan , Pengutronix Kernel Team , Philippe Schenker , Rob Herring , Sascha Hauer , Shawn Guo Subject: [PATCH v5 05/10] arm64: dts: imx8qxp: add flexcan in adma Date: Thu, 26 Jan 2023 12:08:28 +0100 Message-Id: <20230126110833.264439-6-marcel@ziswiler.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230126110833.264439-1-marcel@ziswiler.com> References: <20230126110833.264439-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:fQWw0GOX+nKPn6Z3NSaSeEwe1U943hr8DyyHXIPa/bsUYvsHEtr +pEppte+ECkpMC1zG1kBn3l6Vxt/Pe5brnOBmN965w9xJpJitFWj2KadZJzPaOrhYKGyTJz 3idB2HSgjvPPXDEWy7uEmcYFvI+Z2Txxyl2ibX4yn40XEve+Lba/uZzZaOtyf5ArQWd3d1P eBti9Pq4N6E5Q3zHTlUdQ== UI-OutboundReport: notjunk:1;M01:P0:ZGgyyNtw80Q=;2HZ8Ryrc35DTl3hfRogXBaLyA6U QgZbQZ0V/4oqkrmBXSPTETFDq13goaWXD7mGcaoFPya8YB/WpYvMAqJZesQCnzcLSEvUgc/a2 VL8YTfaXsPSsEn9a+KkUsV5rAhkvqEw6kuRbzcTsK0dSnfnxdxq4HNunPu6UsNGDfcSnVqVo/ 6HRT7FCDGvltL/7ItWRrQoD+VdXapfyjYzu54bzfbvlYJz5/CmqXNNC2vCFO1qjC+c3m0wg6A jHDaLBu+mU4Rpibh1bE13IfVzhsSF8njc8Naqw1ZUrdYdmclz2pchxzwIgWZcXFzxlfdlFEQ3 KYlAhnCB0UIYBh5+o+kTDYfEDS93+DIbgnF3Xa0QWI+tZiXcWM/YZkR2YtLl9q6iCUhV5VhyQ Hwyz50uGneX7jJZYDE/IChZoiTQsakQlz+HJRqZnc0V1NQpTFk6lBFYdES4iD5sppxnLMrcHW AT2qmRKxdxf3+MImnBAbZfCtdvuAi9mmXcUqpvpUh5FTPBOLq1Qz5kOifVK/ugGVnWtDKlZIh 0Ro4W/mqQmIKgG1M3CCLeVaj3TvX9FC3WLvaJrumhS6+dAloSNXd1Y1y2NReu8APprp0x3uPx mNwuY71LoYTBHpr+EgZJ1QTyfjBdRfZ2IRHEPKhT1yG/80aVSjvlo/Zutz6RjehyO0hyd8QCr M7cvxDEwjvrhxOSlvoFcHh1OKfGYg3C0oWgMpszUow== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Joakim Zhang Add FlexCAN decive in adma subsystem. Signed-off-by: Joakim Zhang Signed-off-by: Marcel Ziswiler --- (no changes since v4) Changes in v4: - New patch combining the following downstream patches: commit e8fe3f57223a ("arm64: dts: imx8qxp: add FlexCAN in adma") commit 4e90361f1ed3 ("arm64: dts: imx8qxp: add multi-pd support for CAN1/2") commit 899f516e61f8 ("arm64: dts: imx8: dma: fully switched to new clk binding") commit 8a28ca15a058 ("arm64: dts: imx8qxp: drop multi-pd for CAN device") commit c493402197dd ("arm64: dts: imx8: update CAN fsl,clk-source and fsl,scu-index property") .../arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 72 +++++++++++++++++++ 1 file changed, 72 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi index 6ccf926b77a5..2dce8f2ee3ea 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi @@ -298,6 +298,65 @@ adc1: adc@5a890000 { status = "disabled"; }; + flexcan1: can@5a8d0000 { + compatible = "fsl,imx8qm-flexcan"; + reg = <0x5a8d0000 0x10000>; + interrupts = ; + interrupt-parent = <&gic>; + clocks = <&can0_lpcg 1>, + <&can0_lpcg 0>; + clock-names = "ipg", "per"; + assigned-clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <40000000>; + power-domains = <&pd IMX_SC_R_CAN_0>; + /* SLSlice[4] */ + fsl,clk-source = /bits/ 8 <0>; + fsl,scu-index = /bits/ 8 <0>; + status = "disabled"; + }; + + flexcan2: can@5a8e0000 { + compatible = "fsl,imx8qm-flexcan"; + reg = <0x5a8e0000 0x10000>; + interrupts = ; + interrupt-parent = <&gic>; + /* CAN0 clock and PD is shared among all CAN instances as + * CAN1 shares CAN0's clock and to enable CAN0's clock it + * has to be powered on. + */ + clocks = <&can0_lpcg 1>, + <&can0_lpcg 0>; + clock-names = "ipg", "per"; + assigned-clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <40000000>; + power-domains = <&pd IMX_SC_R_CAN_1>; + /* SLSlice[4] */ + fsl,clk-source = /bits/ 8 <0>; + fsl,scu-index = /bits/ 8 <1>; + status = "disabled"; + }; + + flexcan3: can@5a8f0000 { + compatible = "fsl,imx8qm-flexcan"; + reg = <0x5a8f0000 0x10000>; + interrupts = ; + interrupt-parent = <&gic>; + /* CAN0 clock and PD is shared among all CAN instances as + * CAN2 shares CAN0's clock and to enable CAN0's clock it + * has to be powered on. + */ + clocks = <&can0_lpcg 1>, + <&can0_lpcg 0>; + clock-names = "ipg", "per"; + assigned-clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <40000000>; + power-domains = <&pd IMX_SC_R_CAN_2>; + /* SLSlice[4] */ + fsl,clk-source = /bits/ 8 <0>; + fsl,scu-index = /bits/ 8 <2>; + status = "disabled"; + }; + i2c0_lpcg: clock-controller@5ac00000 { compatible = "fsl,imx8qxp-lpcg"; reg = <0x5ac00000 0x10000>; @@ -369,4 +428,17 @@ adc1_lpcg: clock-controller@5ac90000 { "adc1_lpcg_ipg_clk"; power-domains = <&pd IMX_SC_R_ADC_1>; }; + + can0_lpcg: clock-controller@5acd0000 { + compatible = "fsl,imx8qxp-lpcg"; + reg = <0x5acd0000 0x10000>; + #clock-cells = <1>; + clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>, + <&dma_ipg_clk>, <&dma_ipg_clk>; + clock-indices = , , ; + clock-output-names = "can0_lpcg_pe_clk", + "can0_lpcg_ipg_clk", + "can0_lpcg_chi_clk"; + power-domains = <&pd IMX_SC_R_CAN_0>; + }; }; From patchwork Thu Jan 26 11:08:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 648275 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2C7C4C54E94 for ; Thu, 26 Jan 2023 11:09:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237015AbjAZLJz (ORCPT ); Thu, 26 Jan 2023 06:09:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56466 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237179AbjAZLJq (ORCPT ); Thu, 26 Jan 2023 06:09:46 -0500 Received: from mout.perfora.net (mout.perfora.net [74.208.4.196]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CBFE062278; Thu, 26 Jan 2023 03:09:32 -0800 (PST) Received: from toolbox.toradex.int ([31.10.206.125]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MhSU8-1oyMdV2F0c-00Mf4m; Thu, 26 Jan 2023 12:09:16 +0100 From: Marcel Ziswiler To: devicetree@vger.kernel.org Cc: linux-imx@nxp.com, Liu Ying , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Zhou Peng , Marcel Ziswiler , Abel Vesa , Fabio Estevam , Krzysztof Kozlowski , Oliver Graute , Pengutronix Kernel Team , Pierre Gondois , Rob Herring , Sascha Hauer , Shawn Guo , Viorel Suman Subject: [PATCH v5 07/10] arm64: dts: imx8qm: add vpu decoder and encoder Date: Thu, 26 Jan 2023 12:08:30 +0100 Message-Id: <20230126110833.264439-8-marcel@ziswiler.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230126110833.264439-1-marcel@ziswiler.com> References: <20230126110833.264439-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:HEn1QHC1PewP+ScZapGw/H0xIYiwFoIoJyuGFSZ5ayX/ulNeo9e V2m6P6/4M2iNvM1B5FYUUU2/iEPW5mZKWzMUelhyjekEh5EkvZuLvoXYPKdhb/X+jHk9MXQ pJlMwalps56ZDUXezDN/a531Isq7rNjx0fRMS3Y5IL8MvFxr5YhjSDd1Ss7v53droKfsEaI BA83yqfEpgbYoVuHtgA/A== UI-OutboundReport: notjunk:1;M01:P0:Ca88Re7TIbw=;hJa4g8nlPecz7STyk8qEzHBRfGQ pn63Si+nDDkHQ3jkJOsHFiPSIg7HmN/zXsrfgBUqBFfW6BUVBy8G8EJs3vRM+YEeNpKdwDDm2 ntak7TIIS0jN7pm9z02RtGy9tOzHbegHcN4HpTouloqgv2pYw/5b4rdIIsLxMwhFwOYzgmNvo vVaXbAlufiFq1YDdzFvHYbIAN8YDZY4UPhQi/9JiuFafI1sKbKnoN8puJDR/wLfrpANDJsj+T pPt7sbYNlTAUD+mgsCaxmj/Iz+UdLxMG7KwRcFb47+mKaLoMzzhJvKlOObgBLxKRrBX1Kp+WI DG0u1Ry/9ZpCjL+57NYQgawyG6Mtb2npSqiQvddiefuE0dhG92UMfbd4wNBk9CfBmJPfGzNPE rWWzWGQEGHMpk9mkZPF/FUS/cPHT5bupMp+QLJGWo5rzLPOyX7Z2L4tcoi9LTW7c2tVdQSqCW yFDAnN1rowvjUVa4GlsQFnMQ+Zf2y+jJJG0c1JH1ypf1TZKPdo+UlnbxZ0MgnGKIpfp/xmuBg QTqyONndV5NBZSoeLIZbEAHlr3Q6vX3ewHwBPTYVinQRm7vB6WFZmcgn8S169hGgCyJ4y3Bpl SibxnNJKuzNvz7SSgwwZH/6XdoRMCUMNzfEikqvDNHJXqnZFypYgowpX4gVcPEuyXSCa96vfk Jt5le+k4yfwaH4I5mViovzsJ0FZuUxd/06lYYYETgQ== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Zhou Peng Enable VPU decoder and encoder functionality. Signed-off-by: Zhou Peng Signed-off-by: Marcel Ziswiler --- (no changes since v4) Changes in v4: - New patch combining the following downstream patches: commit 4f2147ce6f0e ("arm64: dts: imx8qm: add vpu decoder and encoder") commit 0c9f9b64d27d ("LF-6575: imx8q: vpu: switch to amphion upstream driver") arch/arm64/boot/dts/freescale/imx8qm.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi index 41ce8336f29e..9fff867709f0 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi @@ -23,6 +23,9 @@ aliases { serial1 = &lpuart1; serial2 = &lpuart2; serial3 = &lpuart3; + vpu_core0 = &vpu_core0; + vpu_core1 = &vpu_core1; + vpu_core2 = &vpu_core2; }; cpus { @@ -212,6 +215,7 @@ rtc: rtc { }; /* sorted in register address */ + #include "imx8-ss-vpu.dtsi" #include "imx8-ss-img.dtsi" #include "imx8-ss-dma.dtsi" #include "imx8-ss-conn.dtsi" From patchwork Thu Jan 26 11:08:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 648274 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9BD5DC54EAA for ; Thu, 26 Jan 2023 11:10:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237209AbjAZLKF (ORCPT ); Thu, 26 Jan 2023 06:10:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56382 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237175AbjAZLJ5 (ORCPT ); Thu, 26 Jan 2023 06:09:57 -0500 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B2F9E6FD01; Thu, 26 Jan 2023 03:09:37 -0800 (PST) Received: from toolbox.toradex.int ([31.10.206.125]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MMko5-1pJaoS3cND-008Z8L; Thu, 26 Jan 2023 12:09:20 +0100 From: Marcel Ziswiler To: devicetree@vger.kernel.org Cc: linux-imx@nxp.com, Liu Ying , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Marcel Ziswiler , Rob Herring , Denys Drozdov , Fabio Estevam , Frieder Schrempf , Krzysztof Kozlowski , Li Yang , Marek Vasut , Matthias Schiffer , Max Krummenacher , Peng Fan , Rob Herring , Shawn Guo , Tim Harvey Subject: [PATCH v5 08/10] dt-bindings: arm: fsl: add toradex,apalis-imx8 et al. Date: Thu, 26 Jan 2023 12:08:31 +0100 Message-Id: <20230126110833.264439-9-marcel@ziswiler.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230126110833.264439-1-marcel@ziswiler.com> References: <20230126110833.264439-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:z72gvH5gjQVTTz4A+P/SpuVzSRj0DEPuUinQ/GBCGsZGjVQ+leI JkF7njqP5Dz7QBmD8HZdJnsYagzl1EsZFLS8ggJ8+a0vKaetSdRYWFqpHMHCWNSy8pLCa0P eq18iFqztjbrb8u/42IVMFRTsin6nMLcAVAi2KIRJjnGVL+TEHxSHoqe6+WyLvIFzHsX0Ls Gssx+te5pXdxxBAw8m+sQ== UI-OutboundReport: notjunk:1;M01:P0:RIteeyZepIE=;qpTQQfr0GLZFudE2DgpWiuRswC0 OkyY43hng0StIY3VB2t9Pt+Qn7CsHEKtLBbSPAYYn6OPujdE729qj13ptVreAcKB+z/ccF/PH U0RTESW9ItCR7nsbxY9STCDZslKDdKpePmhv4VpwqbaVCjXKT746EbDQj5dPrHqwfEGJDy8LK Avh1KGC4EjLBQEQvT5mPoA3hsdrIpsP7SYqu0i7g/i2V6aulSs2ace4/k+U7PxTw758Zz+FWX bJv34MtiJOrGPEtCKFZL6OLVUF6m3aFxDfaAPmfG/f+THgka2DsJ4Oe0H+ZTR9Oq7bJU4dL7V oFXXEO20iZRo/pDFg/cEdWVOPwelBSzAgQWHhx+u4GKxc3Y34l0AB7Y3+gRppjgp2hVOAzugp r76ssFn2eNbl8j7VBggnheWjMa2o2OH/7UN+jC1SXHaceEI3Ehvwf1SwavOvuPBPQVBX8oVpg Z9qQPBvngYsRYuG9mgkHCA3HkIO54yb0rjqMQi4FrH+H5x7dDxWDtwSQZNLHjkbp2BFe06Ld2 tnfRSV+qQus6fDHPO7BfssTHg8X2Pv1F+/oLjZQi2jqrPmDiEe4JOBal+5kAa+HKIKzdZy2mz tAhMG5ieGoV1G1ViUwX5JZiJY+VbAcgB+eWZ5bx3fC+PYn68DhUv8Wha4X6aHzSdQsbXXSjik GoaUrzYqSV4waLZkoCnK0aUOGY51505QucYCKiAC8g== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler Add toradex,apalis-imx8 for the Apalis iMX8 aka QuadMax modules and the carrier boards (Apalis Evaluation board as well as Ixora V1.1 and V1.2) they may be mated in. Signed-off-by: Marcel Ziswiler Acked-by: Rob Herring --- (no changes since v3) Changes in v3: - Properly accommodate for -v1.1 modules curtsey Francesco. Changes in v2: - Fixed missing space in the comment V1.1Module curtsey Max. - Added Rob's ack. .../devicetree/bindings/arm/fsl.yaml | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 05b5276a0e14..eaebef5a71c0 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1035,6 +1035,25 @@ properties: items: - enum: - fsl,imx8qm-mek # i.MX8QM MEK Board + - toradex,apalis-imx8 # Apalis iMX8 Modules + - toradex,apalis-imx8-v1.1 # Apalis iMX8 V1.1 Modules + - const: fsl,imx8qm + + - description: i.MX8QM Boards with Toradex Apalis iMX8 Modules + items: + - enum: + - toradex,apalis-imx8-eval # Apalis iMX8 Module on Apalis Evaluation Board + - toradex,apalis-imx8-ixora-v1.1 # Apalis iMX8 Module on Ixora V1.1 Carrier Board + - const: toradex,apalis-imx8 + - const: fsl,imx8qm + + - description: i.MX8QM Boards with Toradex Apalis iMX8 V1.1 Modules + items: + - enum: + - toradex,apalis-imx8-v1.1-eval # Apalis iMX8 V1.1 Module on Apalis Eval. Board + - toradex,apalis-imx8-v1.1-ixora-v1.1 # Apalis iMX8 V1.1 Module on Ixora V1.1 C. Board + - toradex,apalis-imx8-v1.1-ixora-v1.2 # Apalis iMX8 V1.1 Module on Ixora V1.2 C. Board + - const: toradex,apalis-imx8-v1.1 - const: fsl,imx8qm - description: i.MX8QXP based Boards From patchwork Thu Jan 26 11:08:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 648273 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 73F67C61DA2 for ; Thu, 26 Jan 2023 11:10:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237170AbjAZLKX (ORCPT ); Thu, 26 Jan 2023 06:10:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57196 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237175AbjAZLKU (ORCPT ); Thu, 26 Jan 2023 06:10:20 -0500 Received: from mout.perfora.net (mout.perfora.net [74.208.4.196]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2412C62257; Thu, 26 Jan 2023 03:09:57 -0800 (PST) Received: from toolbox.toradex.int ([31.10.206.125]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MbfKV-1p4hdK0MOT-00J6hX; Thu, 26 Jan 2023 12:09:27 +0100 From: Marcel Ziswiler To: devicetree@vger.kernel.org Cc: linux-imx@nxp.com, Liu Ying , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Marcel Ziswiler , Fabio Estevam , Frieder Schrempf , Krzysztof Kozlowski , Marek Vasut , Pengutronix Kernel Team , Reinhold Mueller , Rob Herring , Sascha Hauer , Shawn Guo , Tim Harvey Subject: [PATCH v5 10/10] arm64: dts: freescale: add apalis imx8 aka quadmax carrier board support Date: Thu, 26 Jan 2023 12:08:33 +0100 Message-Id: <20230126110833.264439-11-marcel@ziswiler.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230126110833.264439-1-marcel@ziswiler.com> References: <20230126110833.264439-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:Yq3K2CvIQeJf/TW0l2pihTPia+9Bj9MzCvEgM+VEi2j4axOgHWh hp3ciMF7DCuKzr8SKl+/9j8rG66WOjjS7mY+2U0NUr+0n3rFilCAq8LB5voNN1ECAVgOX2U e+Fxqw/BBsHPCTwHGx9e0iPM+Z1Tl5i/u6kMs94FLUE46EX2n8r/JT3aMa1GU3ZviPB+2XB /JU+SNTjQnfjgaDM6bIMg== UI-OutboundReport: notjunk:1;M01:P0:zWJzg9+7RKY=;I55nMCdMMpArWLRGttffsoEbhcE Cl9+aQ05LZ3Y9lwghP3IbkBP4PcW5zb2zl+Htt6BwzdgtnHq+MSpANv+wiVAlqMn52r4w5Imz Q03pVV2MOuYBrgMCtS7VhPzmrB+5M0Kz8vDohNK+ye63qzOlxhK4PBhk2WigDv4vOmno3y+k1 A6heFwJiASMpoBSKtAc9aSYJWWTMofNpdYk98Rx79+UJmeBoSTcJNKBe/qBfUt37wk5nuApHY Jhxj39fQPWnnJBqZM8vaJ2F+c8xACPKR9ben4A9nU/fN2s7e2yzsoduNgc62k4hqle7AZ+Dq5 Tx/iXOAGoX2ozBEyYNlnW2h0Pzm2WWOQNWYVN/etc3vPOXTZrbgyX0udLaK+REdXTaAJhQvvF aragLCa4RNkYwMtighJko2SdPflC65CDAknKCbz0WgFWSsrNDUyKPt6DEvJpBlALzzKRmw3th p3Chs6yP0G8xSFs6WzfrARUh30dywiMpmtL84Z0XVLxJhMN3yvPvUAzmTqAfR8QN0GndTrYIq P61RDdPfsNbI1LRxiUsqh1zgPdyqbzDtrBfwsKs2lsaYum60hwEXdoU/fhikd1x0UFQ9NFxUn i4HIkGjEpJ6Oybval3rrchsb8ZdWhpR4NUYi5v/qkTG+XsiPcEEuKV1lJGmY3lKYwwqTRtdSt nqkw+quIc2KbCCZ88arzWt88aOPmO8wS9idautS/AA== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler The previous patch added the device tree to support Toradex Apalis iMX8 [1] aka QuadMax a computer on module which can be used on different carrier boards which this patch introduces. The module consists of an NXP i.MX 8 family SoC (either i.MX 8QuadMax or 8QuadPlus), two PF8100 PMICs, a KSZ9131 Gigabit Ethernet PHY, 2, 4 or 8 GB of LPDDR4 RAM, an eMMC, an SGTL5000 analogue audio codec, an USB3503A USB HSIC hub, an optional I2C EEPROM plus an optional Bluetooth/Wi-Fi module. Anything that is not self-contained on the module is disabled by default. The carrier board device trees contained in this patch include the module's device tree and enable the supported peripherals of the carrier board. Some level of display functionality just landed upstream but requires further integration/testing on our side. Therefore, currently only basic console UART, eMMC and Ethernet functionality work fine. As there is no i.MX 8QuadPlus device tree upstream those have been dropped. However, apart from an error message during boot about it failing to bring up the second Cortex-A72 core this boots fine on QuadPlus' as well. [1] https://www.toradex.com/computer-on-modules/apalis-arm-family/nxp-imx-8 Signed-off-by: Marcel Ziswiler --- Changes in v5: - Remove LVDS PWM support waiting for Liu's patches to land first. - Remove bkl1_pwm functionality depending on the above. - Squashing all Apalis iMX8 specific device tree patches. As outlined by Krzysztof reviewers may simply use b4 diff. Changes in v4: - Shorten subject. Changes in v3: - Only use V1.1 compatible for V1.1 module dtsi. - Split patch into separate module and carrier boards parts as suggested by Shawn. - Put reg after compatible as requested by Shawn. - Move atmel_mxt_ts and rtc_i2c into module dtsi to save such duplications as suggested by Shawn. - Change iomuxc pinctrl indent style as suggested by Shawn. - Change led node names to the preferred first form as suggested by Shawn. While at it also add color (yikes), default-state and function properties and remove the deprecated label property. - Put enable-active-high properties after the gpio ones as suggested by Shawn. Thanks! - Remove adc node's vref-supply and accompanying reg_vref_1v8 regulator node. - Rename gpio-hogs adherring to dt schema naming convention. arch/arm64/boot/dts/freescale/Makefile | 5 + .../boot/dts/freescale/imx8-apalis-eval.dtsi | 144 ++++++++++ .../dts/freescale/imx8-apalis-ixora-v1.1.dtsi | 220 ++++++++++++++ .../dts/freescale/imx8-apalis-ixora-v1.2.dtsi | 270 ++++++++++++++++++ .../boot/dts/freescale/imx8-apalis-v1.1.dtsi | 49 +++- .../boot/dts/freescale/imx8qm-apalis-eval.dts | 16 ++ .../freescale/imx8qm-apalis-ixora-v1.1.dts | 16 ++ .../dts/freescale/imx8qm-apalis-v1.1-eval.dts | 16 ++ .../imx8qm-apalis-v1.1-ixora-v1.1.dts | 16 ++ .../imx8qm-apalis-v1.1-ixora-v1.2.dts | 16 ++ 10 files changed, 760 insertions(+), 8 deletions(-) create mode 100644 arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi create mode 100644 arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi create mode 100644 arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis-eval.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis-ixora-v1.1.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-eval.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.1.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.2.dts diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index ef6f364eaa18..c0d621d1d86e 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -112,6 +112,11 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mq-pico-pi.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-thor96.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-rmb3.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-zest.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8qm-apalis-eval.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8qm-apalis-ixora-v1.1.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8qm-apalis-v1.1-eval.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8qm-apalis-v1.1-ixora-v1.1.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8qm-apalis-v1.1-ixora-v1.2.dtb dtb-$(CONFIG_ARCH_MXC) += imx8qm-mek.dtb dtb-$(CONFIG_ARCH_MXC) += imx8qxp-ai_ml.dtb dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-eval-v3.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi new file mode 100644 index 000000000000..685d4294f4f1 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi @@ -0,0 +1,144 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/ { + aliases { + rtc0 = &rtc_i2c; + rtc1 = &rtc; + }; + + reg_usb_host_vbus: regulator-usb-host-vbus { + regulator-name = "VCC USBH2(ABCD) / USBH(3|4)"; + }; +}; + +&adc0 { + status = "okay"; +}; + +&adc1 { + status = "okay"; +}; + +/* TODO: Audio Mixer */ + +/* TODO: Asynchronous Sample Rate Converter (ASRC) */ + +/* TODO: Display Controller */ + +/* TODO: DPU */ + +/* Apalis ETH1 */ +&fec1 { + status = "okay"; +}; + +/* Apalis CAN1 */ +&flexcan1 { + status = "okay"; +}; + +/* Apalis CAN2 */ +&flexcan2 { + status = "okay"; +}; + +/* TODO: GPU */ + +/* Apalis I2C1 */ +&i2c2 { + status = "okay"; + + /* M41T0M6 real time clock on carrier board */ + rtc_i2c: rtc@68 { + status = "okay"; + }; +}; + +/* Apalis I2C3 (CAM) */ +&i2c3 { + status = "okay"; +}; + +/* Apalis SPI1 */ +&lpspi0 { + status = "okay"; +}; + +/* Apalis SPI2 */ +&lpspi2 { + status = "okay"; +}; + +/* Apalis UART3 */ +&lpuart0 { + status = "okay"; +}; + +/* Apalis UART1 */ +&lpuart1 { + status = "okay"; +}; + +/* Apalis UART4 */ +&lpuart2 { + status = "okay"; +}; + +/* Apalis UART2 */ +&lpuart3 { + status = "okay"; +}; + +/* Apalis PWM3, MXM3 pin 6 */ +&lsio_pwm0 { + status = "okay"; +}; + +/* Apalis PWM4, MXM3 pin 8 */ +&lsio_pwm1 { + status = "okay"; +}; + +/* Apalis PWM1, MXM3 pin 2 */ +&lsio_pwm2 { + status = "okay"; +}; + +/* Apalis PWM2, MXM3 pin 4 */ +&lsio_pwm3 { + status = "okay"; +}; + +/* TODO: Apalis PCIE1 */ + +/* TODO: Apalis BKL1_PWM */ + +/* TODO: Apalis DAP1 */ + +/* TODO: Apalis Analogue Audio */ + +/* TODO: Apalis SATA1 */ + +/* TODO: Apalis SPDIF1 */ + +/* TODO: Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC Hub */ + +/* Apalis USBO1 */ +&usbotg1 { + status = "okay"; +}; + +/* TODO: Apalis USBH4 SuperSpeed */ + +/* Apalis MMC1 */ +&usdhc2 { + status = "okay"; +}; + +/* Apalis SD1 */ +&usdhc3 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi new file mode 100644 index 000000000000..987dcaa43343 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi @@ -0,0 +1,220 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +#include + +/ { + aliases { + rtc0 = &rtc_i2c; + rtc1 = &rtc; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_leds_ixora>; + + /* LED_4_GREEN / MXM3_188 */ + led-1 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&lsio_gpio5 27 GPIO_ACTIVE_HIGH>; + }; + + /* LED_4_RED / MXM3_178 */ + led-2 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&lsio_gpio5 29 GPIO_ACTIVE_HIGH>; + }; + + /* LED_5_GREEN / MXM3_152 */ + led-3 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&lsio_gpio5 20 GPIO_ACTIVE_HIGH>; + }; + + /* LED_5_RED / MXM3_156 */ + led-4 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&lsio_gpio5 21 GPIO_ACTIVE_HIGH>; + }; + }; + + reg_usb_host_vbus: regulator-usb-host-vbus { + regulator-name = "VCC_USBH(2|4)"; + }; +}; + +&adc0 { + status = "okay"; +}; + +&adc1 { + status = "okay"; +}; + +/* TODO: Audio Mixer */ + +/* TODO: Asynchronous Sample Rate Converter (ASRC) */ + +/* TODO: Display Controller */ + +/* TODO: DPU */ + +/* Apalis ETH1 */ +&fec1 { + status = "okay"; +}; + +/* Apalis CAN1 */ +&flexcan1 { + status = "okay"; +}; + +/* Apalis CAN2 */ +&flexcan2 { + status = "okay"; +}; + +/* TODO: GPU */ + +/* Apalis I2C1 */ +&i2c2 { + status = "okay"; + + /* M41T0M6 real time clock on carrier board */ + rtc_i2c: rtc@68 { + status = "okay"; + }; +}; + +/* Apalis I2C3 (CAM) */ +&i2c3 { + status = "okay"; +}; + +&iomuxc { + pinctrl-0 = <&pinctrl_cam1_gpios>, <&pinctrl_dap1_gpios>, + <&pinctrl_esai0_gpios>, <&pinctrl_fec2_gpios>, + <&pinctrl_gpio3>, <&pinctrl_gpio4>, <&pinctrl_gpio_usbh_oc_n>, + <&pinctrl_lpuart1ctrl>, <&pinctrl_lvds0_i2c0_gpio>, + <&pinctrl_lvds1_i2c0_gpios>, <&pinctrl_mipi_dsi_0_1_en>, + <&pinctrl_mipi_dsi1_gpios>, <&pinctrl_mlb_gpios>, + <&pinctrl_qspi1a_gpios>, <&pinctrl_sata1_act>, + <&pinctrl_sim0_gpios>, <&pinctrl_uart24_forceoff>, + <&pinctrl_usdhc1_gpios>; + + pinctrl_leds_ixora: ledsixoragrp { + fsl,pins = , /* LED_4_GREEN */ + , /* LED_4_RED */ + , /* LED_5_GREEN */ + ; /* LED_5_RED */ + }; + + pinctrl_uart24_forceoff: uart24forceoffgrp { + fsl,pins = ; + }; +}; + +/* Apalis SPI1 */ +&lpspi0 { + status = "okay"; +}; + +/* Apalis SPI2 */ +&lpspi2 { + status = "okay"; +}; + +/* Apalis UART3 */ +&lpuart0 { + status = "okay"; +}; + +/* Apalis UART1 */ +&lpuart1 { + status = "okay"; +}; + +/* Apalis UART4 */ +&lpuart2 { + status = "okay"; +}; + +/* Apalis UART2 */ +&lpuart3 { + status = "okay"; +}; + +&lsio_gpio5 { + ngpios = <32>; + gpio-line-names = "gpio5-00", "gpio5-01", "gpio5-02", "gpio5-03", + "gpio5-04", "gpio5-05", "gpio5-06", "gpio5-07", + "gpio5-08", "gpio5-09", "gpio5-10", "gpio5-11", + "gpio5-12", "gpio5-13", "gpio5-14", "gpio5-15", + "gpio5-16", "gpio5-17", "gpio5-18", "gpio5-19", + "LED-5-GREEN", "LED-5-RED", "gpio5-22", "gpio5-23", + "gpio5-24", "UART24-FORCEOFF", "gpio5-26", + "LED-4-GREEN", "gpio5-28", "LED-4-RED", "gpio5-30", + "gpio5-31"; +}; + +/* Apalis PWM3, MXM3 pin 6 */ +&lsio_pwm0 { + status = "okay"; +}; + +/* Apalis PWM4, MXM3 pin 8 */ +&lsio_pwm1 { + status = "okay"; +}; + +/* Apalis PWM1, MXM3 pin 2 */ +&lsio_pwm2 { + status = "okay"; +}; + +/* Apalis PWM2, MXM3 pin 4 */ +&lsio_pwm3 { + status = "okay"; +}; + +/* TODO: Apalis PCIE1 */ + +/* TODO: Apalis BKL1_PWM */ + +/* TODO: Apalis DAP1 */ + +/* TODO: Analogue Audio */ + +/* TODO: Apalis SATA1 */ + +/* TODO: Apalis SPDIF1 */ + +/* TODO: Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC Hub */ + +/* Apalis USBO1 */ +&usbotg1 { + status = "okay"; +}; + +/* TODO: Apalis USBH4 SuperSpeed */ + +/* Apalis MMC1 */ +&usdhc2 { + bus-width = <4>; + pinctrl-0 = <&pinctrl_usdhc2_4bit>, <&pinctrl_mmc1_cd>; + pinctrl-1 = <&pinctrl_usdhc2_4bit_100mhz>, <&pinctrl_mmc1_cd>; + pinctrl-2 = <&pinctrl_usdhc2_4bit_200mhz>, <&pinctrl_mmc1_cd>; + pinctrl-3 = <&pinctrl_usdhc2_4bit_sleep>, <&pinctrl_mmc1_cd_sleep>; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi new file mode 100644 index 000000000000..e39ee4970816 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi @@ -0,0 +1,270 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +#include + +/ { + aliases { + rtc0 = &rtc_i2c; + rtc1 = &rtc; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_leds_ixora>; + + /* LED_4_GREEN / MXM3_188 */ + led-1 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&lsio_gpio5 27 GPIO_ACTIVE_HIGH>; + }; + + /* LED_4_RED / MXM3_178 */ + led-2 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&lsio_gpio5 29 GPIO_ACTIVE_HIGH>; + }; + + /* LED_5_GREEN / MXM3_152 */ + led-3 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&lsio_gpio5 20 GPIO_ACTIVE_HIGH>; + }; + + /* LED_5_RED / MXM3_156 */ + led-4 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&lsio_gpio5 21 GPIO_ACTIVE_HIGH>; + }; + }; + + reg_3v3_vmmc: regulator-3v3-vmmc { + compatible = "regulator-fixed"; + /* MMC1_PWR_CTRL */ + gpio = <&lsio_gpio5 19 GPIO_ACTIVE_HIGH>; + enable-active-high; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enable_3v3_vmmc>; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "3v3_vmmc"; + }; + + reg_can1_supply: regulator-can1-supply { + compatible = "regulator-fixed"; + gpio = <&lsio_gpio5 22 GPIO_ACTIVE_HIGH>; + enable-active-high; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enable_can1_power>; + regulator-name = "can1_supply"; + }; + + reg_can2_supply: regulator-can2-supply { + compatible = "regulator-fixed"; + gpio = <&lsio_gpio2 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sata1_act>; + regulator-name = "can2_supply"; + }; + + reg_usb_host_vbus: regulator-usb-host-vbus { + regulator-name = "VCC_USBH(2|4)"; + }; +}; + +&adc0 { + status = "okay"; +}; + +&adc1 { + status = "okay"; +}; + +/* TODO: Audio Mixer */ + +/* TODO: Asynchronous Sample Rate Converter (ASRC) */ + +/* TODO: Display Controller */ + +/* TODO: DPU */ + +/* Apalis ETH1 */ +&fec1 { + status = "okay"; +}; + +/* Apalis CAN1 */ +&flexcan1 { + xceiver-supply = <®_can1_supply>; + status = "okay"; +}; + +/* Apalis CAN2 */ +&flexcan2 { + xceiver-supply = <®_can2_supply>; + status = "okay"; +}; + +/* TODO: GPU */ + +/* Apalis I2C1 */ +&i2c2 { + status = "okay"; + + eeprom: eeprom@50 { + compatible = "atmel,24c02"; + pagesize = <16>; + reg = <0x50>; + }; + + /* M41T0M6 real time clock on carrier board */ + rtc_i2c: rtc@68 { + status = "okay"; + }; +}; + +/* Apalis I2C3 (CAM) */ +&i2c3 { + status = "okay"; +}; + +&iomuxc { + pinctrl-0 = <&pinctrl_cam1_gpios>, <&pinctrl_dap1_gpios>, + <&pinctrl_esai0_gpios>, <&pinctrl_fec2_gpios>, + <&pinctrl_gpio3>, <&pinctrl_gpio4>, <&pinctrl_gpio_usbh_oc_n>, + <&pinctrl_lpuart1ctrl>, <&pinctrl_lvds0_i2c0_gpio>, + <&pinctrl_lvds1_i2c0_gpios>, <&pinctrl_mipi_dsi_0_1_en>, + <&pinctrl_mipi_dsi1_gpios>, <&pinctrl_mlb_gpios>, + <&pinctrl_qspi1a_gpios>, <&pinctrl_sim0_gpios>, + <&pinctrl_uart24_forceoff>, <&pinctrl_usdhc1_gpios>; + + /* PMIC MMC1 power-switch */ + pinctrl_enable_3v3_vmmc: enable3v3vmmcgrp { + fsl,pins = ; /* MXM3_148, PMIC */ + }; + + /* FlexCAN PMIC */ + pinctrl_enable_can1_power: enablecan1powergrp { + fsl,pins = ; /* MXM3_158, PMIC */ + }; + + pinctrl_leds_ixora: ledsixoragrp { + fsl,pins = , /* LED_4_GREEN */ + , /* LED_4_RED */ + , /* LED_5_GREEN */ + ; /* LED_5_RED */ + }; + + pinctrl_uart24_forceoff: uart24forceoffgrp { + fsl,pins = ; + }; +}; + +/* Apalis SPI1 */ +&lpspi0 { + status = "okay"; +}; + +/* Apalis SPI2 */ +&lpspi2 { + status = "okay"; +}; + +/* Apalis UART3 */ +&lpuart0 { + status = "okay"; +}; + +/* Apalis UART1 */ +&lpuart1 { + status = "okay"; +}; + +/* Apalis UART4 */ +&lpuart2 { + status = "okay"; +}; + +/* Apalis UART2 */ +&lpuart3 { + status = "okay"; +}; + +&lsio_gpio5 { + ngpios = <32>; + gpio-line-names = "gpio5-00", "gpio5-01", "gpio5-02", "gpio5-03", + "gpio5-04", "gpio5-05", "gpio5-06", "gpio5-07", + "gpio5-08", "gpio5-09", "gpio5-10", "gpio5-11", + "gpio5-12", "gpio5-13", "gpio5-14", "gpio5-15", + "gpio5-16", "gpio5-17", "gpio5-18", "gpio5-19", + "LED-5-GREEN", "LED-5-RED", "gpio5-22", "gpio5-23", + "gpio5-24", "UART24-FORCEOFF", "gpio5-26", + "LED-4-GREEN", "gpio5-28", "LED-4-RED", "gpio5-30", + "gpio5-31"; +}; + +/* Apalis PWM3, MXM3 pin 6 */ +&lsio_pwm0 { + status = "okay"; +}; + +/* Apalis PWM4, MXM3 pin 8 */ +&lsio_pwm1 { + status = "okay"; +}; + +/* Apalis PWM1, MXM3 pin 2 */ +&lsio_pwm2 { + status = "okay"; +}; + +/* Apalis PWM2, MXM3 pin 4 */ +&lsio_pwm3 { + status = "okay"; +}; + +/* TODO: Apalis PCIE1 */ + +/* TODO: Apalis BKL1_PWM */ + +/* TODO: Apalis DAP1 */ + +/* TODO: Analogue Audio */ + +/* TODO: Apalis SATA1 */ + +/* TODO: Apalis SPDIF1 */ + +/* TODO: Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC Hub */ + +/* Apalis USBO1 */ +&usbotg1 { + status = "okay"; +}; + +/* TODO: Apalis USBH4 SuperSpeed */ + +/* Apalis MMC1 */ +&usdhc2 { + bus-width = <4>; + cap-power-off-card; + /delete-property/ no-1-8-v; + pinctrl-0 = <&pinctrl_usdhc2_4bit>, <&pinctrl_mmc1_cd>; + pinctrl-1 = <&pinctrl_usdhc2_4bit_100mhz>, <&pinctrl_mmc1_cd>; + pinctrl-2 = <&pinctrl_usdhc2_4bit_200mhz>, <&pinctrl_mmc1_cd>; + pinctrl-3 = <&pinctrl_usdhc2_4bit_sleep>, <&pinctrl_mmc1_cd_sleep>; + vmmc-supply = <®_3v3_vmmc>; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi index 3960ef30464e..1bac737c556d 100644 --- a/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi @@ -133,17 +133,17 @@ reserved-memory { #size-cells = <2>; ranges; - decoder_boot: decoder_boot@84000000 { + decoder_boot: decoder-boot@84000000 { no-map; reg = <0 0x84000000 0 0x2000000>; }; - encoder1_boot: encoder1_boot@86000000 { + encoder1_boot: encoder1-boot@86000000 { no-map; reg = <0 0x86000000 0 0x200000>; }; - encoder2_boot: encoder2_boot@86200000 { + encoder2_boot: encoder2-boot@86200000 { no-map; reg = <0 0x86200000 0 0x200000>; }; @@ -170,7 +170,7 @@ vdevbuffer: vdevbuffer@90400000 { no-map; }; - decoder_rpc: decoder_rpc@92000000 { + decoder_rpc: decoder-rpc@92000000 { no-map; reg = <0 0x92000000 0 0x200000>; }; @@ -180,12 +180,12 @@ dsp_reserved: dsp@92400000 { reg = <0 0x92400000 0 0x2000000>; }; - encoder1_rpc: encoder1_rpc@94400000 { + encoder1_rpc: encoder1-rpc@94400000 { no-map; reg = <0 0x94400000 0 0x700000>; }; - encoder2_rpc: encoder2_rpc@94b00000 { + encoder2_rpc: encoder2-rpc@94b00000 { no-map; reg = <0 0x94b00000 0 0x700000>; }; @@ -684,7 +684,18 @@ &lsio_pwm3 { #pwm-cells = <3>; }; -/* TODO: Messaging Units */ +/* Messaging Units */ +&mu_m0{ + status = "okay"; +}; + +&mu1_m0{ + status = "okay"; +}; + +&mu2_m0{ + status = "okay"; +}; /* TODO: Apalis PCIE1 */ @@ -765,7 +776,29 @@ &usdhc3 { pinctrl-2 = <&pinctrl_usdhc3_200mhz>, <&pinctrl_sd1_cd>; }; -/* TODO: Video Processing Unit (driver upstream but device tree part missing) */ +/* Video Processing Unit */ +&vpu { + compatible = "nxp,imx8qm-vpu"; + status = "okay"; +}; + +&vpu_core0 { + memory-region = <&decoder_boot>, <&decoder_rpc>; + reg = <0x2d080000 0x10000>; + status = "okay"; +}; + +&vpu_core1 { + memory-region = <&encoder1_boot>, <&encoder1_rpc>; + reg = <0x2d090000 0x10000>; + status = "okay"; +}; + +&vpu_core2 { + memory-region = <&encoder2_boot>, <&encoder2_rpc>; + reg = <0x2d0a0000 0x10000>; + status = "okay"; +}; &iomuxc { pinctrl-names = "default"; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-eval.dts b/arch/arm64/boot/dts/freescale/imx8qm-apalis-eval.dts new file mode 100644 index 000000000000..5ab0921eb599 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-eval.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx8qm-apalis.dtsi" +#include "imx8-apalis-eval.dtsi" + +/ { + model = "Toradex Apalis iMX8QM/QP on Apalis Evaluation Board"; + compatible = "toradex,apalis-imx8-eval", + "toradex,apalis-imx8", + "fsl,imx8qm"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-ixora-v1.1.dts b/arch/arm64/boot/dts/freescale/imx8qm-apalis-ixora-v1.1.dts new file mode 100644 index 000000000000..68ce58dc7102 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-ixora-v1.1.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx8qm-apalis.dtsi" +#include "imx8-apalis-ixora-v1.1.dtsi" + +/ { + model = "Toradex Apalis iMX8QM/QP on Apalis Ixora V1.1 Carrier Board"; + compatible = "toradex,apalis-imx8-ixora-v1.1", + "toradex,apalis-imx8", + "fsl,imx8qm"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-eval.dts b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-eval.dts new file mode 100644 index 000000000000..c8ff75831556 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-eval.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx8qm-apalis-v1.1.dtsi" +#include "imx8-apalis-eval.dtsi" + +/ { + model = "Toradex Apalis iMX8QM V1.1 on Apalis Evaluation Board"; + compatible = "toradex,apalis-imx8-v1.1-eval", + "toradex,apalis-imx8-v1.1", + "fsl,imx8qm"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.1.dts b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.1.dts new file mode 100644 index 000000000000..ad7f644968fa --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.1.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx8qm-apalis-v1.1.dtsi" +#include "imx8-apalis-ixora-v1.1.dtsi" + +/ { + model = "Toradex Apalis iMX8QM V1.1 on Apalis Ixora V1.1 Carrier Board"; + compatible = "toradex,apalis-imx8-v1.1-ixora-v1.1", + "toradex,apalis-imx8-v1.1", + "fsl,imx8qm"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.2.dts b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.2.dts new file mode 100644 index 000000000000..3b2e8c93b846 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.2.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx8qm-apalis-v1.1.dtsi" +#include "imx8-apalis-ixora-v1.2.dtsi" + +/ { + model = "Toradex Apalis iMX8QM V1.1 on Apalis Ixora V1.2 Carrier Board"; + compatible = "toradex,apalis-imx8-v1.1-ixora-v1.2", + "toradex,apalis-imx8-v1.1", + "fsl,imx8qm"; +};