From patchwork Thu Feb 2 15:32:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 649803 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 89AFCC61DA4 for ; Thu, 2 Feb 2023 15:46:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232625AbjBBPql (ORCPT ); Thu, 2 Feb 2023 10:46:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46260 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232676AbjBBPqj (ORCPT ); Thu, 2 Feb 2023 10:46:39 -0500 Received: from mout.perfora.net (mout.perfora.net [74.208.4.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 606E479F10; Thu, 2 Feb 2023 07:46:11 -0800 (PST) Received: from toolbox.int.toradex.com ([213.55.225.17]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0M39aj-1oWry30hGx-00sz0K; Thu, 02 Feb 2023 16:32:40 +0100 From: Marcel Ziswiler To: devicetree@vger.kernel.org Cc: Liu Ying , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , linux-imx@nxp.com, Philippe Schenker , Max Krummenacher , Marcel Ziswiler , Fabio Estevam , Frank Li , Krzysztof Kozlowski , Peng Fan , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo Subject: [PATCH v6 01/10] arm64: dts: freescale: imx8-ss-lsio: add support for lsio_pwm0-3 Date: Thu, 2 Feb 2023 16:32:11 +0100 Message-Id: <20230202153221.197308-2-marcel@ziswiler.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230202153221.197308-1-marcel@ziswiler.com> References: <20230202153221.197308-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:/3RJuaQoBjtUwUKz+nDD7+GE854EU7GBR4gjXNFi5ueDkOxctzS gmucpCYqGteiDZ/WaeBabBzOV3wSQyLPMxf8+lcnWETWqz9i8M6C1UhAp0x35T6XEXy3CoC 7j47iwnpzoM1QJ5sBdLtDlBE08KPHy6OR4XglMbwl6AElKaNez91O/5bQjQOKm9gTbGF4c3 sWeg6Npq0u87jFJBD+0sw== UI-OutboundReport: notjunk:1;M01:P0:3c4bqiPX7JA=;mgGcMe3YmPJRxnY+ep6bEPyxWzj FNmTG5c9rXyiilXzcJYuJOvQDtiktvC0pMBXUwvl2X8auLPBth2WbOuT3jzEicMf7qPBLxBlj oB9lNYfkuqNIUgi7meOJeulsaHZx+m530S4lDlMiS/FVG4XnWGL2HWWoQ/WfInJrF7GL2HTBc FstF3WjgZeUh34H9hBwHHpPoA/DvNkqtyPsGOoPDGQHVAqxblKVXufu7ASayBH0NJLLCWfCkT QSX2KBuNUOlKS8MgXDeyGDKIynPG5GDnesucf/FXJeOnJYLmPV2Co6cinsKqIvA8/NYjK5k1x JMWo77O+EAf8Wg2g2w1JHSxl3Mt6S+p/7dpmT5lMJghlSTcgIRXwqvQD5MpdJCs0F3HgyYJsM ImzoJfFP1nEr8yavmlKZ+WQ71CAQGkxRrhlhTWxTeO+IkDkDbf/W8jqw1wXfaF2zUXOXXVwEB kxbzaPxmkdB4ByD9oLZJAEXbMXsoS0TNS2joezUayvNKXhIPiLET/xMpWviawl5KlgAL2cekt ypvZes83rR9rQQmUb6oTFymlW7ccujZ4i8aJGmm9udMnUcRh4KS+GFKLfIMzHCFfYN1YU2Evf CZjOobhVc/a9j2IIEGUhqLNs5chL0PcZWDVmWPp+d8UrkTAZY/duPId8jMJiDd9ZzDyCa2sml NBvKo25gJIFDWm9P2kEKn5oQtGOgTlgz6ICTzXVdGw== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Philippe Schenker Add support for lsio_pwm0-3. Signed-off-by: Philippe Schenker Signed-off-by: Max Krummenacher Signed-off-by: Marcel Ziswiler --- (no changes since v1) .../boot/dts/freescale/imx8-ss-lsio.dtsi | 48 +++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi index 1f3d225e64ec..62b7f7a3e1bc 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi @@ -28,6 +28,54 @@ lsio_bus_clk: clock-lsio-bus { clock-output-names = "lsio_bus_clk"; }; + lsio_pwm0: pwm@5d000000 { + compatible = "fsl,imx27-pwm"; + reg = <0x5d000000 0x10000>; + clock-names = "ipg", "per"; + clocks = <&pwm0_lpcg 4>, + <&pwm0_lpcg 1>; + assigned-clocks = <&clk IMX_SC_R_PWM_0 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <24000000>; + #pwm-cells = <2>; + status = "disabled"; + }; + + lsio_pwm1: pwm@5d010000 { + compatible = "fsl,imx27-pwm"; + reg = <0x5d010000 0x10000>; + clock-names = "ipg", "per"; + clocks = <&pwm1_lpcg 4>, + <&pwm1_lpcg 1>; + assigned-clocks = <&clk IMX_SC_R_PWM_1 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <24000000>; + #pwm-cells = <2>; + status = "disabled"; + }; + + lsio_pwm2: pwm@5d020000 { + compatible = "fsl,imx27-pwm"; + reg = <0x5d020000 0x10000>; + clock-names = "ipg", "per"; + clocks = <&pwm2_lpcg 4>, + <&pwm2_lpcg 1>; + assigned-clocks = <&clk IMX_SC_R_PWM_2 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <24000000>; + #pwm-cells = <2>; + status = "disabled"; + }; + + lsio_pwm3: pwm@5d030000 { + compatible = "fsl,imx27-pwm"; + reg = <0x5d030000 0x10000>; + clock-names = "ipg", "per"; + clocks = <&pwm3_lpcg 4>, + <&pwm3_lpcg 1>; + assigned-clocks = <&clk IMX_SC_R_PWM_3 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <24000000>; + #pwm-cells = <2>; + status = "disabled"; + }; + lsio_gpio0: gpio@5d080000 { reg = <0x5d080000 0x10000>; interrupts = ; From patchwork Thu Feb 2 15:32:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 649802 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D1E7C05027 for ; Thu, 2 Feb 2023 15:47:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232735AbjBBPrn (ORCPT ); Thu, 2 Feb 2023 10:47:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47790 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232940AbjBBPrh (ORCPT ); Thu, 2 Feb 2023 10:47:37 -0500 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8BAED7D92; Thu, 2 Feb 2023 07:47:16 -0800 (PST) Received: from toolbox.int.toradex.com ([213.55.225.17]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0LsjTb-1ocy6N1e5R-012IwY; Thu, 02 Feb 2023 16:32:51 +0100 From: Marcel Ziswiler To: devicetree@vger.kernel.org Cc: Liu Ying , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , linux-imx@nxp.com, Philippe Schenker , Max Krummenacher , Marcel Ziswiler , Fabio Estevam , Frank Li , Joakim Zhang , Krzysztof Kozlowski , Peng Fan , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo Subject: [PATCH v6 03/10] arm64: dts: freescale: imx8-ss-dma: set lpspi0 max frequency to 60mhz Date: Thu, 2 Feb 2023 16:32:13 +0100 Message-Id: <20230202153221.197308-4-marcel@ziswiler.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230202153221.197308-1-marcel@ziswiler.com> References: <20230202153221.197308-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:UEju7fpsrTFCYj/8VIuncvaN6WJgPchFyUe0AeEBoPpES/rU9NN 2mLB+TSqZ7Q/sytfmGqB2oaZlDVE0Afwhb2GEYKCZfwhUZCPdsa8yoPP8fTtZ02L/9Vpqd6 Sl6hv9RWuERo9jpLFPuPKmmwmwhWU8JkFzmGLhR3ljj2I8YWq5ldGi4FC3ATd/vfZVy+mcf LJyse0Qaow0UjbX7gbW3w== UI-OutboundReport: notjunk:1;M01:P0:J60Ozqt3xtU=;Ko2EJeFAQ/jFqxkl88lDVbzuHRm n9x3y/oHvaHF70L8waypqWcXnskgdVg0pH9hscBxiHlQCQEIWwalcy8a9+wET+vExSFwATiJb zK4DP+oey0xUGLYPBY7lfIBPyIwiVfQTdpEjizDeGlaDYC3Rx8iwTHaGf6vSrAt/VVjQKRxbG hIxyNoY3xDRrCvSw8ycdCo9OIakNWxjECWKLbA6Yn1ainQupf4PpQ6ed8Vth2ZXiYjmoQ3LqK hIMvANkTcEvfI6QaV8c6dw29SDdQk6hNWFcv3D/78zl9qd6Ps9zLGgcw9wRoLy9dWKDQLopqA 5QpAXDbb3/ZB4UWQfiQNCb50g9qzc+yUra+lBYbrMm/ThQAlHimDraFK4dsGJKg0EfeAhj1DU XHhGAhblFRcK/q0lrbQRXQnJgPxdP74aFSDyDWCxFCj+C2HclKMhFNo+zQALrRZOGrRAUtadm 73XX569YPh4OU4DWhLh9UA1W8H9EEdUtMmowX/K+GVPPtbN047f8cBqbfXbYOdk19RVK34jPv cy1Gx8ePymD148QCWyXvyWZ47QWwu75IbH7gXYcpCjc9lGrshyjkeGw9BmLuK7eSr386XjB5T jFgv3JuaYCLzg2hLQwrIZIoTzbAKAghX+q9iqi6pAUekPdEw3DPg7+B1E9CaTPAJR/i/cwFNY zxbXGpqxNrgig86BU8GNX2kmWXRp7ZichZsRWxinZw== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Philippe Schenker 60MHz is the maximum frequency mentioned in the datasheet for master mode. Set that to 60MHz to match lpspi2. Signed-off-by: Philippe Schenker Signed-off-by: Max Krummenacher Signed-off-by: Marcel Ziswiler --- (no changes since v1) arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi index 6e5ef8b69bf8..6ccf926b77a5 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi @@ -31,7 +31,7 @@ lpspi0: spi@5a000000 { <&spi0_lpcg 1>; clock-names = "per", "ipg"; assigned-clocks = <&clk IMX_SC_R_SPI_0 IMX_SC_PM_CLK_PER>; - assigned-clock-rates = <20000000>; + assigned-clock-rates = <60000000>; power-domains = <&pd IMX_SC_R_SPI_0>; status = "disabled"; }; From patchwork Thu Feb 2 15:32:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 649805 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CD9ABC64EC4 for ; Thu, 2 Feb 2023 15:35:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232142AbjBBPf1 (ORCPT ); Thu, 2 Feb 2023 10:35:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51324 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233389AbjBBPfG (ORCPT ); Thu, 2 Feb 2023 10:35:06 -0500 Received: from mout.perfora.net (mout.perfora.net [74.208.4.196]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AA8C159C9; Thu, 2 Feb 2023 07:34:30 -0800 (PST) Received: from toolbox.int.toradex.com ([213.55.225.17]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MLePl-1pMmEX4707-000sNo; Thu, 02 Feb 2023 16:32:55 +0100 From: Marcel Ziswiler To: devicetree@vger.kernel.org Cc: Liu Ying , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , linux-imx@nxp.com, Clark Wang , Frank Li , Marcel Ziswiler , Fabio Estevam , Ming Qian , Pengutronix Kernel Team , Sascha Hauer , Shawn Guo , Zhou Peng Subject: [PATCH v6 04/10] firmware: imx: scu-pd: add missed lvds lpi2c and pwm power domains Date: Thu, 2 Feb 2023 16:32:14 +0100 Message-Id: <20230202153221.197308-5-marcel@ziswiler.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230202153221.197308-1-marcel@ziswiler.com> References: <20230202153221.197308-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:1CcnIaTwaybvRBD0M5isTZGbqmZi3GT97hDI0lh2cMExvulL/Ky lGZ5PW0zkH+XQJS+C2WD+SXp4OLpj+RezI2AtEjPfPL2w95Ktp1sEhJ6UmDBfBtfd9d1/sJ V68pQ6WCJrlX63Nfs5pGP9EGij8SrfcOWkg3HAyFXKYbHteEqbXuWXuHIRfMUmFcIN2/T1f ZYUUVPsFZSgPeAFrzscPw== UI-OutboundReport: notjunk:1;M01:P0:im/G66r0JOg=;g1erqgTWReHSh/vNsr4ZBuAyylv 0CrvmKlozmKYeJ8c1hQF+/1Dqyh+R5bVK6bOdHPNVSSBd8zUDf/a2TQ3lSC6jlLEaBNn+yK7u m3HejQGhsFE3r9/fT2cnajwZVYQwMvbs+nCyV25zPRlc6ZuNmTPNL0L/6vdtjGuCzZTTMK9Hv ntlGAE9eaYG8wdBlnGVUpjAOy8adYcOoUnnHVSgFstmycbnPNyasZ+efMndOiSdocEl/oLZTv /Dujd0ogpL7rKuVDXlheE7Dg0aLMOlQ754Ti1XviMOWQGELeGPxebdSSwgXRtTLyoXzsBLBGV izLwkmJnGTzNJt3uEy8NMV5dKGDpphJL+7apWGLTMZXLzQvvsKMzhdlkkBqe4Pdf/TIDtvY72 EWFVEy03e96q9TbJgwLrEWUD23IKDjsjYWLDOPxrBgmDXGO9N9DD1N1rTIRIeFeY8gKIKpx+j ZR9U1ODfW8BufBSv3+14mVjlvwfmtIM4H4xYpWCxGk6o9HVfhmZ1kv2pdZHx0l5KskscdLToU YDuTHgp1fYGe3Gu/nY7yYyfdXYzEKfm1koPa3Bph0o0HUXsPRetPTIX2hJWn+hZKQIGTR376K jdJQ00TaNFhTyTuKe5AsQ5J7InSeDExH8MtZyWAc4r3PutcojK9jQPqH8QEzTwuFvBc9JKEfL VH90xREpEm45l14wCdDWt+FRG0oDhX3BlV0UqtPUDw== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Clark Wang LVDS' lpi2c and pwm power domains definitions are missed. Add them here. Signed-off-by: Clark Wang Reviewed-by: Frank Li Signed-off-by: Marcel Ziswiler --- (no changes since v4) Changes in v4: - New patch inspired by the following downstream patch: commit 0c36c5b63c1e ("LF-3569-1 firmware: imx: scu-pd: add missed lvds lpi2c and pwm power domains") Avoiding the following being reported upon boot: [ 1.309776] lvds0_pwm0_clk: failed to attached the power domain -2 [ 1.334097] lvds1_pwm0_clk: failed to attached the power domain -2 ... [ 15.281767] platform 57244000.pwm: deferred probe pending ... [ 15.292630] platform backlight: deferred probe pending drivers/firmware/imx/scu-pd.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/firmware/imx/scu-pd.c b/drivers/firmware/imx/scu-pd.c index 2a4f07423365..84b673427073 100644 --- a/drivers/firmware/imx/scu-pd.c +++ b/drivers/firmware/imx/scu-pd.c @@ -180,7 +180,11 @@ static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = { /* LVDS SS */ { "lvds0", IMX_SC_R_LVDS_0, 1, false, 0 }, + { "lvds0-pwm", IMX_SC_R_LVDS_0_PWM_0, 1, false, 0 }, + { "lvds0-lpi2c", IMX_SC_R_LVDS_0_I2C_0, 2, true, 0 }, { "lvds1", IMX_SC_R_LVDS_1, 1, false, 0 }, + { "lvds1-pwm", IMX_SC_R_LVDS_1_PWM_0, 1, false, 0 }, + { "lvds1-lpi2c", IMX_SC_R_LVDS_1_I2C_0, 2, true, 0 }, /* DC SS */ { "dc0", IMX_SC_R_DC_0, 1, false, 0 }, From patchwork Thu Feb 2 15:32:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 649804 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65A50C05027 for ; Thu, 2 Feb 2023 15:40:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231339AbjBBPkB (ORCPT ); Thu, 2 Feb 2023 10:40:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35750 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232940AbjBBPjo (ORCPT ); Thu, 2 Feb 2023 10:39:44 -0500 Received: from mout.perfora.net (mout.perfora.net [74.208.4.196]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B46F323C7D; Thu, 2 Feb 2023 07:39:22 -0800 (PST) Received: from toolbox.int.toradex.com ([213.55.225.17]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MEovc-1pPHKo0GjK-00FxTh; Thu, 02 Feb 2023 16:33:00 +0100 From: Marcel Ziswiler To: devicetree@vger.kernel.org Cc: Liu Ying , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , linux-imx@nxp.com, Joakim Zhang , Marcel Ziswiler , Alexander Stein , Fabio Estevam , Frank Li , Krzysztof Kozlowski , Max Krummenacher , Peng Fan , Pengutronix Kernel Team , Philippe Schenker , Rob Herring , Sascha Hauer , Shawn Guo Subject: [PATCH v6 05/10] arm64: dts: imx8qxp: add flexcan in adma Date: Thu, 2 Feb 2023 16:32:15 +0100 Message-Id: <20230202153221.197308-6-marcel@ziswiler.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230202153221.197308-1-marcel@ziswiler.com> References: <20230202153221.197308-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:hVpPGSSdqpj7zPNz82c0jzvaidawDWXxruHfRDfxUAbPCFzD5yl dTUapQCqAOifspwfwoNrG9UhQlWgzMNN+1rUADisFDW/8Jd9wNKmGvhzJR2HtKvn+YLIGD4 9nyN5ItlE2iv+PAweoApThnnpZzJb8Er/98SazV67ruIL2RvNwxFlWJevpKV1WXwD4cR2d8 FK/zzW3srVCAj/MrdrIYA== UI-OutboundReport: notjunk:1;M01:P0:W44o0CjZzCk=;nHA9RDqEMsxlHnZ6Wi4VXC0Iczl SMdvdiVpFSLs/yCbW+nTlIb0eHX+R/8oVN5cNQT+prsMnzOfbJBAruROjIkaCNxWfHSIkg4UN WOM5mu0nFTtergoM902Z6jzjSZnqTGPzlhiSRl1uebnylG45+b9GiBtYyikrpAWns92LYXZBP bDFGoehz+ymOXSH6SQl5x5PKSc4wsqKcThNMLEqTFbqgfivPLAmRvT9VKvNX497tqXn1i4DJF I+PsCzir+55v9S0PA1onomYNsLPxh+B2rqvaZD0oZLitN+RJBpFVQFEbSKmN0Fr8YfL14NcXL kflMZ2VhFgou0qRtQVOclBqwTBUxW1rn8khQNaDV06YKaxjos7w7z8lXOX/lq/tdFFTe5jfag fsnzax0Ql6ZsWGQCz4Il4cxGkcyima4mmH8he7azDW4KtEoLFAwPcpO/pvrBftRuRJ3K6RnOz 060eKw4+A811W2p+xzJMCrY9eRBcKGWff+wec+MPmlAhcp44TNpzzBA8oIaA89potRwX98LEE WjuIlXf8i45NTHMnEu0WJHKq1KVfJZJ7izpSJCI94ICWLPj8ulkmNrDBgT/28zTQrCyzhIKlc gghn5yxF/nhPMERXBy/dojb/xmiTbEbPXrZm57VQdvSJgUbg63dnSSa6lm4kItTevOeF+ZiUB R2NW0YZAvIpQE0OCpkog3N/iE4C1Rpxe+G0PvcfvCg== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Joakim Zhang Add FlexCAN decive in adma subsystem. Signed-off-by: Joakim Zhang Signed-off-by: Marcel Ziswiler Tested-by: Alexander Stein # TQMa8XQP --- Changes in v6: - Add Alexander's tested-by. Thanks! Changes in v4: - New patch combining the following downstream patches: commit e8fe3f57223a ("arm64: dts: imx8qxp: add FlexCAN in adma") commit 4e90361f1ed3 ("arm64: dts: imx8qxp: add multi-pd support for CAN1/2") commit 899f516e61f8 ("arm64: dts: imx8: dma: fully switched to new clk binding") commit 8a28ca15a058 ("arm64: dts: imx8qxp: drop multi-pd for CAN device") commit c493402197dd ("arm64: dts: imx8: update CAN fsl,clk-source and fsl,scu-index property") .../arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 72 +++++++++++++++++++ 1 file changed, 72 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi index 6ccf926b77a5..2dce8f2ee3ea 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi @@ -298,6 +298,65 @@ adc1: adc@5a890000 { status = "disabled"; }; + flexcan1: can@5a8d0000 { + compatible = "fsl,imx8qm-flexcan"; + reg = <0x5a8d0000 0x10000>; + interrupts = ; + interrupt-parent = <&gic>; + clocks = <&can0_lpcg 1>, + <&can0_lpcg 0>; + clock-names = "ipg", "per"; + assigned-clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <40000000>; + power-domains = <&pd IMX_SC_R_CAN_0>; + /* SLSlice[4] */ + fsl,clk-source = /bits/ 8 <0>; + fsl,scu-index = /bits/ 8 <0>; + status = "disabled"; + }; + + flexcan2: can@5a8e0000 { + compatible = "fsl,imx8qm-flexcan"; + reg = <0x5a8e0000 0x10000>; + interrupts = ; + interrupt-parent = <&gic>; + /* CAN0 clock and PD is shared among all CAN instances as + * CAN1 shares CAN0's clock and to enable CAN0's clock it + * has to be powered on. + */ + clocks = <&can0_lpcg 1>, + <&can0_lpcg 0>; + clock-names = "ipg", "per"; + assigned-clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <40000000>; + power-domains = <&pd IMX_SC_R_CAN_1>; + /* SLSlice[4] */ + fsl,clk-source = /bits/ 8 <0>; + fsl,scu-index = /bits/ 8 <1>; + status = "disabled"; + }; + + flexcan3: can@5a8f0000 { + compatible = "fsl,imx8qm-flexcan"; + reg = <0x5a8f0000 0x10000>; + interrupts = ; + interrupt-parent = <&gic>; + /* CAN0 clock and PD is shared among all CAN instances as + * CAN2 shares CAN0's clock and to enable CAN0's clock it + * has to be powered on. + */ + clocks = <&can0_lpcg 1>, + <&can0_lpcg 0>; + clock-names = "ipg", "per"; + assigned-clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <40000000>; + power-domains = <&pd IMX_SC_R_CAN_2>; + /* SLSlice[4] */ + fsl,clk-source = /bits/ 8 <0>; + fsl,scu-index = /bits/ 8 <2>; + status = "disabled"; + }; + i2c0_lpcg: clock-controller@5ac00000 { compatible = "fsl,imx8qxp-lpcg"; reg = <0x5ac00000 0x10000>; @@ -369,4 +428,17 @@ adc1_lpcg: clock-controller@5ac90000 { "adc1_lpcg_ipg_clk"; power-domains = <&pd IMX_SC_R_ADC_1>; }; + + can0_lpcg: clock-controller@5acd0000 { + compatible = "fsl,imx8qxp-lpcg"; + reg = <0x5acd0000 0x10000>; + #clock-cells = <1>; + clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>, + <&dma_ipg_clk>, <&dma_ipg_clk>; + clock-indices = , , ; + clock-output-names = "can0_lpcg_pe_clk", + "can0_lpcg_ipg_clk", + "can0_lpcg_chi_clk"; + power-domains = <&pd IMX_SC_R_CAN_0>; + }; }; From patchwork Thu Feb 2 15:32:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 649806 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EE031C05027 for ; Thu, 2 Feb 2023 15:35:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230048AbjBBPfY (ORCPT ); Thu, 2 Feb 2023 10:35:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56110 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233488AbjBBPfW (ORCPT ); Thu, 2 Feb 2023 10:35:22 -0500 Received: from mout.perfora.net (mout.perfora.net [74.208.4.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 99C5776A1; Thu, 2 Feb 2023 07:34:47 -0800 (PST) Received: from toolbox.int.toradex.com ([213.55.225.17]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MPnHA-1pIdV91vwg-004z77; Thu, 02 Feb 2023 16:33:10 +0100 From: Marcel Ziswiler To: devicetree@vger.kernel.org Cc: Liu Ying , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , linux-imx@nxp.com, Zhou Peng , Marcel Ziswiler , Abel Vesa , Chester Lin , Fabio Estevam , Krzysztof Kozlowski , Oliver Graute , Pengutronix Kernel Team , Pierre Gondois , Rob Herring , Sascha Hauer , Shawn Guo , Viorel Suman Subject: [PATCH v6 07/10] arm64: dts: imx8qm: add vpu decoder and encoder Date: Thu, 2 Feb 2023 16:32:17 +0100 Message-Id: <20230202153221.197308-8-marcel@ziswiler.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230202153221.197308-1-marcel@ziswiler.com> References: <20230202153221.197308-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:S5iQzlDJLZeA2fmHghVZD5rsYZ6/YEhAtl0+n4eIKik8snJCymh T1aTvLk06kvGpFubSvy/PGEgVS7W4oyf0bLDG6hIr95Z14yOZG5LhB3d+gxkUgwKsKwBe5J wxrC0mjSac08kJpE3squsgUlxPu7tMiFa6QzuXUOh/zOUPcBiLFXypDUv1udc74P+u+JvHs m0X0oUVMMUrdCzCU4r2Dg== UI-OutboundReport: notjunk:1;M01:P0:xkr2eF0M/4Y=;OXgGQFdzbBa/AkHFBqnAAwJoH62 dD1Ax8d4ubqPi7h29PiBWoVObAe320NBxuWRVDHzMcsVact5uNuYQOU2z+jip3146wW02zHOL uuz09hjqOPC9kEwWUzWp6dXZ3Dwva4IfBiHgvSLD6+P4AWh4thmTyP0dom9h2fGhp2MdsE/vD XtbHWQTIeCi8zViodDbX39I4QNdrt8beyyyMl66i9TT2BKzrWbj1EIt5xqokDCMAHNRT9/4v3 RYg35uuLbayUhtbTA5+Hi687HvlZtnGNuLlhzcAXm4uRDQ54qgN/8Acax7spmCm7kTFogdLsZ 2opRH+siEhlMcgVBahLNudJKkdpROAmra2Zv0snkBHidH+ZS06Bi47ddbStVtwV9bKqDnSevY tHWYoZVtfbRpgLJnKXCThxwIpDpN0EZU96jXIw/RQdkn6OskfPEt+OUMNhDVnxV/ZT6ViKEDd YrNPMZRoHOonBPXnnOJ1SkQ09BlVWl5Mv2RWi5DFTEhPDv0nWBYv3CFpjBrhyQQZsZtH54j0R /UKqAdpkX1e44TO1/53V9jVJ1BBL0dzHAzRo4mabTeBfsl/2GGuYEFm6azXux5EsNvm1+rszo +X4ve0mpmPoloLGBOPQBMBUjmcQusEE6lmURMJGxnOSpxlBswiL6cr2Zk8AhxMHSUoa7Rardq nW5ulJsrM1csskVkyeQ7anJ8HhtgY6ijBN3S5J+W+w== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Zhou Peng Enable VPU decoder and encoder functionality. Signed-off-by: Zhou Peng Signed-off-by: Marcel Ziswiler --- (no changes since v4) Changes in v4: - New patch combining the following downstream patches: commit 4f2147ce6f0e ("arm64: dts: imx8qm: add vpu decoder and encoder") commit 0c9f9b64d27d ("LF-6575: imx8q: vpu: switch to amphion upstream driver") arch/arm64/boot/dts/freescale/imx8qm.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi index 41ce8336f29e..9fff867709f0 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi @@ -23,6 +23,9 @@ aliases { serial1 = &lpuart1; serial2 = &lpuart2; serial3 = &lpuart3; + vpu_core0 = &vpu_core0; + vpu_core1 = &vpu_core1; + vpu_core2 = &vpu_core2; }; cpus { @@ -212,6 +215,7 @@ rtc: rtc { }; /* sorted in register address */ + #include "imx8-ss-vpu.dtsi" #include "imx8-ss-img.dtsi" #include "imx8-ss-dma.dtsi" #include "imx8-ss-conn.dtsi" From patchwork Thu Feb 2 15:32:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 649801 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D8D9FC05027 for ; Thu, 2 Feb 2023 15:48:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233086AbjBBPse (ORCPT ); Thu, 2 Feb 2023 10:48:34 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49586 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233054AbjBBPsZ (ORCPT ); Thu, 2 Feb 2023 10:48:25 -0500 Received: from mout.perfora.net (mout.perfora.net [74.208.4.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AAD38C14C; Thu, 2 Feb 2023 07:47:54 -0800 (PST) Received: from toolbox.int.toradex.com ([213.55.225.17]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MVw6g-1p8ABP1T4K-00X4vH; Thu, 02 Feb 2023 16:33:24 +0100 From: Marcel Ziswiler To: devicetree@vger.kernel.org Cc: Liu Ying , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , linux-imx@nxp.com, Marcel Ziswiler , Fabio Estevam , Frieder Schrempf , Krzysztof Kozlowski , Marek Vasut , Pengutronix Kernel Team , Reinhold Mueller , Rob Herring , Sascha Hauer , Shawn Guo , Tim Harvey Subject: [PATCH v6 10/10] arm64: dts: freescale: add apalis imx8 aka quadmax carrier board support Date: Thu, 2 Feb 2023 16:32:20 +0100 Message-Id: <20230202153221.197308-11-marcel@ziswiler.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230202153221.197308-1-marcel@ziswiler.com> References: <20230202153221.197308-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:4NooJNZyE6PmPVu+XzFlu2w+XHsZtLWbr8O46W1UgzYAfTJdFOZ IrIyaVj8/Ro2yXF2Sy5dmc4NRh9V9gPZCKU5KmQt4JxxAfw1JtgNHDUi2uPxkf1XwhyagtW WauM3FQrPLVGfSe/gkRJQkxhM6Je8V5bv4H6OerzfNlhDcTUxJ3Kd7ad+irQ8GRHZXYfteg rBipCfhxDRjv3ivHzCKmw== UI-OutboundReport: notjunk:1;M01:P0:tMf3pWk1/i8=;LcIOf8Eg1CWeRiFyPlhkrtbgbCD Er+8493IPnQ0yq/ai63zhG4aT7hqoRmI/tYYqRbudNbHwbnJf4XD/QmN65ctT9QVE5Q8YqKsy 2YSgCnLhoQPaa4hTJ0F9hc3xo3/KOOEKnsTUS99tsyQlj6VB9Pc50uRvWKI5lZn+TThPqjZAR YH3+rLdZ1XX7OpmvgTZtHo0TL73LfTCLssAxyOC4E4441gPKZVX1RV7fWlsPKFJjHS1fGYjXl fkol3zH3dQkUGNPfZRBK6/suD/PSXRrqarYpCOTbxQEKTW2Xt0kWp/kGOTbuFfBRwurl1zTWA UwfFpUGEhmNiOdLmIzm77R5fWpUd5FO273r2+JouYiwve+nouNTZ6FaIWoldebX5liP/K+Fw7 GJomJkqF0dG0XPZio2IHxv7fEi7kXT+2xomb4MqwMYDDuT/CUFWjHGBnX31Mvj03xJkogxyS2 3lhYtJC6noyhIPPRmAMBEdYCJDKdVYx/et9rIT0CvdjQdtTze0GiFDdQou0V4oIiPlp25VYn7 cpANj7u05TXiKvc8M0dA8uaRKGgN23Azd93C0gRQZWRSkQf8H7JMsM3p6tyvbTDikwjmIbY4N ei96CEhtozW0sghXpJrhyuqTi6/cf6J/ikKzQyFuhEZOP7ua2GLnrKyx2mJfvxWbhMMOEshrN g2Uj8yKrABzItUYEgZBcCKJWRnHpCwDurRqcqMCavS4Qlgx0O5tE9JYCUk5lwOI= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler The previous patch added the device tree to support Toradex Apalis iMX8 [1] aka QuadMax a computer on module which can be used on different carrier boards which this patch introduces. The module consists of an NXP i.MX 8 family SoC (either i.MX 8QuadMax or 8QuadPlus), two PF8100 PMICs, a KSZ9131 Gigabit Ethernet PHY, 2, 4 or 8 GB of LPDDR4 RAM, an eMMC, an SGTL5000 analogue audio codec, an USB3503A USB HSIC hub, an optional I2C EEPROM plus an optional Bluetooth/Wi-Fi module. Anything that is not self-contained on the module is disabled by default. The carrier board device trees contained in this patch include the module's device tree and enable the supported peripherals of the carrier board. Some level of display functionality just landed upstream but requires further integration/testing on our side. Therefore, currently only basic console UART, eMMC and Ethernet functionality work fine. As there is no i.MX 8QuadPlus device tree upstream those have been dropped. However, apart from an error message during boot about it failing to bring up the second Cortex-A72 core this boots fine on QuadPlus' as well. [1] https://www.toradex.com/computer-on-modules/apalis-arm-family/nxp-imx-8 Signed-off-by: Marcel Ziswiler --- (no changes since v5) Changes in v5: - Remove LVDS PWM support waiting for Liu's patches to land first. - Remove bkl1_pwm functionality depending on the above. - Squashing all Apalis iMX8 specific device tree patches. As outlined by Krzysztof reviewers may simply use b4 diff. Changes in v4: - Shorten subject. Changes in v3: - Only use V1.1 compatible for V1.1 module dtsi. - Split patch into separate module and carrier boards parts as suggested by Shawn. - Put reg after compatible as requested by Shawn. - Move atmel_mxt_ts and rtc_i2c into module dtsi to save such duplications as suggested by Shawn. - Change iomuxc pinctrl indent style as suggested by Shawn. - Change led node names to the preferred first form as suggested by Shawn. While at it also add color (yikes), default-state and function properties and remove the deprecated label property. - Put enable-active-high properties after the gpio ones as suggested by Shawn. Thanks! - Remove adc node's vref-supply and accompanying reg_vref_1v8 regulator node. - Rename gpio-hogs adherring to dt schema naming convention. arch/arm64/boot/dts/freescale/Makefile | 5 + .../boot/dts/freescale/imx8-apalis-eval.dtsi | 144 ++++++++++ .../dts/freescale/imx8-apalis-ixora-v1.1.dtsi | 220 ++++++++++++++ .../dts/freescale/imx8-apalis-ixora-v1.2.dtsi | 270 ++++++++++++++++++ .../boot/dts/freescale/imx8qm-apalis-eval.dts | 16 ++ .../freescale/imx8qm-apalis-ixora-v1.1.dts | 16 ++ .../dts/freescale/imx8qm-apalis-v1.1-eval.dts | 16 ++ .../imx8qm-apalis-v1.1-ixora-v1.1.dts | 16 ++ .../imx8qm-apalis-v1.1-ixora-v1.2.dts | 16 ++ 9 files changed, 719 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi create mode 100644 arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi create mode 100644 arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis-eval.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis-ixora-v1.1.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-eval.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.1.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.2.dts diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index ef6f364eaa18..c0d621d1d86e 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -112,6 +112,11 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mq-pico-pi.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-thor96.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-rmb3.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-zest.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8qm-apalis-eval.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8qm-apalis-ixora-v1.1.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8qm-apalis-v1.1-eval.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8qm-apalis-v1.1-ixora-v1.1.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8qm-apalis-v1.1-ixora-v1.2.dtb dtb-$(CONFIG_ARCH_MXC) += imx8qm-mek.dtb dtb-$(CONFIG_ARCH_MXC) += imx8qxp-ai_ml.dtb dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-eval-v3.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi new file mode 100644 index 000000000000..685d4294f4f1 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi @@ -0,0 +1,144 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/ { + aliases { + rtc0 = &rtc_i2c; + rtc1 = &rtc; + }; + + reg_usb_host_vbus: regulator-usb-host-vbus { + regulator-name = "VCC USBH2(ABCD) / USBH(3|4)"; + }; +}; + +&adc0 { + status = "okay"; +}; + +&adc1 { + status = "okay"; +}; + +/* TODO: Audio Mixer */ + +/* TODO: Asynchronous Sample Rate Converter (ASRC) */ + +/* TODO: Display Controller */ + +/* TODO: DPU */ + +/* Apalis ETH1 */ +&fec1 { + status = "okay"; +}; + +/* Apalis CAN1 */ +&flexcan1 { + status = "okay"; +}; + +/* Apalis CAN2 */ +&flexcan2 { + status = "okay"; +}; + +/* TODO: GPU */ + +/* Apalis I2C1 */ +&i2c2 { + status = "okay"; + + /* M41T0M6 real time clock on carrier board */ + rtc_i2c: rtc@68 { + status = "okay"; + }; +}; + +/* Apalis I2C3 (CAM) */ +&i2c3 { + status = "okay"; +}; + +/* Apalis SPI1 */ +&lpspi0 { + status = "okay"; +}; + +/* Apalis SPI2 */ +&lpspi2 { + status = "okay"; +}; + +/* Apalis UART3 */ +&lpuart0 { + status = "okay"; +}; + +/* Apalis UART1 */ +&lpuart1 { + status = "okay"; +}; + +/* Apalis UART4 */ +&lpuart2 { + status = "okay"; +}; + +/* Apalis UART2 */ +&lpuart3 { + status = "okay"; +}; + +/* Apalis PWM3, MXM3 pin 6 */ +&lsio_pwm0 { + status = "okay"; +}; + +/* Apalis PWM4, MXM3 pin 8 */ +&lsio_pwm1 { + status = "okay"; +}; + +/* Apalis PWM1, MXM3 pin 2 */ +&lsio_pwm2 { + status = "okay"; +}; + +/* Apalis PWM2, MXM3 pin 4 */ +&lsio_pwm3 { + status = "okay"; +}; + +/* TODO: Apalis PCIE1 */ + +/* TODO: Apalis BKL1_PWM */ + +/* TODO: Apalis DAP1 */ + +/* TODO: Apalis Analogue Audio */ + +/* TODO: Apalis SATA1 */ + +/* TODO: Apalis SPDIF1 */ + +/* TODO: Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC Hub */ + +/* Apalis USBO1 */ +&usbotg1 { + status = "okay"; +}; + +/* TODO: Apalis USBH4 SuperSpeed */ + +/* Apalis MMC1 */ +&usdhc2 { + status = "okay"; +}; + +/* Apalis SD1 */ +&usdhc3 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi new file mode 100644 index 000000000000..987dcaa43343 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi @@ -0,0 +1,220 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +#include + +/ { + aliases { + rtc0 = &rtc_i2c; + rtc1 = &rtc; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_leds_ixora>; + + /* LED_4_GREEN / MXM3_188 */ + led-1 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&lsio_gpio5 27 GPIO_ACTIVE_HIGH>; + }; + + /* LED_4_RED / MXM3_178 */ + led-2 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&lsio_gpio5 29 GPIO_ACTIVE_HIGH>; + }; + + /* LED_5_GREEN / MXM3_152 */ + led-3 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&lsio_gpio5 20 GPIO_ACTIVE_HIGH>; + }; + + /* LED_5_RED / MXM3_156 */ + led-4 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&lsio_gpio5 21 GPIO_ACTIVE_HIGH>; + }; + }; + + reg_usb_host_vbus: regulator-usb-host-vbus { + regulator-name = "VCC_USBH(2|4)"; + }; +}; + +&adc0 { + status = "okay"; +}; + +&adc1 { + status = "okay"; +}; + +/* TODO: Audio Mixer */ + +/* TODO: Asynchronous Sample Rate Converter (ASRC) */ + +/* TODO: Display Controller */ + +/* TODO: DPU */ + +/* Apalis ETH1 */ +&fec1 { + status = "okay"; +}; + +/* Apalis CAN1 */ +&flexcan1 { + status = "okay"; +}; + +/* Apalis CAN2 */ +&flexcan2 { + status = "okay"; +}; + +/* TODO: GPU */ + +/* Apalis I2C1 */ +&i2c2 { + status = "okay"; + + /* M41T0M6 real time clock on carrier board */ + rtc_i2c: rtc@68 { + status = "okay"; + }; +}; + +/* Apalis I2C3 (CAM) */ +&i2c3 { + status = "okay"; +}; + +&iomuxc { + pinctrl-0 = <&pinctrl_cam1_gpios>, <&pinctrl_dap1_gpios>, + <&pinctrl_esai0_gpios>, <&pinctrl_fec2_gpios>, + <&pinctrl_gpio3>, <&pinctrl_gpio4>, <&pinctrl_gpio_usbh_oc_n>, + <&pinctrl_lpuart1ctrl>, <&pinctrl_lvds0_i2c0_gpio>, + <&pinctrl_lvds1_i2c0_gpios>, <&pinctrl_mipi_dsi_0_1_en>, + <&pinctrl_mipi_dsi1_gpios>, <&pinctrl_mlb_gpios>, + <&pinctrl_qspi1a_gpios>, <&pinctrl_sata1_act>, + <&pinctrl_sim0_gpios>, <&pinctrl_uart24_forceoff>, + <&pinctrl_usdhc1_gpios>; + + pinctrl_leds_ixora: ledsixoragrp { + fsl,pins = , /* LED_4_GREEN */ + , /* LED_4_RED */ + , /* LED_5_GREEN */ + ; /* LED_5_RED */ + }; + + pinctrl_uart24_forceoff: uart24forceoffgrp { + fsl,pins = ; + }; +}; + +/* Apalis SPI1 */ +&lpspi0 { + status = "okay"; +}; + +/* Apalis SPI2 */ +&lpspi2 { + status = "okay"; +}; + +/* Apalis UART3 */ +&lpuart0 { + status = "okay"; +}; + +/* Apalis UART1 */ +&lpuart1 { + status = "okay"; +}; + +/* Apalis UART4 */ +&lpuart2 { + status = "okay"; +}; + +/* Apalis UART2 */ +&lpuart3 { + status = "okay"; +}; + +&lsio_gpio5 { + ngpios = <32>; + gpio-line-names = "gpio5-00", "gpio5-01", "gpio5-02", "gpio5-03", + "gpio5-04", "gpio5-05", "gpio5-06", "gpio5-07", + "gpio5-08", "gpio5-09", "gpio5-10", "gpio5-11", + "gpio5-12", "gpio5-13", "gpio5-14", "gpio5-15", + "gpio5-16", "gpio5-17", "gpio5-18", "gpio5-19", + "LED-5-GREEN", "LED-5-RED", "gpio5-22", "gpio5-23", + "gpio5-24", "UART24-FORCEOFF", "gpio5-26", + "LED-4-GREEN", "gpio5-28", "LED-4-RED", "gpio5-30", + "gpio5-31"; +}; + +/* Apalis PWM3, MXM3 pin 6 */ +&lsio_pwm0 { + status = "okay"; +}; + +/* Apalis PWM4, MXM3 pin 8 */ +&lsio_pwm1 { + status = "okay"; +}; + +/* Apalis PWM1, MXM3 pin 2 */ +&lsio_pwm2 { + status = "okay"; +}; + +/* Apalis PWM2, MXM3 pin 4 */ +&lsio_pwm3 { + status = "okay"; +}; + +/* TODO: Apalis PCIE1 */ + +/* TODO: Apalis BKL1_PWM */ + +/* TODO: Apalis DAP1 */ + +/* TODO: Analogue Audio */ + +/* TODO: Apalis SATA1 */ + +/* TODO: Apalis SPDIF1 */ + +/* TODO: Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC Hub */ + +/* Apalis USBO1 */ +&usbotg1 { + status = "okay"; +}; + +/* TODO: Apalis USBH4 SuperSpeed */ + +/* Apalis MMC1 */ +&usdhc2 { + bus-width = <4>; + pinctrl-0 = <&pinctrl_usdhc2_4bit>, <&pinctrl_mmc1_cd>; + pinctrl-1 = <&pinctrl_usdhc2_4bit_100mhz>, <&pinctrl_mmc1_cd>; + pinctrl-2 = <&pinctrl_usdhc2_4bit_200mhz>, <&pinctrl_mmc1_cd>; + pinctrl-3 = <&pinctrl_usdhc2_4bit_sleep>, <&pinctrl_mmc1_cd_sleep>; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi new file mode 100644 index 000000000000..e39ee4970816 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi @@ -0,0 +1,270 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +#include + +/ { + aliases { + rtc0 = &rtc_i2c; + rtc1 = &rtc; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_leds_ixora>; + + /* LED_4_GREEN / MXM3_188 */ + led-1 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&lsio_gpio5 27 GPIO_ACTIVE_HIGH>; + }; + + /* LED_4_RED / MXM3_178 */ + led-2 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&lsio_gpio5 29 GPIO_ACTIVE_HIGH>; + }; + + /* LED_5_GREEN / MXM3_152 */ + led-3 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&lsio_gpio5 20 GPIO_ACTIVE_HIGH>; + }; + + /* LED_5_RED / MXM3_156 */ + led-4 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&lsio_gpio5 21 GPIO_ACTIVE_HIGH>; + }; + }; + + reg_3v3_vmmc: regulator-3v3-vmmc { + compatible = "regulator-fixed"; + /* MMC1_PWR_CTRL */ + gpio = <&lsio_gpio5 19 GPIO_ACTIVE_HIGH>; + enable-active-high; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enable_3v3_vmmc>; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "3v3_vmmc"; + }; + + reg_can1_supply: regulator-can1-supply { + compatible = "regulator-fixed"; + gpio = <&lsio_gpio5 22 GPIO_ACTIVE_HIGH>; + enable-active-high; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enable_can1_power>; + regulator-name = "can1_supply"; + }; + + reg_can2_supply: regulator-can2-supply { + compatible = "regulator-fixed"; + gpio = <&lsio_gpio2 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sata1_act>; + regulator-name = "can2_supply"; + }; + + reg_usb_host_vbus: regulator-usb-host-vbus { + regulator-name = "VCC_USBH(2|4)"; + }; +}; + +&adc0 { + status = "okay"; +}; + +&adc1 { + status = "okay"; +}; + +/* TODO: Audio Mixer */ + +/* TODO: Asynchronous Sample Rate Converter (ASRC) */ + +/* TODO: Display Controller */ + +/* TODO: DPU */ + +/* Apalis ETH1 */ +&fec1 { + status = "okay"; +}; + +/* Apalis CAN1 */ +&flexcan1 { + xceiver-supply = <®_can1_supply>; + status = "okay"; +}; + +/* Apalis CAN2 */ +&flexcan2 { + xceiver-supply = <®_can2_supply>; + status = "okay"; +}; + +/* TODO: GPU */ + +/* Apalis I2C1 */ +&i2c2 { + status = "okay"; + + eeprom: eeprom@50 { + compatible = "atmel,24c02"; + pagesize = <16>; + reg = <0x50>; + }; + + /* M41T0M6 real time clock on carrier board */ + rtc_i2c: rtc@68 { + status = "okay"; + }; +}; + +/* Apalis I2C3 (CAM) */ +&i2c3 { + status = "okay"; +}; + +&iomuxc { + pinctrl-0 = <&pinctrl_cam1_gpios>, <&pinctrl_dap1_gpios>, + <&pinctrl_esai0_gpios>, <&pinctrl_fec2_gpios>, + <&pinctrl_gpio3>, <&pinctrl_gpio4>, <&pinctrl_gpio_usbh_oc_n>, + <&pinctrl_lpuart1ctrl>, <&pinctrl_lvds0_i2c0_gpio>, + <&pinctrl_lvds1_i2c0_gpios>, <&pinctrl_mipi_dsi_0_1_en>, + <&pinctrl_mipi_dsi1_gpios>, <&pinctrl_mlb_gpios>, + <&pinctrl_qspi1a_gpios>, <&pinctrl_sim0_gpios>, + <&pinctrl_uart24_forceoff>, <&pinctrl_usdhc1_gpios>; + + /* PMIC MMC1 power-switch */ + pinctrl_enable_3v3_vmmc: enable3v3vmmcgrp { + fsl,pins = ; /* MXM3_148, PMIC */ + }; + + /* FlexCAN PMIC */ + pinctrl_enable_can1_power: enablecan1powergrp { + fsl,pins = ; /* MXM3_158, PMIC */ + }; + + pinctrl_leds_ixora: ledsixoragrp { + fsl,pins = , /* LED_4_GREEN */ + , /* LED_4_RED */ + , /* LED_5_GREEN */ + ; /* LED_5_RED */ + }; + + pinctrl_uart24_forceoff: uart24forceoffgrp { + fsl,pins = ; + }; +}; + +/* Apalis SPI1 */ +&lpspi0 { + status = "okay"; +}; + +/* Apalis SPI2 */ +&lpspi2 { + status = "okay"; +}; + +/* Apalis UART3 */ +&lpuart0 { + status = "okay"; +}; + +/* Apalis UART1 */ +&lpuart1 { + status = "okay"; +}; + +/* Apalis UART4 */ +&lpuart2 { + status = "okay"; +}; + +/* Apalis UART2 */ +&lpuart3 { + status = "okay"; +}; + +&lsio_gpio5 { + ngpios = <32>; + gpio-line-names = "gpio5-00", "gpio5-01", "gpio5-02", "gpio5-03", + "gpio5-04", "gpio5-05", "gpio5-06", "gpio5-07", + "gpio5-08", "gpio5-09", "gpio5-10", "gpio5-11", + "gpio5-12", "gpio5-13", "gpio5-14", "gpio5-15", + "gpio5-16", "gpio5-17", "gpio5-18", "gpio5-19", + "LED-5-GREEN", "LED-5-RED", "gpio5-22", "gpio5-23", + "gpio5-24", "UART24-FORCEOFF", "gpio5-26", + "LED-4-GREEN", "gpio5-28", "LED-4-RED", "gpio5-30", + "gpio5-31"; +}; + +/* Apalis PWM3, MXM3 pin 6 */ +&lsio_pwm0 { + status = "okay"; +}; + +/* Apalis PWM4, MXM3 pin 8 */ +&lsio_pwm1 { + status = "okay"; +}; + +/* Apalis PWM1, MXM3 pin 2 */ +&lsio_pwm2 { + status = "okay"; +}; + +/* Apalis PWM2, MXM3 pin 4 */ +&lsio_pwm3 { + status = "okay"; +}; + +/* TODO: Apalis PCIE1 */ + +/* TODO: Apalis BKL1_PWM */ + +/* TODO: Apalis DAP1 */ + +/* TODO: Analogue Audio */ + +/* TODO: Apalis SATA1 */ + +/* TODO: Apalis SPDIF1 */ + +/* TODO: Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC Hub */ + +/* Apalis USBO1 */ +&usbotg1 { + status = "okay"; +}; + +/* TODO: Apalis USBH4 SuperSpeed */ + +/* Apalis MMC1 */ +&usdhc2 { + bus-width = <4>; + cap-power-off-card; + /delete-property/ no-1-8-v; + pinctrl-0 = <&pinctrl_usdhc2_4bit>, <&pinctrl_mmc1_cd>; + pinctrl-1 = <&pinctrl_usdhc2_4bit_100mhz>, <&pinctrl_mmc1_cd>; + pinctrl-2 = <&pinctrl_usdhc2_4bit_200mhz>, <&pinctrl_mmc1_cd>; + pinctrl-3 = <&pinctrl_usdhc2_4bit_sleep>, <&pinctrl_mmc1_cd_sleep>; + vmmc-supply = <®_3v3_vmmc>; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-eval.dts b/arch/arm64/boot/dts/freescale/imx8qm-apalis-eval.dts new file mode 100644 index 000000000000..5ab0921eb599 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-eval.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx8qm-apalis.dtsi" +#include "imx8-apalis-eval.dtsi" + +/ { + model = "Toradex Apalis iMX8QM/QP on Apalis Evaluation Board"; + compatible = "toradex,apalis-imx8-eval", + "toradex,apalis-imx8", + "fsl,imx8qm"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-ixora-v1.1.dts b/arch/arm64/boot/dts/freescale/imx8qm-apalis-ixora-v1.1.dts new file mode 100644 index 000000000000..68ce58dc7102 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-ixora-v1.1.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx8qm-apalis.dtsi" +#include "imx8-apalis-ixora-v1.1.dtsi" + +/ { + model = "Toradex Apalis iMX8QM/QP on Apalis Ixora V1.1 Carrier Board"; + compatible = "toradex,apalis-imx8-ixora-v1.1", + "toradex,apalis-imx8", + "fsl,imx8qm"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-eval.dts b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-eval.dts new file mode 100644 index 000000000000..c8ff75831556 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-eval.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx8qm-apalis-v1.1.dtsi" +#include "imx8-apalis-eval.dtsi" + +/ { + model = "Toradex Apalis iMX8QM V1.1 on Apalis Evaluation Board"; + compatible = "toradex,apalis-imx8-v1.1-eval", + "toradex,apalis-imx8-v1.1", + "fsl,imx8qm"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.1.dts b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.1.dts new file mode 100644 index 000000000000..ad7f644968fa --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.1.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx8qm-apalis-v1.1.dtsi" +#include "imx8-apalis-ixora-v1.1.dtsi" + +/ { + model = "Toradex Apalis iMX8QM V1.1 on Apalis Ixora V1.1 Carrier Board"; + compatible = "toradex,apalis-imx8-v1.1-ixora-v1.1", + "toradex,apalis-imx8-v1.1", + "fsl,imx8qm"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.2.dts b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.2.dts new file mode 100644 index 000000000000..3b2e8c93b846 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.2.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx8qm-apalis-v1.1.dtsi" +#include "imx8-apalis-ixora-v1.2.dtsi" + +/ { + model = "Toradex Apalis iMX8QM V1.1 on Apalis Ixora V1.2 Carrier Board"; + compatible = "toradex,apalis-imx8-v1.1-ixora-v1.2", + "toradex,apalis-imx8-v1.1", + "fsl,imx8qm"; +};