From patchwork Wed Feb 8 09:38:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sascha Hauer X-Patchwork-Id: 651933 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2418DC636D4 for ; Wed, 8 Feb 2023 09:38:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230010AbjBHJiu (ORCPT ); Wed, 8 Feb 2023 04:38:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58530 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230207AbjBHJis (ORCPT ); Wed, 8 Feb 2023 04:38:48 -0500 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 255EC127 for ; Wed, 8 Feb 2023 01:38:48 -0800 (PST) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1pPguU-00038u-Hr; Wed, 08 Feb 2023 10:38:38 +0100 Received: from [2a0a:edc0:0:1101:1d::28] (helo=dude02.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from ) id 1pPguP-003UA9-TD; Wed, 08 Feb 2023 10:38:35 +0100 Received: from sha by dude02.red.stw.pengutronix.de with local (Exim 4.94.2) (envelope-from ) id 1pPguQ-000s7g-BZ; Wed, 08 Feb 2023 10:38:34 +0100 From: Sascha Hauer To: linux-pm@vger.kernel.org Cc: linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Kyungmin Park , MyungJoo Ham , Will Deacon , Mark Rutland , kernel@pengutronix.de, Michael Riesch , Sascha Hauer Subject: [PATCH v2 01/19] PM / devfreq: rockchip-dfi: Embed desc into private data struct Date: Wed, 8 Feb 2023 10:38:12 +0100 Message-Id: <20230208093830.143284-2-s.hauer@pengutronix.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230208093830.143284-1-s.hauer@pengutronix.de> References: <20230208093830.143284-1-s.hauer@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: sha@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org No need for an extra allocation, just embed the struct devfreq_event_desc into the private data struct. Signed-off-by: Sascha Hauer --- drivers/devfreq/event/rockchip-dfi.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c index 39ac069cabc75..570f1b36c3153 100644 --- a/drivers/devfreq/event/rockchip-dfi.c +++ b/drivers/devfreq/event/rockchip-dfi.c @@ -49,7 +49,7 @@ struct dmc_usage { */ struct rockchip_dfi { struct devfreq_event_dev *edev; - struct devfreq_event_desc *desc; + struct devfreq_event_desc desc; struct dmc_usage ch_usage[RK3399_DMC_NUM_CH]; struct device *dev; void __iomem *regs; @@ -203,14 +203,10 @@ static int rockchip_dfi_probe(struct platform_device *pdev) } data->dev = dev; - desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL); - if (!desc) - return -ENOMEM; - + desc = &data->desc; desc->ops = &rockchip_dfi_ops; desc->driver_data = data; desc->name = np->name; - data->desc = desc; data->edev = devm_devfreq_event_add_edev(&pdev->dev, desc); if (IS_ERR(data->edev)) { From patchwork Wed Feb 8 09:38:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sascha Hauer X-Patchwork-Id: 651929 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 21245C05027 for ; Wed, 8 Feb 2023 09:38:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230171AbjBHJi4 (ORCPT ); Wed, 8 Feb 2023 04:38:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58764 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230465AbjBHJiz (ORCPT ); Wed, 8 Feb 2023 04:38:55 -0500 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0370B55A6 for ; Wed, 8 Feb 2023 01:38:53 -0800 (PST) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1pPguV-0003Bv-ED; Wed, 08 Feb 2023 10:38:39 +0100 Received: from [2a0a:edc0:0:1101:1d::28] (helo=dude02.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from ) id 1pPguT-003UAm-BB; Wed, 08 Feb 2023 10:38:38 +0100 Received: from sha by dude02.red.stw.pengutronix.de with local (Exim 4.94.2) (envelope-from ) id 1pPguQ-000s7k-D1; Wed, 08 Feb 2023 10:38:34 +0100 From: Sascha Hauer To: linux-pm@vger.kernel.org Cc: linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Kyungmin Park , MyungJoo Ham , Will Deacon , Mark Rutland , kernel@pengutronix.de, Michael Riesch , Sascha Hauer Subject: [PATCH v2 02/19] PM / devfreq: rockchip-dfi: use consistent name for private data struct Date: Wed, 8 Feb 2023 10:38:13 +0100 Message-Id: <20230208093830.143284-3-s.hauer@pengutronix.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230208093830.143284-1-s.hauer@pengutronix.de> References: <20230208093830.143284-1-s.hauer@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: sha@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The variable name for the private data struct is 'info' in some functions and 'data' in others. Both names do not give a clue what type the variable has, so consistently use 'dfi'. Signed-off-by: Sascha Hauer --- drivers/devfreq/event/rockchip-dfi.c | 72 ++++++++++++++-------------- 1 file changed, 36 insertions(+), 36 deletions(-) diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c index 570f1b36c3153..98712ac68aa5f 100644 --- a/drivers/devfreq/event/rockchip-dfi.c +++ b/drivers/devfreq/event/rockchip-dfi.c @@ -59,13 +59,13 @@ struct rockchip_dfi { static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev) { - struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); - void __iomem *dfi_regs = info->regs; + struct rockchip_dfi *dfi = devfreq_event_get_drvdata(edev); + void __iomem *dfi_regs = dfi->regs; u32 val; u32 ddr_type; /* get ddr type */ - regmap_read(info->regmap_pmu, RK3399_PMUGRF_OS_REG2, &val); + regmap_read(dfi->regmap_pmu, RK3399_PMUGRF_OS_REG2, &val); ddr_type = (val >> RK3399_PMUGRF_DDRTYPE_SHIFT) & RK3399_PMUGRF_DDRTYPE_MASK; @@ -84,28 +84,28 @@ static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev) static void rockchip_dfi_stop_hardware_counter(struct devfreq_event_dev *edev) { - struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); - void __iomem *dfi_regs = info->regs; + struct rockchip_dfi *dfi = devfreq_event_get_drvdata(edev); + void __iomem *dfi_regs = dfi->regs; writel_relaxed(SOFTWARE_DIS, dfi_regs + DDRMON_CTRL); } static int rockchip_dfi_get_busier_ch(struct devfreq_event_dev *edev) { - struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); + struct rockchip_dfi *dfi = devfreq_event_get_drvdata(edev); u32 tmp, max = 0; u32 i, busier_ch = 0; - void __iomem *dfi_regs = info->regs; + void __iomem *dfi_regs = dfi->regs; rockchip_dfi_stop_hardware_counter(edev); /* Find out which channel is busier */ for (i = 0; i < RK3399_DMC_NUM_CH; i++) { - info->ch_usage[i].access = readl_relaxed(dfi_regs + + dfi->ch_usage[i].access = readl_relaxed(dfi_regs + DDRMON_CH0_DFI_ACCESS_NUM + i * 20) * 4; - info->ch_usage[i].total = readl_relaxed(dfi_regs + + dfi->ch_usage[i].total = readl_relaxed(dfi_regs + DDRMON_CH0_COUNT_NUM + i * 20); - tmp = info->ch_usage[i].access; + tmp = dfi->ch_usage[i].access; if (tmp > max) { busier_ch = i; max = tmp; @@ -118,20 +118,20 @@ static int rockchip_dfi_get_busier_ch(struct devfreq_event_dev *edev) static int rockchip_dfi_disable(struct devfreq_event_dev *edev) { - struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); + struct rockchip_dfi *dfi = devfreq_event_get_drvdata(edev); rockchip_dfi_stop_hardware_counter(edev); - clk_disable_unprepare(info->clk); + clk_disable_unprepare(dfi->clk); return 0; } static int rockchip_dfi_enable(struct devfreq_event_dev *edev) { - struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); + struct rockchip_dfi *dfi = devfreq_event_get_drvdata(edev); int ret; - ret = clk_prepare_enable(info->clk); + ret = clk_prepare_enable(dfi->clk); if (ret) { dev_err(&edev->dev, "failed to enable dfi clk: %d\n", ret); return ret; @@ -149,13 +149,13 @@ static int rockchip_dfi_set_event(struct devfreq_event_dev *edev) static int rockchip_dfi_get_event(struct devfreq_event_dev *edev, struct devfreq_event_data *edata) { - struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); + struct rockchip_dfi *dfi = devfreq_event_get_drvdata(edev); int busier_ch; busier_ch = rockchip_dfi_get_busier_ch(edev); - edata->load_count = info->ch_usage[busier_ch].access; - edata->total_count = info->ch_usage[busier_ch].total; + edata->load_count = dfi->ch_usage[busier_ch].access; + edata->total_count = dfi->ch_usage[busier_ch].total; return 0; } @@ -176,46 +176,46 @@ MODULE_DEVICE_TABLE(of, rockchip_dfi_id_match); static int rockchip_dfi_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; - struct rockchip_dfi *data; + struct rockchip_dfi *dfi; struct devfreq_event_desc *desc; struct device_node *np = pdev->dev.of_node, *node; - data = devm_kzalloc(dev, sizeof(struct rockchip_dfi), GFP_KERNEL); - if (!data) + dfi = devm_kzalloc(dev, sizeof(*dfi), GFP_KERNEL); + if (!dfi) return -ENOMEM; - data->regs = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(data->regs)) - return PTR_ERR(data->regs); + dfi->regs = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(dfi->regs)) + return PTR_ERR(dfi->regs); - data->clk = devm_clk_get(dev, "pclk_ddr_mon"); - if (IS_ERR(data->clk)) - return dev_err_probe(dev, PTR_ERR(data->clk), + dfi->clk = devm_clk_get(dev, "pclk_ddr_mon"); + if (IS_ERR(dfi->clk)) + return dev_err_probe(dev, PTR_ERR(dfi->clk), "Cannot get the clk pclk_ddr_mon\n"); /* try to find the optional reference to the pmu syscon */ node = of_parse_phandle(np, "rockchip,pmu", 0); if (node) { - data->regmap_pmu = syscon_node_to_regmap(node); + dfi->regmap_pmu = syscon_node_to_regmap(node); of_node_put(node); - if (IS_ERR(data->regmap_pmu)) - return PTR_ERR(data->regmap_pmu); + if (IS_ERR(dfi->regmap_pmu)) + return PTR_ERR(dfi->regmap_pmu); } - data->dev = dev; + dfi->dev = dev; - desc = &data->desc; + desc = &dfi->desc; desc->ops = &rockchip_dfi_ops; - desc->driver_data = data; + desc->driver_data = dfi; desc->name = np->name; - data->edev = devm_devfreq_event_add_edev(&pdev->dev, desc); - if (IS_ERR(data->edev)) { + dfi->edev = devm_devfreq_event_add_edev(&pdev->dev, desc); + if (IS_ERR(dfi->edev)) { dev_err(&pdev->dev, "failed to add devfreq-event device\n"); - return PTR_ERR(data->edev); + return PTR_ERR(dfi->edev); } - platform_set_drvdata(pdev, data); + platform_set_drvdata(pdev, dfi); return 0; } From patchwork Wed Feb 8 09:38:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sascha Hauer X-Patchwork-Id: 651927 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A381EC677F1 for ; Wed, 8 Feb 2023 09:38:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230447AbjBHJi6 (ORCPT ); Wed, 8 Feb 2023 04:38:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58664 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230082AbjBHJi5 (ORCPT ); Wed, 8 Feb 2023 04:38:57 -0500 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B9344A6 for ; Wed, 8 Feb 2023 01:38:54 -0800 (PST) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1pPguV-0003Bi-EC; Wed, 08 Feb 2023 10:38:39 +0100 Received: from [2a0a:edc0:0:1101:1d::28] (helo=dude02.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from ) id 1pPguT-003UAl-9Y; Wed, 08 Feb 2023 10:38:38 +0100 Received: from sha by dude02.red.stw.pengutronix.de with local (Exim 4.94.2) (envelope-from ) id 1pPguQ-000s86-FC; Wed, 08 Feb 2023 10:38:34 +0100 From: Sascha Hauer To: linux-pm@vger.kernel.org Cc: linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Kyungmin Park , MyungJoo Ham , Will Deacon , Mark Rutland , kernel@pengutronix.de, Michael Riesch , Sascha Hauer Subject: [PATCH v2 04/19] PM / devfreq: rockchip-dfi: Add SoC specific init function Date: Wed, 8 Feb 2023 10:38:15 +0100 Message-Id: <20230208093830.143284-5-s.hauer@pengutronix.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230208093830.143284-1-s.hauer@pengutronix.de> References: <20230208093830.143284-1-s.hauer@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: sha@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Move the RK3399 specifics to a SoC specific init function to make the way free for supporting other SoCs later. Signed-off-by: Sascha Hauer --- drivers/devfreq/event/rockchip-dfi.c | 59 +++++++++++++++++++++------- 1 file changed, 44 insertions(+), 15 deletions(-) diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c index 47cc9e48dafab..f317d3d063e9c 100644 --- a/drivers/devfreq/event/rockchip-dfi.c +++ b/drivers/devfreq/event/rockchip-dfi.c @@ -17,6 +17,7 @@ #include #include #include +#include #include @@ -55,27 +56,21 @@ struct rockchip_dfi { void __iomem *regs; struct regmap *regmap_pmu; struct clk *clk; + u32 ddr_type; }; static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev) { struct rockchip_dfi *dfi = devfreq_event_get_drvdata(edev); void __iomem *dfi_regs = dfi->regs; - u32 val; - u32 ddr_type; - - /* get ddr type */ - regmap_read(dfi->regmap_pmu, RK3399_PMUGRF_OS_REG2, &val); - ddr_type = (val >> RK3399_PMUGRF_DDRTYPE_SHIFT) & - RK3399_PMUGRF_DDRTYPE_MASK; /* clear DDRMON_CTRL setting */ writel_relaxed(CLR_DDRMON_CTRL, dfi_regs + DDRMON_CTRL); /* set ddr type to dfi */ - if (ddr_type == RK3399_PMUGRF_DDRTYPE_LPDDR3) + if (dfi->ddr_type == RK3399_PMUGRF_DDRTYPE_LPDDR3) writel_relaxed(LPDDR3_EN, dfi_regs + DDRMON_CTRL); - else if (ddr_type == RK3399_PMUGRF_DDRTYPE_LPDDR4) + else if (dfi->ddr_type == RK3399_PMUGRF_DDRTYPE_LPDDR4) writel_relaxed(LPDDR4_EN, dfi_regs + DDRMON_CTRL); /* enable count, use software mode */ @@ -167,8 +162,34 @@ static const struct devfreq_event_ops rockchip_dfi_ops = { .set_event = rockchip_dfi_set_event, }; +static int rk3399_dfi_init(struct rockchip_dfi *dfi) +{ + struct regmap *regmap_pmu = dfi->regmap_pmu; + u32 val; + + dfi->clk = devm_clk_get(dfi->dev, "pclk_ddr_mon"); + if (IS_ERR(dfi->clk)) + return dev_err_probe(dfi->dev, PTR_ERR(dfi->clk), + "Cannot get the clk pclk_ddr_mon\n"); + + /* get ddr type */ + regmap_read(regmap_pmu, RK3399_PMUGRF_OS_REG2, &val); + dfi->ddr_type = (val >> RK3399_PMUGRF_DDRTYPE_SHIFT) & + RK3399_PMUGRF_DDRTYPE_MASK; + + return 0; +}; + +struct rockchip_dfi_devtype_data { + int (*init)(struct rockchip_dfi *dfi); +}; + +static struct rockchip_dfi_devtype_data rk3399_devtype_data = { + .init = rk3399_dfi_init, +}; + static const struct of_device_id rockchip_dfi_id_match[] = { - { .compatible = "rockchip,rk3399-dfi" }, + { .compatible = "rockchip,rk3399-dfi", .data = &rk3399_devtype_data }, { }, }; MODULE_DEVICE_TABLE(of, rockchip_dfi_id_match); @@ -179,6 +200,15 @@ static int rockchip_dfi_probe(struct platform_device *pdev) struct rockchip_dfi *dfi; struct devfreq_event_desc *desc; struct device_node *np = pdev->dev.of_node, *node; + const struct of_device_id *of_id; + const struct rockchip_dfi_devtype_data *devtype; + int ret; + + of_id = of_match_device(rockchip_dfi_id_match, &pdev->dev); + if (!of_id) + return -ENODEV; + + devtype = of_id->data; dfi = devm_kzalloc(dev, sizeof(*dfi), GFP_KERNEL); if (!dfi) @@ -188,11 +218,6 @@ static int rockchip_dfi_probe(struct platform_device *pdev) if (IS_ERR(dfi->regs)) return PTR_ERR(dfi->regs); - dfi->clk = devm_clk_get(dev, "pclk_ddr_mon"); - if (IS_ERR(dfi->clk)) - return dev_err_probe(dev, PTR_ERR(dfi->clk), - "Cannot get the clk pclk_ddr_mon\n"); - node = of_parse_phandle(np, "rockchip,pmu", 0); if (!node) return dev_err_probe(&pdev->dev, -ENODEV, "Can't find pmu_grf registers\n"); @@ -208,6 +233,10 @@ static int rockchip_dfi_probe(struct platform_device *pdev) desc->driver_data = dfi; desc->name = np->name; + ret = devtype->init(dfi); + if (ret) + return ret; + dfi->edev = devm_devfreq_event_add_edev(&pdev->dev, desc); if (IS_ERR(dfi->edev)) { dev_err(&pdev->dev, From patchwork Wed Feb 8 09:38:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sascha Hauer X-Patchwork-Id: 651934 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C7959C64EC5 for ; Wed, 8 Feb 2023 09:38:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229559AbjBHJis (ORCPT ); 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Wed, 08 Feb 2023 10:38:34 +0100 From: Sascha Hauer To: linux-pm@vger.kernel.org Cc: linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Kyungmin Park , MyungJoo Ham , Will Deacon , Mark Rutland , kernel@pengutronix.de, Michael Riesch , Sascha Hauer Subject: [PATCH v2 07/19] PM / devfreq: rockchip-dfi: introduce channel mask Date: Wed, 8 Feb 2023 10:38:18 +0100 Message-Id: <20230208093830.143284-8-s.hauer@pengutronix.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230208093830.143284-1-s.hauer@pengutronix.de> References: <20230208093830.143284-1-s.hauer@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: sha@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Different Rockchip SoC variants have a different number of channels. Introduce a channel mask to make the number of channels configurable from SoC initialization code. Signed-off-by: Sascha Hauer --- drivers/devfreq/event/rockchip-dfi.c | 22 ++++++++++++++++------ 1 file changed, 16 insertions(+), 6 deletions(-) diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c index 25d64d9166a9a..18d578730fd0c 100644 --- a/drivers/devfreq/event/rockchip-dfi.c +++ b/drivers/devfreq/event/rockchip-dfi.c @@ -21,7 +21,7 @@ #include -#define RK3399_DMC_NUM_CH 2 +#define DMC_MAX_CHANNELS 2 /* DDRMON_CTRL */ #define DDRMON_CTRL 0x04 @@ -44,7 +44,7 @@ struct dmc_count_channel { }; struct dmc_count { - struct dmc_count_channel c[RK3399_DMC_NUM_CH]; + struct dmc_count_channel c[DMC_MAX_CHANNELS]; }; /* @@ -62,6 +62,7 @@ struct rockchip_dfi { struct regmap *regmap_pmu; struct clk *clk; u32 ddr_type; + unsigned int channel_mask; }; static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev) @@ -96,7 +97,9 @@ static void rockchip_dfi_read_counters(struct devfreq_event_dev *edev, struct dm u32 i; void __iomem *dfi_regs = dfi->regs; - for (i = 0; i < RK3399_DMC_NUM_CH; i++) { + for (i = 0; i < DMC_MAX_CHANNELS; i++) { + if (!(dfi->channel_mask & BIT(i))) + continue; count->c[i].access = readl_relaxed(dfi_regs + DDRMON_CH0_DFI_ACCESS_NUM + i * 20); count->c[i].total = readl_relaxed(dfi_regs + @@ -146,9 +149,14 @@ static int rockchip_dfi_get_event(struct devfreq_event_dev *edev, rockchip_dfi_read_counters(edev, &count); /* We can only report one channel, so find the busiest one */ - for (i = 0; i < RK3399_DMC_NUM_CH; i++) { - u32 a = count.c[i].access - last->c[i].access; - u32 t = count.c[i].total - last->c[i].total; + for (i = 0; i < DMC_MAX_CHANNELS; i++) { + u32 a, t; + + if (!(dfi->channel_mask & BIT(i))) + continue; + + a = count.c[i].access - last->c[i].access; + t = count.c[i].total - last->c[i].total; if (a > access) { access = a; @@ -186,6 +194,8 @@ static int rk3399_dfi_init(struct rockchip_dfi *dfi) dfi->ddr_type = (val >> RK3399_PMUGRF_DDRTYPE_SHIFT) & RK3399_PMUGRF_DDRTYPE_MASK; + dfi->channel_mask = 3; + return 0; }; From patchwork Wed Feb 8 09:38:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sascha Hauer X-Patchwork-Id: 651926 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 56059C636D4 for ; Wed, 8 Feb 2023 09:39:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230465AbjBHJjC (ORCPT ); Wed, 8 Feb 2023 04:39:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59018 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229674AbjBHJjB (ORCPT ); Wed, 8 Feb 2023 04:39:01 -0500 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9AF953D084 for ; Wed, 8 Feb 2023 01:38:57 -0800 (PST) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1pPguV-0003Cc-UT; Wed, 08 Feb 2023 10:38:39 +0100 Received: from [2a0a:edc0:0:1101:1d::28] (helo=dude02.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from ) id 1pPguT-003UB7-VH; Wed, 08 Feb 2023 10:38:39 +0100 Received: from sha by dude02.red.stw.pengutronix.de with local (Exim 4.94.2) (envelope-from ) id 1pPguQ-000s8u-Ol; Wed, 08 Feb 2023 10:38:34 +0100 From: Sascha Hauer To: linux-pm@vger.kernel.org Cc: linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Kyungmin Park , MyungJoo Ham , Will Deacon , Mark Rutland , kernel@pengutronix.de, Michael Riesch , Sascha Hauer Subject: [PATCH v2 11/19] PM / devfreq: rockchip-dfi: Handle LPDDR2 correctly Date: Wed, 8 Feb 2023 10:38:22 +0100 Message-Id: <20230208093830.143284-12-s.hauer@pengutronix.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230208093830.143284-1-s.hauer@pengutronix.de> References: <20230208093830.143284-1-s.hauer@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: sha@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org According to the downstream driver the DDRMON_CTRL_LPDDR23 bit must be set for both LPDDR2 and LPDDR3. Add the missing LPDDR2 case and while at it turn the if/else if/else into switch/case which makes it easier to read. Signed-off-by: Sascha Hauer --- drivers/devfreq/event/rockchip-dfi.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c index 78cb594bd2a81..92ee61c96a1a9 100644 --- a/drivers/devfreq/event/rockchip-dfi.c +++ b/drivers/devfreq/event/rockchip-dfi.c @@ -82,12 +82,19 @@ static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev) writel_relaxed(HIWORD_UPDATE(0, 0xffff), dfi_regs + DDRMON_CTRL); /* set ddr type to dfi */ - if (dfi->ddr_type == ROCKCHIP_DDRTYPE_LPDDR3) + switch (dfi->ddr_type) { + case ROCKCHIP_DDRTYPE_LPDDR2: + case ROCKCHIP_DDRTYPE_LPDDR3: writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_LPDDR23, DDRMON_CTRL_DDR_TYPE_MASK), dfi_regs + DDRMON_CTRL); - else if (dfi->ddr_type == ROCKCHIP_DDRTYPE_LPDDR4) + break; + case ROCKCHIP_DDRTYPE_LPDDR4: writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_LPDDR4, DDRMON_CTRL_DDR_TYPE_MASK), dfi_regs + DDRMON_CTRL); + break; + default: + break; + } /* enable count, use software mode */ writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_SOFTWARE_EN, DDRMON_CTRL_SOFTWARE_EN), From patchwork Wed Feb 8 09:38:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sascha Hauer X-Patchwork-Id: 651931 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2F59FC636D4 for ; Wed, 8 Feb 2023 09:38:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230444AbjBHJiy (ORCPT ); Wed, 8 Feb 2023 04:38:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58666 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230246AbjBHJiw (ORCPT ); Wed, 8 Feb 2023 04:38:52 -0500 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BE9379EEE for ; Wed, 8 Feb 2023 01:38:51 -0800 (PST) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1pPguU-00039S-Hp; Wed, 08 Feb 2023 10:38:38 +0100 Received: from [2a0a:edc0:0:1101:1d::28] (helo=dude02.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from ) id 1pPguS-003UAb-DB; Wed, 08 Feb 2023 10:38:37 +0100 Received: from sha by dude02.red.stw.pengutronix.de with local (Exim 4.94.2) (envelope-from ) id 1pPguQ-000s92-Pg; Wed, 08 Feb 2023 10:38:34 +0100 From: Sascha Hauer To: linux-pm@vger.kernel.org Cc: linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Kyungmin Park , MyungJoo Ham , Will Deacon , Mark Rutland , kernel@pengutronix.de, Michael Riesch , Sascha Hauer Subject: [PATCH v2 12/19] PM / devfreq: rockchip-dfi: Handle LPDDR4X Date: Wed, 8 Feb 2023 10:38:23 +0100 Message-Id: <20230208093830.143284-13-s.hauer@pengutronix.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230208093830.143284-1-s.hauer@pengutronix.de> References: <20230208093830.143284-1-s.hauer@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: sha@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org In the DFI driver LPDDR4X can be handled in the same way as LPDDR4. Add the missing case. Signed-off-by: Sascha Hauer --- drivers/devfreq/event/rockchip-dfi.c | 1 + include/soc/rockchip/rockchip_grf.h | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c index 92ee61c96a1a9..dc48d9c26f599 100644 --- a/drivers/devfreq/event/rockchip-dfi.c +++ b/drivers/devfreq/event/rockchip-dfi.c @@ -89,6 +89,7 @@ static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev) dfi_regs + DDRMON_CTRL); break; case ROCKCHIP_DDRTYPE_LPDDR4: + case ROCKCHIP_DDRTYPE_LPDDR4X: writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_LPDDR4, DDRMON_CTRL_DDR_TYPE_MASK), dfi_regs + DDRMON_CTRL); break; diff --git a/include/soc/rockchip/rockchip_grf.h b/include/soc/rockchip/rockchip_grf.h index dc77bb762a05a..7150a3362b142 100644 --- a/include/soc/rockchip/rockchip_grf.h +++ b/include/soc/rockchip/rockchip_grf.h @@ -11,5 +11,6 @@ #define ROCKCHIP_DDRTYPE_LPDDR2 5 #define ROCKCHIP_DDRTYPE_LPDDR3 6 #define ROCKCHIP_DDRTYPE_LPDDR4 7 +#define ROCKCHIP_DDRTYPE_LPDDR4X 8 #endif /* __SOC_ROCKCHIP_GRF_H */ From patchwork Wed Feb 8 09:38:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sascha Hauer X-Patchwork-Id: 651928 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 47985C636D3 for ; Wed, 8 Feb 2023 09:38:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230397AbjBHJi5 (ORCPT ); Wed, 8 Feb 2023 04:38:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58624 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229674AbjBHJiz (ORCPT ); Wed, 8 Feb 2023 04:38:55 -0500 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0C67C3250B for ; Wed, 8 Feb 2023 01:38:54 -0800 (PST) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1pPguV-0003C9-Hf; Wed, 08 Feb 2023 10:38:39 +0100 Received: from [2a0a:edc0:0:1101:1d::28] (helo=dude02.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from ) id 1pPguT-003UAt-H5; Wed, 08 Feb 2023 10:38:38 +0100 Received: from sha by dude02.red.stw.pengutronix.de with local (Exim 4.94.2) (envelope-from ) id 1pPguQ-000s98-QL; Wed, 08 Feb 2023 10:38:34 +0100 From: Sascha Hauer To: linux-pm@vger.kernel.org Cc: linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Kyungmin Park , MyungJoo Ham , Will Deacon , Mark Rutland , kernel@pengutronix.de, Michael Riesch , Sascha Hauer Subject: [PATCH v2 13/19] PM / devfreq: rockchip-dfi: Pass private data struct to internal functions Date: Wed, 8 Feb 2023 10:38:24 +0100 Message-Id: <20230208093830.143284-14-s.hauer@pengutronix.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230208093830.143284-1-s.hauer@pengutronix.de> References: <20230208093830.143284-1-s.hauer@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: sha@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The internal functions do not need the struct devfreq_event_dev *, so pass them the struct rockchip_dfi *. This is a preparation for adding perf support later which doesn't have a struct devfreq_event_dev *. Signed-off-by: Sascha Hauer --- drivers/devfreq/event/rockchip-dfi.c | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c index dc48d9c26f599..c0b7b1e9805e9 100644 --- a/drivers/devfreq/event/rockchip-dfi.c +++ b/drivers/devfreq/event/rockchip-dfi.c @@ -73,9 +73,8 @@ struct rockchip_dfi { unsigned int channel_mask; }; -static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev) +static void rockchip_dfi_start_hardware_counter(struct rockchip_dfi *dfi) { - struct rockchip_dfi *dfi = devfreq_event_get_drvdata(edev); void __iomem *dfi_regs = dfi->regs; /* clear DDRMON_CTRL setting */ @@ -102,18 +101,16 @@ static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev) dfi_regs + DDRMON_CTRL); } -static void rockchip_dfi_stop_hardware_counter(struct devfreq_event_dev *edev) +static void rockchip_dfi_stop_hardware_counter(struct rockchip_dfi *dfi) { - struct rockchip_dfi *dfi = devfreq_event_get_drvdata(edev); void __iomem *dfi_regs = dfi->regs; writel_relaxed(HIWORD_UPDATE(0, DDRMON_CTRL_SOFTWARE_EN), dfi_regs + DDRMON_CTRL); } -static void rockchip_dfi_read_counters(struct devfreq_event_dev *edev, struct dmc_count *count) +static void rockchip_dfi_read_counters(struct rockchip_dfi *dfi, struct dmc_count *count) { - struct rockchip_dfi *dfi = devfreq_event_get_drvdata(edev); u32 i; void __iomem *dfi_regs = dfi->regs; @@ -131,7 +128,7 @@ static int rockchip_dfi_disable(struct devfreq_event_dev *edev) { struct rockchip_dfi *dfi = devfreq_event_get_drvdata(edev); - rockchip_dfi_stop_hardware_counter(edev); + rockchip_dfi_stop_hardware_counter(dfi); clk_disable_unprepare(dfi->clk); return 0; @@ -148,7 +145,7 @@ static int rockchip_dfi_enable(struct devfreq_event_dev *edev) return ret; } - rockchip_dfi_start_hardware_counter(edev); + rockchip_dfi_start_hardware_counter(dfi); return 0; } @@ -166,7 +163,7 @@ static int rockchip_dfi_get_event(struct devfreq_event_dev *edev, u32 access = 0, total = 0; int i; - rockchip_dfi_read_counters(edev, &count); + rockchip_dfi_read_counters(dfi, &count); /* We can only report one channel, so find the busiest one */ for (i = 0; i < DMC_MAX_CHANNELS; i++) { From patchwork Wed Feb 8 09:38:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sascha Hauer X-Patchwork-Id: 651930 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2C32EC64EC6 for ; Wed, 8 Feb 2023 09:38:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230370AbjBHJiz (ORCPT ); Wed, 8 Feb 2023 04:38:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58626 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229674AbjBHJiy (ORCPT ); Wed, 8 Feb 2023 04:38:54 -0500 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D6CBB131 for ; Wed, 8 Feb 2023 01:38:52 -0800 (PST) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1pPguV-0003C6-GI; Wed, 08 Feb 2023 10:38:39 +0100 Received: from [2a0a:edc0:0:1101:1d::28] (helo=dude02.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from ) id 1pPguT-003UAq-GP; Wed, 08 Feb 2023 10:38:38 +0100 Received: from sha by dude02.red.stw.pengutronix.de with local (Exim 4.94.2) (envelope-from ) id 1pPguQ-000s9H-R9; Wed, 08 Feb 2023 10:38:34 +0100 From: Sascha Hauer To: linux-pm@vger.kernel.org Cc: linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Kyungmin Park , MyungJoo Ham , Will Deacon , Mark Rutland , kernel@pengutronix.de, Michael Riesch , Sascha Hauer Subject: [PATCH v2 14/19] PM / devfreq: rockchip-dfi: Prepare for multiple users Date: Wed, 8 Feb 2023 10:38:25 +0100 Message-Id: <20230208093830.143284-15-s.hauer@pengutronix.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230208093830.143284-1-s.hauer@pengutronix.de> References: <20230208093830.143284-1-s.hauer@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: sha@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org When adding perf support later the DFI must be enabled when either of devfreq-event or perf is active. Prepare for that by adding a usage counter for the DFI. Also move enabling and disabling of the clock away from the devfreq-event specific functions to which the perf specific part won't have access. Signed-off-by: Sascha Hauer --- drivers/devfreq/event/rockchip-dfi.c | 57 +++++++++++++++++++--------- 1 file changed, 40 insertions(+), 17 deletions(-) diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c index c0b7b1e9805e9..eae010644935a 100644 --- a/drivers/devfreq/event/rockchip-dfi.c +++ b/drivers/devfreq/event/rockchip-dfi.c @@ -69,13 +69,28 @@ struct rockchip_dfi { void __iomem *regs; struct regmap *regmap_pmu; struct clk *clk; + int usecount; + struct mutex mutex; u32 ddr_type; unsigned int channel_mask; }; -static void rockchip_dfi_start_hardware_counter(struct rockchip_dfi *dfi) +static int rockchip_dfi_enable(struct rockchip_dfi *dfi) { void __iomem *dfi_regs = dfi->regs; + int ret = 0; + + mutex_lock(&dfi->mutex); + + dfi->usecount++; + if (dfi->usecount > 1) + goto out; + + ret = clk_prepare_enable(dfi->clk); + if (ret) { + dev_err(&dfi->edev->dev, "failed to enable dfi clk: %d\n", ret); + goto out; + } /* clear DDRMON_CTRL setting */ writel_relaxed(HIWORD_UPDATE(0, 0xffff), dfi_regs + DDRMON_CTRL); @@ -99,14 +114,30 @@ static void rockchip_dfi_start_hardware_counter(struct rockchip_dfi *dfi) /* enable count, use software mode */ writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_SOFTWARE_EN, DDRMON_CTRL_SOFTWARE_EN), dfi_regs + DDRMON_CTRL); +out: + mutex_unlock(&dfi->mutex); + + return ret; } -static void rockchip_dfi_stop_hardware_counter(struct rockchip_dfi *dfi) +static void rockchip_dfi_disable(struct rockchip_dfi *dfi) { void __iomem *dfi_regs = dfi->regs; + mutex_lock(&dfi->mutex); + + dfi->usecount--; + + WARN_ON_ONCE(dfi->usecount < 0); + + if (dfi->usecount > 0) + goto out; + writel_relaxed(HIWORD_UPDATE(0, DDRMON_CTRL_SOFTWARE_EN), dfi_regs + DDRMON_CTRL); + clk_disable_unprepare(dfi->clk); +out: + mutex_unlock(&dfi->mutex); } static void rockchip_dfi_read_counters(struct rockchip_dfi *dfi, struct dmc_count *count) @@ -124,29 +155,20 @@ static void rockchip_dfi_read_counters(struct rockchip_dfi *dfi, struct dmc_coun } } -static int rockchip_dfi_disable(struct devfreq_event_dev *edev) +static int rockchip_dfi_event_disable(struct devfreq_event_dev *edev) { struct rockchip_dfi *dfi = devfreq_event_get_drvdata(edev); - rockchip_dfi_stop_hardware_counter(dfi); - clk_disable_unprepare(dfi->clk); + rockchip_dfi_disable(dfi); return 0; } -static int rockchip_dfi_enable(struct devfreq_event_dev *edev) +static int rockchip_dfi_event_enable(struct devfreq_event_dev *edev) { struct rockchip_dfi *dfi = devfreq_event_get_drvdata(edev); - int ret; - - ret = clk_prepare_enable(dfi->clk); - if (ret) { - dev_err(&edev->dev, "failed to enable dfi clk: %d\n", ret); - return ret; - } - rockchip_dfi_start_hardware_counter(dfi); - return 0; + return rockchip_dfi_enable(dfi); } static int rockchip_dfi_set_event(struct devfreq_event_dev *edev) @@ -190,8 +212,8 @@ static int rockchip_dfi_get_event(struct devfreq_event_dev *edev, } static const struct devfreq_event_ops rockchip_dfi_ops = { - .disable = rockchip_dfi_disable, - .enable = rockchip_dfi_enable, + .disable = rockchip_dfi_event_disable, + .enable = rockchip_dfi_event_enable, .get_event = rockchip_dfi_get_event, .set_event = rockchip_dfi_set_event, }; @@ -285,6 +307,7 @@ static int rockchip_dfi_probe(struct platform_device *pdev) return PTR_ERR(dfi->regmap_pmu); dfi->dev = dev; + mutex_init(&dfi->mutex); desc = &dfi->desc; desc->ops = &rockchip_dfi_ops; From patchwork Wed Feb 8 09:38:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sascha Hauer X-Patchwork-Id: 651925 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 84DD5C636CC for ; Wed, 8 Feb 2023 09:39:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230364AbjBHJjF (ORCPT ); Wed, 8 Feb 2023 04:39:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58986 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230317AbjBHJjE (ORCPT ); Wed, 8 Feb 2023 04:39:04 -0500 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A72CF2E0E2 for ; Wed, 8 Feb 2023 01:38:58 -0800 (PST) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1pPguW-0003Co-2g; Wed, 08 Feb 2023 10:38:40 +0100 Received: from [2a0a:edc0:0:1101:1d::28] (helo=dude02.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from ) id 1pPguU-003UB9-14; Wed, 08 Feb 2023 10:38:39 +0100 Received: from sha by dude02.red.stw.pengutronix.de with local (Exim 4.94.2) (envelope-from ) id 1pPguQ-000s9Q-S5; Wed, 08 Feb 2023 10:38:34 +0100 From: Sascha Hauer To: linux-pm@vger.kernel.org Cc: linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Kyungmin Park , MyungJoo Ham , Will Deacon , Mark Rutland , kernel@pengutronix.de, Michael Riesch , Sascha Hauer Subject: [PATCH v2 15/19] PM / devfreq: rockchip-dfi: Add perf support Date: Wed, 8 Feb 2023 10:38:26 +0100 Message-Id: <20230208093830.143284-16-s.hauer@pengutronix.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230208093830.143284-1-s.hauer@pengutronix.de> References: <20230208093830.143284-1-s.hauer@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: sha@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The DFI is a unit which is suitable for measuring DDR utilization, but so far it could only be used as an event driver for the DDR frequency scaling driver. This adds perf support to the DFI driver. Usage with the 'perf' tool can look like: perf stat -a -e rockchip_ddr/cycles/,\ rockchip_ddr/read-bytes/,\ rockchip_ddr/write-bytes/,\ rockchip_ddr/bytes/ sleep 1 Performance counter stats for 'system wide': 1582524826 rockchip_ddr/cycles/ 1802.25 MB rockchip_ddr/read-bytes/ 1793.72 MB rockchip_ddr/write-bytes/ 3595.90 MB rockchip_ddr/bytes/ 1.014369709 seconds time elapsed perf support has been tested on a RK3568 and a RK3399, the latter with dual channel DDR. Signed-off-by: Sascha Hauer --- drivers/devfreq/event/rockchip-dfi.c | 349 +++++++++++++++++++++++++++ include/soc/rockchip/rk3399_grf.h | 2 + include/soc/rockchip/rk3568_grf.h | 1 + 3 files changed, 352 insertions(+) diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c index eae010644935a..400b1b360e3c9 100644 --- a/drivers/devfreq/event/rockchip-dfi.c +++ b/drivers/devfreq/event/rockchip-dfi.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include @@ -41,14 +42,30 @@ DDRMON_CTRL_LPDDR4 | \ DDRMON_CTRL_LPDDR23) +#define DDRMON_CH0_WR_NUM 0x20 +#define DDRMON_CH0_RD_NUM 0x24 #define DDRMON_CH0_COUNT_NUM 0x28 #define DDRMON_CH0_DFI_ACCESS_NUM 0x2c #define DDRMON_CH1_COUNT_NUM 0x3c #define DDRMON_CH1_DFI_ACCESS_NUM 0x40 +enum access_type { + PERF_EVENT_CYCLES, + PERF_EVENT_READ_BYTES, + PERF_EVENT_WRITE_BYTES, + PERF_EVENT_BYTES, + PERF_ACCESS_TYPE_MAX, +}; + struct dmc_count_channel { u32 access; u32 total; + u32 read_access; + u32 write_access; +}; + +struct dmc_count_channel64 { + u64 count[PERF_ACCESS_TYPE_MAX]; }; struct dmc_count { @@ -65,6 +82,7 @@ struct rockchip_dfi { struct devfreq_event_desc desc; struct dmc_count count; struct dmc_count last_event_count; + struct dmc_count last; struct device *dev; void __iomem *regs; struct regmap *regmap_pmu; @@ -73,6 +91,15 @@ struct rockchip_dfi { struct mutex mutex; u32 ddr_type; unsigned int channel_mask; + enum cpuhp_state cpuhp_state; + struct hlist_node node; + struct pmu pmu; + struct hrtimer timer; + unsigned int cpu; + struct dmc_count_channel64 frr; + int active_events; + int burst_len; + int buswidth[DMC_MAX_CHANNELS]; }; static int rockchip_dfi_enable(struct rockchip_dfi *dfi) @@ -148,6 +175,10 @@ static void rockchip_dfi_read_counters(struct rockchip_dfi *dfi, struct dmc_coun for (i = 0; i < DMC_MAX_CHANNELS; i++) { if (!(dfi->channel_mask & BIT(i))) continue; + count->c[i].read_access = readl_relaxed(dfi_regs + + DDRMON_CH0_RD_NUM + i * 20); + count->c[i].write_access = readl_relaxed(dfi_regs + + DDRMON_CH0_WR_NUM + i * 20); count->c[i].access = readl_relaxed(dfi_regs + DDRMON_CH0_DFI_ACCESS_NUM + i * 20); count->c[i].total = readl_relaxed(dfi_regs + @@ -218,6 +249,305 @@ static const struct devfreq_event_ops rockchip_dfi_ops = { .set_event = rockchip_dfi_set_event, }; +#ifdef CONFIG_PERF_EVENTS + +static ssize_t ddr_perf_cpumask_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct pmu *pmu = dev_get_drvdata(dev); + struct rockchip_dfi *dfi = container_of(pmu, struct rockchip_dfi, pmu); + + return cpumap_print_to_pagebuf(true, buf, cpumask_of(dfi->cpu)); +} + +static struct device_attribute ddr_perf_cpumask_attr = + __ATTR(cpumask, 0444, ddr_perf_cpumask_show, NULL); + +static struct attribute *ddr_perf_cpumask_attrs[] = { + &ddr_perf_cpumask_attr.attr, + NULL, +}; + +static const struct attribute_group ddr_perf_cpumask_attr_group = { + .attrs = ddr_perf_cpumask_attrs, +}; + +PMU_EVENT_ATTR_STRING(cycles, ddr_pmu_cycles, "event=0x00") + +PMU_EVENT_ATTR_STRING(read-bytes, ddr_pmu_read_bytes, "event=0x01") +PMU_EVENT_ATTR_STRING(read-bytes.unit, ddr_pmu_read_bytes_unit, "MB"); +PMU_EVENT_ATTR_STRING(read-bytes.scale, ddr_pmu_read_bytes_scale, "9.536743164e-07"); + +PMU_EVENT_ATTR_STRING(write-bytes, ddr_pmu_write_bytes, "event=0x02") +PMU_EVENT_ATTR_STRING(write-bytes.unit, ddr_pmu_write_bytes_unit, "MB"); +PMU_EVENT_ATTR_STRING(write-bytes.scale, ddr_pmu_write_bytes_scale, "9.536743164e-07"); + +PMU_EVENT_ATTR_STRING(bytes, ddr_pmu_bytes, "event=0x03") +PMU_EVENT_ATTR_STRING(bytes.unit, ddr_pmu_bytes_unit, "MB"); +PMU_EVENT_ATTR_STRING(bytes.scale, ddr_pmu_bytes_scale, "9.536743164e-07"); + +static struct attribute *ddr_perf_events_attrs[] = { + &ddr_pmu_cycles.attr.attr, + &ddr_pmu_read_bytes.attr.attr, + &ddr_pmu_read_bytes_unit.attr.attr, + &ddr_pmu_read_bytes_scale.attr.attr, + &ddr_pmu_write_bytes.attr.attr, + &ddr_pmu_write_bytes_unit.attr.attr, + &ddr_pmu_write_bytes_scale.attr.attr, + &ddr_pmu_bytes.attr.attr, + &ddr_pmu_bytes_unit.attr.attr, + &ddr_pmu_bytes_scale.attr.attr, + NULL, +}; + +static const struct attribute_group ddr_perf_events_attr_group = { + .name = "events", + .attrs = ddr_perf_events_attrs, +}; + +PMU_FORMAT_ATTR(event, "config:0-7"); + +static struct attribute *ddr_perf_format_attrs[] = { + &format_attr_event.attr, + NULL, +}; + +static const struct attribute_group ddr_perf_format_attr_group = { + .name = "format", + .attrs = ddr_perf_format_attrs, +}; + +static const struct attribute_group *attr_groups[] = { + &ddr_perf_events_attr_group, + &ddr_perf_cpumask_attr_group, + &ddr_perf_format_attr_group, + NULL, +}; + +static int rockchip_ddr_perf_event_init(struct perf_event *event) +{ + struct rockchip_dfi *dfi = container_of(event->pmu, struct rockchip_dfi, pmu); + + if (event->attr.type != event->pmu->type) + return -ENOENT; + + if (event->attach_state & PERF_ATTACH_TASK) + return -EOPNOTSUPP; + + if (event->cpu < 0) { + dev_warn(dfi->dev, "Can't provide per-task data!\n"); + return -EOPNOTSUPP; + } + + return 0; +} + +static void rockchip_ddr_perf_update_counters(struct rockchip_dfi *dfi) +{ + struct dmc_count count; + struct dmc_count *last = &dfi->last; + int blen = dfi->burst_len; + u32 diff; + int i; + + rockchip_dfi_read_counters(dfi, &count); + + diff = count.c[0].total - last->c[0].total; + dfi->frr.count[PERF_EVENT_CYCLES] += diff; + + for (i = 0; i < DMC_MAX_CHANNELS; i++) { + if (!(dfi->channel_mask & BIT(i))) + continue; + + diff = count.c[i].read_access - last->c[i].read_access; + dfi->frr.count[PERF_EVENT_READ_BYTES] += (u64)diff * blen * dfi->buswidth[i]; + + diff = count.c[i].write_access - last->c[i].write_access; + dfi->frr.count[PERF_EVENT_WRITE_BYTES] += (u64)diff * blen * dfi->buswidth[i]; + + diff = count.c[i].access - last->c[i].access; + dfi->frr.count[PERF_EVENT_BYTES] += (u64)diff * blen * dfi->buswidth[i]; + } + + dfi->last = count; +} + +static void rockchip_ddr_perf_event_update(struct perf_event *event) +{ + struct rockchip_dfi *dfi = container_of(event->pmu, struct rockchip_dfi, pmu); + s64 prev; + u64 now; + + rockchip_ddr_perf_update_counters(dfi); + + now = dfi->frr.count[event->attr.config]; + prev = local64_xchg(&event->hw.prev_count, now); + local64_add(now - prev, &event->count); +} + +static void rockchip_ddr_perf_event_start(struct perf_event *event, int flags) +{ + struct rockchip_dfi *dfi = container_of(event->pmu, struct rockchip_dfi, pmu); + + rockchip_ddr_perf_update_counters(dfi); + + local64_set(&event->hw.prev_count, dfi->frr.count[event->attr.config]); +} + +static int rockchip_ddr_perf_event_add(struct perf_event *event, int flags) +{ + struct rockchip_dfi *dfi = container_of(event->pmu, struct rockchip_dfi, pmu); + struct hw_perf_event *hwc = &event->hw; + + hwc->state |= PERF_HES_STOPPED; + + dfi->active_events++; + + if (dfi->active_events == 1) { + rockchip_dfi_enable(dfi); + hrtimer_start(&dfi->timer, 0, HRTIMER_MODE_REL); + } + + if (flags & PERF_EF_START) + rockchip_ddr_perf_event_start(event, flags); + + return 0; +} + +static void rockchip_ddr_perf_event_stop(struct perf_event *event, int flags) +{ + rockchip_ddr_perf_event_update(event); +} + +static void rockchip_ddr_perf_event_del(struct perf_event *event, int flags) +{ + struct rockchip_dfi *dfi = container_of(event->pmu, struct rockchip_dfi, pmu); + + rockchip_ddr_perf_event_stop(event, PERF_EF_UPDATE); + + dfi->active_events--; + + if (dfi->active_events == 0) { + hrtimer_cancel(&dfi->timer); + rockchip_dfi_disable(dfi); + } +} + +static enum hrtimer_restart rockchip_dfi_timer(struct hrtimer *timer) +{ + struct rockchip_dfi *dfi = container_of(timer, struct rockchip_dfi, timer); + ktime_t timeout; + + rockchip_ddr_perf_update_counters(dfi); + + timeout = ns_to_ktime(NSEC_PER_SEC); + hrtimer_forward_now(&dfi->timer, timeout); + + return HRTIMER_RESTART; +}; + +static int ddr_perf_offline_cpu(unsigned int cpu, struct hlist_node *node) +{ + struct rockchip_dfi *dfi = hlist_entry_safe(node, struct rockchip_dfi, node); + int target; + + if (cpu != dfi->cpu) + return 0; + + target = cpumask_any_but(cpu_online_mask, cpu); + if (target >= nr_cpu_ids) + return 0; + + perf_pmu_migrate_context(&dfi->pmu, cpu, target); + dfi->cpu = target; + + return 0; +} + +static int rockchip_ddr_perf_init(struct rockchip_dfi *dfi) +{ + struct pmu *pmu = &dfi->pmu; + int ret; + + pmu->module = THIS_MODULE; + pmu->capabilities = PERF_PMU_CAP_NO_EXCLUDE; + pmu->task_ctx_nr = perf_invalid_context; + pmu->attr_groups = attr_groups; + pmu->event_init = rockchip_ddr_perf_event_init; + pmu->add = rockchip_ddr_perf_event_add; + pmu->del = rockchip_ddr_perf_event_del; + pmu->start = rockchip_ddr_perf_event_start; + pmu->stop = rockchip_ddr_perf_event_stop; + pmu->read = rockchip_ddr_perf_event_update; + + dfi->cpu = raw_smp_processor_id(); + + ret = cpuhp_setup_state_multi(CPUHP_AP_ONLINE_DYN, + "rockchip_ddr_perf_pmu", + NULL, + ddr_perf_offline_cpu); + + if (ret < 0) { + dev_err(dfi->dev, "cpuhp_setup_state_multi failed: %d\n", ret); + return ret; + } + + dfi->cpuhp_state = ret; + + /* Register the pmu instance for cpu hotplug */ + ret = cpuhp_state_add_instance_nocalls(dfi->cpuhp_state, &dfi->node); + if (ret) { + dev_err(dfi->dev, "Error %d registering hotplug\n", ret); + goto cpuhp_instance_err; + } + + hrtimer_init(&dfi->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); + dfi->timer.function = rockchip_dfi_timer; + + switch (dfi->ddr_type) { + case ROCKCHIP_DDRTYPE_LPDDR2: + case ROCKCHIP_DDRTYPE_LPDDR3: + dfi->burst_len = 8; + break; + case ROCKCHIP_DDRTYPE_LPDDR4: + case ROCKCHIP_DDRTYPE_LPDDR4X: + dfi->burst_len = 16; + break; + } + + ret = perf_pmu_register(pmu, "rockchip_ddr", -1); + if (ret) + goto ddr_perf_err; + + return 0; + +ddr_perf_err: + cpuhp_state_remove_instance_nocalls(dfi->cpuhp_state, &dfi->node); +cpuhp_instance_err: + cpuhp_remove_multi_state(dfi->cpuhp_state); + + return ret; +} + +static void rockchip_ddr_perf_remove(struct rockchip_dfi *dfi) +{ + cpuhp_state_remove_instance_nocalls(dfi->cpuhp_state, &dfi->node); + cpuhp_remove_multi_state(dfi->cpuhp_state); + + perf_pmu_unregister(&dfi->pmu); +} + +#else +static int rockchip_ddr_perf_init(struct rockchip_dfi *dfi) +{ + return 0; +} + +static void rockchip_ddr_perf_remove(struct rockchip_dfi *dfi) +{ +} +#endif + static int rk3399_dfi_init(struct rockchip_dfi *dfi) { struct regmap *regmap_pmu = dfi->regmap_pmu; @@ -234,6 +564,9 @@ static int rk3399_dfi_init(struct rockchip_dfi *dfi) dfi->channel_mask = 3; + dfi->buswidth[0] = FIELD_GET(RK3399_PMUGRF_OS_REG2_BW_CH0, val) == 0 ? 4 : 2; + dfi->buswidth[1] = FIELD_GET(RK3399_PMUGRF_OS_REG2_BW_CH1, val) == 0 ? 4 : 2; + return 0; }; @@ -250,6 +583,8 @@ static int rk3568_dfi_init(struct rockchip_dfi *dfi) if (FIELD_GET(RK3568_PMUGRF_OS_REG3_SYSREG_VERSION, reg3) >= 0x3) dfi->ddr_type |= FIELD_GET(RK3568_PMUGRF_OS_REG3_DRAMTYPE_INFO_V3, reg3) << 3; + dfi->buswidth[0] = FIELD_GET(RK3568_PMUGRF_OS_REG2_BW_CH0, reg2) == 0 ? 4 : 2; + dfi->channel_mask = 1; return 0; @@ -325,13 +660,27 @@ static int rockchip_dfi_probe(struct platform_device *pdev) return PTR_ERR(dfi->edev); } + ret = rockchip_ddr_perf_init(dfi); + if (ret) + return ret; + platform_set_drvdata(pdev, dfi); return 0; } +static int rockchip_dfi_remove(struct platform_device *pdev) +{ + struct rockchip_dfi *dfi = platform_get_drvdata(pdev); + + rockchip_ddr_perf_remove(dfi); + + return 0; +} + static struct platform_driver rockchip_dfi_driver = { .probe = rockchip_dfi_probe, + .remove = rockchip_dfi_remove, .driver = { .name = "rockchip-dfi", .of_match_table = rockchip_dfi_id_match, diff --git a/include/soc/rockchip/rk3399_grf.h b/include/soc/rockchip/rk3399_grf.h index 775f8444bea8d..39cd44cec982f 100644 --- a/include/soc/rockchip/rk3399_grf.h +++ b/include/soc/rockchip/rk3399_grf.h @@ -12,5 +12,7 @@ /* PMU GRF Registers */ #define RK3399_PMUGRF_OS_REG2 0x308 #define RK3399_PMUGRF_OS_REG2_DDRTYPE GENMASK(15, 13) +#define RK3399_PMUGRF_OS_REG2_BW_CH0 GENMASK(3, 2) +#define RK3399_PMUGRF_OS_REG2_BW_CH1 GENMASK(19, 18) #endif diff --git a/include/soc/rockchip/rk3568_grf.h b/include/soc/rockchip/rk3568_grf.h index 575584e9d8834..52853efd6720e 100644 --- a/include/soc/rockchip/rk3568_grf.h +++ b/include/soc/rockchip/rk3568_grf.h @@ -4,6 +4,7 @@ #define RK3568_PMUGRF_OS_REG2 0x208 #define RK3568_PMUGRF_OS_REG2_DRAMTYPE_INFO GENMASK(15, 13) +#define RK3568_PMUGRF_OS_REG2_BW_CH0 GENMASK(3, 2) #define RK3568_PMUGRF_OS_REG3 0x20c #define RK3568_PMUGRF_OS_REG3_DRAMTYPE_INFO_V3 GENMASK(13, 12) From patchwork Wed Feb 8 09:38:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sascha Hauer X-Patchwork-Id: 651932 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66FB1C636CC for ; Wed, 8 Feb 2023 09:38:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230387AbjBHJiw (ORCPT ); Wed, 8 Feb 2023 04:38:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58590 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230287AbjBHJiv (ORCPT ); Wed, 8 Feb 2023 04:38:51 -0500 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CD590127 for ; Wed, 8 Feb 2023 01:38:49 -0800 (PST) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1pPguU-00039R-Hw; Wed, 08 Feb 2023 10:38:38 +0100 Received: from [2a0a:edc0:0:1101:1d::28] (helo=dude02.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from ) id 1pPguS-003UAX-AJ; Wed, 08 Feb 2023 10:38:37 +0100 Received: from sha by dude02.red.stw.pengutronix.de with local (Exim 4.94.2) (envelope-from ) id 1pPguQ-000s9i-V4; Wed, 08 Feb 2023 10:38:34 +0100 From: Sascha Hauer To: linux-pm@vger.kernel.org Cc: linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Kyungmin Park , MyungJoo Ham , Will Deacon , Mark Rutland , kernel@pengutronix.de, Michael Riesch , Sascha Hauer Subject: [PATCH v2 18/19] dt-bindings: devfreq: event: convert Rockchip DFI binding to yaml Date: Wed, 8 Feb 2023 10:38:29 +0100 Message-Id: <20230208093830.143284-19-s.hauer@pengutronix.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230208093830.143284-1-s.hauer@pengutronix.de> References: <20230208093830.143284-1-s.hauer@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: sha@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Convert the Rockchip DFI binding to yaml. Signed-off-by: Sascha Hauer --- .../bindings/devfreq/event/rockchip,dfi.yaml | 61 +++++++++++++++++++ .../bindings/devfreq/event/rockchip-dfi.txt | 18 ------ 2 files changed, 61 insertions(+), 18 deletions(-) create mode 100644 Documentation/devicetree/bindings/devfreq/event/rockchip,dfi.yaml delete mode 100644 Documentation/devicetree/bindings/devfreq/event/rockchip-dfi.txt diff --git a/Documentation/devicetree/bindings/devfreq/event/rockchip,dfi.yaml b/Documentation/devicetree/bindings/devfreq/event/rockchip,dfi.yaml new file mode 100644 index 0000000000000..7a82f6ae0701e --- /dev/null +++ b/Documentation/devicetree/bindings/devfreq/event/rockchip,dfi.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/devfreq/event/rockchip,dfi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip DFI + +maintainers: + - Sascha Hauer + +properties: + compatible: + enum: + - rockchip,rk3399-dfi + + clocks: + maxItems: 1 + + clock-names: + items: + - const: pclk_ddr_mon + + interrupts: + maxItems: 1 + + reg: + maxItems: 1 + + rockchip,pmu: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the syscon managing the "PMU general register files". + +required: + - compatible + - clocks + - clock-names + - interrupts + - reg + +additionalProperties: false + +examples: + - | + #include + #include + + bus { + #address-cells = <2>; + #size-cells = <2>; + + dfi: dfi@ff630000 { + compatible = "rockchip,rk3399-dfi"; + reg = <0x00 0xff630000 0x00 0x4000>; + interrupts = ; + rockchip,pmu = <&pmugrf>; + clocks = <&cru PCLK_DDR_MON>; + clock-names = "pclk_ddr_mon"; + }; + }; diff --git a/Documentation/devicetree/bindings/devfreq/event/rockchip-dfi.txt b/Documentation/devicetree/bindings/devfreq/event/rockchip-dfi.txt deleted file mode 100644 index 148191b0fc158..0000000000000 --- a/Documentation/devicetree/bindings/devfreq/event/rockchip-dfi.txt +++ /dev/null @@ -1,18 +0,0 @@ - -* Rockchip rk3399 DFI device - -Required properties: -- compatible: Must be "rockchip,rk3399-dfi". -- reg: physical base address of each DFI and length of memory mapped region -- rockchip,pmu: phandle to the syscon managing the "pmu general register files" -- clocks: phandles for clock specified in "clock-names" property -- clock-names : the name of clock used by the DFI, must be "pclk_ddr_mon"; - -Example: - dfi: dfi@ff630000 { - compatible = "rockchip,rk3399-dfi"; - reg = <0x00 0xff630000 0x00 0x4000>; - rockchip,pmu = <&pmugrf>; - clocks = <&cru PCLK_DDR_MON>; - clock-names = "pclk_ddr_mon"; - };