From patchwork Wed Feb 15 07:03:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 653775 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 982ADC6379F for ; Wed, 15 Feb 2023 07:04:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233573AbjBOHEX (ORCPT ); Wed, 15 Feb 2023 02:04:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35994 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233543AbjBOHEV (ORCPT ); Wed, 15 Feb 2023 02:04:21 -0500 Received: from mail-pj1-x1036.google.com (mail-pj1-x1036.google.com [IPv6:2607:f8b0:4864:20::1036]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C799B25BB2 for ; Tue, 14 Feb 2023 23:04:20 -0800 (PST) Received: by mail-pj1-x1036.google.com with SMTP id bx22so17324510pjb.3 for ; Tue, 14 Feb 2023 23:04:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=AL6l5KdLl+g77HDa3WqYUX34iRKmo63b52JJZRcNsok=; b=zX4vvoFbCXw/rtzp8IJzOsYTS64/AiC2Af1jtVktHAXFS3Bb9hChglRONV10BQoU1r af01rWab8uuQyMPWdzT7Tw2pf/3+tOpgVLqcn0Qgv1I7DVcS41CvDGpB6WlnhM7HRfLD hHu1ru1FN+OSsBEU8ZZI/YO/tToG8dmWsIYnXIX5SpqtaMmMw/RNn0tmdse2xc0Mdckt VgWvUHIkAk/tEVgNVX+FeGWBfvFNBLbKMa/xyuxDqbKPDXWQf371Om1Y4W30sat4XBDm ZYtH/U4rKdAznjUW4MTkxcZJgMy1MeWW0ubI4yMaY9XACZPEwyn0gd0A6V4GRZmd6rYW Fd6Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AL6l5KdLl+g77HDa3WqYUX34iRKmo63b52JJZRcNsok=; b=7Wl/A5JKzLjFkf23vHGG+bIqmtdFWjDTeq0+Mr9ev4ES5kg3iU4s3Eyj3sWJKlXVdN AShs4SqX8kNXnPnX7hhK/sLq6DU24/8UId8VXjM+nUnHWy0wWKV+Yo6SY65WXX6Is0aK mG6SjwYE6XD2okiXM56e2/AJaRBENfCduup0ymt1DDmhG2WrxibIAjxIaKvoVsu0ADQF 1W0Hy+vEehiKLG0VRg/+qrqPXWW+SDDKVO0UnOj1HatZ1qmIqBmFBdLkIy3pbc9DCwuQ t4sGY8QE+BFgYvfmqW4QrB8eAKDWfqeyodBQe7xl6iFq8JQT9K7zHOoei9hLVkpO8xNC mAsw== X-Gm-Message-State: AO0yUKW5B1AVpr/ibRSz3yllqCZwZ4Cc30fC0NffxTpQPmRklebzXW7b SCqkIHOb5QOEZhJ1i8ImTfwj X-Google-Smtp-Source: AK7set9bfC1fFeuXWyihZs3eAxRkWHrFlj+1LyhEzqmxcQYkkrv87ecBNbxIt/BSSYRdvwEHqsdyJg== X-Received: by 2002:a05:6a20:1582:b0:c6:c85f:da59 with SMTP id h2-20020a056a20158200b000c6c85fda59mr1052731pzj.55.1676444660283; Tue, 14 Feb 2023 23:04:20 -0800 (PST) Received: from localhost.localdomain ([117.217.179.87]) by smtp.gmail.com with ESMTPSA id e23-20020a63db17000000b004fb26a80875sm9953795pgg.22.2023.02.14.23.04.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Feb 2023 23:04:19 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, viresh.kumar@linaro.org, Manivannan Sadhasivam Subject: [RESEND PATCH 02/12] arm64: dts: qcom: sc7280: Supply clock from cpufreq node to CPUs Date: Wed, 15 Feb 2023 12:33:50 +0530 Message-Id: <20230215070400.5901-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230215070400.5901-1-manivannan.sadhasivam@linaro.org> References: <20230215070400.5901-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Qualcomm platforms making use of CPUFreq HW Engine (EPSS/OSM) supply clocks to the CPU cores. But this relationship is not represented in DTS so far. So let's make cpufreq node as the clock provider and CPU nodes as the consumers. The clock index for each CPU node is based on the frequency domain index. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index bdcb74925313..d9b6e028cdac 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -168,6 +168,7 @@ CPU0: cpu@0 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x0>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1 @@ -193,6 +194,7 @@ CPU1: cpu@100 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x100>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1 @@ -214,6 +216,7 @@ CPU2: cpu@200 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x200>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1 @@ -235,6 +238,7 @@ CPU3: cpu@300 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x300>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1 @@ -256,6 +260,7 @@ CPU4: cpu@400 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x400>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1 @@ -277,6 +282,7 @@ CPU5: cpu@500 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x500>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1 @@ -298,6 +304,7 @@ CPU6: cpu@600 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x600>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1 @@ -319,6 +326,7 @@ CPU7: cpu@700 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x700>; + clocks = <&cpufreq_hw 2>; enable-method = "psci"; cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1 @@ -5337,6 +5345,7 @@ cpufreq_hw: cpufreq@18591000 { clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; clock-names = "xo", "alternate"; #freq-domain-cells = <1>; + #clock-cells = <1>; }; }; From patchwork Wed Feb 15 07:03:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 653774 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2D231C64EC7 for ; Wed, 15 Feb 2023 07:05:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230500AbjBOHFN (ORCPT ); Wed, 15 Feb 2023 02:05:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36172 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233679AbjBOHEt (ORCPT ); Wed, 15 Feb 2023 02:04:49 -0500 Received: from mail-pl1-x62b.google.com (mail-pl1-x62b.google.com [IPv6:2607:f8b0:4864:20::62b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C9D373609A for ; Tue, 14 Feb 2023 23:04:32 -0800 (PST) Received: by mail-pl1-x62b.google.com with SMTP id e17so10532602plg.12 for ; Tue, 14 Feb 2023 23:04:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=iLerwrwmNfdynSXWopegSimuZHzpOIcHKtk78GRdX8o=; b=CDD6hhgzG+k4l9BH2U6Z67LL3lVoDj57tdvq4TaY1FnG0jSzd6HtRTeY5XpvYX1Pgw G9f1TVzMP+OeA+QuZK0appRi26qZQfeVN7OECs2QQtX4EmNfx1QGnJoH2V+u4H61Q9ks M8xx6pOna6EfEcBzzDTWEzNjmvfwvhArrMfRldfCdRn78OwsKPJDNlKdD+CqAq9cz7Jt 81EhVVGq00yG3tDdUd7pLCtHjHovZArsUA2Wrq8x25Z3t5roQxvo7fpIxaZz5wFdvPwC OnqYra9xF9s0joi+zLDI4TXD8fdiSuh/bUTHSrjvyH1gSXos89xMfUAS6SFnIfciwa3b rnVQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=iLerwrwmNfdynSXWopegSimuZHzpOIcHKtk78GRdX8o=; b=m/Y2L9UGJZUxaFH0gDeCR0bEgdZVfc7rajZLNeKXnO5kh39dtrOiwlPPYxPC1fwbF7 Qe6a4oKqs3LuOzfEmqnZoQ5aLTMVxMoG2pLOYO0tm663+5m6VVCX/cnAOE5Ss9E39pwe Q+zN96dSR+9cxjoVbskC6E+zZNCZ/Ek3YgMolgYwy3prnTy6tcgllabhKPSwpeTemFxZ gkMWsM5hxkwLXUIW5dII2zzpdH72YLVZsDi7Nzpm97Uc0a2rUl2IKoRLRVLkD+3QSEvq xWKwA3jhRDr5RAHI8Z7W3Ek1ZCODH6gTdh0F507ucPBMKNHMHdiQxqeoM+0JJBAYLZk9 O++A== X-Gm-Message-State: AO0yUKXmUbE5Z6Wy61uaU6jYg6q1f0U7XrODYoRS6srGAbmrXzqUnieh QoGpMtzoE5ih7xS2zGEjgO/T X-Google-Smtp-Source: AK7set+WN7i/v3ddRm/NjsgZKAqCsRSsgkHLuyYc+DbQ+6pqTSvMFZbKUHyceR5gbqleUAnPDM6+Sw== X-Received: by 2002:a17:902:ea06:b0:19a:8680:ba87 with SMTP id s6-20020a170902ea0600b0019a8680ba87mr1562863plg.11.1676444672288; Tue, 14 Feb 2023 23:04:32 -0800 (PST) Received: from localhost.localdomain ([117.217.179.87]) by smtp.gmail.com with ESMTPSA id e23-20020a63db17000000b004fb26a80875sm9953795pgg.22.2023.02.14.23.04.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Feb 2023 23:04:31 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, viresh.kumar@linaro.org, Manivannan Sadhasivam Subject: [RESEND PATCH 05/12] arm64: dts: qcom: sm8250: Supply clock from cpufreq node to CPUs Date: Wed, 15 Feb 2023 12:33:53 +0530 Message-Id: <20230215070400.5901-6-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230215070400.5901-1-manivannan.sadhasivam@linaro.org> References: <20230215070400.5901-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Qualcomm platforms making use of CPUFreq HW Engine (EPSS/OSM) supply clocks to the CPU cores. But this relationship is not represented in DTS so far. So let's make cpufreq node as the clock provider and CPU nodes as the consumers. The clock index for each CPU node is based on the frequency domain index. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 2f0e460acccd..44c8851178eb 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -97,6 +97,7 @@ CPU0: cpu@0 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x0>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <448>; dynamic-power-coefficient = <205>; @@ -127,6 +128,7 @@ CPU1: cpu@100 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x100>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <448>; dynamic-power-coefficient = <205>; @@ -151,6 +153,7 @@ CPU2: cpu@200 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x200>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <448>; dynamic-power-coefficient = <205>; @@ -175,6 +178,7 @@ CPU3: cpu@300 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x300>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <448>; dynamic-power-coefficient = <205>; @@ -199,6 +203,7 @@ CPU4: cpu@400 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x400>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <379>; @@ -223,6 +228,7 @@ CPU5: cpu@500 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x500>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <379>; @@ -248,6 +254,7 @@ CPU6: cpu@600 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x600>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <379>; @@ -272,6 +279,7 @@ CPU7: cpu@700 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x700>; + clocks = <&cpufreq_hw 2>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <444>; @@ -5481,6 +5489,7 @@ cpufreq_hw: cpufreq@18591000 { ; interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1", "dcvsh-irq-2"; #freq-domain-cells = <1>; + #clock-cells = <1>; }; }; From patchwork Wed Feb 15 07:03:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 653773 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5C422C6FA8E for ; Wed, 15 Feb 2023 07:05:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233657AbjBOHFP (ORCPT ); Wed, 15 Feb 2023 02:05:15 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36644 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233747AbjBOHEz (ORCPT ); Wed, 15 Feb 2023 02:04:55 -0500 Received: from mail-pj1-x102f.google.com (mail-pj1-x102f.google.com [IPv6:2607:f8b0:4864:20::102f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8661B2B2B3 for ; Tue, 14 Feb 2023 23:04:36 -0800 (PST) Received: by mail-pj1-x102f.google.com with SMTP id bg2so8044633pjb.4 for ; Tue, 14 Feb 2023 23:04:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LHVr08cnTjJMehZboB/JWbeUqVs1oVn1lVODeozYst8=; b=V3YYbHbtCDlii3ENqJOzqAykviuMJyzXsCZAiumNohLKBmLCWs8JPve2pj5RYqASXE d2K66/UR3/FzV4CjEV+ms++BDzoJ5tfNe4++iO/zn4oqgwRX0BsXZLTUchoQxUxnG6tw /AkJ+JeM3GkkbDyuNN4diG+I5xDDvnoaxN3lQfsf7Uj05ijiYMLv9cDn7QFaAuqWWEvd ypTDp5/3WTQXQg8gim3uncHV8yPKsG+Ga4gzYIpIbxbqo8Y/Agxw9MTdvhnvJc9ykW7n b+Boe5nWflRdQkHMh+1mqsPHM0lSBbCkpAn1nfyMd+TbAi3ZphtUhaqyaVyevJiYWzSG FI+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LHVr08cnTjJMehZboB/JWbeUqVs1oVn1lVODeozYst8=; b=wSe93a7qNsFj4UFYZ+/J+UdzjtaSTMQBF78GbO9ikBeAVpYqwyV2VSgX0LJ5pFXtx6 V/kzau7tMJ9cpo46qYO+ZRrAHpR9mF2kw1Ogdu0Bpeewuz/XAkCgKxahaQ7vDIVo28qQ PT/xF+bxwYmyUKihst0Qz5epm4sEYvPRSSlrMrj8SAS/CjEc/hd6L8HiRJhXOIIRRKEt /2qf1ZF4G+8ZktjkTwaAX9wX+bOuhXLl94/LThPSzKW1t89AyPKq1om2Fu4g/6y920xf z0XXMbzoxOZMXHCaVRg/HuZNoRvtiTVH8J/n4LOl02rY0min4I9rVcwYH6kZbI6wfwbI Ibkg== X-Gm-Message-State: AO0yUKVQrpDK1XoN+v98uBbtQSDIU+i//QujeyKDvs2F3jydd2oWIWaH GOuw6VdZTU2W9hmNyq3MDam/ X-Google-Smtp-Source: AK7set9F00g8NA24XkwVqhsFXZjW6kaf9EYJ0KzZu+qw/r/EktMSJyERqXyL+ge4Bhg7SI6GXsNhCQ== X-Received: by 2002:a17:903:2344:b0:19a:b801:13e9 with SMTP id c4-20020a170903234400b0019ab80113e9mr1645926plh.19.1676444676086; Tue, 14 Feb 2023 23:04:36 -0800 (PST) Received: from localhost.localdomain ([117.217.179.87]) by smtp.gmail.com with ESMTPSA id e23-20020a63db17000000b004fb26a80875sm9953795pgg.22.2023.02.14.23.04.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Feb 2023 23:04:35 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, viresh.kumar@linaro.org, Manivannan Sadhasivam Subject: [RESEND PATCH 06/12] arm64: dts: qcom: qdu1000: Supply clock from cpufreq node to CPUs Date: Wed, 15 Feb 2023 12:33:54 +0530 Message-Id: <20230215070400.5901-7-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230215070400.5901-1-manivannan.sadhasivam@linaro.org> References: <20230215070400.5901-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Qualcomm platforms making use of CPUFreq HW Engine (EPSS/OSM) supply clocks to the CPU cores. But this relationship is not represented in DTS so far. So let's make cpufreq node as the clock provider and CPU nodes as the consumers. The clock index for each CPU node is based on the frequency domain index. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/qdu1000.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi index f234159d2060..98a859ad5229 100644 --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi @@ -27,6 +27,7 @@ CPU0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a55"; reg = <0x0 0x0>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; power-domains = <&CPU_PD0>; power-domain-names = "psci"; @@ -45,6 +46,7 @@ CPU1: cpu@100 { device_type = "cpu"; compatible = "arm,cortex-a55"; reg = <0x0 0x100>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; power-domains = <&CPU_PD1>; power-domain-names = "psci"; @@ -60,6 +62,7 @@ CPU2: cpu@200 { device_type = "cpu"; compatible = "arm,cortex-a55"; reg = <0x0 0x200>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; power-domains = <&CPU_PD2>; power-domain-names = "psci"; @@ -75,6 +78,7 @@ CPU3: cpu@300 { device_type = "cpu"; compatible = "arm,cortex-a55"; reg = <0x0 0x300>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; power-domains = <&CPU_PD3>; power-domain-names = "psci"; @@ -1312,6 +1316,7 @@ cpufreq_hw: cpufreq@17d90000 { clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; clock-names = "xo", "alternate"; #freq-domain-cells = <1>; + #clock-cells = <1>; }; gem_noc: interconnect@19100000 { From patchwork Wed Feb 15 07:03:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 653772 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A2642C636CC for ; Wed, 15 Feb 2023 07:05:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233769AbjBOHFq (ORCPT ); Wed, 15 Feb 2023 02:05:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36234 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233840AbjBOHFL (ORCPT ); Wed, 15 Feb 2023 02:05:11 -0500 Received: from mail-pj1-x102f.google.com (mail-pj1-x102f.google.com [IPv6:2607:f8b0:4864:20::102f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3ECE62B2AB for ; Tue, 14 Feb 2023 23:04:46 -0800 (PST) Received: by mail-pj1-x102f.google.com with SMTP id d2so17310122pjd.5 for ; Tue, 14 Feb 2023 23:04:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=6hWzwrq3hV8TOIaiR9k+5O0t1qbVTCRxBbpH8HHjlnE=; b=TXxVBnOl2SIR4Z+zNTzp6FqHB53+Ro8Go7PuEp2MxkqRwcIxvh5bMwnmHSSKMpLilf 1Y8OZQuBrGEsJ3NfgbwuUeS7Ll+HNzDmvtfRFsaW6b2USxa4Ay8mc054jZl0cg71lm8x 8Smdib4ujb59JRqQJAlzeO2le2ZBpJXGSCb8WKJ0Uv+isQVhvHMsSqH6e+s7eliCN4Vv j+N6v3E9sfXGX34XhdgaAk2bJ0O389NX5JC+M+E9Tp5BhdDTb6VaqKyIB7dawYXzTUQ/ cV9rPjHlfBzY0kiMMkbUWkoM5KXCzoxBmc/HEk7PFhuyJc6JnS1rJS1I28RYa2NTl41r 59pg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6hWzwrq3hV8TOIaiR9k+5O0t1qbVTCRxBbpH8HHjlnE=; b=oMUa/Op8hul8n6vJO9SX8gWPPFz7dQqtRv56R0ssZv6k8IvCVPG29U0kroRe13Ueyh nNxhQajQPM3v5yqVZBS09TiJjnM9yEJB3l4icwkg+wN8XZSRjuygslkQb0GDF5AhgVVM q1FB6RctvYSyeneLbYpDcbXOLZONy4RKu9vhTt/OpuuLKY2VvNXhNZOYjeL/ByUuNoBF Myo5TsWJ6oLolu466Ado/o6UjSvZjulF+Nain6WBsNbCJ1K35EMcLjHBiP55unu/DKSE uVgBECTfDQEkaREx+NWHC9cHX/Fku85ftZ24QwZErYFzIvCrajIRVT1UNAzNzfDi2ePX 8/zg== X-Gm-Message-State: AO0yUKWbXalOg2CTpmle0HqEwMLx3JsMa9kdd896ECr+NpYV/k6Te5QV wJwKJ3eFeSJXNNUcKZ8vxHLo X-Google-Smtp-Source: AK7set/dvRUR4GZQ9t+4QoWWw1umfYbQXveA2+ox4t3Z1D+kxLGtdPXh57GFTCY3HU70nL6cqfvoPw== X-Received: by 2002:a05:6a20:a1a5:b0:bc:ccea:a969 with SMTP id r37-20020a056a20a1a500b000bccceaa969mr758477pzk.26.1676444683578; Tue, 14 Feb 2023 23:04:43 -0800 (PST) Received: from localhost.localdomain ([117.217.179.87]) by smtp.gmail.com with ESMTPSA id e23-20020a63db17000000b004fb26a80875sm9953795pgg.22.2023.02.14.23.04.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Feb 2023 23:04:43 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, viresh.kumar@linaro.org, Manivannan Sadhasivam Subject: [RESEND PATCH 08/12] arm64: dts: qcom: sm8150: Supply clock from cpufreq node to CPUs Date: Wed, 15 Feb 2023 12:33:56 +0530 Message-Id: <20230215070400.5901-9-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230215070400.5901-1-manivannan.sadhasivam@linaro.org> References: <20230215070400.5901-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Qualcomm platforms making use of CPUFreq HW Engine (EPSS/OSM) supply clocks to the CPU cores. But this relationship is not represented in DTS so far. So let's make cpufreq node as the clock provider and CPU nodes as the consumers. The clock index for each CPU node is based on the frequency domain index. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index fd20096cfc6e..693d023d2629 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -48,6 +48,7 @@ CPU0: cpu@0 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x0>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <488>; dynamic-power-coefficient = <232>; @@ -74,6 +75,7 @@ CPU1: cpu@100 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x100>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <488>; dynamic-power-coefficient = <232>; @@ -97,6 +99,7 @@ CPU2: cpu@200 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x200>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <488>; dynamic-power-coefficient = <232>; @@ -119,6 +122,7 @@ CPU3: cpu@300 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x300>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <488>; dynamic-power-coefficient = <232>; @@ -141,6 +145,7 @@ CPU4: cpu@400 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x400>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <369>; @@ -163,6 +168,7 @@ CPU5: cpu@500 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x500>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <369>; @@ -185,6 +191,7 @@ CPU6: cpu@600 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x600>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <369>; @@ -207,6 +214,7 @@ CPU7: cpu@700 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x700>; + clocks = <&cpufreq_hw 2>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <421>; @@ -4273,6 +4281,7 @@ cpufreq_hw: cpufreq@18323000 { clock-names = "xo", "alternate"; #freq-domain-cells = <1>; + #clock-cells = <1>; }; lmh_cluster1: lmh@18350800 { From patchwork Wed Feb 15 07:03:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 653771 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CB3A0C636D4 for ; Wed, 15 Feb 2023 07:06:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233793AbjBOHGE (ORCPT ); Wed, 15 Feb 2023 02:06:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37740 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233746AbjBOHF2 (ORCPT ); Wed, 15 Feb 2023 02:05:28 -0500 Received: from mail-pj1-x1031.google.com (mail-pj1-x1031.google.com [IPv6:2607:f8b0:4864:20::1031]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 27F7E35257 for ; Tue, 14 Feb 2023 23:04:55 -0800 (PST) Received: by mail-pj1-x1031.google.com with SMTP id w14-20020a17090a5e0e00b00233d3b9650eso1162457pjf.4 for ; Tue, 14 Feb 2023 23:04:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mhId2O9gS5a2V65bZNIgYaEIr4oaxUhIqjkueyE7108=; b=MthjD0BfberAbO0QFqNFW+BqR6YFH9fssU+5ez5mAOfZVCLwOdcd1XilGeQyuCBXvF NLnj6jAZRwDV2HxYmxy1/KvaMZ76erd+A/e3UiG7C5/5vDnh0phAeeYDEUZrjrIubc94 2Yc9yrMxIrPdKyzrkTby9du5/DuS9gzrMCYQURa4jDlvFYa9A98R0FMO7sauL44XsfnL ZfC/fhQ6YUkZ6/p8eMXw6NlkeZ+W0mxuCpicfLG5tcbnQGNGTbxq23jqgHQEiqklDEwm ZMTd2jRnePqKNc0CGHRM4hW4bRA0cAgBcDODnKnxJQkL7swmPrtmcallNgYCRw/tW304 v0mQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mhId2O9gS5a2V65bZNIgYaEIr4oaxUhIqjkueyE7108=; b=cwDy2y2pDEta+YCN7uDDVSn2UcCF0X9b011tjVNJelVjIlOWTTl6p99Z/0yi4AmgWJ wym+6g+4FnXxJQKIL4Pnh/VWCJ+mfo+zHuvGpogv5aaYU4fwLwtzHzD7atzKhIICYTJl IiHZerFa5XprAuWmGUbcUgLT4ujfHvWxuacdPsz+GrQZNGHyqaIEaCvpV8PeoAJZXSyM RRpePtjEPmRV7VuK9LZDVfA3b7iGXuIFfvsQh5fOvARrHsO5Dg7ic+LLmicEtpiWhK/1 QhGizMbtnZSGbZXZrH4UvAQPRhD1HIguyFnBjep5RvA2/+EM3LmBXXqaanHO7LbIL2mx EBFQ== X-Gm-Message-State: AO0yUKUmuQ3BWCd4M60voljrIuA2g6jamZMbWviN8o2IVIF80/Dt29Ax AU2if/+Xbf2n8CtkwDU30o5S X-Google-Smtp-Source: AK7set9gn3u4n+bGAMPrFkdZ7B75WEtqClOTNROugFcTmkYkYaMaRXDAqCARElNWUmcHfM3YmSyCpQ== X-Received: by 2002:a05:6a20:6912:b0:be:fa43:9476 with SMTP id q18-20020a056a20691200b000befa439476mr1253609pzj.35.1676444691680; Tue, 14 Feb 2023 23:04:51 -0800 (PST) Received: from localhost.localdomain ([117.217.179.87]) by smtp.gmail.com with ESMTPSA id e23-20020a63db17000000b004fb26a80875sm9953795pgg.22.2023.02.14.23.04.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Feb 2023 23:04:51 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, viresh.kumar@linaro.org, Manivannan Sadhasivam Subject: [RESEND PATCH 10/12] arm64: dts: qcom: sc8280xp: Supply clock from cpufreq node to CPUs Date: Wed, 15 Feb 2023 12:33:58 +0530 Message-Id: <20230215070400.5901-11-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230215070400.5901-1-manivannan.sadhasivam@linaro.org> References: <20230215070400.5901-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Qualcomm platforms making use of CPUFreq HW Engine (EPSS/OSM) supply clocks to the CPU cores. But this relationship is not represented in DTS so far. So let's make cpufreq node as the clock provider and CPU nodes as the consumers. The clock index for each CPU node is based on the frequency domain index. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 813fb168801f..a1eb9e333699 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -45,6 +45,7 @@ CPU0: cpu@0 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x0>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <602>; next-level-cache = <&L2_0>; @@ -69,6 +70,7 @@ CPU1: cpu@100 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x100>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <602>; next-level-cache = <&L2_100>; @@ -89,6 +91,7 @@ CPU2: cpu@200 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x200>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <602>; next-level-cache = <&L2_200>; @@ -109,6 +112,7 @@ CPU3: cpu@300 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x300>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <602>; next-level-cache = <&L2_300>; @@ -129,6 +133,7 @@ CPU4: cpu@400 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x400>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; next-level-cache = <&L2_400>; @@ -149,6 +154,7 @@ CPU5: cpu@500 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x500>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; next-level-cache = <&L2_500>; @@ -169,6 +175,7 @@ CPU6: cpu@600 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x600>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; next-level-cache = <&L2_600>; @@ -189,6 +196,7 @@ CPU7: cpu@700 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x700>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; next-level-cache = <&L2_700>; @@ -3875,6 +3883,7 @@ cpufreq_hw: cpufreq@18591000 { clock-names = "xo", "alternate"; #freq-domain-cells = <1>; + #clock-cells = <1>; }; remoteproc_nsp0: remoteproc@1b300000 { From patchwork Wed Feb 15 07:04:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 653770 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AD8DAC64EC7 for ; Wed, 15 Feb 2023 07:06:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233801AbjBOHGH (ORCPT ); Wed, 15 Feb 2023 02:06:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38118 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233651AbjBOHFo (ORCPT ); Wed, 15 Feb 2023 02:05:44 -0500 Received: from mail-pg1-x52b.google.com (mail-pg1-x52b.google.com [IPv6:2607:f8b0:4864:20::52b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B159534F58 for ; Tue, 14 Feb 2023 23:04:59 -0800 (PST) Received: by mail-pg1-x52b.google.com with SMTP id z6so7922418pgk.0 for ; Tue, 14 Feb 2023 23:04:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=E9SZVljqrUgZ+rONZA9P+4NVWoVxjLglMoeDTNYtK/s=; b=vGsvj9+7E+fcbpEsGcJbRqZHNGK+vVQReuooTnh1mGB0auT9rze2W+v1+qeDstnQA6 UM57R8zIw9S4EBoKoQCcInBerSxDuyK3F9AT0OwMdNQZICFQ+pWjHXRhM7xKNNtHdBr+ oL1EMjGwN7nY7xZYYyAN58svbOvgYAicDpXSbSBMdxvoAq6XYqxg+r+dYrO98TKnW2Td qnjoiv2MZ1gZafOq6lJoaqVtwuuZXWE+jX+J9EhvqIfaEh7nPn7XOcmZ2xXXEOrUC0Kx 3NXXVwdJkxwxneTJJ3bu0xfX6OEGUSxnHB0BewHoAKWLHxbqmuaHLddcunPy2tPRGuzL Ylsg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=E9SZVljqrUgZ+rONZA9P+4NVWoVxjLglMoeDTNYtK/s=; b=AMwv84ZuadO1UwVGgL7XQ+nN5reFi8C4S5hdqzv3eaWQiyH8QS2WbHpUQQ4BCctbk/ LFdMVEJjvXZTIgv7fHZ39SwTAmAEbzW0tsRK45JBoLBshZSOrBzCoJ3Eqt8owkCQc7ai gDlJuXYlaZqwsuRHP/oggghb3fL9VAWKyvI3qCzLmRj2uvNxg1ZcEv7pxLbhYXHi6/Jx lgET6qJBQ5E7xI30kozse1swpZG9Stcl1xhvOagYKVwxjzfxJQdguCPdJueFT3uNEQ3U 5fiYvuR5/ulWZF9u7SkLLwfQE1icWbGmG01UEI9/pns5d03d3gixNV5h0HmMYwn0UUH5 7pbg== X-Gm-Message-State: AO0yUKVNHssLFmKMTgYRS8g0KhNHECh7xLvmj7CynOqve8wmywSveQaQ lHHB0OthaN9oh6V18DT4gP0w X-Google-Smtp-Source: AK7set/ms4duETp2wCsPmCbgGWdXj6W212ASa08LIZGeYWuk+vsPdwsUdZ+MSTHKVbW7RJAt+nUrgg== X-Received: by 2002:a05:6a00:42:b0:598:b178:a3a9 with SMTP id i2-20020a056a00004200b00598b178a3a9mr909696pfk.6.1676444699140; Tue, 14 Feb 2023 23:04:59 -0800 (PST) Received: from localhost.localdomain ([117.217.179.87]) by smtp.gmail.com with ESMTPSA id e23-20020a63db17000000b004fb26a80875sm9953795pgg.22.2023.02.14.23.04.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Feb 2023 23:04:58 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, viresh.kumar@linaro.org, Manivannan Sadhasivam Subject: [RESEND PATCH 12/12] arm64: dts: qcom: sm6115: Supply clock from cpufreq node to CPUs Date: Wed, 15 Feb 2023 12:34:00 +0530 Message-Id: <20230215070400.5901-13-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230215070400.5901-1-manivannan.sadhasivam@linaro.org> References: <20230215070400.5901-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Qualcomm platforms making use of CPUFreq HW Engine (EPSS/OSM) supply clocks to the CPU cores. But this relationship is not represented in DTS so far. So let's make cpufreq node as the clock provider and CPU nodes as the consumers. The clock index for each CPU node is based on the frequency domain index. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index 4d6ec815b78b..f55b193139bf 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -39,6 +39,7 @@ CPU0: cpu@0 { device_type = "cpu"; compatible = "qcom,kryo260"; reg = <0x0 0x0>; + clocks = <&cpufreq_hw 0>; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <100>; enable-method = "psci"; @@ -54,6 +55,7 @@ CPU1: cpu@1 { device_type = "cpu"; compatible = "qcom,kryo260"; reg = <0x0 0x1>; + clocks = <&cpufreq_hw 0>; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <100>; enable-method = "psci"; @@ -65,6 +67,7 @@ CPU2: cpu@2 { device_type = "cpu"; compatible = "qcom,kryo260"; reg = <0x0 0x2>; + clocks = <&cpufreq_hw 0>; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <100>; enable-method = "psci"; @@ -76,6 +79,7 @@ CPU3: cpu@3 { device_type = "cpu"; compatible = "qcom,kryo260"; reg = <0x0 0x3>; + clocks = <&cpufreq_hw 0>; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <100>; enable-method = "psci"; @@ -87,6 +91,7 @@ CPU4: cpu@100 { device_type = "cpu"; compatible = "qcom,kryo260"; reg = <0x0 0x100>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1638>; dynamic-power-coefficient = <282>; @@ -102,6 +107,7 @@ CPU5: cpu@101 { device_type = "cpu"; compatible = "qcom,kryo260"; reg = <0x0 0x101>; + clocks = <&cpufreq_hw 1>; capacity-dmips-mhz = <1638>; dynamic-power-coefficient = <282>; enable-method = "psci"; @@ -113,6 +119,7 @@ CPU6: cpu@102 { device_type = "cpu"; compatible = "qcom,kryo260"; reg = <0x0 0x102>; + clocks = <&cpufreq_hw 1>; capacity-dmips-mhz = <1638>; dynamic-power-coefficient = <282>; enable-method = "psci"; @@ -124,6 +131,7 @@ CPU7: cpu@103 { device_type = "cpu"; compatible = "qcom,kryo260"; reg = <0x0 0x103>; + clocks = <&cpufreq_hw 1>; capacity-dmips-mhz = <1638>; dynamic-power-coefficient = <282>; enable-method = "psci"; @@ -2123,6 +2131,7 @@ cpufreq_hw: cpufreq@f521000 { clock-names = "xo", "alternate"; #freq-domain-cells = <1>; + #clock-cells = <1>; }; };