From patchwork Thu Feb 16 18:20:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 654134 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 262EFC636CC for ; Thu, 16 Feb 2023 18:21:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229844AbjBPSVN (ORCPT ); Thu, 16 Feb 2023 13:21:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54956 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230071AbjBPSVL (ORCPT ); Thu, 16 Feb 2023 13:21:11 -0500 Received: from mail-pl1-x629.google.com (mail-pl1-x629.google.com [IPv6:2607:f8b0:4864:20::629]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0FC7E38EBB for ; Thu, 16 Feb 2023 10:21:02 -0800 (PST) Received: by mail-pl1-x629.google.com with SMTP id l9so354490plk.3 for ; Thu, 16 Feb 2023 10:21:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3T/9WMqfcgE40kVyTz05I09P0F9v/Zdvsnucdf4/Z5g=; b=MBRj07iUrgHWwP/PL9m6AtLW+qb8U18eyO6/36bns9c6UoAOz2OzMnR2e4Cdh6Kv4c 5U3H0CPnIrADmR9yLkbugn1hcLCwwqX07zxNNUuoWIr+c6fZODCF7wT2aZuT+AzlLvOa Q1ROw/0yRUOXRLx+2eqd2dsbqX+/BhpdhlpB5hqPlV9ELFw9Sc/nDaT/FlGczY596ewa V3OBgDoq6t1w7RJfsd72MzeoWGcwoO9R7yCsPe0OdQTxO/2T1f/tTd9iv2nhXTZPKIzc 3dZUhwf3Fr6ueWe9wpMBUEMC2rqOMV0kbLLOHPkBfH84LyRg+JVQuMaOop0ElzXAP9ut jG5g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3T/9WMqfcgE40kVyTz05I09P0F9v/Zdvsnucdf4/Z5g=; b=FDmv7hFoqn6dQk3PPyuQt9SbFxsvFGkBj/R6KuFn9SKoKqFBET9GmpmgBoq/5Z1b9E zTvUKZL61Y5EKP52C3MnO/hH9Z3E3U07gvQqxNIaLKNmRMRv3OI1BPUXp66k5hDbSgwM ASxEZvYupg8m50CeGKl4otF98uOZTSJxOD6kaJtr9Ul3RZB1O9GzLM3n+bmPh7L3+cv0 nidnbpuKQHYvCq6Yj0Xml2vqDikPgXmb+BEOOyuZfti5KK6n1uLrVwjV9IpCe3jAJCjL V/UQsPFNPETnTW4Jsy6HrgMkC8uBClPWgjDYLupES/wFUakqv+dnKhtyYlC4UiKz3lwn QmIQ== X-Gm-Message-State: AO0yUKXmH/FB+eQOe9QziN2barfKZBMoxUBp1qWjuwzOQMM2gYpBe1PR i5iDCY22aNz+TCOpDwGib4XChA== X-Google-Smtp-Source: AK7set8o22c6x1/057iVtVepqFXyS1Iug9Z7IPjx7jh1+w4cPpbGWJMNy8wLXDEg7dW4snHpwIby/Q== X-Received: by 2002:a05:6a20:8f07:b0:bc:7bdd:551b with SMTP id b7-20020a056a208f0700b000bc7bdd551bmr9022499pzk.45.1676571661568; Thu, 16 Feb 2023 10:21:01 -0800 (PST) Received: from kerodi.Dlink ([49.206.14.226]) by smtp.gmail.com with ESMTPSA id n21-20020a637215000000b004dff15fc121sm1517574pgc.36.2023.02.16.10.20.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 10:21:01 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , Paul Walmsley , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Conor Dooley , Andrew Jones , Anup Patel , Atish Patra , Sunil V L , Robert Moore , acpica-devel@lists.linuxfoundation.org, "Rafael J . Wysocki" Subject: [PATCH V2 02/21] ACPICA: MADT: Add RISC-V INTC interrupt controller Date: Thu, 16 Feb 2023 23:50:24 +0530 Message-Id: <20230216182043.1946553-3-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216182043.1946553-1-sunilvl@ventanamicro.com> References: <20230216182043.1946553-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org The ECR to add RISC-V INTC interrupt controller is approved by the UEFI forum and will be available in the next revision of the ACPI specification. This patch is not yet merged in ACPICA but a PR is raised. ACPICA PR: https://github.com/acpica/acpica/pull/804 Reference: Mantis ID: 2348 Cc: Robert Moore Cc: acpica-devel@lists.linuxfoundation.org Signed-off-by: Sunil V L Acked-by: Rafael J. Wysocki --- include/acpi/actbl2.h | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/include/acpi/actbl2.h b/include/acpi/actbl2.h index b2973dbe37ee..abb700d246df 100644 --- a/include/acpi/actbl2.h +++ b/include/acpi/actbl2.h @@ -891,7 +891,8 @@ enum acpi_madt_type { ACPI_MADT_TYPE_MSI_PIC = 21, ACPI_MADT_TYPE_BIO_PIC = 22, ACPI_MADT_TYPE_LPC_PIC = 23, - ACPI_MADT_TYPE_RESERVED = 24, /* 24 to 0x7F are reserved */ + ACPI_MADT_TYPE_RINTC = 24, + ACPI_MADT_TYPE_RESERVED = 25, /* 25 to 0x7F are reserved */ ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */ }; @@ -1250,6 +1251,24 @@ enum acpi_madt_lpc_pic_version { ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ }; +/* 24: RISC-V INTC */ +struct acpi_madt_rintc { + struct acpi_subtable_header header; + u8 version; + u8 reserved; + u32 flags; + u64 hart_id; + u32 uid; /* ACPI processor UID */ +}; + +/* Values for RISC-V INTC Version field above */ + +enum acpi_madt_rintc_version { + ACPI_MADT_RINTC_VERSION_NONE = 0, + ACPI_MADT_RINTC_VERSION_V1 = 1, + ACPI_MADT_RINTC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ +}; + /* 80: OEM data */ struct acpi_madt_oem_data { From patchwork Thu Feb 16 18:20:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 654133 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BB761C636D7 for ; Thu, 16 Feb 2023 18:21:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230169AbjBPSVe (ORCPT ); Thu, 16 Feb 2023 13:21:34 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55512 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230071AbjBPSVd (ORCPT ); Thu, 16 Feb 2023 13:21:33 -0500 Received: from mail-pl1-x634.google.com (mail-pl1-x634.google.com [IPv6:2607:f8b0:4864:20::634]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E276138EBB for ; Thu, 16 Feb 2023 10:21:12 -0800 (PST) Received: by mail-pl1-x634.google.com with SMTP id o8so2905859pls.11 for ; Thu, 16 Feb 2023 10:21:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=yWquo8X215yUxlcuMVI51NmUYIJJYyh2AH39DTzBzA0=; b=Y/uNQfauyNwP1IebYIQnlrUvDZZmMoA/yun6sqqObhrrmiVowECJlHh8IDwLwV6Mrs MjS//bPzSDjS9aQqAvZYuPwYcBFXD/WKKP12nV6ruoSWOybXib04rUTACCOh8K+yF7w3 z8b4XUnhO+8LxWp/iyPecQcHqNkdQYH8UNVz7ndvMGv62gbahohUlDOgfsoGAxMCRC5H aDVpYVp+KXwC27ZIHotI/AbjsnKL9OYUF78nrwsdf32A0KZk1BpkDo0RODVnzm4q6gEd 5OyE7L6NhGwfXlNfVZZL7vCzosH0KzahtK60qK5vQeHopoWXAvKpE+jw48MKjYmEyq54 nLXw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=yWquo8X215yUxlcuMVI51NmUYIJJYyh2AH39DTzBzA0=; b=E5ITWrKhjQWGewHxIVxR6+52G+AuTi16sHZ9fYm0o7IHuDX0BOyNSrO/YSXUCxcUU+ h6ZSF1NSX0NklWXTaOzhPJAfG8mCfA52RVTtRD8sAlJIkNMelr0ij6zUHabJwtSIlT2U 24gPWKI6ULul2EznuvIXYSEf1ZBGmOV+OykwuZZP2ehtmSV5xonvJWMwYwW/wOuTVvpu 3MlYtNVBxl+LEg+LSRO/WeimXf8hsbWOLUofe5yjjfu6Gg3u0P6Lsb+U3adwfXkDYjGY YCZyioLZ5V85OQFTfIA3eeSWzRpxe30+WmclShMb6W8whlcHWSG4/0sDaYQKgw6iBSmg Y/EA== X-Gm-Message-State: AO0yUKVKYdAb0Va5BhhxTBSkmDhX4NN/NfAAzcn0NRrDZeuV/sJGtBfC Kk6oRJy9ZoDpiRBls74v2CE2og== X-Google-Smtp-Source: AK7set91n5anNcToKIHo1nCNsdSUc/vn6DLL7/0cepiYJORH2Nk7E/8pcd4AT/BFiFSlkmtsonqO4w== X-Received: by 2002:a05:6a20:a10c:b0:b6:40ae:823e with SMTP id q12-20020a056a20a10c00b000b640ae823emr7326203pzk.5.1676571672339; Thu, 16 Feb 2023 10:21:12 -0800 (PST) Received: from kerodi.Dlink ([49.206.14.226]) by smtp.gmail.com with ESMTPSA id n21-20020a637215000000b004dff15fc121sm1517574pgc.36.2023.02.16.10.21.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 10:21:11 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , Paul Walmsley , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Conor Dooley , Andrew Jones , Anup Patel , Atish Patra , Sunil V L , "Rafael J . Wysocki" Subject: [PATCH V2 04/21] RISC-V: Add support to build the ACPI core Date: Thu, 16 Feb 2023 23:50:26 +0530 Message-Id: <20230216182043.1946553-5-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216182043.1946553-1-sunilvl@ventanamicro.com> References: <20230216182043.1946553-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Enable ACPI core for RISC-V after adding architecture-specific interfaces and header files required to build the ACPI core. 1) Couple of header files are required unconditionally by the ACPI core. Add empty acenv.h and cpu.h header files. 2) If CONFIG_PCI is enabled, a few PCI related interfaces need to be provided by the architecture. Define dummy interfaces for now so that build succeeds. Actual implementation will be added when PCI support is added for ACPI along with external interrupt controller support. 3) A few globals and memory mapping related functions specific to the architecture need to be provided. Signed-off-by: Sunil V L Acked-by: Rafael J. Wysocki Reviewed-by: Andrew Jones --- arch/riscv/Kconfig | 5 +++ arch/riscv/include/asm/acenv.h | 11 +++++ arch/riscv/include/asm/acpi.h | 60 +++++++++++++++++++++++++ arch/riscv/include/asm/cpu.h | 8 ++++ arch/riscv/kernel/Makefile | 2 + arch/riscv/kernel/acpi.c | 80 ++++++++++++++++++++++++++++++++++ 6 files changed, 166 insertions(+) create mode 100644 arch/riscv/include/asm/acenv.h create mode 100644 arch/riscv/include/asm/acpi.h create mode 100644 arch/riscv/include/asm/cpu.h create mode 100644 arch/riscv/kernel/acpi.c diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index d153e1cd890b..3ba701b26389 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -12,6 +12,8 @@ config 32BIT config RISCV def_bool y + select ACPI_GENERIC_GSI if ACPI + select ACPI_REDUCED_HARDWARE_ONLY if ACPI select ARCH_CLOCKSOURCE_INIT select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2 @@ -598,6 +600,7 @@ config EFI_STUB config EFI bool "UEFI runtime support" depends on OF && !XIP_KERNEL + select ARCH_SUPPORTS_ACPI if 64BIT select LIBFDT select UCS2_STRING select EFI_PARAMS_FROM_FDT @@ -703,3 +706,5 @@ source "drivers/cpufreq/Kconfig" endmenu # "CPU Power Management" source "arch/riscv/kvm/Kconfig" + +source "drivers/acpi/Kconfig" diff --git a/arch/riscv/include/asm/acenv.h b/arch/riscv/include/asm/acenv.h new file mode 100644 index 000000000000..22123c5a4883 --- /dev/null +++ b/arch/riscv/include/asm/acenv.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * RISC-V specific ACPICA environments and implementation + */ + +#ifndef _ASM_ACENV_H +#define _ASM_ACENV_H + +/* It is required unconditionally by ACPI core */ + +#endif /* _ASM_ACENV_H */ diff --git a/arch/riscv/include/asm/acpi.h b/arch/riscv/include/asm/acpi.h new file mode 100644 index 000000000000..7f9dce3c39d0 --- /dev/null +++ b/arch/riscv/include/asm/acpi.h @@ -0,0 +1,60 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2013-2014, Linaro Ltd. + * Author: Al Stone + * Author: Graeme Gregory + * Author: Hanjun Guo + * + * Copyright (C) 2021-2023, Ventana Micro Systems Inc. + * Author: Sunil V L + */ + +#ifndef _ASM_ACPI_H +#define _ASM_ACPI_H + +/* Basic configuration for ACPI */ +#ifdef CONFIG_ACPI + +/* ACPI table mapping after acpi_permanent_mmap is set */ +void *acpi_os_ioremap(acpi_physical_address phys, acpi_size size); +#define acpi_os_ioremap acpi_os_ioremap + +#define acpi_strict 1 /* No out-of-spec workarounds on RISC-V */ +extern int acpi_disabled; +extern int acpi_noirq; +extern int acpi_pci_disabled; +static inline void disable_acpi(void) +{ + acpi_disabled = 1; + acpi_pci_disabled = 1; + acpi_noirq = 1; +} + +static inline void enable_acpi(void) +{ + acpi_disabled = 0; + acpi_pci_disabled = 0; + acpi_noirq = 0; +} + +/* + * The ACPI processor driver for ACPI core code needs this macro + * to find out this cpu was already mapped (mapping from CPU hardware + * ID to CPU logical ID) or not. + */ +#define cpu_physical_id(cpu) cpuid_to_hartid_map(cpu) + +/* + * Since MADT must provide at least one RINTC structure, the + * CPU will be always available in MADT on RISC-V. + */ +static inline bool acpi_has_cpu_in_madt(void) +{ + return true; +} + +static inline void arch_fix_phys_package_id(int num, u32 slot) { } + +#endif /* CONFIG_ACPI */ + +#endif /*_ASM_ACPI_H*/ diff --git a/arch/riscv/include/asm/cpu.h b/arch/riscv/include/asm/cpu.h new file mode 100644 index 000000000000..ea1a88b3d5f2 --- /dev/null +++ b/arch/riscv/include/asm/cpu.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _ASM_CPU_H +#define _ASM_CPU_H + +/* It is required unconditionally by ACPI core */ + +#endif /* _ASM_CPU_H */ diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile index 67f542be1bea..f979dc8cf47d 100644 --- a/arch/riscv/kernel/Makefile +++ b/arch/riscv/kernel/Makefile @@ -90,3 +90,5 @@ obj-$(CONFIG_EFI) += efi.o obj-$(CONFIG_COMPAT) += compat_syscall_table.o obj-$(CONFIG_COMPAT) += compat_signal.o obj-$(CONFIG_COMPAT) += compat_vdso/ + +obj-$(CONFIG_ACPI) += acpi.o diff --git a/arch/riscv/kernel/acpi.c b/arch/riscv/kernel/acpi.c new file mode 100644 index 000000000000..81d448c41714 --- /dev/null +++ b/arch/riscv/kernel/acpi.c @@ -0,0 +1,80 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * RISC-V Specific Low-Level ACPI Boot Support + * + * Copyright (C) 2013-2014, Linaro Ltd. + * Author: Al Stone + * Author: Graeme Gregory + * Author: Hanjun Guo + * Author: Tomasz Nowicki + * Author: Naresh Bhat + * + * Copyright (C) 2021-2023, Ventana Micro Systems Inc. + * Author: Sunil V L + */ + +#include +#include +#include + +int acpi_noirq = 1; /* skip ACPI IRQ initialization */ +int acpi_disabled = 1; +EXPORT_SYMBOL(acpi_disabled); + +int acpi_pci_disabled = 1; /* skip ACPI PCI scan and IRQ initialization */ +EXPORT_SYMBOL(acpi_pci_disabled); + +/* + * __acpi_map_table() will be called before paging_init(), so early_ioremap() + * or early_memremap() should be called here to for ACPI table mapping. + */ +void __init __iomem *__acpi_map_table(unsigned long phys, unsigned long size) +{ + if (!size) + return NULL; + + return early_memremap(phys, size); +} + +void __init __acpi_unmap_table(void __iomem *map, unsigned long size) +{ + if (!map || !size) + return; + + early_memunmap(map, size); +} + +void *acpi_os_ioremap(acpi_physical_address phys, acpi_size size) +{ + return memremap(phys, size, MEMREMAP_WB); +} + +#ifdef CONFIG_PCI + +/* + * These interfaces are defined just to enable building ACPI core. + * TODO: Update it with actual implementation when external interrupt + * controller support is added in RISC-V ACPI. + */ +int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn, + int reg, int len, u32 *val) +{ + return PCIBIOS_DEVICE_NOT_FOUND; +} + +int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn, + int reg, int len, u32 val) +{ + return PCIBIOS_DEVICE_NOT_FOUND; +} + +int acpi_pci_bus_find_domain_nr(struct pci_bus *bus) +{ + return -1; +} + +struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root) +{ + return NULL; +} +#endif /* CONFIG_PCI */ From patchwork Thu Feb 16 18:20:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 654132 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9DC21C636CC for ; Thu, 16 Feb 2023 18:22:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229460AbjBPSWK (ORCPT ); Thu, 16 Feb 2023 13:22:10 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55782 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230077AbjBPSWA (ORCPT ); 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Thu, 16 Feb 2023 10:21:21 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , Paul Walmsley , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Conor Dooley , Andrew Jones , Anup Patel , Atish Patra , Sunil V L , "Rafael J . Wysocki" Subject: [PATCH V2 06/21] ACPI: OSL: Make should_use_kmap() 0 for RISC-V. Date: Thu, 16 Feb 2023 23:50:28 +0530 Message-Id: <20230216182043.1946553-7-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216182043.1946553-1-sunilvl@ventanamicro.com> References: <20230216182043.1946553-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Without this, if the tables are larger than 4K, acpi_map() will fail. Signed-off-by: Sunil V L Acked-by: Rafael J. Wysocki --- drivers/acpi/osl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/acpi/osl.c b/drivers/acpi/osl.c index 3269a888fb7a..f725813d0cce 100644 --- a/drivers/acpi/osl.c +++ b/drivers/acpi/osl.c @@ -276,7 +276,7 @@ acpi_map_lookup_virt(void __iomem *virt, acpi_size size) return NULL; } -#if defined(CONFIG_IA64) || defined(CONFIG_ARM64) +#if defined(CONFIG_IA64) || defined(CONFIG_ARM64) || defined(CONFIG_RISCV) /* ioremap will take care of cache attributes */ #define should_use_kmap(pfn) 0 #else From patchwork Thu Feb 16 18:20:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 654131 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6A655C636CC for ; Thu, 16 Feb 2023 18:22:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230298AbjBPSWT (ORCPT ); Thu, 16 Feb 2023 13:22:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56094 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230260AbjBPSWK (ORCPT ); Thu, 16 Feb 2023 13:22:10 -0500 Received: from mail-pj1-x102e.google.com (mail-pj1-x102e.google.com [IPv6:2607:f8b0:4864:20::102e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7C5E150AC0 for ; Thu, 16 Feb 2023 10:21:34 -0800 (PST) Received: by mail-pj1-x102e.google.com with SMTP id w20-20020a17090a8a1400b00233d7314c1cso6702993pjn.5 for ; Thu, 16 Feb 2023 10:21:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=DbqUdM0Np7Pk7D6Eh4B7c+w7Zw8p8e1vDp1GKV/olkQ=; b=Cxq4zjw6jiDo0nQwfwBieSzkX5YKjnoBEYHQiqtfjZyMdT4h+ntnTqUCdo5Wqdqta0 ioZNZDx7RU8k2x6nUSYhWooOIkqR54fOtPJeGxRsVBAa2ZZhRP7TZhrr9owiZz2GGBHB WAJQzXBVDEFvJeqrn3TzwwT/s+EK3ralTgIMJ0mUMgjQLJLLfRkOGru9dJWPcJltXLjk LEOXzMqeDhuBiJAagG3w6+jB/nEB0QtgvXnzpPFKnRGFFfuF3aUeByZJIwKRfL+S7u02 /+D1ANFIH2qVAGIRGe1SiPpvpVsX95nacHF8qpOzjqVvk+TuwDzE2mPhUyhw7eSnGm6q UGHw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=DbqUdM0Np7Pk7D6Eh4B7c+w7Zw8p8e1vDp1GKV/olkQ=; b=EcLNd3sBuq2vyXpBjSxtVvOnqpfCfk/DODpICBUhWxIvsfk9RiiKQMvbSrIR1ZfL1Z g1VBYE2HjCCpx5DRId0ew9F6pWfE7DEDHY+Uy+EA/JPnyKMFCaYhJVG8nC89jrv3PUqu O/0aPhWO3yZePYqwEeDt5Yx44VW5GSksMFlaMoYrMuekDOcC5jYzeG3ekPF8BqdhWTzC YrHOUZgZQSUdJir1IkXNFvE5OS3tcRxfXclPlegbf0vbzLK1FdWQ2D62Z/nKzVHITHoc w8BbLbdX4SGvG5EF+ICVnjGGQJRLXb5hiPTKOTEGA0rrkzhnWMslonIosft6fMO1dknJ ADeg== X-Gm-Message-State: AO0yUKWjsrgUMAjxlEY7qL7/BnYXTMWQi8cnxolQVnEuYb85YD0rEfrX AtRHbnRdlRiOKj4GIGs5vTpnlA== X-Google-Smtp-Source: AK7set92zVfUHWrg1/Q0sW3fQ8AVEVUXiUYMgvdI1LbFQ5T6RfJCH71VvejNUnOObpioR2uotsiGjw== X-Received: by 2002:a05:6a20:4287:b0:c6:d742:681d with SMTP id o7-20020a056a20428700b000c6d742681dmr3527284pzj.12.1676571691092; Thu, 16 Feb 2023 10:21:31 -0800 (PST) Received: from kerodi.Dlink ([49.206.14.226]) by smtp.gmail.com with ESMTPSA id n21-20020a637215000000b004dff15fc121sm1517574pgc.36.2023.02.16.10.21.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 10:21:30 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , Paul Walmsley , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Conor Dooley , Andrew Jones , Anup Patel , Atish Patra , Sunil V L , "Rafael J . Wysocki" Subject: [PATCH V2 08/21] drivers/acpi: RISC-V: Add RHCT related code Date: Thu, 16 Feb 2023 23:50:30 +0530 Message-Id: <20230216182043.1946553-9-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216182043.1946553-1-sunilvl@ventanamicro.com> References: <20230216182043.1946553-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org RHCT is a new table defined for RISC-V to communicate the features of the CPU to the OS. Create a new architecture folder in drivers/acpi and add RHCT parsing code. Signed-off-by: Sunil V L Acked-by: Rafael J. Wysocki Reviewed-by: Andrew Jones --- arch/riscv/include/asm/acpi.h | 9 ++++ drivers/acpi/Makefile | 2 + drivers/acpi/riscv/Makefile | 2 + drivers/acpi/riscv/rhct.c | 92 +++++++++++++++++++++++++++++++++++ 4 files changed, 105 insertions(+) create mode 100644 drivers/acpi/riscv/Makefile create mode 100644 drivers/acpi/riscv/rhct.c diff --git a/arch/riscv/include/asm/acpi.h b/arch/riscv/include/asm/acpi.h index 4a3622b38159..7bc49f65c86b 100644 --- a/arch/riscv/include/asm/acpi.h +++ b/arch/riscv/include/asm/acpi.h @@ -58,6 +58,15 @@ static inline bool acpi_has_cpu_in_madt(void) static inline void arch_fix_phys_package_id(int num, u32 slot) { } +int acpi_get_riscv_isa(struct acpi_table_header *table, + unsigned int cpu, const char **isa); +#else +static inline int acpi_get_riscv_isa(struct acpi_table_header *table, + unsigned int cpu, const char **isa) +{ + return -EINVAL; +} + #endif /* CONFIG_ACPI */ #endif /*_ASM_ACPI_H*/ diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile index feb36c0b9446..3fc5a0d54f6e 100644 --- a/drivers/acpi/Makefile +++ b/drivers/acpi/Makefile @@ -131,3 +131,5 @@ obj-y += dptf/ obj-$(CONFIG_ARM64) += arm64/ obj-$(CONFIG_ACPI_VIOT) += viot.o + +obj-$(CONFIG_RISCV) += riscv/ diff --git a/drivers/acpi/riscv/Makefile b/drivers/acpi/riscv/Makefile new file mode 100644 index 000000000000..8b3b126e0b94 --- /dev/null +++ b/drivers/acpi/riscv/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0-only +obj-y += rhct.o diff --git a/drivers/acpi/riscv/rhct.c b/drivers/acpi/riscv/rhct.c new file mode 100644 index 000000000000..5bafc236d627 --- /dev/null +++ b/drivers/acpi/riscv/rhct.c @@ -0,0 +1,92 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2022-2023, Ventana Micro Systems Inc + * Author: Sunil V L + * + */ + +#define pr_fmt(fmt) "ACPI: RHCT: " fmt + +#include + +static void acpi_rhct_warn_missing(void) +{ + pr_warn_once("No RHCT table found\n"); +} + +static struct acpi_table_header *acpi_get_rhct(void) +{ + static struct acpi_table_header *rhct; + acpi_status status; + + /* + * RHCT will be used at runtime on every CPU, so we + * don't need to call acpi_put_table() to release the table mapping. + */ + if (!rhct) { + status = acpi_get_table(ACPI_SIG_RHCT, 0, &rhct); + if (ACPI_FAILURE(status)) + acpi_rhct_warn_missing(); + } + + return rhct; +} + +/* + * During early boot, the caller should call acpi_get_table() and pass its pointer to + * these functions(and free up later). At run time, since this table can be used + * multiple times, pass NULL so that the table remains in memory + */ +int acpi_get_riscv_isa(struct acpi_table_header *table, unsigned int acpi_cpu_id, const char **isa) +{ + struct acpi_rhct_node_header *node, *ref_node, *end; + struct acpi_table_rhct *rhct; + struct acpi_rhct_hart_info *hart_info; + struct acpi_rhct_isa_string *isa_node; + u32 *hart_info_node_offset; + int i, j; + u32 size_hdr = sizeof(struct acpi_rhct_node_header); + u32 size_hartinfo = sizeof(struct acpi_rhct_hart_info); + + if (acpi_disabled) { + pr_debug("%s: acpi is disabled\n", __func__); + return -1; + } + + if (!table) { + rhct = (struct acpi_table_rhct *)acpi_get_rhct(); + if (!rhct) + return -ENOENT; + } else { + rhct = (struct acpi_table_rhct *)table; + } + + node = ACPI_ADD_PTR(struct acpi_rhct_node_header, rhct, rhct->node_offset); + end = ACPI_ADD_PTR(struct acpi_rhct_node_header, rhct, rhct->header.length); + + for (i = 0; i < rhct->node_count; i++) { + if (node >= end) + break; + switch (node->type) { + case ACPI_RHCT_NODE_TYPE_HART_INFO: + hart_info = ACPI_ADD_PTR(struct acpi_rhct_hart_info, node, size_hdr); + hart_info_node_offset = ACPI_ADD_PTR(u32, hart_info, size_hartinfo); + if (acpi_cpu_id != hart_info->uid) + break; + for (j = 0; j < hart_info->num_offsets; j++) { + ref_node = ACPI_ADD_PTR(struct acpi_rhct_node_header, + rhct, hart_info_node_offset[j]); + if (ref_node->type == ACPI_RHCT_NODE_TYPE_ISA_STRING) { + isa_node = ACPI_ADD_PTR(struct acpi_rhct_isa_string, + ref_node, size_hdr); + *isa = isa_node->isa; + return 0; + } + } + break; + } + node = ACPI_ADD_PTR(struct acpi_rhct_node_header, node, node->length); + } + + return -1; +} From patchwork Thu Feb 16 18:20:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 654130 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA834C6379F for ; Thu, 16 Feb 2023 18:22:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230334AbjBPSWc (ORCPT ); Thu, 16 Feb 2023 13:22:32 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56244 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230272AbjBPSWL (ORCPT ); Thu, 16 Feb 2023 13:22:11 -0500 Received: from mail-pl1-x62a.google.com (mail-pl1-x62a.google.com [IPv6:2607:f8b0:4864:20::62a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CA6BF50AFA for ; Thu, 16 Feb 2023 10:21:42 -0800 (PST) Received: by mail-pl1-x62a.google.com with SMTP id b5so2936623plz.5 for ; Thu, 16 Feb 2023 10:21:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=s8gLVy86DoWbnyaOmwt3yk4bIOk4obRTX8YOySNU6bM=; b=VpdtjEii+t5cvC5ibTSbTwjU4Vx3GiWKkzTOXqXjUr0YDKlzh2RTmRhrfafw6GTtsc YTQqnR6kqj6GRIgl9yX/vR6IHxTBJo7vdDNEj8DswgI7MPqnnTKk6CnOzErmcN5CCH2b ZwMNZtNf6oZbN7d+YG/54CFyPCKr7rLx8eQKziHq+F0+XPYQXsrOqlge5KMGhUXVQVMo nT8fZ/aoGGnmZ86ZY/5kHh7e+61wbBNj1IkEy+Sk4r9srBbf2euRVlaJls3S5LTMegLN dC+DQ9pSlYuPW3W5SR4Zgw/zMM7vqJOQ/chaI5xf2TMznWD+BoyMvGkFM9XtER5brYcS 3B8w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=s8gLVy86DoWbnyaOmwt3yk4bIOk4obRTX8YOySNU6bM=; b=6c6iSxNFcuSVKw6A77yO4LUvYBfi5EHrFAYgjEzEHomC8y6CFbCMzkiRlBwoNgHnhA ZZgN34//vkbTyaDN6S9m7xyUIgeAsN0lmWTZnL5lIBXL9wBEN1N59aXLeuPZITHcD0wo 6Hs5XwiKviuCWHoRWCgi7tVfEl6SvZl4n5KGTljtipYCGQtvm/snaJbocjCJClsz2ur7 cEGQxZt+y/Atg9rMtYj//8aAOUsby9Q/1mmRRs5nEGWeiEjbw9aHta+qJ9hC/bypK6P0 /ppMZ9ro3XIORGfx9onxr3gNeoH/ibkdKVFBVgHhm8MV2HAvvtVTwhxgF+9VfP2Sn1dX 2GzQ== X-Gm-Message-State: AO0yUKVrmns+X43EeMGelhMumOM1xhq0lydhd0huHhxzl+cT0Coo501W iQhP3FZgNm/WMpBn308IN2fvJA== X-Google-Smtp-Source: AK7set82OpBoXgv7SeiV1Z4RhXl7WcwMoJmnfTKXKVRwepNnMNF/4KU9sf9ovobJziBAs+uVZziTXQ== X-Received: by 2002:a17:90b:1d87:b0:233:d4fd:38a3 with SMTP id pf7-20020a17090b1d8700b00233d4fd38a3mr7710027pjb.41.1676571700518; Thu, 16 Feb 2023 10:21:40 -0800 (PST) Received: from kerodi.Dlink ([49.206.14.226]) by smtp.gmail.com with ESMTPSA id n21-20020a637215000000b004dff15fc121sm1517574pgc.36.2023.02.16.10.21.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 10:21:40 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , Paul Walmsley , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Conor Dooley , Andrew Jones , Anup Patel , Atish Patra , Sunil V L , "Rafael J . Wysocki" Subject: [PATCH V2 10/21] RISC-V: smpboot: Add ACPI support in smp_setup() Date: Thu, 16 Feb 2023 23:50:32 +0530 Message-Id: <20230216182043.1946553-11-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216182043.1946553-1-sunilvl@ventanamicro.com> References: <20230216182043.1946553-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Enable SMP boot on ACPI based platforms by using the RINTC structures in the MADT table. Signed-off-by: Sunil V L Acked-by: Rafael J. Wysocki Reviewed-by: Conor Dooley --- arch/riscv/include/asm/acpi.h | 7 ++++ arch/riscv/kernel/smpboot.c | 70 ++++++++++++++++++++++++++++++++++- 2 files changed, 76 insertions(+), 1 deletion(-) diff --git a/arch/riscv/include/asm/acpi.h b/arch/riscv/include/asm/acpi.h index 7bc49f65c86b..3c3a8ac3b37a 100644 --- a/arch/riscv/include/asm/acpi.h +++ b/arch/riscv/include/asm/acpi.h @@ -60,6 +60,13 @@ static inline void arch_fix_phys_package_id(int num, u32 slot) { } int acpi_get_riscv_isa(struct acpi_table_header *table, unsigned int cpu, const char **isa); + +#ifdef CONFIG_ACPI_NUMA +int acpi_numa_get_nid(unsigned int cpu); +#else +static inline int acpi_numa_get_nid(unsigned int cpu) { return NUMA_NO_NODE; } +#endif /* CONFIG_ACPI_NUMA */ + #else static inline int acpi_get_riscv_isa(struct acpi_table_header *table, unsigned int cpu, const char **isa) diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c index 26214ddefaa4..77630f8ed12b 100644 --- a/arch/riscv/kernel/smpboot.c +++ b/arch/riscv/kernel/smpboot.c @@ -8,6 +8,7 @@ * Copyright (C) 2017 SiFive */ +#include #include #include #include @@ -70,6 +71,70 @@ void __init smp_prepare_cpus(unsigned int max_cpus) } } +#ifdef CONFIG_ACPI +static unsigned int cpu_count = 1; + +static int __init acpi_parse_rintc(union acpi_subtable_headers *header, const unsigned long end) +{ + unsigned long hart; + bool found_boot_cpu = false; + struct acpi_madt_rintc *processor = (struct acpi_madt_rintc *)header; + + /* + * Each RINTC structure in MADT will have a flag. If ACPI_MADT_ENABLED + * bit in the flag is not enabled, it means OS should not try to enable + * the cpu to which RINTC belongs. + */ + if (!(processor->flags & ACPI_MADT_ENABLED)) + return 0; + + hart = processor->hart_id; + if (hart < 0) + return 0; + if (hart == cpuid_to_hartid_map(0)) { + BUG_ON(found_boot_cpu); + found_boot_cpu = true; + early_map_cpu_to_node(0, acpi_numa_get_nid(cpu_count)); + return 0; + } + + if (cpu_count >= NR_CPUS) { + pr_warn("Invalid cpuid [%d] for hartid [%lu]\n", + cpu_count, hart); + return 0; + } + + cpuid_to_hartid_map(cpu_count) = hart; + early_map_cpu_to_node(cpu_count, acpi_numa_get_nid(cpu_count)); + cpu_count++; + + return 0; +} + +static void __init acpi_parse_and_init_cpus(void) +{ + int cpuid; + + cpu_set_ops(0); + + /* + * do a walk of MADT to determine how many CPUs + * we have including disabled CPUs, and get information + * we need for SMP init. + */ + acpi_table_parse_madt(ACPI_MADT_TYPE_RINTC, acpi_parse_rintc, 0); + + for (cpuid = 1; cpuid < nr_cpu_ids; cpuid++) { + if (cpuid_to_hartid_map(cpuid) != INVALID_HARTID) { + cpu_set_ops(cpuid); + set_cpu_possible(cpuid, true); + } + } +} +#else +#define acpi_parse_and_init_cpus(...) do { } while (0) +#endif + static void __init of_parse_and_init_cpus(void) { struct device_node *dn; @@ -118,7 +183,10 @@ static void __init of_parse_and_init_cpus(void) void __init setup_smp(void) { - of_parse_and_init_cpus(); + if (acpi_disabled) + of_parse_and_init_cpus(); + else + acpi_parse_and_init_cpus(); } static int start_secondary_cpu(int cpu, struct task_struct *tidle) From patchwork Thu Feb 16 18:20:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 654129 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D5735C636CC for ; Thu, 16 Feb 2023 18:22:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230366AbjBPSWz (ORCPT ); Thu, 16 Feb 2023 13:22:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56280 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230267AbjBPSWV (ORCPT ); Thu, 16 Feb 2023 13:22:21 -0500 Received: from mail-pj1-x102f.google.com (mail-pj1-x102f.google.com [IPv6:2607:f8b0:4864:20::102f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F2D02521D5 for ; Thu, 16 Feb 2023 10:21:50 -0800 (PST) Received: by mail-pj1-x102f.google.com with SMTP id fu4-20020a17090ad18400b002341fadc370so6736007pjb.1 for ; Thu, 16 Feb 2023 10:21:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=oVlhq9jJF5fkqCwNhAPs1olNplFdF6B5WclRLPqFQkc=; b=Ih5cdvHUc+6binLwjpr9QH0EbQBhTLyXOn/RYXvnmLofBP2hcHPkdG0+7hRgOIc02B 5GjCVp29i00cLIPLwY831s+ehgLGUY5ccr/5K8Ey+Q9UIFlTzXxleMG/mmV+zz0rmfxx EeCcij3QYpom+JUlpOhqSPVU14ZW5Q01dfQ9xD0heAmdGyuYsIbPcwN2dc6YsfWyPYvh liTNxl3kFNv75Su6bUJ37zkzS0WxwE7ZOgsJ4PWqf/bMl4qPijkYC+2QM6Y2e1gJ/1DG szGLGMguiud/r0MyWRTMx0xryUd8EIMUNOEcamcLUNJP+REakrD9PxQOyILiHtEZ2zJ+ im/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=oVlhq9jJF5fkqCwNhAPs1olNplFdF6B5WclRLPqFQkc=; b=oAsmIzd4xywBNOcKcoHPRGxQxobegIdcjStzDyl7lYmBKr7pd9GehmDzSvr+P5JuYM EV6iuNZfEWkVsO/9P+WlUWZgUrkWnvRb9YKT7NaibVgW2QXON05Nr7CgTyYO6ofqj2oO 8n2v3wh01u8mlmPf3oL0WglNNbU5lebt7rsiGrlofQrbYlAoaOBX/kJ9z6lTXhm//4PA dKD3OIXYN2mn8hEnsLk4/sHZUfSygURUtWIfSPm2FoVcBaawsdwkcSoHHF5BlHrOWuHj V7/2Ew4JL7tzK09fknXRHeToJmXLy939PZI/kFO6hpkRMK5LF2c8A3HVSk7F3Wo9FUoT IIlg== X-Gm-Message-State: AO0yUKXcsAeGBgWDvaFrVW35eINnBOvbGhlfsF/XqY9dxayzksa4WegS 6tPJcJuSZJTrO2bEMkZFHBqrQQ== X-Google-Smtp-Source: AK7set+h7vf0LoZNkAGb2ghe6awEhCUdpqK+4V6FZ+wNFpKTON2Ckkza6yhNBDRyc7g3pDb0ZFspUg== X-Received: by 2002:a05:6a21:7899:b0:c7:6664:1e07 with SMTP id bf25-20020a056a21789900b000c766641e07mr202270pzc.28.1676571710197; Thu, 16 Feb 2023 10:21:50 -0800 (PST) Received: from kerodi.Dlink ([49.206.14.226]) by smtp.gmail.com with ESMTPSA id n21-20020a637215000000b004dff15fc121sm1517574pgc.36.2023.02.16.10.21.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 10:21:49 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , Paul Walmsley , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Conor Dooley , Andrew Jones , Anup Patel , Atish Patra , Sunil V L , "Rafael J . Wysocki" Subject: [PATCH V2 12/21] RISC-V: cpufeature: Add ACPI support in riscv_fill_hwcap() Date: Thu, 16 Feb 2023 23:50:34 +0530 Message-Id: <20230216182043.1946553-13-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216182043.1946553-1-sunilvl@ventanamicro.com> References: <20230216182043.1946553-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org On ACPI based systems, the information about the hart like ISA is provided by the RISC-V Hart Capabilities Table (RHCT). Enable filling up hwcap structure based on the information in RHCT. Signed-off-by: Sunil V L Acked-by: Rafael J. Wysocki --- arch/riscv/kernel/cpufeature.c | 41 ++++++++++++++++++++++++++++------ 1 file changed, 34 insertions(+), 7 deletions(-) diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index 93e45560af30..cb67d3fcbb56 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -6,12 +6,15 @@ * Copyright (C) 2017 SiFive */ +#include #include #include #include #include #include #include +#include +#include #include #include #include @@ -93,7 +96,10 @@ void __init riscv_fill_hwcap(void) char print_str[NUM_ALPHA_EXTS + 1]; int i, j, rc; unsigned long isa2hwcap[26] = {0}; + struct acpi_table_header *rhct; + acpi_status status; unsigned long hartid; + unsigned int cpu; isa2hwcap['i' - 'a'] = COMPAT_HWCAP_ISA_I; isa2hwcap['m' - 'a'] = COMPAT_HWCAP_ISA_M; @@ -106,18 +112,36 @@ void __init riscv_fill_hwcap(void) bitmap_zero(riscv_isa, RISCV_ISA_EXT_MAX); - for_each_of_cpu_node(node) { + if (!acpi_disabled) { + status = acpi_get_table(ACPI_SIG_RHCT, 0, &rhct); + if (ACPI_FAILURE(status)) + return; + } + + for_each_possible_cpu(cpu) { unsigned long this_hwcap = 0; DECLARE_BITMAP(this_isa, RISCV_ISA_EXT_MAX); const char *temp; - rc = riscv_of_processor_hartid(node, &hartid); - if (rc < 0) - continue; + if (acpi_disabled) { + node = of_cpu_device_node_get(cpu); + if (node) { + rc = riscv_of_processor_hartid(node, &hartid); + if (rc < 0) + continue; - if (of_property_read_string(node, "riscv,isa", &isa)) { - pr_warn("Unable to find \"riscv,isa\" devicetree entry\n"); - continue; + if (of_property_read_string(node, "riscv,isa", &isa)) { + pr_warn("Unable to find \"riscv,isa\" devicetree entry\n"); + continue; + } + of_node_put(node); + } + } else { + rc = acpi_get_riscv_isa(rhct, get_acpi_id_for_cpu(cpu), &isa); + if (rc < 0) { + pr_warn("Unable to get ISA for the hart - %d\n", cpu); + continue; + } } temp = isa; @@ -248,6 +272,9 @@ void __init riscv_fill_hwcap(void) bitmap_and(riscv_isa, riscv_isa, this_isa, RISCV_ISA_EXT_MAX); } + if (!acpi_disabled) + acpi_put_table((struct acpi_table_header *)rhct); + /* We don't support systems with F but without D, so mask those out * here. */ if ((elf_hwcap & COMPAT_HWCAP_ISA_F) && !(elf_hwcap & COMPAT_HWCAP_ISA_D)) { From patchwork Thu Feb 16 18:20:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 654128 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5E6CEC61DA4 for ; Thu, 16 Feb 2023 18:23:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230375AbjBPSXG (ORCPT ); Thu, 16 Feb 2023 13:23:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56822 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230328AbjBPSWc (ORCPT ); Thu, 16 Feb 2023 13:22:32 -0500 Received: from mail-pj1-x1033.google.com (mail-pj1-x1033.google.com [IPv6:2607:f8b0:4864:20::1033]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1354F50344 for ; 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Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Conor Dooley , Andrew Jones , Anup Patel , Atish Patra , Sunil V L , "Rafael J . Wysocki" Subject: [PATCH V2 14/21] irqchip/riscv-intc: Add ACPI support Date: Thu, 16 Feb 2023 23:50:36 +0530 Message-Id: <20230216182043.1946553-15-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216182043.1946553-1-sunilvl@ventanamicro.com> References: <20230216182043.1946553-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Add support for initializing the RISC-V INTC driver on ACPI platforms. Signed-off-by: Sunil V L Acked-by: Rafael J. Wysocki Reviewed-by: Andrew Jones --- drivers/irqchip/irq-riscv-intc.c | 78 +++++++++++++++++++++++++++----- 1 file changed, 66 insertions(+), 12 deletions(-) diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c index f229e3e66387..97a8db0fbc6c 100644 --- a/drivers/irqchip/irq-riscv-intc.c +++ b/drivers/irqchip/irq-riscv-intc.c @@ -6,6 +6,7 @@ */ #define pr_fmt(fmt) "riscv-intc: " fmt +#include #include #include #include @@ -112,6 +113,30 @@ static struct fwnode_handle *riscv_intc_hwnode(void) return intc_domain->fwnode; } +static int __init riscv_intc_init_common(struct fwnode_handle *fn) +{ + int rc; + + intc_domain = irq_domain_create_linear(fn, BITS_PER_LONG, + &riscv_intc_domain_ops, NULL); + if (!intc_domain) { + pr_err("unable to add IRQ domain\n"); + return -ENXIO; + } + + rc = set_handle_irq(&riscv_intc_irq); + if (rc) { + pr_err("failed to set irq handler\n"); + return rc; + } + + riscv_set_intc_hwnode_fn(riscv_intc_hwnode); + + pr_info("%d local interrupts mapped\n", BITS_PER_LONG); + + return 0; +} + static int __init riscv_intc_init(struct device_node *node, struct device_node *parent) { @@ -133,24 +158,53 @@ static int __init riscv_intc_init(struct device_node *node, if (riscv_hartid_to_cpuid(hartid) != smp_processor_id()) return 0; - intc_domain = irq_domain_add_linear(node, BITS_PER_LONG, - &riscv_intc_domain_ops, NULL); - if (!intc_domain) { - pr_err("unable to add IRQ domain\n"); - return -ENXIO; - } - - rc = set_handle_irq(&riscv_intc_irq); + rc = riscv_intc_init_common(of_node_to_fwnode(node)); if (rc) { - pr_err("failed to set irq handler\n"); + pr_err("failed to initialize INTC\n"); return rc; } - riscv_set_intc_hwnode_fn(riscv_intc_hwnode); + return 0; +} - pr_info("%d local interrupts mapped\n", BITS_PER_LONG); +IRQCHIP_DECLARE(riscv, "riscv,cpu-intc", riscv_intc_init); + +#ifdef CONFIG_ACPI + +static int __init +riscv_intc_acpi_init(union acpi_subtable_headers *header, + const unsigned long end) +{ + int rc; + struct fwnode_handle *fn; + struct acpi_madt_rintc *rintc; + + rintc = (struct acpi_madt_rintc *)header; + + /* + * The ACPI MADT will have one INTC for each CPU (or HART) + * so riscv_intc_acpi_init() function will be called once + * for each INTC. We only do INTC initialization + * for the INTC belonging to the boot CPU (or boot HART). + */ + if (riscv_hartid_to_cpuid(rintc->hart_id) != smp_processor_id()) + return 0; + + fn = irq_domain_alloc_named_fwnode("RISCV-INTC"); + if (!fn) { + pr_err("unable to allocate INTC FW node\n"); + return -ENOMEM; + } + + rc = riscv_intc_init_common(fn); + if (rc) { + pr_err("failed to initialize INTC\n"); + return rc; + } return 0; } -IRQCHIP_DECLARE(riscv, "riscv,cpu-intc", riscv_intc_init); +IRQCHIP_ACPI_DECLARE(riscv_intc, ACPI_MADT_TYPE_RINTC, NULL, + ACPI_MADT_RINTC_VERSION_V1, riscv_intc_acpi_init); +#endif From patchwork Thu Feb 16 18:20:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 654127 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 47FE5C636D7 for ; Thu, 16 Feb 2023 18:23:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230348AbjBPSXZ (ORCPT ); Thu, 16 Feb 2023 13:23:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56980 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230352AbjBPSWi (ORCPT ); Thu, 16 Feb 2023 13:22:38 -0500 Received: from mail-pl1-x632.google.com (mail-pl1-x632.google.com [IPv6:2607:f8b0:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 03CA750379 for ; Thu, 16 Feb 2023 10:22:13 -0800 (PST) Received: by mail-pl1-x632.google.com with SMTP id e12so2933928plh.6 for ; Thu, 16 Feb 2023 10:22:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vv/SJn971dfjdTrZfssRImVac3G99NBb7ONmt1Vsq2I=; b=myJLNPbRJLi/wYDYC+up98t51CDSvleQNl+jgG0GytS3WhARAlv6QffJ1MZuDRuhyU 8nx+Iqk3/0KdzmA3KZj7nwInkmfGs4j8tDN+L8Vu+X478ausemy9Wu5+S7F96/g0/aP4 6SJcqu0eqxByONPkPg6XnsFYBAkhdoWdSfHoNJetFsAg24XKyXXc6ALuunxuhMjGApeS 3RJQ1bIyZZJRcBM/v640JXSPpA8mjzq5s2a72ChX7W0uTYD2fOAIchRGYp/4yOEjIl5D tDnC5SXkZ9P0rYtWqNgSCJ5fpvmDvMwd9aOziTUVR0hXElPSBVuov+zz6/eecwNO7wHJ xDmA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vv/SJn971dfjdTrZfssRImVac3G99NBb7ONmt1Vsq2I=; b=37F4/5fwlUrA7HNLkk0ubOxP13YHdfiWRXbnjyg1XohP1og4++e4JoCLvpbM6dCIj7 yEaExNkwOr+abzyB21YDQ/XMZcforprO7/F8KNWCavhuz1XS4exU8cefFg+7/IlqEtZA w8kpCB+34aWKfG8KvdQy79TqJ0Q1JKuw5wBz4Lcir/JC82NOSzrEvPVM25STKbVh+3l7 be5p9uv/F+eXkZuEUaGXBy28X3YMPi1gKm62aO65hJaDmnAH6GEqwWnsqptGR+qqwVs8 ZuW3vJrHH160LPaP1QE3RlZsvCYkBBV32tBjQX23lky1TUQcHhtDuuk65TdaX6snCr+o xM6A== X-Gm-Message-State: AO0yUKXxLa1Dej6WgNffP1XTw/v3KS4t9JA4GGcLAUIt4z5ChwUDUrKB 3YAuQTHGT7SNy6UwnIg8I1eaBA== X-Google-Smtp-Source: AK7set+NBRmM54Hgp3O9CpS/Jfakh9iB+b7vBRwhQtSjUmCXjPcQd5RBQeVnlUJ0IOn5iswQgx12sA== X-Received: by 2002:a05:6a21:338c:b0:bc:b1ec:89f3 with SMTP id yy12-20020a056a21338c00b000bcb1ec89f3mr7638758pzb.50.1676571729309; Thu, 16 Feb 2023 10:22:09 -0800 (PST) Received: from kerodi.Dlink ([49.206.14.226]) by smtp.gmail.com with ESMTPSA id n21-20020a637215000000b004dff15fc121sm1517574pgc.36.2023.02.16.10.22.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 10:22:08 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , Paul Walmsley , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Conor Dooley , Andrew Jones , Anup Patel , Atish Patra , Sunil V L , "Rafael J . Wysocki" Subject: [PATCH V2 16/21] clocksource/timer-riscv: Add ACPI support Date: Thu, 16 Feb 2023 23:50:38 +0530 Message-Id: <20230216182043.1946553-17-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216182043.1946553-1-sunilvl@ventanamicro.com> References: <20230216182043.1946553-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Initialize the timer driver based on RHCT table on ACPI based platforms. Signed-off-by: Sunil V L Acked-by: Rafael J. Wysocki Reviewed-by: Andrew Jones --- drivers/clocksource/timer-riscv.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c index 2ae8e300d303..5fb0eac52bdd 100644 --- a/drivers/clocksource/timer-riscv.c +++ b/drivers/clocksource/timer-riscv.c @@ -10,6 +10,7 @@ #define pr_fmt(fmt) "riscv-timer: " fmt +#include #include #include #include @@ -201,3 +202,13 @@ static int __init riscv_timer_init_dt(struct device_node *n) } TIMER_OF_DECLARE(riscv_timer, "riscv", riscv_timer_init_dt); + +#ifdef CONFIG_ACPI +static int __init riscv_timer_acpi_init(struct acpi_table_header *table) +{ + return riscv_timer_init_common(); +} + +TIMER_ACPI_DECLARE(aclint_mtimer, ACPI_SIG_RHCT, riscv_timer_acpi_init); + +#endif From patchwork Thu Feb 16 18:20:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 654126 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08F02C636D7 for ; Thu, 16 Feb 2023 18:23:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230398AbjBPSXj (ORCPT ); Thu, 16 Feb 2023 13:23:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56758 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230365AbjBPSWz (ORCPT ); Thu, 16 Feb 2023 13:22:55 -0500 Received: from mail-pl1-x636.google.com (mail-pl1-x636.google.com [IPv6:2607:f8b0:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A6E4E505F8 for ; Thu, 16 Feb 2023 10:22:20 -0800 (PST) Received: by mail-pl1-x636.google.com with SMTP id k13so2983797plg.0 for ; Thu, 16 Feb 2023 10:22:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=6k9kFgHhGrniFtz38iNTmjHDIue+Ed5Mfkw3G0DBXLc=; b=kK5aVj5XXgADplAjlm4YI2+at0WD39rzqE/oIyTucqgfAxPxz7s7VY0dLKzFQG5tS9 ohX9Fg8TbtfoL8ktTHsnWOfizVCmB8RTZWvbpQ3KV+LgYLfvrtpdXcpHf793sUDvzNMg lrBMnAjwcfhd9iQm5CeiEPB3lza3dy4hn9W8Tsx6uN7FO+cuhc1xO65+BQY6JS50/PmX ak8JWUQbkP69ZNG5odZ2HxxwPL4oirSxHRqb9SJ1QeT06nvilKmAjBuqESK7HvhO7Oss K77HkI2Oy23RBT+GMy9TTpF9xWGTHgx/4UNeOUZ28D/80kgEFkadRcIz47s4KDKFKP6k svHg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6k9kFgHhGrniFtz38iNTmjHDIue+Ed5Mfkw3G0DBXLc=; b=eTE8vqikYCH3NRCdATbmomghmd2z5oHOTNMNmaCPcWVYuteN2lI96a6BRgh4edLqC6 g5nYhmLSFlMA8m3Lycz/ht9Wsc23Sr/UQqlbuS9jO+LguLPM5AVxL+Lv/wZOqYPH/hSs n2yyLbD4nQ/To4+3C4BmHvSe2WsfmgUh2WlSdGGPcZHfeYFQQywbZt9++H+7eSMO5Ja8 2PDSEU/tVFIcZWRmc1dXuTUZ+re47hkGIaAf95VaHerFo4aP5jPD6bTdxf0Z3PiAvuJN aVJlAATy9+ZSPXtqXXeGvJ0lbNBtGh+9cfo/oOFOo//bQCkvE+PH2RJP/duabUo2Er7U AvDg== X-Gm-Message-State: AO0yUKVVx0yjbmarmcGI9r37OF8Cq07uDfxZU6CVnmZ5acmqLrXHuvqP TFavzZX0PxBzvlDnXpDDzvyjaA== X-Google-Smtp-Source: AK7set9c+aWEKO1Pw1h7Pzh7UhGNa//RafytfZpTPnUB+L6FRIQe5YzjjBo8BOJIm3kXdNQRXY4WEA== X-Received: by 2002:a05:6a20:8f04:b0:bf:73d:485e with SMTP id b4-20020a056a208f0400b000bf073d485emr7842207pzk.54.1676571738700; Thu, 16 Feb 2023 10:22:18 -0800 (PST) Received: from kerodi.Dlink ([49.206.14.226]) by smtp.gmail.com with ESMTPSA id n21-20020a637215000000b004dff15fc121sm1517574pgc.36.2023.02.16.10.22.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 10:22:18 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , Paul Walmsley , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Conor Dooley , Andrew Jones , Anup Patel , Atish Patra , Sunil V L , "Rafael J . Wysocki" Subject: [PATCH V2 18/21] RISC-V: Add ACPI initialization in setup_arch() Date: Thu, 16 Feb 2023 23:50:40 +0530 Message-Id: <20230216182043.1946553-19-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216182043.1946553-1-sunilvl@ventanamicro.com> References: <20230216182043.1946553-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Initialize the ACPI core for RISC-V during boot. ACPI tables and interpreter are initialized based on the information passed from the firmware and the value of the kernel parameter 'acpi'. Signed-off-by: Sunil V L Acked-by: Rafael J. Wysocki Reviewed-by: Andrew Jones --- arch/riscv/kernel/acpi.c | 113 ++++++++++++++++++++++++++++++++++++++ arch/riscv/kernel/setup.c | 25 ++++++--- 2 files changed, 130 insertions(+), 8 deletions(-) diff --git a/arch/riscv/kernel/acpi.c b/arch/riscv/kernel/acpi.c index 13b26c87c136..35e7b24a30c8 100644 --- a/arch/riscv/kernel/acpi.c +++ b/arch/riscv/kernel/acpi.c @@ -16,6 +16,7 @@ #include #include #include +#include int acpi_noirq = 1; /* skip ACPI IRQ initialization */ int acpi_disabled = 1; @@ -26,6 +27,118 @@ EXPORT_SYMBOL(acpi_pci_disabled); static unsigned int intc_count; static struct acpi_madt_rintc cpu_madt_rintc[NR_CPUS]; +static bool param_acpi_off __initdata; +static bool param_acpi_on __initdata; +static bool param_acpi_force __initdata; + +static int __init parse_acpi(char *arg) +{ + if (!arg) + return -EINVAL; + + /* "acpi=off" disables both ACPI table parsing and interpreter */ + if (strcmp(arg, "off") == 0) + param_acpi_off = true; + else if (strcmp(arg, "on") == 0) /* prefer ACPI over DT */ + param_acpi_on = true; + else if (strcmp(arg, "force") == 0) /* force ACPI to be enabled */ + param_acpi_force = true; + else + return -EINVAL; /* Core will print when we return error */ + + return 0; +} +early_param("acpi", parse_acpi); + +/* + * acpi_fadt_sanity_check() - Check FADT presence and carry out sanity + * checks on it + * + * Return 0 on success, <0 on failure + */ +static int __init acpi_fadt_sanity_check(void) +{ + struct acpi_table_header *table; + struct acpi_table_fadt *fadt; + acpi_status status; + int ret = 0; + + /* + * FADT is required on riscv; retrieve it to check its presence + * and carry out revision and ACPI HW reduced compliancy tests + */ + status = acpi_get_table(ACPI_SIG_FADT, 0, &table); + if (ACPI_FAILURE(status)) { + const char *msg = acpi_format_exception(status); + + pr_err("Failed to get FADT table, %s\n", msg); + return -ENODEV; + } + + fadt = (struct acpi_table_fadt *)table; + + if (!(fadt->flags & ACPI_FADT_HW_REDUCED)) { + pr_err("FADT not ACPI hardware reduced compliant\n"); + ret = -EINVAL; + } + + /* + * acpi_get_table() creates FADT table mapping that + * should be released after parsing and before resuming boot + */ + acpi_put_table(table); + return ret; +} + +/* + * acpi_boot_table_init() called from setup_arch(), always. + * 1. find RSDP and get its address, and then find XSDT + * 2. extract all tables and checksums them all + * 3. check ACPI FADT HW reduced flag + * + * We can parse ACPI boot-time tables such as MADT after + * this function is called. + * + * On return ACPI is enabled if either: + * + * - ACPI tables are initialized and sanity checks passed + * - acpi=force was passed in the command line and ACPI was not disabled + * explicitly through acpi=off command line parameter + * + * ACPI is disabled on function return otherwise + */ +void __init acpi_boot_table_init(void) +{ + /* + * Enable ACPI instead of device tree unless + * - ACPI has been disabled explicitly (acpi=off), or + * - firmware has not populated ACPI ptr in EFI system table + * and ACPI has not been [force] enabled (acpi=on|force) + */ + if (param_acpi_off || + (!param_acpi_on && !param_acpi_force && + efi.acpi20 == EFI_INVALID_TABLE_ADDR)) + return; + + /* + * ACPI is disabled at this point. Enable it in order to parse + * the ACPI tables and carry out sanity checks + */ + enable_acpi(); + + /* + * If ACPI tables are initialized and FADT sanity checks passed, + * leave ACPI enabled and carry on booting; otherwise disable ACPI + * on initialization error. + * If acpi=force was passed on the command line it forces ACPI + * to be enabled even if its initialization failed. + */ + if (acpi_table_init() || acpi_fadt_sanity_check()) { + pr_err("Failed to init ACPI tables\n"); + if (!param_acpi_force) + disable_acpi(); + } +} static int acpi_parse_madt_rintc(union acpi_subtable_headers *header, const unsigned long end) { diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c index 4335f08ffaf2..c2ee7f4427a1 100644 --- a/arch/riscv/kernel/setup.c +++ b/arch/riscv/kernel/setup.c @@ -8,6 +8,7 @@ * Nick Kossifidis */ +#include #include #include #include @@ -276,14 +277,22 @@ void __init setup_arch(char **cmdline_p) efi_init(); paging_init(); -#if IS_ENABLED(CONFIG_BUILTIN_DTB) - unflatten_and_copy_device_tree(); -#else - if (early_init_dt_verify(__va(XIP_FIXUP(dtb_early_pa)))) - unflatten_device_tree(); - else - pr_err("No DTB found in kernel mappings\n"); -#endif + + /* Parse the ACPI tables for possible boot-time configuration */ + acpi_boot_table_init(); + if (acpi_disabled) { + if (IS_ENABLED(CONFIG_BUILTIN_DTB)) { + unflatten_and_copy_device_tree(); + } else { + if (early_init_dt_verify(__va(XIP_FIXUP(dtb_early_pa)))) + unflatten_device_tree(); + else + pr_err("No DTB found in kernel mappings\n"); + } + } else { + early_init_dt_verify(__va(XIP_FIXUP(dtb_early_pa))); + } + early_init_fdt_scan_reserved_mem(); misc_mem_init(); From patchwork Thu Feb 16 18:20:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 654125 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82531C636D7 for ; Thu, 16 Feb 2023 18:23:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230292AbjBPSXu (ORCPT ); Thu, 16 Feb 2023 13:23:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56896 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230252AbjBPSXU (ORCPT ); Thu, 16 Feb 2023 13:23:20 -0500 Received: from mail-pl1-x62a.google.com (mail-pl1-x62a.google.com [IPv6:2607:f8b0:4864:20::62a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8A1D750AEA for ; Thu, 16 Feb 2023 10:22:32 -0800 (PST) Received: by mail-pl1-x62a.google.com with SMTP id b5so2939278plz.5 for ; Thu, 16 Feb 2023 10:22:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=k6uh9i4Yg2UK+dtGNl63Dd2v2b9w/htIfSHYIG3sIgo=; b=mVXuI8tX22NJDu6yVW/g1R+u+kgg7UXHeVhfNyF0TbYKOj0ZLb3xWMXyv+ME0Gy0rG tVCkdPYlWPmzvGBICTXFxxMRlSS8pK/B2pxXGD9Sc36/petkDWVVq6qQSlCJSPy1sEg4 6AEhM/RTUff4Vh1y1IE6JfJ8iJDn39isEDMJI5giDQ4EWkEQRw9J6xFOwqvn4VmXNGM+ Ws+txz0rVy1NiDnjoPhdWs8J1x1YM1/HGFFOzizB5CJuJMkMuD6f2JS8IUgzj1T42PEs u7s3Js0bFqORE8smkyQu+P363zbCeyeYdVQRhTHs9bfJBw+/SiFAtZAR2SXhVgOjav4v YBsA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=k6uh9i4Yg2UK+dtGNl63Dd2v2b9w/htIfSHYIG3sIgo=; b=2OzekNTZEl1yldrdqjFgRNM8005kaZAh6C9LuiEoUqdAHGfBabCHBHD6pwZ1yQZzoG cWuxEKO/JfRjHYJkBV1+W4IzYMpBmr+3DvWCKLCfIyfrwDd9IEDSrvJQ6Oz2SsKJoaFW lDINilSdKbTF7FQUwMIGg6tY6wO7CC8rD8Uy0a3V4yycoQsDiEMOCN07chblEZCKu2ra XMJEqM88m3hDrc9Hvp8U3+D5Z8QvsU+9JqDvwI7aafbtYAONEoH2GjInUo+PtkAASGSO gqK/67leArYVBl6ZqAzSA2lYWNGSV8OKJ0hLVDds3o5103i4dka788jpjgiP9d6vbwn3 DbIg== X-Gm-Message-State: AO0yUKUKRAcDT6Rhm27BT7yZTu+VRjzN0Z82wWqycopu1tKd6b4iEIL1 24JZHXfHxKmttqu/UO6RSaBF6w== X-Google-Smtp-Source: AK7set8osOOcu+B/NPunBtlVAq9P8M092Oegw2Ys2UWMJiWbFSK/cFchK4srmj2/JHgMb6lllccJdQ== X-Received: by 2002:a17:902:e88d:b0:199:15bb:8316 with SMTP id w13-20020a170902e88d00b0019915bb8316mr8101008plg.68.1676571748298; Thu, 16 Feb 2023 10:22:28 -0800 (PST) Received: from kerodi.Dlink ([49.206.14.226]) by smtp.gmail.com with ESMTPSA id n21-20020a637215000000b004dff15fc121sm1517574pgc.36.2023.02.16.10.22.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 10:22:27 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , Paul Walmsley , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Conor Dooley , Andrew Jones , Anup Patel , Atish Patra , Sunil V L , "Rafael J . Wysocki" Subject: [PATCH V2 20/21] MAINTAINERS: Add entry for drivers/acpi/riscv Date: Thu, 16 Feb 2023 23:50:42 +0530 Message-Id: <20230216182043.1946553-21-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216182043.1946553-1-sunilvl@ventanamicro.com> References: <20230216182043.1946553-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org ACPI defines few RISC-V specific tables which need parsing code added in drivers/acpi/riscv. Add maintainer entries for this newly created folder. Signed-off-by: Sunil V L Acked-by: Rafael J. Wysocki --- MAINTAINERS | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 39ff1a717625..d47212194457 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -450,6 +450,13 @@ S: Orphan F: drivers/platform/x86/wmi.c F: include/uapi/linux/wmi.h +ACPI FOR RISC-V (ACPI/riscv) +M: Sunil V L +L: linux-acpi@vger.kernel.org +L: linux-riscv@lists.infradead.org +S: Maintained +F: drivers/acpi/riscv + ACRN HYPERVISOR SERVICE MODULE M: Fei Li L: acrn-dev@lists.projectacrn.org (subscribers-only)